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| author | Jagan Teki <jagan@amarulasolutions.com> | 2020-04-20 15:36:06 +0530 |
|---|---|---|
| committer | Jagan Teki <jagan@amarulasolutions.com> | 2020-04-30 22:34:20 +0530 |
| commit | 5bf3f3dd11db4048d7ad60f2ee210dc50da26051 (patch) | |
| tree | fa36368d1fe8603edffef141bf7d4b9b9ceeec0d | |
| parent | e67cd814ee2d00e1b8651bc1cd889ac6f45ed26b (diff) | |
| download | u-boot-5bf3f3dd11db4048d7ad60f2ee210dc50da26051.zip u-boot-5bf3f3dd11db4048d7ad60f2ee210dc50da26051.tar.gz u-boot-5bf3f3dd11db4048d7ad60f2ee210dc50da26051.tar.bz2 | |
mtd: spi-nor: Enable QE bit for ISSI flash
Enable QE bit for ISSI flash chips.
QE enablement logic is similar to what Macronix
has, so reuse the existing code itself.
Cc: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
| -rw-r--r-- | drivers/mtd/spi/spi-nor-core.c | 1 | ||||
| -rw-r--r-- | include/linux/mtd/spi-nor.h | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index 3bf8ddf..e840c60 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -325,6 +325,7 @@ static int set_4byte(struct spi_nor *nor, const struct flash_info *info, case SNOR_MFR_MICRON: /* Some Micron need WREN command; all will accept it */ need_wren = true; + case SNOR_MFR_ISSI: case SNOR_MFR_MACRONIX: case SNOR_MFR_WINBOND: if (need_wren) diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index ec144a0..233fdc3 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -22,6 +22,7 @@ #define SNOR_MFR_INTEL CFI_MFR_INTEL #define SNOR_MFR_ST CFI_MFR_ST /* ST Micro <--> Micron */ #define SNOR_MFR_MICRON CFI_MFR_MICRON /* ST Micro <--> Micron */ +#define SNOR_MFR_ISSI CFI_MFR_PMC #define SNOR_MFR_MACRONIX CFI_MFR_MACRONIX #define SNOR_MFR_SPANSION CFI_MFR_AMD #define SNOR_MFR_SST CFI_MFR_SST |