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| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2020-08-20 13:02:20 +0300 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2020-09-01 13:38:31 +0800 |
| commit | 1d01d0c2f0962e26a3661a2a7d497afa3fc1ed34 (patch) | |
| tree | 46dfb125daf534376de27200fa9981f93014a1bc | |
| parent | cf9f38064d048ac12cd3a7e1a40a84aa8071f712 (diff) | |
| download | u-boot-1d01d0c2f0962e26a3661a2a7d497afa3fc1ed34.zip u-boot-1d01d0c2f0962e26a3661a2a7d497afa3fc1ed34.tar.gz u-boot-1d01d0c2f0962e26a3661a2a7d497afa3fc1ed34.tar.bz2 | |
x86: Introduce USE_EARLY_BOARD_INIT option
Introduce USE_EARLY_BOARD_INIT option and select it by the actual users.
Cc: George McCollister <george.mccollister@gmail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Aiden Park <aiden.park@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| -rw-r--r-- | arch/x86/Kconfig | 3 | ||||
| -rw-r--r-- | arch/x86/cpu/start.S | 3 | ||||
| -rw-r--r-- | board/google/chromebook_coral/Kconfig | 1 | ||||
| -rw-r--r-- | board/google/chromebook_link/Kconfig | 1 | ||||
| -rw-r--r-- | board/google/chromebook_samus/Kconfig | 1 |
5 files changed, 9 insertions, 0 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index a34b108..76276c6 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -203,6 +203,9 @@ config SPL_X86_32BIT_INIT help This is enabled when 32-bit init is in SPL +config USE_EARLY_BOARD_INIT + bool + config RESET_SEG_START hex depends on X86_RESET_VECTOR diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S index 4ad515c..3b6ed37 100644 --- a/arch/x86/cpu/start.S +++ b/arch/x86/cpu/start.S @@ -88,6 +88,7 @@ _start: /* Clear the interrupt vectors */ lidt blank_idt_ptr +#ifdef CONFIG_USE_EARLY_BOARD_INIT /* * Critical early platform init - generally not used, we prefer init * to happen later when we have a console, in case something goes @@ -96,6 +97,8 @@ _start: jmp early_board_init .globl early_board_init_ret early_board_init_ret: +#endif + post_code(POST_START) /* Initialise Cache-As-RAM */ diff --git a/board/google/chromebook_coral/Kconfig b/board/google/chromebook_coral/Kconfig index 940bee8..2767195 100644 --- a/board/google/chromebook_coral/Kconfig +++ b/board/google/chromebook_coral/Kconfig @@ -18,6 +18,7 @@ config SYS_TEXT_BASE config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select X86_RESET_VECTOR + select USE_EARLY_BOARD_INIT select INTEL_APOLLOLAKE select BOARD_ROMSIZE_KB_16384 diff --git a/board/google/chromebook_link/Kconfig b/board/google/chromebook_link/Kconfig index 944716d..dd29ddf 100644 --- a/board/google/chromebook_link/Kconfig +++ b/board/google/chromebook_link/Kconfig @@ -19,6 +19,7 @@ config SYS_TEXT_BASE config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select X86_RESET_VECTOR + select USE_EARLY_BOARD_INIT select NORTHBRIDGE_INTEL_IVYBRIDGE select HAVE_INTEL_ME select BOARD_ROMSIZE_KB_8192 diff --git a/board/google/chromebook_samus/Kconfig b/board/google/chromebook_samus/Kconfig index 90c23cb..9f66d79 100644 --- a/board/google/chromebook_samus/Kconfig +++ b/board/google/chromebook_samus/Kconfig @@ -19,6 +19,7 @@ config SYS_TEXT_BASE config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select X86_RESET_VECTOR + select USE_EARLY_BOARD_INIT select INTEL_BROADWELL select HAVE_INTEL_ME select BOARD_ROMSIZE_KB_8192 |