diff options
| author | Minda Chen <minda.chen@starfivetech.com> | 2023-08-07 16:53:36 +0800 |
|---|---|---|
| committer | Leo Yu-Chi Liang <ycliang@andestech.com> | 2023-08-10 10:58:01 +0800 |
| commit | 1037c5ba3702996d854becb3e719d44d2178c1bf (patch) | |
| tree | 5b07d798df619ebd7b31a34304201385da5d73f3 | |
| parent | 8d184d4b652bad455e17d2d0e451c0e08e112f34 (diff) | |
| download | u-boot-1037c5ba3702996d854becb3e719d44d2178c1bf.zip u-boot-1037c5ba3702996d854becb3e719d44d2178c1bf.tar.gz u-boot-1037c5ba3702996d854becb3e719d44d2178c1bf.tar.bz2 | |
riscv: dts: starfive: Enable pcie0 dts node
In StarFive VF2 board. pcie0 connect to VTI usb controller.
Enable it to support usb host.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
| -rw-r--r-- | arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi index bf7fdb4..e40f57a 100644 --- a/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi @@ -311,7 +311,7 @@ &pcie0 { reset-gpios = <&sysgpio 26 GPIO_ACTIVE_LOW>; - status = "disabled"; + status = "okay"; }; &pcie1 { |