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| author | Peng Fan <peng.fan@nxp.com> | 2021-08-07 16:01:06 +0800 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2021-08-09 14:46:51 +0200 |
| commit | 8a58897e0e380fa03438809e71aa7d91b80aec95 (patch) | |
| tree | beb23e7558059eec4b65d1d6c32fcbb34c851f81 | |
| parent | d24c7d54f032bdb26e1d290f82ebd2f7d247d93d (diff) | |
| download | u-boot-8a58897e0e380fa03438809e71aa7d91b80aec95.zip u-boot-8a58897e0e380fa03438809e71aa7d91b80aec95.tar.gz u-boot-8a58897e0e380fa03438809e71aa7d91b80aec95.tar.bz2 | |
imx8ulp: soc: correct reset cause
The CMC1 SRS reflects the current reset cause, not SSRS.
Then you could get "Reset cause: WARM-WDG" when issue reset in U-Boot.
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
| -rw-r--r-- | arch/arm/mach-imx/imx8ulp/soc.c | 10 |
1 files changed, 3 insertions, 7 deletions
diff --git a/arch/arm/mach-imx/imx8ulp/soc.c b/arch/arm/mach-imx/imx8ulp/soc.c index 0728cb9..9bdbe3c 100644 --- a/arch/arm/mach-imx/imx8ulp/soc.c +++ b/arch/arm/mach-imx/imx8ulp/soc.c @@ -149,8 +149,6 @@ enum bt_mode get_boot_mode(void) #define CMC_SRS_POR BIT(1) #define CMC_SRS_WUP BIT(0) -static u32 reset_cause = -1; - static char *get_reset_cause(char *ret) { u32 cause1, cause = 0, srs = 0; @@ -163,9 +161,7 @@ static char *get_reset_cause(char *ret) srs = readl(reg_srs); cause1 = readl(reg_ssrs); - reset_cause = cause1; - - cause = cause1 & (CMC_SRS_POR | CMC_SRS_WUP | CMC_SRS_WARM); + cause = srs & (CMC_SRS_POR | CMC_SRS_WUP | CMC_SRS_WARM); switch (cause) { case CMC_SRS_POR: @@ -175,7 +171,7 @@ static char *get_reset_cause(char *ret) sprintf(ret, "%s", "WUP"); break; case CMC_SRS_WARM: - cause = cause1 & (CMC_SRS_WDG | CMC_SRS_SW | + cause = srs & (CMC_SRS_WDG | CMC_SRS_SW | CMC_SRS_JTAG_RST); switch (cause) { case CMC_SRS_WDG: @@ -193,7 +189,7 @@ static char *get_reset_cause(char *ret) } break; default: - sprintf(ret, "%s-%X", "UNKN", cause1); + sprintf(ret, "%s-%X", "UNKN", srs); break; } |