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| author | Peng Fan <peng.fan@nxp.com> | 2021-08-07 16:00:46 +0800 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2021-08-09 14:46:51 +0200 |
| commit | 744c5fde977accbd29532a988da1782bdddb6f66 (patch) | |
| tree | 398f090f9e1ad2c8f5857402a4a663a3ba51064c | |
| parent | a84dab4f70a47b17f92b36f8859d12b3083a0126 (diff) | |
| download | u-boot-744c5fde977accbd29532a988da1782bdddb6f66.zip u-boot-744c5fde977accbd29532a988da1782bdddb6f66.tar.gz u-boot-744c5fde977accbd29532a988da1782bdddb6f66.tar.bz2 | |
drivers: mmc: fsl_esdhc_imx: support i.MX8ULP
i.MX8ULP reuse same SDHC IP as i.MX8M, so follow i.MX8M code logic.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
| -rw-r--r-- | drivers/mmc/Kconfig | 2 | ||||
| -rw-r--r-- | drivers/mmc/fsl_esdhc_imx.c | 12 |
2 files changed, 9 insertions, 5 deletions
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 717ce5a..1569e8c 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -832,7 +832,7 @@ config FSL_ESDHC_IMX config FSL_USDHC bool "Freescale/NXP i.MX uSDHC controller support" - depends on MX6 || MX7 ||ARCH_MX7ULP || IMX8 || IMX8M || IMXRT + depends on MX6 || MX7 ||ARCH_MX7ULP || IMX8 || IMX8M || IMX8ULP || IMXRT select FSL_ESDHC_IMX help This enables the Ultra Secured Digital Host Controller enhancements diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c index 465d935..aabf395 100644 --- a/drivers/mmc/fsl_esdhc_imx.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -291,7 +291,8 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, { int timeout; struct fsl_esdhc *regs = priv->esdhc_regs; -#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) +#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) || \ + defined(CONFIG_IMX8ULP) dma_addr_t addr; #endif uint wml_value; @@ -304,7 +305,8 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, esdhc_clrsetbits32(®s->wml, WML_RD_WML_MASK, wml_value); #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) +#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) || \ + defined(CONFIG_IMX8ULP) addr = virt_to_phys((void *)(data->dest)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -341,7 +343,8 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, esdhc_clrsetbits32(®s->wml, WML_WR_WML_MASK, wml_value << 16); #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) +#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) || \ + defined(CONFIG_IMX8ULP) addr = virt_to_phys((void *)(data->src)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -406,7 +409,8 @@ static void check_and_invalidate_dcache_range unsigned end = 0; unsigned size = roundup(ARCH_DMA_MINALIGN, data->blocks*data->blocksize); -#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) +#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) || \ + defined(CONFIG_IMX8ULP) dma_addr_t addr; addr = virt_to_phys((void *)(data->dest)); |