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| author | Priyanka Singh <priyanka.singh@nxp.com> | 2021-08-19 12:37:31 +0530 |
|---|---|---|
| committer | Priyanka Jain <priyanka.jain@nxp.com> | 2021-11-09 14:43:24 +0530 |
| commit | 3c922ce99cc0c7b1f2f5615a2e4216dfdbb175c4 (patch) | |
| tree | 549d505c13d89d75bba58e549c018440ec444e31 | |
| parent | 71b255b6575b8e859ffddc880cce3c7606c7abca (diff) | |
| download | u-boot-3c922ce99cc0c7b1f2f5615a2e4216dfdbb175c4.zip u-boot-3c922ce99cc0c7b1f2f5615a2e4216dfdbb175c4.tar.gz u-boot-3c922ce99cc0c7b1f2f5615a2e4216dfdbb175c4.tar.bz2 | |
board: freescale: t104xrdb: Set popts->cpo_sample to 0x54 for DDR3
Set popts->cpo_sample to 0x54 in t104xrdb/ddr.c to optimize cpo
Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| -rw-r--r-- | board/freescale/t104xrdb/ddr.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/board/freescale/t104xrdb/ddr.c b/board/freescale/t104xrdb/ddr.c index 8351f7c..539a36d 100644 --- a/board/freescale/t104xrdb/ddr.c +++ b/board/freescale/t104xrdb/ddr.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2013 Freescale Semiconductor, Inc. + * Copyright 2021 NXP */ #include <common.h> @@ -83,6 +84,7 @@ found: /* optimize cpo for erratum A-009942 */ popts->cpo_sample = 0x59; #else + popts->cpo_sample = 0x54; popts->half_strength_driver_enable = 0; #endif /* |