diff options
| author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2021-10-23 01:15:12 +0200 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-01-07 15:42:42 -0500 |
| commit | e9c63ab0e307a01e2ec3b1588f27b8f45f048dee (patch) | |
| tree | 0b809b31807e3514dc5a3f7039432c885b2793b5 | |
| parent | 2dc3ac57726b97008f3bdf710ca60bd6af6a2311 (diff) | |
| download | u-boot-e9c63ab0e307a01e2ec3b1588f27b8f45f048dee.zip u-boot-e9c63ab0e307a01e2ec3b1588f27b8f45f048dee.tar.gz u-boot-e9c63ab0e307a01e2ec3b1588f27b8f45f048dee.tar.bz2 | |
arm64: dts: imx8mm-cl-iot-gate-u-boot.dtsi: use common imx8mm-u-boot.dtsi
Use common imx8mm-u-boot.dtsi.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
| -rw-r--r-- | arch/arm/dts/imx8mm-cl-iot-gate-optee-u-boot.dtsi | 37 | ||||
| -rw-r--r-- | arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi | 37 |
2 files changed, 4 insertions, 70 deletions
diff --git a/arch/arm/dts/imx8mm-cl-iot-gate-optee-u-boot.dtsi b/arch/arm/dts/imx8mm-cl-iot-gate-optee-u-boot.dtsi index 67ce70d..bc8a138 100644 --- a/arch/arm/dts/imx8mm-cl-iot-gate-optee-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-cl-iot-gate-optee-u-boot.dtsi @@ -3,6 +3,8 @@ * Copyright 2019 NXP */ +#include "imx8mm-u-boot.dtsi" + / { binman: binman { multiple-images; @@ -22,11 +24,6 @@ }; }; -&{/soc@0} { - u-boot,dm-pre-reloc; - u-boot,dm-spl; -}; - &{/soc@0/bus@30800000/i2c@30a30000/pmic@4b} { u-boot,dm-spl; }; @@ -35,19 +32,6 @@ u-boot,dm-spl; }; -&aips1 { - u-boot,dm-spl; - u-boot,dm-pre-reloc; -}; - -&aips2 { - u-boot,dm-spl; -}; - -&aips3 { - u-boot,dm-spl; -}; - &binman { u-boot-spl-ddr { filename = "u-boot-spl-ddr.bin"; @@ -161,14 +145,6 @@ }; }; -&clk { - u-boot,dm-spl; - u-boot,dm-pre-reloc; - /delete-property/ assigned-clocks; - /delete-property/ assigned-clock-parents; - /delete-property/ assigned-clock-rates; -}; - &fec1 { phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; }; @@ -201,15 +177,6 @@ u-boot,dm-spl; }; -&iomuxc { - u-boot,dm-spl; -}; - -&osc_24m { - u-boot,dm-spl; - u-boot,dm-pre-reloc; -}; - &pinctrl_i2c2 { u-boot,dm-spl; }; diff --git a/arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi b/arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi index fe45a35..cf3cc19 100644 --- a/arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi @@ -3,6 +3,8 @@ * Copyright 2019 NXP */ +#include "imx8mm-u-boot.dtsi" + / { binman: binman { multiple-images; @@ -22,11 +24,6 @@ }; }; -&{/soc@0} { - u-boot,dm-pre-reloc; - u-boot,dm-spl; -}; - &{/soc@0/bus@30800000/i2c@30a30000/pmic@4b} { u-boot,dm-spl; }; @@ -35,19 +32,6 @@ u-boot,dm-spl; }; -&aips1 { - u-boot,dm-spl; - u-boot,dm-pre-reloc; -}; - -&aips2 { - u-boot,dm-spl; -}; - -&aips3 { - u-boot,dm-spl; -}; - &binman { u-boot-spl-ddr { filename = "u-boot-spl-ddr.bin"; @@ -149,14 +133,6 @@ }; }; -&clk { - u-boot,dm-spl; - u-boot,dm-pre-reloc; - /delete-property/ assigned-clocks; - /delete-property/ assigned-clock-parents; - /delete-property/ assigned-clock-rates; -}; - &fec1 { phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; }; @@ -189,15 +165,6 @@ u-boot,dm-spl; }; -&iomuxc { - u-boot,dm-spl; -}; - -&osc_24m { - u-boot,dm-spl; - u-boot,dm-pre-reloc; -}; - &pinctrl_i2c2 { u-boot,dm-spl; }; |