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| author | Shengyu Qu <wiagn233@outlook.com> | 2023-08-09 21:11:33 +0800 |
|---|---|---|
| committer | Leo Yu-Chi Liang <ycliang@andestech.com> | 2023-08-10 10:58:55 +0800 |
| commit | 47ed15125cccd98e041cdff3b6bbe675a2418ec2 (patch) | |
| tree | 40dcd7ccb9a4dd2a5421296e1e7bfc921c46315b | |
| parent | 6419f8e9fdc63ee411e1f012d412f8ae17283432 (diff) | |
| download | u-boot-47ed15125cccd98e041cdff3b6bbe675a2418ec2.zip u-boot-47ed15125cccd98e041cdff3b6bbe675a2418ec2.tar.gz u-boot-47ed15125cccd98e041cdff3b6bbe675a2418ec2.tar.bz2 | |
riscv: cpu: jh7110: Select SPL_ZERO_MEM_BEFORE_USE
Add Kconfig item for Starfive JH7110 to select SPL_ZERO_MEM_BEFORE_USE.
Signed-off-by: Bo Gan <ganboing@gmail.com>
Signed-off-by: Shengyu Qu <wiagn233@outlook.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
| -rw-r--r-- | arch/riscv/cpu/jh7110/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/riscv/cpu/jh7110/Kconfig b/arch/riscv/cpu/jh7110/Kconfig index c1d3e6a..8469ee7 100644 --- a/arch/riscv/cpu/jh7110/Kconfig +++ b/arch/riscv/cpu/jh7110/Kconfig @@ -14,6 +14,7 @@ config STARFIVE_JH7110 select SPL_RAM if SPL select SPL_STARFIVE_DDR select SYS_CACHE_SHIFT_6 + select SPL_ZERO_MEM_BEFORE_USE select PINCTRL_STARFIVE_JH7110 imply MMC imply MMC_BROKEN_CD |