Merge branch '2022-05-09-TI-platform-updates'WIP/09May2022

- Assorted minor TI platform updates

16 files changed, 740 insertions, 105 deletions

diff --git a/arch/arm/dts/am335x-guardian-u-boot.dtsi b/arch/arm/dts/am335x-guardian-u-boot.dtsi
index a1a7913..29d8147 100644
--- a/arch/arm/dts/am335x-guardian-u-boot.dtsi
+++ b/arch/arm/dts/am335x-guardian-u-boot.dtsi
@@ -82,7 +82,7 @@
 
 	lcd0_pins: pinmux_lcd0_pins {
 		pinctrl-single,pins = <
-			AM33XX_IOPAD(0x908, PIN_OUTPUT_PULLUP   | MUX_MODE7)
+			AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_OUTPUT_PULLUP, MUX_MODE7)
 		>;
 	};
 };
diff --git a/arch/arm/dts/am335x-guardian.dts b/arch/arm/dts/am335x-guardian.dts
index 69bee45..067c402 100644
--- a/arch/arm/dts/am335x-guardian.dts
+++ b/arch/arm/dts/am335x-guardian.dts
@@ -388,167 +388,189 @@
 
 	clkout2_pin: pinmux_clkout2_pin {
 		pinctrl-single,pins = <
-			AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3)
+			AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT_PULLDOWN, MUX_MODE3)
 		>;
 	};
 
 	dmtimer7_pins: pinmux_dmtimer7_pins {
 		pinctrl-single,pins = <
-			AM33XX_IOPAD(0x968, PIN_OUTPUT | MUX_MODE5)
+			AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_OUTPUT, MUX_MODE5)
 		>;
 	};
 
 	guardian_button_pins: pinmux_gpio_keys_pins {
 		pinctrl-single,pins = <
-			AM33XX_IOPAD(0x940, PIN_INPUT | MUX_MODE7)
-			AM33XX_IOPAD(0x884, PIN_INPUT | MUX_MODE7)
+			AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT, MUX_MODE7)
+			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT, MUX_MODE7)
 		>;
 	};
 
 	guardian_interface_pins: pinmux_guardian_interface_pins {
 		pinctrl-single,pins = <
-			AM33XX_IOPAD(0x990, PIN_OUTPUT_PULLUP   | MUX_MODE7)
-			AM33XX_IOPAD(0x9ac, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
-			AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
-			AM33XX_IOPAD(0x980, PIN_INPUT           | MUX_MODE7)
-			AM33XX_IOPAD(0x984, PIN_INPUT           | MUX_MODE7)
-			AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP   | MUX_MODE7)
-			AM33XX_IOPAD(0x90c, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
-			AM33XX_IOPAD(0x944, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
-			AM33XX_IOPAD(0x91c, PIN_INPUT           | MUX_MODE7)
-			AM33XX_IOPAD(0x918, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
+			AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_OUTPUT_PULLUP, MUX_MODE7)
+			AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE7)
+			AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE7)
+			AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT, MUX_MODE7)
+			AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT, MUX_MODE7)
+			AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE7)
+			AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_OUTPUT_PULLDOWN, MUX_MODE7)
+			AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE7)
+			AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT, MUX_MODE7)
+			AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_OUTPUT_PULLDOWN, MUX_MODE7)
 		>;
 	};
 
 	i2c0_pins: pinmux_i2c0_pins {
 		pinctrl-single,pins = <
-			AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)
-			AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0)
 		>;
 	};
 
 	lcd_disen_pins: pinmux_lcd_disen_pins {
 		pinctrl-single,pins = <
-			AM33XX_IOPAD(0x9a4, PIN_OUTPUT_PULLUP | SLEWCTRL_SLOW | MUX_MODE7)
+			AM33XX_PADCONF
+			(AM335X_PIN_MCASP0_FSR, PIN_OUTPUT_PULLUP | SLEWCTRL_SLOW, MUX_MODE7)
 		>;
 	};
 
 	lcd_pins_default: pinmux_lcd_pins_default {
 		pinctrl-single,pins = <
-			AM33XX_IOPAD(0x820, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
-			AM33XX_IOPAD(0x824, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
-			AM33XX_IOPAD(0x828, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
-			AM33XX_IOPAD(0x82c, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
-			AM33XX_IOPAD(0x830, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
-			AM33XX_IOPAD(0x834, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
-			AM33XX_IOPAD(0x838, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
-			AM33XX_IOPAD(0x83c, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
-			AM33XX_IOPAD(0x8a0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
-			AM33XX_IOPAD(0x8a4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
-			AM33XX_IOPAD(0x8a8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
-			AM33XX_IOPAD(0x8ac, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
-			AM33XX_IOPAD(0x8b0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
-			AM33XX_IOPAD(0x8b4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
-			AM33XX_IOPAD(0x8b8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
-			AM33XX_IOPAD(0x8bc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
-			AM33XX_IOPAD(0x8c0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
-			AM33XX_IOPAD(0x8c4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
-			AM33XX_IOPAD(0x8c8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
-			AM33XX_IOPAD(0x8cc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
-			AM33XX_IOPAD(0x8d0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
-			AM33XX_IOPAD(0x8d4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
-			AM33XX_IOPAD(0x8d8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
-			AM33XX_IOPAD(0x8dc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
-			AM33XX_IOPAD(0x8e0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
-			AM33XX_IOPAD(0x8e4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
-			AM33XX_IOPAD(0x8e8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
-			AM33XX_IOPAD(0x8ec, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE1)
+			AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE1)
+			AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE1)
+			AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE1)
+			AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE1)
+			AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE1)
+			AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE1)
+			AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE1)
+			AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
+			AM33XX_PADCONF
+			(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
 		>;
 	};
 
 	lcd_pins_sleep: pinmux_lcd_pins_sleep {
 		pinctrl-single,pins = <
-			AM33XX_IOPAD(0x8a0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
-			AM33XX_IOPAD(0x8a4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
-			AM33XX_IOPAD(0x8a8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
-			AM33XX_IOPAD(0x8ac, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
-			AM33XX_IOPAD(0x8b0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
-			AM33XX_IOPAD(0x8b4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
-			AM33XX_IOPAD(0x8b8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
-			AM33XX_IOPAD(0x8bc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
-			AM33XX_IOPAD(0x8c0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
-			AM33XX_IOPAD(0x8c4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
-			AM33XX_IOPAD(0x8c8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
-			AM33XX_IOPAD(0x8cc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
-			AM33XX_IOPAD(0x8d0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
-			AM33XX_IOPAD(0x8d4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
-			AM33XX_IOPAD(0x8d8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
-			AM33XX_IOPAD(0x8dc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
-			AM33XX_IOPAD(0x8e0, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
-			AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
-			AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
-			AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
+			AM33XX_PADCONF
+			(AM335X_PIN_LCD_DATA0, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
+			AM33XX_PADCONF
+			(AM335X_PIN_LCD_DATA1, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
+			AM33XX_PADCONF
+			(AM335X_PIN_LCD_DATA2, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
+			AM33XX_PADCONF
+			(AM335X_PIN_LCD_DATA3, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
+			AM33XX_PADCONF
+			(AM335X_PIN_LCD_DATA4, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
+			AM33XX_PADCONF
+			(AM335X_PIN_LCD_DATA5, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
+			AM33XX_PADCONF
+			(AM335X_PIN_LCD_DATA6, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
+			AM33XX_PADCONF
+			(AM335X_PIN_LCD_DATA7, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
+			AM33XX_PADCONF
+			(AM335X_PIN_LCD_DATA8, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
+			AM33XX_PADCONF
+			(AM335X_PIN_LCD_DATA9, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
+			AM33XX_PADCONF
+			(AM335X_PIN_LCD_DATA10, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
+			AM33XX_PADCONF
+			(AM335X_PIN_LCD_DATA11, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
+			AM33XX_PADCONF
+			(AM335X_PIN_LCD_DATA12, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
+			AM33XX_PADCONF
+			(AM335X_PIN_LCD_DATA13, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
+			AM33XX_PADCONF
+			(AM335X_PIN_LCD_DATA14, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
+			AM33XX_PADCONF
+			(AM335X_PIN_LCD_DATA15, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
+			AM33XX_PADCONF
+			(AM335X_PIN_LCD_VSYNC, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW, MUX_MODE7)
+			AM33XX_PADCONF
+			(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW, MUX_MODE7)
+			AM33XX_PADCONF
+			(AM335X_PIN_LCD_PCLK, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW, MUX_MODE7)
+			AM33XX_PADCONF
+			(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW, MUX_MODE7)
 		>;
 	};
 
 	guardian_led_pins: pinmux_leds_pins {
 		pinctrl-single,pins = <
-			AM33XX_IOPAD(0x868, PIN_OUTPUT | MUX_MODE7)
+			AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_OUTPUT, MUX_MODE7)
 		>;
 	};
 
 	mmc1_pins: pinmux_mmc1_pins {
 		pinctrl-single,pins = <
-			AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0)
-			AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0)
-			AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0)
-			AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0)
-			AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0)
-			AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0)
-			AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7)
+			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7)
 		>;
 	};
 
 	spi0_pins: pinmux_spi0_pins {
 		pinctrl-single,pins = <
-			AM33XX_IOPAD(0x950, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
-			AM33XX_IOPAD(0x954, PIN_OUTPUT_PULLUP | MUX_MODE0)
-			AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0)
-			AM33XX_IOPAD(0x95c, PIN_OUTPUT_PULLUP | MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT_PULLUP, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLUP, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_OUTPUT_PULLUP, MUX_MODE0)
 		>;
 	};
 
 	uart0_pins: pinmux_uart0_pins {
 		pinctrl-single,pins = <
-			AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)
-			AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
 		>;
 	};
 
 	uart2_pins: pinmux_uart2_pins {
 		pinctrl-single,pins = <
-			AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE1)
-			AM33XX_IOPAD(0x930, PIN_OUTPUT_PULLDOWN | MUX_MODE1)
+			AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLUP, MUX_MODE1)
+			AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE1)
 		>;
 	};
 
 	nandflash_pins: pinmux_nandflash_pins {
 		pinctrl-single,pins = <
-			AM33XX_IOPAD(0x800, PIN_INPUT | MUX_MODE0)
-			AM33XX_IOPAD(0x804, PIN_INPUT | MUX_MODE0)
-			AM33XX_IOPAD(0x808, PIN_INPUT | MUX_MODE0)
-			AM33XX_IOPAD(0x80c, PIN_INPUT | MUX_MODE0)
-			AM33XX_IOPAD(0x810, PIN_INPUT | MUX_MODE0)
-			AM33XX_IOPAD(0x814, PIN_INPUT | MUX_MODE0)
-			AM33XX_IOPAD(0x818, PIN_INPUT | MUX_MODE0)
-			AM33XX_IOPAD(0x81c, PIN_INPUT | MUX_MODE0)
-			AM33XX_IOPAD(0x870, PIN_INPUT | MUX_MODE0)
-			AM33XX_IOPAD(0x874, PIN_OUTPUT | MUX_MODE0)
-			AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)
-			AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)
-			AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)
-			AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)
-			AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_OUTPUT, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_OUTPUT, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_OUTPUT, MUX_MODE0)
+			AM33XX_PADCONF(AM335X_PIN_GPMC_BEN0_CLE, PIN_OUTPUT, MUX_MODE0)
 		>;
 	};
 };
diff --git a/arch/arm/dts/k3-am642-sk-u-boot.dtsi b/arch/arm/dts/k3-am642-sk-u-boot.dtsi
index afe5bab..6504228 100644
--- a/arch/arm/dts/k3-am642-sk-u-boot.dtsi
+++ b/arch/arm/dts/k3-am642-sk-u-boot.dtsi
@@ -48,6 +48,67 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&main_i2c0_pins_default>;
 	clock-frequency = <400000>;
+
+	tps65219: pmic@30 {
+		compatible = "ti,tps65219";
+		reg = <0x30>;
+
+		regulators {
+			buck1_reg: buck1 {
+				regulator-name = "VDD_CORE";
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt = <750000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			buck2_reg: buck2 {
+				regulator-name = "VCC1V8";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			buck3_reg: buck3 {
+				regulator-name = "VDD_LPDDR4";
+				regulator-min-microvolt = <1100000>;
+				regulator-max-microvolt = <1100000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			ldo1_reg: ldo1 {
+				regulator-name = "VDDSHV_SD_IO_PMIC";
+				regulator-min-microvolt = <33000000>;
+				regulator-max-microvolt = <33000000>;
+			};
+
+			ldo2_reg: ldo2 {
+				regulator-name = "VDDAR_CORE";
+				regulator-min-microvolt = <850000>;
+				regulator-max-microvolt = <850000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			ldo3_reg: ldo3 {
+				regulator-name = "VDDA_1V8";
+				regulator-min-microvolt = <18000000>;
+				regulator-max-microvolt = <18000000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			ldo4_reg: ldo4 {
+				regulator-name = "VDD_PHY_2V5";
+				regulator-min-microvolt = <25000000>;
+				regulator-max-microvolt = <25000000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+		};
+	};
 };
 
 &main_uart0 {
diff --git a/board/bosch/guardian/board.c b/board/bosch/guardian/board.c
index 68f2744..7d1064a 100644
--- a/board/bosch/guardian/board.c
+++ b/board/bosch/guardian/board.c
@@ -83,7 +83,8 @@ void am33xx_spl_board_init(void)
 	/* Get the frequency */
 	dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev);
 
-	if (i2c_probe(TPS65217_CHIP_PM))
+	/* Initialize for Power Management */
+	if (power_tps65217_init(0))
 		return;
 
 	/*
@@ -142,7 +143,6 @@ void am33xx_spl_board_init(void)
 const struct dpll_params *get_dpll_ddr_params(void)
 {
 	enable_i2c0_pin_mux();
-	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
 
 	return &dpll_ddr;
 }
@@ -335,6 +335,10 @@ int board_late_init(void)
 		return ret;
 	}
 
+	/* Initialize to enable backlight */
+	if (power_tps65217_init(0))
+		return 0;
+
 	lcdbacklight_en();
 	if (IS_ENABLED(CONFIG_AM335X_LCD))
 		splash_screen();
diff --git a/board/nokia/rx51/rx51.c b/board/nokia/rx51/rx51.c
index 621cff0..460d248 100644
--- a/board/nokia/rx51/rx51.c
+++ b/board/nokia/rx51/rx51.c
@@ -32,6 +32,7 @@
 #include <i2c.h>
 #include <video.h>
 #include <keyboard.h>
+#include <ns16550.h>
 #include <asm/global_data.h>
 #include <asm/io.h>
 #include <asm/setup.h>
@@ -788,3 +789,14 @@ U_BOOT_DRVINFOS(rx51_video) = {
 U_BOOT_DRVINFOS(rx51_kp) = {
 	{ "rx51_kp" },
 };
+
+static const struct ns16550_plat rx51_serial = {
+	.base = CONFIG_SYS_NS16550_COM3,
+	.reg_shift = 2,
+	.clock = CONFIG_SYS_NS16550_CLK,
+	.fcr = UART_FCR_DEFVAL,
+};
+
+U_BOOT_DRVINFOS(rx51_uart) = {
+	{ "omap_serial", &rx51_serial },
+};
diff --git a/configs/am335x_guardian_defconfig b/configs/am335x_guardian_defconfig
index 3464ba8..8150c25 100644
--- a/configs/am335x_guardian_defconfig
+++ b/configs/am335x_guardian_defconfig
@@ -83,8 +83,8 @@ CONFIG_CLK_TI_CTRL=y
 CONFIG_CLK_TI_DIVIDER=y
 CONFIG_CLK_TI_GATE=y
 CONFIG_CLK_TI_MUX=y
-CONFIG_SYS_I2C_LEGACY=y
-CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_DM_I2C=y
+CONFIG_SPL_DM_I2C=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_MISC=y
diff --git a/configs/am64x_evm_a53_defconfig b/configs/am64x_evm_a53_defconfig
index 4149921..2863eea 100644
--- a/configs/am64x_evm_a53_defconfig
+++ b/configs/am64x_evm_a53_defconfig
@@ -61,6 +61,8 @@ CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_TIME=y
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
 CONFIG_OF_CONTROL=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIST="k3-am642-evm k3-am642-sk"
@@ -121,6 +123,10 @@ CONFIG_PINCTRL_SINGLE=y
 CONFIG_POWER_DOMAIN=y
 CONFIG_TI_SCI_POWER_DOMAIN=y
 CONFIG_K3_SYSTEM_CONTROLLER=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_TPS65219=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_TPS65219=y
 CONFIG_REMOTEPROC_TI_K3_ARM64=y
 CONFIG_DM_RESET=y
 CONFIG_RESET_TI_SCI=y
diff --git a/configs/nokia_rx51_defconfig b/configs/nokia_rx51_defconfig
index d5688c7..ec0f2e8 100644
--- a/configs/nokia_rx51_defconfig
+++ b/configs/nokia_rx51_defconfig
@@ -11,13 +11,14 @@ CONFIG_STATIC_MACH_TYPE=y
 CONFIG_MACH_TYPE=1955
 CONFIG_SYS_TEXT_BASE=0x80008000
 CONFIG_SYS_MALLOC_LEN=0xc0000
+CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_TARGET_NOKIA_RX51=y
 CONFIG_SYS_LOAD_ADDR=0x80000000
 CONFIG_OPTIMIZE_INLINING=y
 CONFIG_LTO=y
-# CONFIG_SYS_MALLOC_F is not set
 # CONFIG_FIT is not set
+CONFIG_SUPPORT_RAW_INITRD=y
 CONFIG_BOOTDELAY=30
 CONFIG_AUTOBOOT_KEYED=y
 CONFIG_AUTOBOOT_MENU_SHOW=y
@@ -70,8 +71,7 @@ CONFIG_DM_KEYBOARD=y
 # CONFIG_MMC_VERBOSE is not set
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD=y
-CONFIG_CONS_INDEX=3
-CONFIG_SYS_NS16550=y
+CONFIG_DM_SERIAL=y
 CONFIG_SPI=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_UDC=y
diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig
index 953c92e..bb39600 100644
--- a/drivers/power/pmic/Kconfig
+++ b/drivers/power/pmic/Kconfig
@@ -367,6 +367,12 @@ config PMIC_TPS65941
 	The TPS65941 is a PMIC containing a bunch of SMPS & LDOs.
 	This driver binds the pmic children.
 
+config PMIC_TPS65219
+	bool "Enable driver for Texas Instruments TPS65219 PMIC"
+	depends on DM_PMIC
+	help
+	The TPS65219 is a PMIC containing a bunch of SMPS & LDOs.
+	This driver binds the pmic children.
 endif
 
 config PMIC_TPS65217
diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile
index 584d6e0..f73b326 100644
--- a/drivers/power/pmic/Makefile
+++ b/drivers/power/pmic/Makefile
@@ -43,3 +43,4 @@ obj-$(CONFIG_POWER_TPS65910) += pmic_tps65910.o
 obj-$(CONFIG_POWER_HI6553) += pmic_hi6553.o
 obj-$(CONFIG_POWER_MC34VR500) += pmic_mc34vr500.o
 obj-$(CONFIG_PMIC_TPS65941) += tps65941.o
+obj-$(CONFIG_PMIC_TPS65219) += tps65219.o
diff --git a/drivers/power/pmic/tps65219.c b/drivers/power/pmic/tps65219.c
new file mode 100644
index 0000000..9462afe
--- /dev/null
+++ b/drivers/power/pmic/tps65219.c
@@ -0,0 +1,88 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2022 BayLibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ */
+
+#include <common.h>
+#include <fdtdec.h>
+#include <errno.h>
+#include <dm.h>
+#include <i2c.h>
+#include <log.h>
+#include <power/pmic.h>
+#include <power/regulator.h>
+#include <power/tps65219.h>
+#include <dm/device.h>
+
+static const struct pmic_child_info pmic_children_info[] = {
+	{ .prefix = "ldo", .driver = TPS65219_LDO_DRIVER },
+	{ .prefix = "buck", .driver = TPS65219_BUCK_DRIVER },
+	{ },
+};
+
+static int tps65219_reg_count(struct udevice *dev)
+{
+	return 0x41;
+}
+
+static int tps65219_write(struct udevice *dev, uint reg, const uint8_t *buff,
+			  int len)
+{
+	if (dm_i2c_write(dev, reg, buff, len)) {
+		pr_err("write error to device: %p register: %#x!\n", dev, reg);
+		return -EIO;
+	}
+
+	return 0;
+}
+
+static int tps65219_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
+{
+	if (dm_i2c_read(dev, reg, buff, len)) {
+		pr_err("read error from device: %p register: %#x!\n", dev, reg);
+		return -EIO;
+	}
+
+	return 0;
+}
+
+static int tps65219_bind(struct udevice *dev)
+{
+	ofnode regulators_node;
+	int children;
+
+	regulators_node = dev_read_subnode(dev, "regulators");
+	if (!ofnode_valid(regulators_node)) {
+		debug("%s: %s regulators subnode not found!\n", __func__,
+		      dev->name);
+	}
+
+	debug("%s: '%s' - found regulators subnode\n", __func__, dev->name);
+
+	children = pmic_bind_children(dev, regulators_node, pmic_children_info);
+	if (!children)
+		printf("%s: %s - no child found\n", __func__, dev->name);
+
+	/* Probe all the child devices */
+	return dm_scan_fdt_dev(dev);
+}
+
+static struct dm_pmic_ops tps65219_ops = {
+	.reg_count = tps65219_reg_count,
+	.read = tps65219_read,
+	.write = tps65219_write,
+};
+
+static const struct udevice_id tps65219_ids[] = {
+	{ .compatible = "ti,tps65219" },
+	{ }
+};
+
+U_BOOT_DRIVER(pmic_tps65219) = {
+	.name = "tps65219_pmic",
+	.id = UCLASS_PMIC,
+	.of_match = tps65219_ids,
+	.bind = tps65219_bind,
+	.ops = &tps65219_ops,
+};
diff --git a/drivers/power/regulator/Kconfig b/drivers/power/regulator/Kconfig
index cd253b9..9145408 100644
--- a/drivers/power/regulator/Kconfig
+++ b/drivers/power/regulator/Kconfig
@@ -371,3 +371,12 @@ config DM_REGULATOR_SCMI
         help
           Enable this option if you want to support regulators exposed through
 	  the SCMI voltage domain protocol by a SCMI server.
+
+config DM_REGULATOR_TPS65219
+	bool "Enable driver for TPS65219 PMIC regulators"
+        depends on PMIC_TPS65219
+	help
+	This enables implementation of driver-model regulator uclass
+	features for REGULATOR TPS65219 and the family of TPS65219 PMICs.
+	TPS65219 series of PMICs have 3 single phase BUCKs & 4 LDOs.
+	The driver implements get/set api for value and enable.
diff --git a/drivers/power/regulator/Makefile b/drivers/power/regulator/Makefile
index 4efb32a..b9883df 100644
--- a/drivers/power/regulator/Makefile
+++ b/drivers/power/regulator/Makefile
@@ -32,3 +32,4 @@ obj-$(CONFIG_$(SPL_)DM_REGULATOR_STPMIC1) += stpmic1.o
 obj-$(CONFIG_DM_REGULATOR_TPS65941) += tps65941_regulator.o
 obj-$(CONFIG_DM_REGULATOR_SCMI) += scmi_regulator.o
 obj-$(CONFIG_$(SPL_)DM_REGULATOR_ANATOP) += anatop_regulator.o
+obj-$(CONFIG_DM_REGULATOR_TPS65219) += tps65219_regulator.o
diff --git a/drivers/power/regulator/tps65219_regulator.c b/drivers/power/regulator/tps65219_regulator.c
new file mode 100644
index 0000000..023cf21
--- /dev/null
+++ b/drivers/power/regulator/tps65219_regulator.c
@@ -0,0 +1,380 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2022 BayLibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ *
+ */
+
+#include <common.h>
+#include <fdtdec.h>
+#include <errno.h>
+#include <dm.h>
+#include <i2c.h>
+#include <log.h>
+#include <linux/delay.h>
+#include <power/pmic.h>
+#include <power/regulator.h>
+#include <power/tps65219.h>
+
+static const unsigned int tps65219_buck_vout[TPS65219_BUCK_NUM] = {
+	[0] = TPS65219_BUCK1_VOUT_REG,
+	[1] = TPS65219_BUCK2_VOUT_REG,
+	[2] = TPS65219_BUCK3_VOUT_REG
+};
+
+static const unsigned int tps65219_ldo_vout[TPS65219_LDO_NUM] = {
+	[0] = TPS65219_LDO1_VOUT_REG,
+	[1] = TPS65219_LDO2_VOUT_REG,
+	[2] = TPS65219_LDO3_VOUT_REG,
+	[3] = TPS65219_LDO4_VOUT_REG,
+};
+
+static int tps65219_reg_enable(struct udevice *dev, unsigned int adr, int idx,
+			       int op, bool *enable)
+{
+	int ret;
+
+	ret = pmic_reg_read(dev->parent, adr);
+	if (ret < 0)
+		return ret;
+
+	if (op == PMIC_OP_GET) {
+		if (ret & BIT(idx))
+			*enable = true;
+		else
+			*enable = false;
+
+		return 0;
+	} else if (op == PMIC_OP_SET) {
+		if (*enable)
+			ret |= BIT(idx);
+		else
+			ret &= ~BIT(idx);
+
+		ret = pmic_reg_write(dev->parent, adr, ret);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+static int tps65219_buck_enable(struct udevice *dev, int op, bool *enable)
+{
+	unsigned int adr;
+	struct dm_regulator_uclass_plat *uc_pdata;
+	int idx;
+
+	idx = dev->driver_data - 1;
+	uc_pdata = dev_get_uclass_plat(dev);
+	adr = uc_pdata->ctrl_reg;
+
+	return tps65219_reg_enable(dev, adr, idx, op, enable);
+}
+
+static int tps65219_buck_volt2val(int uV)
+{
+	if (uV > TPS65219_BUCK_VOLT_MAX)
+		return -EINVAL;
+	else if (uV >= 1400000)
+		return (uV - 1400000) / 100000 + 0x20;
+	else if (uV >= 600000)
+		return (uV - 600000) / 25000 + 0x00;
+	else
+		return -EINVAL;
+}
+
+static int tps65219_buck_val2volt(int val)
+{
+	if (val > TPS65219_VOLT_MASK)
+		return -EINVAL;
+	else if (val > 0x34)
+		return TPS65219_BUCK_VOLT_MAX;
+	else if (val > 0x20)
+		return 1400000 + (val - 0x20) * 100000;
+	else if (val >= 0)
+		return 600000 + val * 25000;
+	else
+		return -EINVAL;
+}
+
+static int tps65219_buck_val(struct udevice *dev, int op, int *uV)
+{
+	unsigned int adr;
+	int ret, val;
+	struct dm_regulator_uclass_plat *uc_pdata;
+
+	uc_pdata = dev_get_uclass_plat(dev);
+	adr = uc_pdata->volt_reg;
+
+	ret = pmic_reg_read(dev->parent, adr);
+	if (ret < 0)
+		return ret;
+
+	if (op == PMIC_OP_GET) {
+		*uV = 0;
+
+		ret &= TPS65219_VOLT_MASK;
+		ret = tps65219_buck_val2volt(ret);
+		if (ret < 0)
+			return ret;
+
+		*uV = ret;
+		return 0;
+	}
+
+	val = tps65219_buck_volt2val(*uV);
+	if (val < 0)
+		return val;
+
+	ret &= ~TPS65219_VOLT_MASK;
+	ret |= val;
+
+	ret = pmic_reg_write(dev->parent, adr, ret);
+
+	udelay(100);
+
+	return ret;
+}
+
+static int tps65219_ldo_enable(struct udevice *dev, int op, bool *enable)
+{
+	unsigned int adr;
+	struct dm_regulator_uclass_plat *uc_pdata;
+	int idx;
+
+	idx = TPS65219_BUCK_NUM + (dev->driver_data - 1);
+	uc_pdata = dev_get_uclass_plat(dev);
+	adr = uc_pdata->ctrl_reg;
+
+	return tps65219_reg_enable(dev, adr, idx, op, enable);
+}
+
+static int tps65219_ldo_volt2val(int idx, int uV)
+{
+	int base = TPS65219_LDO12_VOLT_MIN;
+	int max = TPS65219_LDO12_VOLT_MAX;
+
+	if (idx > 1) {
+		base = TPS65219_LDO34_VOLT_MIN;
+		max = TPS65219_LDO34_VOLT_MAX;
+	}
+
+	if (uV > max)
+		return -EINVAL;
+	else if (uV >= base)
+		return (uV - TPS65219_LDO12_VOLT_MIN) / 50000;
+	else
+		return -EINVAL;
+}
+
+static int tps65219_ldo_val2volt(int idx, int val)
+{
+	int reg_base = TPS65219_LDO12_VOLT_REG_MIN;
+	int reg_max = TPS65219_LDO12_VOLT_REG_MAX;
+	int base = TPS65219_LDO12_VOLT_MIN;
+	int max = TPS65219_LDO12_VOLT_MAX;
+
+	if (idx > 1) {
+		base = TPS65219_LDO34_VOLT_MIN;
+		max = TPS65219_LDO34_VOLT_MAX;
+		reg_base = TPS65219_LDO34_VOLT_REG_MIN;
+		reg_max = TPS65219_LDO34_VOLT_REG_MAX;
+	}
+
+	if (val > TPS65219_VOLT_MASK || val < 0)
+		return -EINVAL;
+	else if (val >= reg_max)
+		return max;
+	else if (val <= reg_base)
+		return base;
+	else if (val >= 0)
+		return TPS65219_LDO12_VOLT_MIN + (50000 * val);
+	else
+		return -EINVAL;
+}
+
+static int tps65219_ldo_val(struct udevice *dev, int op, int *uV)
+{
+	unsigned int adr;
+	int ret, val;
+	struct dm_regulator_uclass_plat *uc_pdata;
+	int idx;
+
+	idx = dev->driver_data - 1;
+	uc_pdata = dev_get_uclass_plat(dev);
+	adr = uc_pdata->volt_reg;
+
+	ret = pmic_reg_read(dev->parent, adr);
+	if (ret < 0)
+		return ret;
+
+	if (op == PMIC_OP_GET) {
+		*uV = 0;
+
+		ret &= TPS65219_VOLT_MASK;
+		ret = tps65219_ldo_val2volt(idx, ret);
+		if (ret < 0)
+			return ret;
+
+		*uV = ret;
+		return 0;
+	}
+
+	/* LDO1 & LDO2 in BYPASS mode only supports 1.5V max */
+	if (idx < 2 &&
+	    (ret & BIT(TPS65219_LDO12_BYP_CONFIG)) &&
+	    *uV < TPS65219_LDO12_VOLT_BYP_MIN)
+		return -EINVAL;
+
+	val = tps65219_ldo_volt2val(idx, *uV);
+	if (val < 0)
+		return val;
+
+	ret &= ~TPS65219_VOLT_MASK;
+	ret |= val;
+
+	ret = pmic_reg_write(dev->parent, adr, ret);
+
+	udelay(100);
+
+	return ret;
+}
+
+static int tps65219_ldo_probe(struct udevice *dev)
+{
+	struct dm_regulator_uclass_plat *uc_pdata;
+	int idx;
+
+	uc_pdata = dev_get_uclass_plat(dev);
+	uc_pdata->type = REGULATOR_TYPE_LDO;
+
+	/* idx must be in 1..TPS65219_LDO_NUM */
+	idx = dev->driver_data;
+	if (idx < 1 || idx > TPS65219_LDO_NUM) {
+		printf("Wrong ID for regulator\n");
+		return -EINVAL;
+	}
+
+	uc_pdata->ctrl_reg = TPS65219_ENABLE_CTRL_REG;
+	uc_pdata->volt_reg = tps65219_ldo_vout[idx - 1];
+
+	return 0;
+}
+
+static int tps65219_buck_probe(struct udevice *dev)
+{
+	struct dm_regulator_uclass_plat *uc_pdata;
+	int idx;
+
+	uc_pdata = dev_get_uclass_plat(dev);
+	uc_pdata->type = REGULATOR_TYPE_BUCK;
+
+	/* idx must be in 1..TPS65219_BUCK_NUM */
+	idx = dev->driver_data;
+	if (idx < 1 || idx > TPS65219_BUCK_NUM) {
+		printf("Wrong ID for regulator\n");
+		return -EINVAL;
+	}
+
+	uc_pdata->ctrl_reg = TPS65219_ENABLE_CTRL_REG;
+	uc_pdata->volt_reg = tps65219_buck_vout[idx - 1];
+
+	return 0;
+}
+
+static int ldo_get_value(struct udevice *dev)
+{
+	int uV;
+	int ret;
+
+	ret = tps65219_ldo_val(dev, PMIC_OP_GET, &uV);
+	if (ret)
+		return ret;
+
+	return uV;
+}
+
+static int ldo_set_value(struct udevice *dev, int uV)
+{
+	return tps65219_ldo_val(dev, PMIC_OP_SET, &uV);
+}
+
+static int ldo_get_enable(struct udevice *dev)
+{
+	bool enable = false;
+	int ret;
+
+	ret = tps65219_ldo_enable(dev, PMIC_OP_GET, &enable);
+	if (ret)
+		return ret;
+
+	return enable;
+}
+
+static int ldo_set_enable(struct udevice *dev, bool enable)
+{
+	return tps65219_ldo_enable(dev, PMIC_OP_SET, &enable);
+}
+
+static int buck_get_value(struct udevice *dev)
+{
+	int uV;
+	int ret;
+
+	ret = tps65219_buck_val(dev, PMIC_OP_GET, &uV);
+	if (ret)
+		return ret;
+
+	return uV;
+}
+
+static int buck_set_value(struct udevice *dev, int uV)
+{
+	return tps65219_buck_val(dev, PMIC_OP_SET, &uV);
+}
+
+static int buck_get_enable(struct udevice *dev)
+{
+	bool enable = false;
+	int ret;
+
+	ret = tps65219_buck_enable(dev, PMIC_OP_GET, &enable);
+	if (ret)
+		return ret;
+
+	return enable;
+}
+
+static int buck_set_enable(struct udevice *dev, bool enable)
+{
+	return tps65219_buck_enable(dev, PMIC_OP_SET, &enable);
+}
+
+static const struct dm_regulator_ops tps65219_ldo_ops = {
+	.get_value  = ldo_get_value,
+	.set_value  = ldo_set_value,
+	.get_enable = ldo_get_enable,
+	.set_enable = ldo_set_enable,
+};
+
+U_BOOT_DRIVER(tps65219_ldo) = {
+	.name = TPS65219_LDO_DRIVER,
+	.id = UCLASS_REGULATOR,
+	.ops = &tps65219_ldo_ops,
+	.probe = tps65219_ldo_probe,
+};
+
+static const struct dm_regulator_ops tps65219_buck_ops = {
+	.get_value  = buck_get_value,
+	.set_value  = buck_set_value,
+	.get_enable = buck_get_enable,
+	.set_enable = buck_set_enable,
+};
+
+U_BOOT_DRIVER(tps65219_buck) = {
+	.name = TPS65219_BUCK_DRIVER,
+	.id = UCLASS_REGULATOR,
+	.ops = &tps65219_buck_ops,
+	.probe = tps65219_buck_probe,
+};
diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h
index e837b12..f273e24 100644
--- a/include/configs/nokia_rx51.h
+++ b/include/configs/nokia_rx51.h
@@ -43,7 +43,6 @@
 #define V_NS16550_CLK		48000000		/* 48MHz (APLL96/2) */
 
 #define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE	(-4)
 #define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK
 
 /*
diff --git a/include/power/tps65219.h b/include/power/tps65219.h
new file mode 100644
index 0000000..aa81b92
--- /dev/null
+++ b/include/power/tps65219.h
@@ -0,0 +1,46 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2022 BayLibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ */
+
+#ifndef TPS65219_H
+#define TPS65219_H
+
+/* I2C device address for pmic tps65219 */
+#define TPS65219_I2C_ADDR		0x30
+#define TPS65219_LDO_NUM		4
+#define TPS65219_BUCK_NUM		3
+
+/* Drivers name */
+#define TPS65219_LDO_DRIVER		"tps65219_ldo"
+#define TPS65219_BUCK_DRIVER		"tps65219_buck"
+
+#define TPS65219_VOLT_MASK		0x3F
+#define TPS65219_BUCK_VOLT_MAX		3400000
+
+#define TPS65219_ENABLE_CTRL_REG	0x2
+
+#define TPS65219_BUCK1_VOUT_REG		0xa
+#define TPS65219_BUCK2_VOUT_REG		0x9
+#define TPS65219_BUCK3_VOUT_REG		0x8
+
+#define TPS65219_LDO1_VOUT_REG		0x7
+#define TPS65219_LDO2_VOUT_REG		0x6
+
+#define TPS65219_LDO12_BYP_CONFIG	6
+
+#define TPS65219_LDO3_VOUT_REG		0x5
+#define TPS65219_LDO4_VOUT_REG		0x4
+
+#define TPS65219_LDO12_VOLT_BYP_MIN	1500000
+#define TPS65219_LDO12_VOLT_MIN		 600000
+#define TPS65219_LDO12_VOLT_MAX		3400000
+#define TPS65219_LDO12_VOLT_REG_MIN	0
+#define TPS65219_LDO12_VOLT_REG_MAX	0x56
+#define TPS65219_LDO34_VOLT_MIN		1200000
+#define TPS65219_LDO34_VOLT_MAX		3300000
+#define TPS65219_LDO34_VOLT_REG_MIN	0x12
+#define TPS65219_LDO34_VOLT_REG_MAX	0x54
+
+#endif /* TPS65219_H */