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authorTom Rini <trini@konsulko.com>2022-08-09 08:16:14 -0400
committerTom Rini <trini@konsulko.com>2022-08-09 08:16:14 -0400
commit3dd4e916324efc825a7ee8e412f5cf1ded839021 (patch)
treef5bc31b924554a99facd7e150870b42824640e03
parentaf7d151b8eaa56aaf61beb38248ce45b7ca017a8 (diff)
parentca514d0267f92d8aac2eb5f92ff7d150078df423 (diff)
downloadu-boot-WIP/09Aug2022.zip
u-boot-WIP/09Aug2022.tar.gz
u-boot-WIP/09Aug2022.tar.bz2
Merge https://source.denx.de/u-boot/custodians/u-boot-marvellWIP/09Aug2022
- mvebu/turris_omina: Misc fixes and improvements (Pali & Marek) - mvebu: spl: Always fallback to BootROM boot method (Pali) - mvebu: Cleanup u-boot,dm-pre-reloc code (Pali) - gpio: Remove mvgpio driver (Chris) - SBx81LIFKW/SBx81LIFXCAT disable KIRKWOOD_GPIO (Chris) - misc: atsha204a: Don't check for error when waking up the device (Pali)
-rw-r--r--arch/arm/dts/Makefile28
-rw-r--r--arch/arm/dts/armada-370-xp.dtsi1
-rw-r--r--arch/arm/dts/armada-375-db.dts3
-rw-r--r--arch/arm/dts/armada-375.dtsi2
-rw-r--r--arch/arm/dts/armada-385-atl-x530-u-boot.dtsi14
-rw-r--r--arch/arm/dts/armada-385-db-88f6820-amc.dts3
-rw-r--r--arch/arm/dts/armada-385-turris-omnia-u-boot.dtsi8
-rw-r--r--arch/arm/dts/armada-388-clearfog-u-boot.dtsi2
-rw-r--r--arch/arm/dts/armada-388-gp.dts3
-rw-r--r--arch/arm/dts/armada-388-helios4-u-boot.dtsi2
-rw-r--r--arch/arm/dts/armada-38x-controlcenterdc-u-boot.dtsi25
-rw-r--r--arch/arm/dts/armada-38x-controlcenterdc.dts20
-rw-r--r--arch/arm/dts/armada-38x-solidrun-microsom.dtsi1
-rw-r--r--arch/arm/dts/armada-38x.dtsi2
-rw-r--r--arch/arm/dts/armada-xp-crs305-1g-4s-u-boot.dtsi13
-rw-r--r--arch/arm/dts/armada-xp-crs305-1g-4s.dtsi1
-rw-r--r--arch/arm/dts/armada-xp-crs326-24g-2s-u-boot.dtsi13
-rw-r--r--arch/arm/dts/armada-xp-crs326-24g-2s.dtsi1
-rw-r--r--arch/arm/dts/armada-xp-crs328-4c-20s-4s-u-boot.dtsi13
-rw-r--r--arch/arm/dts/armada-xp-crs328-4c-20s-4s.dtsi1
-rw-r--r--arch/arm/dts/armada-xp-db-xc3-24g4xg-u-boot.dtsi12
-rw-r--r--arch/arm/dts/armada-xp-gp-u-boot.dtsi19
-rw-r--r--arch/arm/dts/armada-xp-maxbcm.dts1
-rw-r--r--arch/arm/dts/armada-xp-synology-ds414-u-boot.dtsi9
-rw-r--r--arch/arm/dts/armada-xp-synology-ds414.dts1
-rw-r--r--arch/arm/dts/armada-xp-theadorable-u-boot.dtsi5
-rw-r--r--arch/arm/dts/armada-xp-theadorable.dts4
-rw-r--r--arch/arm/dts/armada-xp.dtsi1
-rw-r--r--arch/arm/dts/kirkwood-atl-sbx81lifkw.dts14
-rw-r--r--arch/arm/dts/mvebu-u-boot.dtsi24
-rw-r--r--arch/arm/mach-mvebu/spl.c7
-rw-r--r--board/CZ.NIC/turris_omnia/turris_omnia.c295
-rw-r--r--board/alliedtelesis/SBx81LIFKW/sbx81lifkw.c71
-rw-r--r--configs/SBx81LIFKW_defconfig5
-rw-r--r--configs/SBx81LIFXCAT_defconfig1
-rw-r--r--configs/turris_omnia_defconfig1
-rw-r--r--drivers/gpio/Makefile1
-rw-r--r--drivers/gpio/mvgpio.c97
-rw-r--r--drivers/gpio/mvgpio.h53
-rw-r--r--drivers/gpio/turris_omnia_mcu.c56
-rw-r--r--drivers/misc/atsha204a-i2c.c11
-rw-r--r--drivers/pci/Kconfig1
-rw-r--r--drivers/pci/pci_mvebu.c14
-rw-r--r--drivers/pinctrl/mvebu/pinctrl-armada-37xx.c30
44 files changed, 481 insertions, 408 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index ceaa39e..7330121 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -232,12 +232,8 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
tegra210-p2571.dtb \
tegra210-p3450-0000.dtb
+ifdef CONFIG_ARMADA_32BIT
dtb-$(CONFIG_ARCH_MVEBU) += \
- armada-3720-db.dtb \
- armada-3720-espressobin.dtb \
- armada-3720-turris-mox.dtb \
- armada-3720-eDPU.dtb \
- armada-3720-uDPU.dtb \
armada-375-db.dtb \
armada-385-atl-x530.dtb \
armada-385-atl-x530DP.dtb \
@@ -247,12 +243,6 @@ dtb-$(CONFIG_ARCH_MVEBU) += \
armada-388-gp.dtb \
armada-388-helios4.dtb \
armada-38x-controlcenterdc.dtb \
- armada-7040-db-nand.dtb \
- armada-7040-db.dtb \
- armada-8040-clearfog-gt-8k.dtb \
- armada-8040-db.dtb \
- armada-8040-mcbin.dtb \
- armada-8040-puzzle-m801.dtb \
armada-xp-crs305-1g-4s.dtb \
armada-xp-crs305-1g-4s-bit.dtb \
armada-xp-crs326-24g-2s.dtb \
@@ -263,7 +253,20 @@ dtb-$(CONFIG_ARCH_MVEBU) += \
armada-xp-gp.dtb \
armada-xp-maxbcm.dtb \
armada-xp-synology-ds414.dtb \
- armada-xp-theadorable.dtb \
+ armada-xp-theadorable.dtb
+else
+dtb-$(CONFIG_ARCH_MVEBU) += \
+ armada-3720-db.dtb \
+ armada-3720-espressobin.dtb \
+ armada-3720-turris-mox.dtb \
+ armada-3720-eDPU.dtb \
+ armada-3720-uDPU.dtb \
+ armada-7040-db-nand.dtb \
+ armada-7040-db.dtb \
+ armada-8040-clearfog-gt-8k.dtb \
+ armada-8040-db.dtb \
+ armada-8040-mcbin.dtb \
+ armada-8040-puzzle-m801.dtb \
cn9130-db-A.dtb \
cn9130-db-B.dtb \
cn9131-db-A.dtb \
@@ -272,6 +275,7 @@ dtb-$(CONFIG_ARCH_MVEBU) += \
cn9132-db-B.dtb \
cn9130-crb-A.dtb \
cn9130-crb-B.dtb
+endif
dtb-$(CONFIG_ARCH_SYNQUACER) += synquacer-sc2a11-developerbox.dtb
dtb-$(CONFIG_ARCH_UNIPHIER_LD11) += \
diff --git a/arch/arm/dts/armada-370-xp.dtsi b/arch/arm/dts/armada-370-xp.dtsi
index 4cd168c..310f159 100644
--- a/arch/arm/dts/armada-370-xp.dtsi
+++ b/arch/arm/dts/armada-370-xp.dtsi
@@ -102,7 +102,6 @@
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
- u-boot,dm-pre-reloc;
rtc: rtc@10300 {
compatible = "marvell,orion-rtc";
diff --git a/arch/arm/dts/armada-375-db.dts b/arch/arm/dts/armada-375-db.dts
index 343349b..d778839 100644
--- a/arch/arm/dts/armada-375-db.dts
+++ b/arch/arm/dts/armada-375-db.dts
@@ -86,10 +86,8 @@
* by default.
*/
status = "okay";
- u-boot,dm-pre-reloc;
spi-flash@0 {
- u-boot,dm-pre-reloc;
#address-cells = <1>;
#size-cells = <1>;
compatible = "n25q128a13", "jedec,spi-nor";
@@ -113,7 +111,6 @@
};
serial@12000 {
- u-boot,dm-pre-reloc;
status = "okay";
};
diff --git a/arch/arm/dts/armada-375.dtsi b/arch/arm/dts/armada-375.dtsi
index fcb9245..20a8c35 100644
--- a/arch/arm/dts/armada-375.dtsi
+++ b/arch/arm/dts/armada-375.dtsi
@@ -103,7 +103,6 @@
soc {
compatible = "marvell,armada375-mbus", "simple-bus";
- u-boot,dm-pre-reloc;
#address-cells = <2>;
#size-cells = <1>;
controller = <&mbusc>;
@@ -168,7 +167,6 @@
internal-regs {
compatible = "simple-bus";
- u-boot,dm-pre-reloc;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
diff --git a/arch/arm/dts/armada-385-atl-x530-u-boot.dtsi b/arch/arm/dts/armada-385-atl-x530-u-boot.dtsi
index 79b694c..4a3fb2c 100644
--- a/arch/arm/dts/armada-385-atl-x530-u-boot.dtsi
+++ b/arch/arm/dts/armada-385-atl-x530-u-boot.dtsi
@@ -1,17 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
-&spi1 {
- u-boot,dm-pre-reloc;
-
- spi-flash@0 {
- u-boot,dm-pre-reloc;
- };
-};
-
-&uart0 {
- u-boot,dm-pre-reloc;
-};
-
&watchdog {
u-boot,dm-pre-reloc;
};
+
+#include "mvebu-u-boot.dtsi"
diff --git a/arch/arm/dts/armada-385-db-88f6820-amc.dts b/arch/arm/dts/armada-385-db-88f6820-amc.dts
index 59a425f..1a2d79d 100644
--- a/arch/arm/dts/armada-385-db-88f6820-amc.dts
+++ b/arch/arm/dts/armada-385-db-88f6820-amc.dts
@@ -53,7 +53,6 @@
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
- u-boot,dm-pre-reloc;
};
@@ -114,10 +113,8 @@
pinctrl-names = "default";
pinctrl-0 = <&spi1_pins>;
status = "okay";
- u-boot,dm-pre-reloc;
spi-flash@0 {
- u-boot,dm-pre-reloc;
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
diff --git a/arch/arm/dts/armada-385-turris-omnia-u-boot.dtsi b/arch/arm/dts/armada-385-turris-omnia-u-boot.dtsi
index ec12298..3f1e761 100644
--- a/arch/arm/dts/armada-385-turris-omnia-u-boot.dtsi
+++ b/arch/arm/dts/armada-385-turris-omnia-u-boot.dtsi
@@ -37,11 +37,7 @@
#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
&spi0 {
- u-boot,dm-pre-reloc;
-
flash@0 {
- u-boot,dm-pre-reloc;
-
partitions {
partition@0 {
reg = <0x0 CONFIG_ENV_OFFSET>;
@@ -56,6 +52,4 @@
};
#endif
-&uart0 {
- u-boot,dm-pre-reloc;
-};
+#include "mvebu-u-boot.dtsi"
diff --git a/arch/arm/dts/armada-388-clearfog-u-boot.dtsi b/arch/arm/dts/armada-388-clearfog-u-boot.dtsi
index 20f5c8f..9662929 100644
--- a/arch/arm/dts/armada-388-clearfog-u-boot.dtsi
+++ b/arch/arm/dts/armada-388-clearfog-u-boot.dtsi
@@ -35,3 +35,5 @@
u-boot,dm-spl;
};
};
+
+#include "mvebu-u-boot.dtsi"
diff --git a/arch/arm/dts/armada-388-gp.dts b/arch/arm/dts/armada-388-gp.dts
index d59aa5f..f5345fb 100644
--- a/arch/arm/dts/armada-388-gp.dts
+++ b/arch/arm/dts/armada-388-gp.dts
@@ -71,12 +71,10 @@
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins>;
status = "okay";
- u-boot,dm-pre-reloc;
#address-cells = <1>;
#size-cells = <0>;
spi-flash@0 {
- u-boot,dm-pre-reloc;
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,m25p128", "jedec,spi-nor";
@@ -132,7 +130,6 @@
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
- u-boot,dm-pre-reloc;
};
/* GE1 CON15 */
diff --git a/arch/arm/dts/armada-388-helios4-u-boot.dtsi b/arch/arm/dts/armada-388-helios4-u-boot.dtsi
index 1047c1a..bac4b06 100644
--- a/arch/arm/dts/armada-388-helios4-u-boot.dtsi
+++ b/arch/arm/dts/armada-388-helios4-u-boot.dtsi
@@ -42,3 +42,5 @@
u-boot,dm-spl;
};
};
+
+#include "mvebu-u-boot.dtsi"
diff --git a/arch/arm/dts/armada-38x-controlcenterdc-u-boot.dtsi b/arch/arm/dts/armada-38x-controlcenterdc-u-boot.dtsi
new file mode 100644
index 0000000..0a94df9
--- /dev/null
+++ b/arch/arm/dts/armada-38x-controlcenterdc-u-boot.dtsi
@@ -0,0 +1,25 @@
+&gpio0 {
+ u-boot,dm-pre-reloc;
+};
+
+&gpio1 {
+ u-boot,dm-pre-reloc;
+};
+
+&uart1 {
+ u-boot,dm-pre-reloc;
+};
+
+&spi1 {
+ u-boot,dm-pre-reloc;
+};
+
+&I2C0 {
+ u-boot,dm-pre-reloc;
+};
+
+&PCA22 {
+ u-boot,dm-pre-reloc;
+};
+
+#include "mvebu-u-boot.dtsi"
diff --git a/arch/arm/dts/armada-38x-controlcenterdc.dts b/arch/arm/dts/armada-38x-controlcenterdc.dts
index 5063a79..79ea6f0 100644
--- a/arch/arm/dts/armada-38x-controlcenterdc.dts
+++ b/arch/arm/dts/armada-38x-controlcenterdc.dts
@@ -16,22 +16,6 @@
#include "armada-388.dtsi"
-&gpio0 {
- u-boot,dm-pre-reloc;
-};
-
-&gpio1 {
- u-boot,dm-pre-reloc;
-};
-
-&uart0 {
- u-boot,dm-pre-reloc;
-};
-
-&uart1 {
- u-boot,dm-pre-reloc;
-};
-
/ {
model = "Controlcenter Digital Compact";
compatible = "marvell,a385-db", "marvell,armada388",
@@ -75,7 +59,6 @@
I2C0: i2c@11000 {
status = "okay";
clock-frequency = <1000000>;
- u-boot,dm-pre-reloc;
PCA21: pca9698@21 {
compatible = "nxp,pca9698";
reg = <0x21>;
@@ -84,7 +67,6 @@
};
PCA22: pca9698@22 {
compatible = "nxp,pca9698";
- u-boot,dm-pre-reloc;
reg = <0x22>;
#gpio-cells = <2>;
gpio-controller;
@@ -569,7 +551,6 @@
&spi1 {
status = "okay";
- u-boot,dm-pre-reloc;
spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
@@ -583,6 +564,5 @@
compatible = "n25q128a11", "jedec,spi-nor";
reg = <1>; /* Chip select 1 */
spi-max-frequency = <108000000>;
- u-boot,dm-pre-reloc;
};
};
diff --git a/arch/arm/dts/armada-38x-solidrun-microsom.dtsi b/arch/arm/dts/armada-38x-solidrun-microsom.dtsi
index 9bbeafc..f6ae784 100644
--- a/arch/arm/dts/armada-38x-solidrun-microsom.dtsi
+++ b/arch/arm/dts/armada-38x-solidrun-microsom.dtsi
@@ -96,7 +96,6 @@
pinctrl-0 = <&uart0_pins>;
pinctrl-names = "default";
status = "okay";
- u-boot,dm-pre-reloc;
};
&i2c0 {
diff --git a/arch/arm/dts/armada-38x.dtsi b/arch/arm/dts/armada-38x.dtsi
index 3e97009..cf7ac4a 100644
--- a/arch/arm/dts/armada-38x.dtsi
+++ b/arch/arm/dts/armada-38x.dtsi
@@ -35,7 +35,6 @@
soc {
compatible = "marvell,armada380-mbus", "simple-bus";
- u-boot,dm-pre-reloc;
#address-cells = <2>;
#size-cells = <1>;
controller = <&mbusc>;
@@ -100,7 +99,6 @@
internal-regs {
compatible = "simple-bus";
- u-boot,dm-pre-reloc;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
diff --git a/arch/arm/dts/armada-xp-crs305-1g-4s-u-boot.dtsi b/arch/arm/dts/armada-xp-crs305-1g-4s-u-boot.dtsi
deleted file mode 100644
index 8576a02..0000000
--- a/arch/arm/dts/armada-xp-crs305-1g-4s-u-boot.dtsi
+++ /dev/null
@@ -1,13 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-
-&uart0 {
- u-boot,dm-pre-reloc;
-};
-
-&spi0 {
- u-boot,dm-pre-reloc;
-
- spi-flash@0 {
- u-boot,dm-pre-reloc;
- };
-};
diff --git a/arch/arm/dts/armada-xp-crs305-1g-4s.dtsi b/arch/arm/dts/armada-xp-crs305-1g-4s.dtsi
index 1a74ecd..d09cd47 100644
--- a/arch/arm/dts/armada-xp-crs305-1g-4s.dtsi
+++ b/arch/arm/dts/armada-xp-crs305-1g-4s.dtsi
@@ -19,7 +19,6 @@
/dts-v1/;
#include "armada-xp-98dx3236.dtsi"
-#include "armada-xp-crs305-1g-4s-u-boot.dtsi"
/ {
model = "CRS305-1G-4S+";
diff --git a/arch/arm/dts/armada-xp-crs326-24g-2s-u-boot.dtsi b/arch/arm/dts/armada-xp-crs326-24g-2s-u-boot.dtsi
deleted file mode 100644
index 8576a02..0000000
--- a/arch/arm/dts/armada-xp-crs326-24g-2s-u-boot.dtsi
+++ /dev/null
@@ -1,13 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-
-&uart0 {
- u-boot,dm-pre-reloc;
-};
-
-&spi0 {
- u-boot,dm-pre-reloc;
-
- spi-flash@0 {
- u-boot,dm-pre-reloc;
- };
-};
diff --git a/arch/arm/dts/armada-xp-crs326-24g-2s.dtsi b/arch/arm/dts/armada-xp-crs326-24g-2s.dtsi
index e50f3ea..35b432f 100644
--- a/arch/arm/dts/armada-xp-crs326-24g-2s.dtsi
+++ b/arch/arm/dts/armada-xp-crs326-24g-2s.dtsi
@@ -19,7 +19,6 @@
/dts-v1/;
#include "armada-xp-98dx3236.dtsi"
-#include "armada-xp-crs326-24g-2s-u-boot.dtsi"
/ {
model = "CRS326-24G-2S+";
diff --git a/arch/arm/dts/armada-xp-crs328-4c-20s-4s-u-boot.dtsi b/arch/arm/dts/armada-xp-crs328-4c-20s-4s-u-boot.dtsi
deleted file mode 100644
index 8576a02..0000000
--- a/arch/arm/dts/armada-xp-crs328-4c-20s-4s-u-boot.dtsi
+++ /dev/null
@@ -1,13 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-
-&uart0 {
- u-boot,dm-pre-reloc;
-};
-
-&spi0 {
- u-boot,dm-pre-reloc;
-
- spi-flash@0 {
- u-boot,dm-pre-reloc;
- };
-};
diff --git a/arch/arm/dts/armada-xp-crs328-4c-20s-4s.dtsi b/arch/arm/dts/armada-xp-crs328-4c-20s-4s.dtsi
index daff1af..63586b6 100644
--- a/arch/arm/dts/armada-xp-crs328-4c-20s-4s.dtsi
+++ b/arch/arm/dts/armada-xp-crs328-4c-20s-4s.dtsi
@@ -19,7 +19,6 @@
/dts-v1/;
#include "armada-xp-98dx3236.dtsi"
-#include "armada-xp-crs328-4c-20s-4s-u-boot.dtsi"
/ {
model = "CRS328-4C-20S-4S+";
diff --git a/arch/arm/dts/armada-xp-db-xc3-24g4xg-u-boot.dtsi b/arch/arm/dts/armada-xp-db-xc3-24g4xg-u-boot.dtsi
index fdbe168..dc20643 100644
--- a/arch/arm/dts/armada-xp-db-xc3-24g4xg-u-boot.dtsi
+++ b/arch/arm/dts/armada-xp-db-xc3-24g4xg-u-boot.dtsi
@@ -1,9 +1,5 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-&uart0 {
- u-boot,dm-pre-reloc;
-};
-
&nand_controller {
compatible="marvell,armada370-nand-controller";
status = "okay";
@@ -15,10 +11,4 @@
nand-ecc-step-size = <512>;
};
-&spi0 {
- u-boot,dm-pre-reloc;
-
- spi-flash@0 {
- u-boot,dm-pre-reloc;
- };
-};
+#include "mvebu-u-boot.dtsi"
diff --git a/arch/arm/dts/armada-xp-gp-u-boot.dtsi b/arch/arm/dts/armada-xp-gp-u-boot.dtsi
deleted file mode 100644
index 2422856..0000000
--- a/arch/arm/dts/armada-xp-gp-u-boot.dtsi
+++ /dev/null
@@ -1,19 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-
-/ {
- soc {
- internal-regs {
- serial@12000 {
- u-boot,dm-pre-reloc;
- };
- };
- };
-};
-
-&spi0 {
- u-boot,dm-pre-reloc;
-
- spi-flash@0 {
- u-boot,dm-pre-reloc;
- };
-};
diff --git a/arch/arm/dts/armada-xp-maxbcm.dts b/arch/arm/dts/armada-xp-maxbcm.dts
index d2b07f7..b0b0484 100644
--- a/arch/arm/dts/armada-xp-maxbcm.dts
+++ b/arch/arm/dts/armada-xp-maxbcm.dts
@@ -151,7 +151,6 @@
internal-regs {
serial@12000 {
status = "okay";
- u-boot,dm-pre-reloc;
};
serial@12100 {
status = "okay";
diff --git a/arch/arm/dts/armada-xp-synology-ds414-u-boot.dtsi b/arch/arm/dts/armada-xp-synology-ds414-u-boot.dtsi
deleted file mode 100644
index 22fae16..0000000
--- a/arch/arm/dts/armada-xp-synology-ds414-u-boot.dtsi
+++ /dev/null
@@ -1,9 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-
-&spi0 {
- u-boot,dm-pre-reloc;
-
- spi-flash@0 {
- u-boot,dm-pre-reloc;
- };
-};
diff --git a/arch/arm/dts/armada-xp-synology-ds414.dts b/arch/arm/dts/armada-xp-synology-ds414.dts
index 35909e3..fdc9b47 100644
--- a/arch/arm/dts/armada-xp-synology-ds414.dts
+++ b/arch/arm/dts/armada-xp-synology-ds414.dts
@@ -78,7 +78,6 @@
*/
serial@12000 {
status = "okay";
- u-boot,dm-pre-reloc;
};
/* Connected to a Microchip PIC16F883 for power control */
diff --git a/arch/arm/dts/armada-xp-theadorable-u-boot.dtsi b/arch/arm/dts/armada-xp-theadorable-u-boot.dtsi
new file mode 100644
index 0000000..c98bfa1
--- /dev/null
+++ b/arch/arm/dts/armada-xp-theadorable-u-boot.dtsi
@@ -0,0 +1,5 @@
+&lcd0 {
+ u-boot,dm-pre-reloc;
+};
+
+#include "mvebu-u-boot.dtsi"
diff --git a/arch/arm/dts/armada-xp-theadorable.dts b/arch/arm/dts/armada-xp-theadorable.dts
index a06a65a..ba73386 100644
--- a/arch/arm/dts/armada-xp-theadorable.dts
+++ b/arch/arm/dts/armada-xp-theadorable.dts
@@ -88,7 +88,6 @@
internal-regs {
serial@12000 {
status = "okay";
- u-boot,dm-pre-reloc;
};
serial@12100 {
@@ -135,7 +134,6 @@
compatible = "marvell,armada-xp-lcd";
reg = <0xe0000 0x10000>;
status = "okay";
- u-boot,dm-pre-reloc;
display-timings {
native-mode = <&timing0>;
@@ -170,10 +168,8 @@
&spi0 {
status = "okay";
- u-boot,dm-pre-reloc;
spi-flash@0 {
- u-boot,dm-pre-reloc;
#address-cells = <1>;
#size-cells = <1>;
compatible = "n25q128a13", "jedec,spi-nor";
diff --git a/arch/arm/dts/armada-xp.dtsi b/arch/arm/dts/armada-xp.dtsi
index fb5640b..3bd72f1 100644
--- a/arch/arm/dts/armada-xp.dtsi
+++ b/arch/arm/dts/armada-xp.dtsi
@@ -29,7 +29,6 @@
soc {
compatible = "marvell,armadaxp-mbus", "simple-bus";
- u-boot,dm-pre-reloc;
bootrom {
compatible = "marvell,bootrom";
diff --git a/arch/arm/dts/kirkwood-atl-sbx81lifkw.dts b/arch/arm/dts/kirkwood-atl-sbx81lifkw.dts
index 4ae74f4..3837c8f 100644
--- a/arch/arm/dts/kirkwood-atl-sbx81lifkw.dts
+++ b/arch/arm/dts/kirkwood-atl-sbx81lifkw.dts
@@ -70,6 +70,20 @@
};
};
};
+
+ gpio-leds {
+ compatible = "gpio-leds";
+
+ ledn {
+ label = "status:ledn";
+ gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>;
+ };
+
+ ledp {
+ label = "status:ledp";
+ gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
+ };
+ };
};
&spi0 {
diff --git a/arch/arm/dts/mvebu-u-boot.dtsi b/arch/arm/dts/mvebu-u-boot.dtsi
new file mode 100644
index 0000000..5538f95
--- /dev/null
+++ b/arch/arm/dts/mvebu-u-boot.dtsi
@@ -0,0 +1,24 @@
+#include <config.h>
+
+#ifdef CONFIG_ARMADA_32BIT
+
+/ {
+ soc {
+ u-boot,dm-pre-reloc;
+ internal-regs {
+ u-boot,dm-pre-reloc;
+ };
+ };
+};
+
+&uart0 {
+ u-boot,dm-pre-reloc;
+};
+
+#ifdef CONFIG_SPL_SPI
+&spi0 {
+ u-boot,dm-pre-reloc;
+};
+#endif
+
+#endif
diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c
index 13c9991..bfcba2e 100644
--- a/arch/arm/mach-mvebu/spl.c
+++ b/arch/arm/mach-mvebu/spl.c
@@ -271,6 +271,13 @@ u32 spl_boot_device(void)
}
}
+void board_boot_order(u32 *spl_boot_list)
+{
+ spl_boot_list[0] = spl_boot_device();
+ if (spl_boot_list[0] != BOOT_DEVICE_BOOTROM)
+ spl_boot_list[1] = BOOT_DEVICE_BOOTROM;
+}
+
#else
u32 spl_boot_device(void)
diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c
index 5921769..5ddd873 100644
--- a/board/CZ.NIC/turris_omnia/turris_omnia.c
+++ b/board/CZ.NIC/turris_omnia/turris_omnia.c
@@ -19,9 +19,11 @@
#include <asm/arch/cpu.h>
#include <asm/arch/soc.h>
#include <dm/uclass.h>
+#include <dt-bindings/gpio/gpio.h>
#include <fdt_support.h>
#include <time.h>
#include <linux/bitops.h>
+#include <linux/delay.h>
#include <u-boot/crc.h>
#include "../drivers/ddr/marvell/a38x/ddr3_init.h"
@@ -30,8 +32,6 @@
DECLARE_GLOBAL_DATA_PTR;
-#define OMNIA_SPI_NOR_PATH "/soc/spi@10600/spi-nor@0"
-
#define OMNIA_I2C_BUS_NAME "i2c@11000->i2cmux@70->i2c@0"
#define OMNIA_I2C_MCU_CHIP_ADDR 0x2a
@@ -62,13 +62,40 @@ enum mcu_commands {
CMD_GET_STATUS_WORD = 0x01,
CMD_GET_RESET = 0x09,
CMD_WATCHDOG_STATE = 0x0b,
+
+ /* available if STS_FEATURES_SUPPORTED bit set in status word */
+ CMD_GET_FEATURES = 0x10,
+
+ /* available if EXT_CMD bit set in features */
+ CMD_EXT_CONTROL = 0x12,
};
enum status_word_bits {
+ STS_MCU_TYPE_MASK = GENMASK(1, 0),
+ STS_MCU_TYPE_STM32 = 0,
+ STS_MCU_TYPE_GD32 = 1,
+ STS_MCU_TYPE_MKL = 2,
+ STS_MCU_TYPE_UNKN = 3,
+ STS_FEATURES_SUPPORTED = BIT(2),
CARD_DET_STSBIT = 0x0010,
MSATA_IND_STSBIT = 0x0020,
};
+/* CMD_GET_FEATURES */
+enum features_e {
+ FEAT_PERIPH_MCU = BIT(0),
+ FEAT_EXT_CMDS = BIT(1),
+};
+
+/* CMD_EXT_CONTROL */
+enum ext_ctl_e {
+ EXT_CTL_nRES_LAN = BIT(1),
+ EXT_CTL_nRES_PHY = BIT(2),
+ EXT_CTL_nPERST0 = BIT(3),
+ EXT_CTL_nPERST1 = BIT(4),
+ EXT_CTL_nPERST2 = BIT(5),
+};
+
/*
* Those values and defines are taken from the Marvell U-Boot version
* "u-boot-2013.01-2014_T3.0"
@@ -371,6 +398,36 @@ static int omnia_get_ram_size_gb(void)
return ram_size;
}
+static const char * const omnia_get_mcu_type(void)
+{
+ static const char * const mcu_types[] = {
+ [STS_MCU_TYPE_STM32] = "STM32",
+ [STS_MCU_TYPE_GD32] = "GD32",
+ [STS_MCU_TYPE_MKL] = "MKL",
+ [STS_MCU_TYPE_UNKN] = "unknown",
+ };
+ static const char * const mcu_types_with_perip_resets[] = {
+ [STS_MCU_TYPE_STM32] = "STM32 (with peripheral resets)",
+ [STS_MCU_TYPE_GD32] = "GD32 (with peripheral resets)",
+ [STS_MCU_TYPE_MKL] = "MKL (with peripheral resets)",
+ [STS_MCU_TYPE_UNKN] = "unknown (with peripheral resets)",
+ };
+ u16 stsword, features;
+ int ret;
+
+ ret = omnia_mcu_read(CMD_GET_STATUS_WORD, &stsword, sizeof(stsword));
+ if (ret)
+ return "unknown";
+
+ if (stsword & STS_FEATURES_SUPPORTED) {
+ ret = omnia_mcu_read(CMD_GET_FEATURES, &features, sizeof(features));
+ if (ret == 0 && (features & FEAT_PERIPH_MCU))
+ return mcu_types_with_perip_resets[stsword & STS_MCU_TYPE_MASK];
+ }
+
+ return mcu_types[stsword & STS_MCU_TYPE_MASK];
+}
+
/*
* Define the DDR layout / topology here in the board file. This will
* be used by the DDR3 init code in the SPL U-Boot version to configure
@@ -499,6 +556,90 @@ static void handle_reset_button(void)
}
}
+static void initialize_switch(void)
+{
+ u32 val, val04, val08, val10, val14;
+ u16 ctrl[2];
+ int err;
+
+ printf("Initializing LAN eth switch... ");
+
+ /* Change RGMII pins to GPIO mode */
+
+ val = val04 = readl(MVEBU_MPP_BASE + 0x04);
+ val &= ~GENMASK(19, 16); /* MPP[12] := GPIO */
+ val &= ~GENMASK(23, 20); /* MPP[13] := GPIO */
+ val &= ~GENMASK(27, 24); /* MPP[14] := GPIO */
+ val &= ~GENMASK(31, 28); /* MPP[15] := GPIO */
+ writel(val, MVEBU_MPP_BASE + 0x04);
+
+ val = val08 = readl(MVEBU_MPP_BASE + 0x08);
+ val &= ~GENMASK(3, 0); /* MPP[16] := GPIO */
+ val &= ~GENMASK(23, 20); /* MPP[21] := GPIO */
+ writel(val, MVEBU_MPP_BASE + 0x08);
+
+ val = val10 = readl(MVEBU_MPP_BASE + 0x10);
+ val &= ~GENMASK(27, 24); /* MPP[38] := GPIO */
+ val &= ~GENMASK(31, 28); /* MPP[39] := GPIO */
+ writel(val, MVEBU_MPP_BASE + 0x10);
+
+ val = val14 = readl(MVEBU_MPP_BASE + 0x14);
+ val &= ~GENMASK(3, 0); /* MPP[40] := GPIO */
+ val &= ~GENMASK(7, 4); /* MPP[41] := GPIO */
+ writel(val, MVEBU_MPP_BASE + 0x14);
+
+ /* Set initial values for switch reset strapping pins */
+
+ val = readl(MVEBU_GPIO0_BASE + 0x00);
+ val |= BIT(12); /* GPIO[12] := 1 */
+ val |= BIT(13); /* GPIO[13] := 1 */
+ val |= BIT(14); /* GPIO[14] := 1 */
+ val |= BIT(15); /* GPIO[15] := 1 */
+ val &= ~BIT(16); /* GPIO[16] := 0 */
+ val |= BIT(21); /* GPIO[21] := 1 */
+ writel(val, MVEBU_GPIO0_BASE + 0x00);
+
+ val = readl(MVEBU_GPIO1_BASE + 0x00);
+ val |= BIT(6); /* GPIO[38] := 1 */
+ val |= BIT(7); /* GPIO[39] := 1 */
+ val |= BIT(8); /* GPIO[40] := 1 */
+ val &= ~BIT(9); /* GPIO[41] := 0 */
+ writel(val, MVEBU_GPIO1_BASE + 0x00);
+
+ val = readl(MVEBU_GPIO0_BASE + 0x04);
+ val &= ~BIT(12); /* GPIO[12] := Out Enable */
+ val &= ~BIT(13); /* GPIO[13] := Out Enable */
+ val &= ~BIT(14); /* GPIO[14] := Out Enable */
+ val &= ~BIT(15); /* GPIO[15] := Out Enable */
+ val &= ~BIT(16); /* GPIO[16] := Out Enable */
+ val &= ~BIT(21); /* GPIO[21] := Out Enable */
+ writel(val, MVEBU_GPIO0_BASE + 0x04);
+
+ val = readl(MVEBU_GPIO1_BASE + 0x04);
+ val &= ~BIT(6); /* GPIO[38] := Out Enable */
+ val &= ~BIT(7); /* GPIO[39] := Out Enable */
+ val &= ~BIT(8); /* GPIO[40] := Out Enable */
+ val &= ~BIT(9); /* GPIO[41] := Out Enable */
+ writel(val, MVEBU_GPIO1_BASE + 0x04);
+
+ /* Release switch reset */
+
+ ctrl[0] = EXT_CTL_nRES_LAN;
+ ctrl[1] = EXT_CTL_nRES_LAN;
+ err = omnia_mcu_write(CMD_EXT_CONTROL, ctrl, sizeof(ctrl));
+
+ mdelay(10);
+
+ /* Change RGMII pins back to RGMII mode */
+
+ writel(val04, MVEBU_MPP_BASE + 0x04);
+ writel(val08, MVEBU_MPP_BASE + 0x08);
+ writel(val10, MVEBU_MPP_BASE + 0x10);
+ writel(val14, MVEBU_MPP_BASE + 0x14);
+
+ puts(err ? "failed\n" : "done\n");
+}
+
int board_early_init_f(void)
{
/* Configure MPP */
@@ -528,6 +669,9 @@ int board_early_init_f(void)
void spl_board_init(void)
{
+ u16 val;
+ int ret;
+
/*
* If booting from UART, disable MCU watchdog in SPL, since uploading
* U-Boot proper can take too much time and trigger it. Instead enable
@@ -537,6 +681,19 @@ void spl_board_init(void)
enable_a385_watchdog(10);
disable_mcu_watchdog();
}
+
+ /*
+ * When MCU controls peripheral resets then release LAN eth switch from
+ * the reset and initialize it. When MCU does not control peripheral
+ * resets then LAN eth switch is initialized automatically by bootstrap
+ * pins when A385 is released from the reset.
+ */
+ ret = omnia_mcu_read(CMD_GET_STATUS_WORD, &val, sizeof(val));
+ if (ret == 0 && (val & STS_FEATURES_SUPPORTED)) {
+ ret = omnia_mcu_read(CMD_GET_FEATURES, &val, sizeof(val));
+ if (ret == 0 && (val & FEAT_PERIPH_MCU))
+ initialize_switch();
+ }
}
#if IS_ENABLED(CONFIG_OF_BOARD_FIXUP) || IS_ENABLED(CONFIG_OF_BOARD_SETUP)
@@ -645,11 +802,109 @@ static void fixup_wwan_port_nodes(void *blob)
disable_pcie_node(blob, 2);
}
+static int insert_mcu_gpio_prop(void *blob, int node, const char *prop,
+ unsigned int phandle, u32 bank, u32 gpio,
+ u32 flags)
+{
+ fdt32_t val[4] = { cpu_to_fdt32(phandle), cpu_to_fdt32(bank),
+ cpu_to_fdt32(gpio), cpu_to_fdt32(flags) };
+ return fdt_setprop(blob, node, prop, &val, sizeof(val));
+}
+
+static int fixup_mcu_gpio_in_pcie_nodes(void *blob)
+{
+ unsigned int mcu_phandle;
+ int port, gpio;
+ int pcie_node;
+ int port_node;
+ int ret;
+
+ ret = fdt_increase_size(blob, 128);
+ if (ret < 0) {
+ printf("Cannot increase FDT size!\n");
+ return ret;
+ }
+
+ mcu_phandle = fdt_create_phandle_by_compatible(blob, "cznic,turris-omnia-mcu");
+ if (!mcu_phandle)
+ return -FDT_ERR_NOPHANDLES;
+
+ fdt_for_each_node_by_compatible(pcie_node, blob, -1, "marvell,armada-370-pcie") {
+ if (!fdtdec_get_is_enabled(blob, pcie_node))
+ continue;
+
+ fdt_for_each_subnode(port_node, blob, pcie_node) {
+ if (!fdtdec_get_is_enabled(blob, port_node))
+ continue;
+
+ port = fdtdec_get_int(blob, port_node, "marvell,pcie-port", -1);
+
+ if (port == 0)
+ gpio = ilog2(EXT_CTL_nPERST0);
+ else if (port == 1)
+ gpio = ilog2(EXT_CTL_nPERST1);
+ else if (port == 2)
+ gpio = ilog2(EXT_CTL_nPERST2);
+ else
+ continue;
+
+ /* insert: reset-gpios = <&mcu 2 gpio GPIO_ACTIVE_LOW>; */
+ ret = insert_mcu_gpio_prop(blob, port_node, "reset-gpios",
+ mcu_phandle, 2, gpio, GPIO_ACTIVE_LOW);
+ if (ret < 0)
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
+static int fixup_mcu_gpio_in_eth_wan_node(void *blob)
+{
+ unsigned int mcu_phandle;
+ int eth_wan_node;
+ int ret;
+
+ ret = fdt_increase_size(blob, 64);
+ if (ret < 0) {
+ printf("Cannot increase FDT size!\n");
+ return ret;
+ }
+
+ eth_wan_node = fdt_path_offset(blob, "ethernet2");
+ if (eth_wan_node < 0)
+ return eth_wan_node;
+
+ mcu_phandle = fdt_create_phandle_by_compatible(blob, "cznic,turris-omnia-mcu");
+ if (!mcu_phandle)
+ return -FDT_ERR_NOPHANDLES;
+
+ /* insert: phy-reset-gpios = <&mcu 2 gpio GPIO_ACTIVE_LOW>; */
+ ret = insert_mcu_gpio_prop(blob, eth_wan_node, "phy-reset-gpios",
+ mcu_phandle, 2, ilog2(EXT_CTL_nRES_PHY), GPIO_ACTIVE_LOW);
+ if (ret < 0)
+ return ret;
+
+ return 0;
+}
+
#endif
#if IS_ENABLED(CONFIG_OF_BOARD_FIXUP)
int board_fix_fdt(void *blob)
{
+ u16 val;
+ int ret;
+
+ ret = omnia_mcu_read(CMD_GET_STATUS_WORD, &val, sizeof(val));
+ if (ret == 0 && (val & STS_FEATURES_SUPPORTED)) {
+ ret = omnia_mcu_read(CMD_GET_FEATURES, &val, sizeof(val));
+ if (ret == 0 && (val & FEAT_PERIPH_MCU)) {
+ fixup_mcu_gpio_in_pcie_nodes(blob);
+ fixup_mcu_gpio_in_eth_wan_node(blob);
+ }
+ }
+
fixup_msata_port_nodes(blob);
fixup_wwan_port_nodes(blob);
@@ -688,6 +943,7 @@ int show_board_info(void)
err = turris_atsha_otp_get_serial_number(&version_num, &serial_num);
printf("Model: Turris Omnia\n");
+ printf(" MCU type: %s\n", omnia_get_mcu_type());
printf(" RAM size: %i MiB\n", omnia_get_ram_size_gb() * 1024);
if (err)
printf(" Serial Number: unknown\n");
@@ -716,10 +972,12 @@ static bool fixup_mtd_partitions(void *blob, int offset, struct mtd_info *mtd)
int parts;
parts = fdt_subnode_offset(blob, offset, "partitions");
- if (parts < 0)
- return false;
+ if (parts >= 0) {
+ if (fdt_del_node(blob, parts) < 0)
+ return false;
+ }
- if (fdt_del_node(blob, parts) < 0)
+ if (fdt_increase_size(blob, 512) < 0)
return false;
parts = fdt_add_subnode(blob, offset, "partitions");
@@ -770,14 +1028,22 @@ static bool fixup_mtd_partitions(void *blob, int offset, struct mtd_info *mtd)
static void fixup_spi_nor_partitions(void *blob)
{
- struct mtd_info *mtd;
+ struct mtd_info *mtd = NULL;
+ char mtd_path[64];
int node;
- mtd = get_mtd_device_nm(OMNIA_SPI_NOR_PATH);
+ node = fdt_node_offset_by_compatible(gd->fdt_blob, -1, "jedec,spi-nor");
+ if (node < 0)
+ goto fail;
+
+ if (fdt_get_path(gd->fdt_blob, node, mtd_path, sizeof(mtd_path)) < 0)
+ goto fail;
+
+ mtd = get_mtd_device_nm(mtd_path);
if (IS_ERR_OR_NULL(mtd))
goto fail;
- node = fdt_path_offset(blob, OMNIA_SPI_NOR_PATH);
+ node = fdt_node_offset_by_compatible(blob, -1, "jedec,spi-nor");
if (node < 0)
goto fail;
@@ -795,6 +1061,19 @@ fail:
int ft_board_setup(void *blob, struct bd_info *bd)
{
+ int node;
+
+ /*
+ * U-Boot's FDT blob contains phy-reset-gpios in ethernet2
+ * node when MCU controls all peripherals resets.
+ * Fixup MCU GPIO nodes in PCIe and eth wan nodes in this case.
+ */
+ node = fdt_path_offset(gd->fdt_blob, "ethernet2");
+ if (node >= 0 && fdt_getprop(gd->fdt_blob, node, "phy-reset-gpios", NULL)) {
+ fixup_mcu_gpio_in_pcie_nodes(blob);
+ fixup_mcu_gpio_in_eth_wan_node(blob);
+ }
+
fixup_spi_nor_partitions(blob);
fixup_msata_port_nodes(blob);
fixup_wwan_port_nodes(blob);
diff --git a/board/alliedtelesis/SBx81LIFKW/sbx81lifkw.c b/board/alliedtelesis/SBx81LIFKW/sbx81lifkw.c
index d8b9fdf..e0a7f3f 100644
--- a/board/alliedtelesis/SBx81LIFKW/sbx81lifkw.c
+++ b/board/alliedtelesis/SBx81LIFKW/sbx81lifkw.c
@@ -13,11 +13,12 @@
#include <linux/io.h>
#include <miiphy.h>
#include <netdev.h>
-#include <status_led.h>
+#include <led.h>
#include <asm/arch/cpu.h>
#include <asm/arch/soc.h>
#include <asm/arch/mpp.h>
-#include <asm/arch/gpio.h>
+#include <asm-generic/gpio.h>
+#include <dm.h>
/* Note: GPIO differences between specific boards
*
@@ -37,45 +38,8 @@
#define SBX81LIFKW_OE_VAL_LOW (BIT(31) | BIT(30) | BIT(28) | BIT(27))
#define SBX81LIFKW_OE_VAL_HIGH (BIT(0) | BIT(1))
-#define MV88E6097_RESET 27
-
DECLARE_GLOBAL_DATA_PTR;
-struct led {
- u32 reg;
- u32 value;
- u32 mask;
-};
-
-struct led amber_solid = {
- MVEBU_GPIO0_BASE,
- BIT(10),
- BIT(18) | BIT(10)
-};
-
-struct led green_solid = {
- MVEBU_GPIO0_BASE,
- BIT(18) | BIT(10),
- BIT(18) | BIT(10)
-};
-
-struct led amber_flash = {
- MVEBU_GPIO0_BASE,
- 0,
- BIT(18) | BIT(10)
-};
-
-struct led green_flash = {
- MVEBU_GPIO0_BASE,
- BIT(18),
- BIT(18) | BIT(10)
-};
-
-static void status_led_set(struct led *led)
-{
- clrsetbits_le32(led->reg, led->mask, led->value);
-}
-
int board_early_init_f(void)
{
/*
@@ -165,8 +129,6 @@ int board_init(void)
/* address of boot parameters */
gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
- status_led_set(&amber_solid);
-
return 0;
}
@@ -180,11 +142,23 @@ void reset_phy(void)
#ifdef CONFIG_MV88E61XX_SWITCH
int mv88e61xx_hw_reset(struct phy_device *phydev)
{
+ struct gpio_desc desc;
+ int ret;
+
+ ret = dm_gpio_lookup_name("mvebu0_27", &desc);
+ if (ret)
+ return ret;
+
+ ret = dm_gpio_request(&desc, "linkstreet_rst");
+ if (ret)
+ return ret;
+
/* Ensure the 88e6097 gets at least 10ms Reset
*/
- kw_gpio_set_value(MV88E6097_RESET, 0);
+ dm_gpio_set_dir_flags(&desc, GPIOD_IS_OUT);
+ dm_gpio_set_value(&desc, 0);
mdelay(20);
- kw_gpio_set_value(MV88E6097_RESET, 1);
+ dm_gpio_set_value(&desc, 1);
mdelay(20);
phydev->advertising = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full;
@@ -196,7 +170,16 @@ int mv88e61xx_hw_reset(struct phy_device *phydev)
#ifdef CONFIG_MISC_INIT_R
int misc_init_r(void)
{
- status_led_set(&green_flash);
+ struct udevice *dev;
+ int ret;
+
+ ret = led_get_by_label("status:ledp", &dev);
+ if (!ret)
+ led_set_state(dev, LEDST_ON);
+
+ ret = led_get_by_label("status:ledn", &dev);
+ if (!ret)
+ led_set_state(dev, LEDST_OFF);
return 0;
}
diff --git a/configs/SBx81LIFKW_defconfig b/configs/SBx81LIFKW_defconfig
index f186f24..a9f9842 100644
--- a/configs/SBx81LIFKW_defconfig
+++ b/configs/SBx81LIFKW_defconfig
@@ -26,6 +26,7 @@ CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=276
CONFIG_CMD_DM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_DHCP=y
CONFIG_BOOTP_NTPSERVER=y
@@ -38,14 +39,16 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_ENV_SPI_MAX_HZ=20000000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
CONFIG_DM=y
-CONFIG_KIRKWOOD_GPIO=y
CONFIG_DM_PCA953X=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/SBx81LIFXCAT_defconfig b/configs/SBx81LIFXCAT_defconfig
index 9d57909..cb80b78 100644
--- a/configs/SBx81LIFXCAT_defconfig
+++ b/configs/SBx81LIFXCAT_defconfig
@@ -42,7 +42,6 @@ CONFIG_ENV_SPI_MAX_HZ=20000000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_NETCONSOLE=y
CONFIG_DM=y
-CONFIG_KIRKWOOD_GPIO=y
CONFIG_DM_PCA953X=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MVTWSI=y
diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig
index ff16825..0bf4b0a 100644
--- a/configs/turris_omnia_defconfig
+++ b/configs/turris_omnia_defconfig
@@ -88,6 +88,7 @@ CONFIG_DM_MTD=y
CONFIG_SF_DEFAULT_SPEED=40000000
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_PHY_MARVELL=y
CONFIG_PHY_FIXED=y
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 219f37e..39762fa 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -24,7 +24,6 @@ obj-$(CONFIG_INTEL_BROADWELL_GPIO) += intel_broadwell_gpio.o
obj-$(CONFIG_IPROC_GPIO) += iproc_gpio.o
obj-$(CONFIG_KIRKWOOD_GPIO) += kw_gpio.o
obj-$(CONFIG_KONA_GPIO) += kona_gpio.o
-obj-$(CONFIG_MARVELL_GPIO) += mvgpio.o
obj-$(CONFIG_MCP230XX_GPIO) += mcp230xx_gpio.o
obj-$(CONFIG_MXC_GPIO) += mxc_gpio.o
obj-$(CONFIG_MXS_GPIO) += mxs_gpio.o
diff --git a/drivers/gpio/mvgpio.c b/drivers/gpio/mvgpio.c
deleted file mode 100644
index 12e7197..0000000
--- a/drivers/gpio/mvgpio.c
+++ /dev/null
@@ -1,97 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2011
- * eInfochips Ltd. <www.einfochips.com>
- * Written-by: Ajay Bhargav <contact@8051projects.net>
- *
- * (C) Copyright 2010
- * Marvell Semiconductor <www.marvell.com>
- */
-
-#include <common.h>
-#include <malloc.h>
-#include <asm/io.h>
-#include <linux/errno.h>
-#include "mvgpio.h"
-#include <asm/gpio.h>
-
-#ifndef MV_MAX_GPIO
-#define MV_MAX_GPIO 128
-#endif
-
-int gpio_request(unsigned gpio, const char *label)
-{
- if (gpio >= MV_MAX_GPIO) {
- printf("%s: Invalid GPIO requested %d\n", __func__, gpio);
- return -1;
- }
- return 0;
-}
-
-int gpio_free(unsigned gpio)
-{
- return 0;
-}
-
-int gpio_direction_input(unsigned gpio)
-{
- struct gpio_reg *gpio_reg_bank;
-
- if (gpio >= MV_MAX_GPIO) {
- printf("%s: Invalid GPIO %d\n", __func__, gpio);
- return -1;
- }
-
- gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gpio));
- writel(GPIO_TO_BIT(gpio), &gpio_reg_bank->gcdr);
- return 0;
-}
-
-int gpio_direction_output(unsigned gpio, int value)
-{
- struct gpio_reg *gpio_reg_bank;
-
- if (gpio >= MV_MAX_GPIO) {
- printf("%s: Invalid GPIO %d\n", __func__, gpio);
- return -1;
- }
-
- gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gpio));
- writel(GPIO_TO_BIT(gpio), &gpio_reg_bank->gsdr);
- gpio_set_value(gpio, value);
- return 0;
-}
-
-int gpio_get_value(unsigned gpio)
-{
- struct gpio_reg *gpio_reg_bank;
- u32 gpio_val;
-
- if (gpio >= MV_MAX_GPIO) {
- printf("%s: Invalid GPIO %d\n", __func__, gpio);
- return -1;
- }
-
- gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gpio));
- gpio_val = readl(&gpio_reg_bank->gplr);
-
- return GPIO_VAL(gpio, gpio_val);
-}
-
-int gpio_set_value(unsigned gpio, int value)
-{
- struct gpio_reg *gpio_reg_bank;
-
- if (gpio >= MV_MAX_GPIO) {
- printf("%s: Invalid GPIO %d\n", __func__, gpio);
- return -1;
- }
-
- gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gpio));
- if (value)
- writel(GPIO_TO_BIT(gpio), &gpio_reg_bank->gpsr);
- else
- writel(GPIO_TO_BIT(gpio), &gpio_reg_bank->gpcr);
-
- return 0;
-}
diff --git a/drivers/gpio/mvgpio.h b/drivers/gpio/mvgpio.h
deleted file mode 100644
index d68c48e..0000000
--- a/drivers/gpio/mvgpio.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2011
- * eInfochips Ltd. <www.einfochips.com>
- * Written-by: Ajay Bhargav <contact@8051projects.net>
- *
- * (C) Copyright 2010
- * Marvell Semiconductor <www.marvell.com>
- */
-
-#ifndef __MVGPIO_H__
-#define __MVGPIO_H__
-
-#include <common.h>
-
-/*
- * GPIO Register map for Marvell SOCs
- */
-struct gpio_reg {
- u32 gplr; /* Pin Level Register - 0x0000 */
- u32 pad0[2];
- u32 gpdr; /* Pin Direction Register - 0x000C */
- u32 pad1[2];
- u32 gpsr; /* Pin Output Set Register - 0x0018 */
- u32 pad2[2];
- u32 gpcr; /* Pin Output Clear Register - 0x0024 */
- u32 pad3[2];
- u32 grer; /* Rising-Edge Detect Enable Register - 0x0030 */
- u32 pad4[2];
- u32 gfer; /* Falling-Edge Detect Enable Register - 0x003C */
- u32 pad5[2];
- u32 gedr; /* Edge Detect Status Register - 0x0048 */
- u32 pad6[2];
- u32 gsdr; /* Bitwise Set of GPIO Direction Register - 0x0054 */
- u32 pad7[2];
- u32 gcdr; /* Bitwise Clear of GPIO Direction Register - 0x0060 */
- u32 pad8[2];
- u32 gsrer; /* Bitwise Set of Rising-Edge Detect Enable
- Register - 0x006C */
- u32 pad9[2];
- u32 gcrer; /* Bitwise Clear of Rising-Edge Detect Enable
- Register - 0x0078 */
- u32 pad10[2];
- u32 gsfer; /* Bitwise Set of Falling-Edge Detect Enable
- Register - 0x0084 */
- u32 pad11[2];
- u32 gcfer; /* Bitwise Clear of Falling-Edge Detect Enable
- Register - 0x0090 */
- u32 pad12[2];
- u32 apmask; /* Bitwise Mask of Edge Detect Register - 0x009C */
-};
-
-#endif /* __MVGPIO_H__ */
diff --git a/drivers/gpio/turris_omnia_mcu.c b/drivers/gpio/turris_omnia_mcu.c
index 3e5d74e..986ccde 100644
--- a/drivers/gpio/turris_omnia_mcu.c
+++ b/drivers/gpio/turris_omnia_mcu.c
@@ -137,48 +137,44 @@ static int turris_omnia_mcu_get_value(struct udevice *dev, uint offset)
static int turris_omnia_mcu_set_value(struct udevice *dev, uint offset, int value)
{
struct turris_omnia_mcu_info *info = dev_get_plat(dev);
- u8 val[2];
- int ret;
- u8 reg;
+ u8 val16[2];
+ u8 val32[4];
switch (offset) {
/* bank 0 */
- case ilog2(STS_USB30_PWRON):
- reg = CMD_GENERAL_CONTROL;
- val[1] = CTL_USB30_PWRON;
- break;
- case ilog2(STS_USB31_PWRON):
- reg = CMD_GENERAL_CONTROL;
- val[1] = CTL_USB31_PWRON;
- break;
- case ilog2(STS_ENABLE_4V5):
- reg = CMD_GENERAL_CONTROL;
- val[1] = CTL_ENABLE_4V5;
- break;
- case ilog2(STS_BUTTON_MODE):
- reg = CMD_GENERAL_CONTROL;
- val[1] = CTL_BUTTON_MODE;
- break;
+ case 0 ... 15:
+ switch (offset) {
+ case ilog2(STS_USB30_PWRON):
+ val16[1] = CTL_USB30_PWRON;
+ break;
+ case ilog2(STS_USB31_PWRON):
+ val16[1] = CTL_USB31_PWRON;
+ break;
+ case ilog2(STS_ENABLE_4V5):
+ val16[1] = CTL_ENABLE_4V5;
+ break;
+ case ilog2(STS_BUTTON_MODE):
+ val16[1] = CTL_BUTTON_MODE;
+ break;
+ default:
+ return -EINVAL;
+ }
+ val16[0] = value ? val16[1] : 0;
+ return dm_i2c_write(dev, CMD_GENERAL_CONTROL, val16, sizeof(val16));
/* bank 2 - supported only when FEAT_EXT_CMDS is set */
case (16 + 32 + 0) ... (16 + 32 + 15):
if (!(info->features & FEAT_EXT_CMDS))
return -EINVAL;
- reg = CMD_EXT_CONTROL;
- val[1] = BIT(offset - 16 - 32);
- break;
+ val32[3] = BIT(offset - 16 - 32) >> 8;
+ val32[2] = BIT(offset - 16 - 32) & 0xff;
+ val32[1] = value ? val32[3] : 0;
+ val32[0] = value ? val32[2] : 0;
+ return dm_i2c_write(dev, CMD_EXT_CONTROL, val32, sizeof(val32));
default:
return -EINVAL;
}
-
- val[0] = value ? val[1] : 0;
-
- ret = dm_i2c_write(dev, reg, val, 2);
- if (ret)
- return ret;
-
- return 0;
}
static int turris_omnia_mcu_direction_input(struct udevice *dev, uint offset)
diff --git a/drivers/misc/atsha204a-i2c.c b/drivers/misc/atsha204a-i2c.c
index e7c6be5..d3c5158 100644
--- a/drivers/misc/atsha204a-i2c.c
+++ b/drivers/misc/atsha204a-i2c.c
@@ -103,12 +103,13 @@ int atsha204a_wakeup(struct udevice *dev)
for (try = 1; try <= 10; ++try) {
debug("Try %i... ", try);
+ /*
+ * The device ignores any levels or transitions on the SCL pin
+ * when the device is idle, asleep or during waking up.
+ * Don't check for error when waking up the device.
+ */
memset(req, 0, 4);
- res = atsha204a_send(dev, req, 4);
- if (res) {
- debug("failed on I2C send, trying again\n");
- continue;
- }
+ atsha204a_send(dev, req, 4);
udelay(ATSHA204A_TWLO_US + ATSHA204A_TWHI_US);
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 436acca..22f4995 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -301,6 +301,7 @@ config PCI_MVEBU
depends on (ARCH_KIRKWOOD || ARCH_MVEBU)
select MISC
select DM_RESET
+ select DM_GPIO
help
Say Y here if you want to enable PCIe controller support on
Kirkwood and Armada 370/XP/375/38x SoCs.
diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c
index d80f87e..5bd340a 100644
--- a/drivers/pci/pci_mvebu.c
+++ b/drivers/pci/pci_mvebu.c
@@ -22,6 +22,7 @@
#include <asm/io.h>
#include <asm/arch/cpu.h>
#include <asm/arch/soc.h>
+#include <asm/gpio.h>
#include <linux/bitops.h>
#include <linux/delay.h>
#include <linux/errno.h>
@@ -60,6 +61,7 @@ struct mvebu_pcie {
struct resource mem;
void __iomem *iobase;
struct resource io;
+ struct gpio_desc reset_gpio;
u32 intregs;
u32 port;
u32 lane;
@@ -416,6 +418,14 @@ static int mvebu_pcie_probe(struct udevice *dev)
struct udevice *ctlr = pci_get_controller(dev);
struct pci_controller *hose = dev_get_uclass_priv(ctlr);
u32 reg;
+ int ret;
+
+ /* Request for optional PERST# GPIO */
+ ret = gpio_request_by_name(dev, "reset-gpios", 0, &pcie->reset_gpio, GPIOD_IS_OUT);
+ if (ret && ret != -ENOENT) {
+ printf("%s: unable to request reset-gpios: %d\n", pcie->name, ret);
+ return ret;
+ }
/*
* Change Class Code of PCI Bridge device to PCI Bridge (0x600400)
@@ -537,6 +547,10 @@ static int mvebu_pcie_probe(struct udevice *dev)
pcie->cfgcache[(PCI_PREF_MEMORY_BASE - 0x10) / 4] =
PCI_PREF_RANGE_TYPE_64 | (PCI_PREF_RANGE_TYPE_64 << 16);
+ /* Release PERST# via GPIO when it was defined */
+ if (dm_gpio_is_valid(&pcie->reset_gpio))
+ dm_gpio_set_value(&pcie->reset_gpio, 0);
+
mvebu_pcie_wait_for_link(pcie);
return 0;
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
index bb7a76b..25fbe39 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
@@ -99,16 +99,6 @@ struct armada_37xx_pinctrl {
unsigned int nfuncs;
};
-#define PIN_GRP(_name, _start, _nr, _mask, _func1, _func2) \
- { \
- .name = _name, \
- .start_pin = _start, \
- .npins = _nr, \
- .reg_mask = _mask, \
- .val = {0, _mask}, \
- .funcs = {_func1, _func2} \
- }
-
#define PIN_GRP_GPIO_0(_name, _start, _nr) \
{ \
.name = _name, \
@@ -200,9 +190,11 @@ static struct armada_37xx_pin_group armada_37xx_sb_groups[] = {
PIN_GRP_GPIO("pcie1", 3, 1, BIT(5), "pcie"), /* this actually controls "pcie1_reset" */
PIN_GRP_GPIO("pcie1_clkreq", 4, 1, BIT(9), "pcie"),
PIN_GRP_GPIO("pcie1_wakeup", 5, 1, BIT(10), "pcie"),
- PIN_GRP_GPIO("ptp", 20, 3, BIT(11) | BIT(12) | BIT(13), "ptp"),
- PIN_GRP("ptp_clk", 21, 1, BIT(6), "ptp", "mii"),
- PIN_GRP("ptp_trig", 22, 1, BIT(7), "ptp", "mii"),
+ PIN_GRP_GPIO("ptp", 20, 1, BIT(11), "ptp"),
+ PIN_GRP_GPIO_3("ptp_clk", 21, 1, BIT(6) | BIT(12), 0, BIT(6), BIT(12),
+ "ptp", "mii"),
+ PIN_GRP_GPIO_3("ptp_trig", 22, 1, BIT(7) | BIT(13), 0, BIT(7), BIT(13),
+ "ptp", "mii"),
PIN_GRP_GPIO_3("mii_col", 23, 1, BIT(8) | BIT(14), 0, BIT(8), BIT(14),
"mii", "mii_err"),
};
@@ -414,7 +406,17 @@ static int armada_37xx_pmx_get_pin_muxing(struct udevice *dev, unsigned int sele
for (f = 0; f < NB_FUNCS && grp->funcs[f]; f++) {
if (grp->val[f] == val) {
- strlcpy(buf, grp->funcs[f], size);
+ /*
+ * In more cases group name consist of
+ * function name followed by function
+ * number. So if function name is just
+ * prefix of group name, show group name.
+ */
+ if (strncmp(grp->name, grp->funcs[f],
+ strlen(grp->funcs[f])) == 0)
+ strlcpy(buf, grp->name, size);
+ else
+ strlcpy(buf, grp->funcs[f], size);
return 0;
}
}