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| author | Green Wan <green.wan@sifive.com> | 2021-05-02 23:23:04 -0700 |
|---|---|---|
| committer | Leo Yu-Chi Liang <ycliang@andestech.com> | 2021-05-05 16:11:22 +0800 |
| commit | edd9ad81947d2136c71657be88d6cc35a56bd22f (patch) | |
| tree | a4ea6e0359eb11afafb7c668dc7c009d2b0c8eb7 | |
| parent | 8ddaf943589756442bba21e5be645cd47526d82b (diff) | |
| download | u-boot-edd9ad81947d2136c71657be88d6cc35a56bd22f.zip u-boot-edd9ad81947d2136c71657be88d6cc35a56bd22f.tar.gz u-boot-edd9ad81947d2136c71657be88d6cc35a56bd22f.tar.bz2 | |
riscv: cpu: Add callback to init each core
Add a callback harts_early_init() to start.S to allow different riscv
hart perform setup code for each hart as early as possible. Since all
the harts enter the callback, they must be able to run the same
setup.
Signed-off-by: Green Wan <green.wan@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| -rw-r--r-- | arch/riscv/cpu/cpu.c | 11 | ||||
| -rw-r--r-- | arch/riscv/cpu/start.S | 4 |
2 files changed, 15 insertions, 0 deletions
diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c index 85592f5..296e458 100644 --- a/arch/riscv/cpu/cpu.c +++ b/arch/riscv/cpu/cpu.c @@ -140,3 +140,14 @@ int arch_early_init_r(void) { return riscv_cpu_probe(); } + +/** + * harts_early_init() - A callback function called by start.S to configure + * feature settings of each hart. + * + * In a multi-core system, memory access shall be careful here, it shall + * take care of race conditions. + */ +__weak void harts_early_init(void) +{ +} diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index 8589509..308b0a9 100644 --- a/arch/riscv/cpu/start.S +++ b/arch/riscv/cpu/start.S @@ -117,6 +117,10 @@ call_board_init_f_0: mv sp, a0 #endif + /* Configure proprietary settings and customized CSRs of harts */ +call_harts_early_init: + jal harts_early_init + #ifndef CONFIG_XIP /* * Pick hart to initialize global data and run U-Boot. The other harts |