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authorYouMin Chen <cym@rock-chips.com>2023-12-12 15:56:41 +0800
committerKever Yang <kever.yang@rock-chips.com>2024-02-04 18:01:03 +0800
commit875bc40a00f92cd9b5882eaed57a5a3c361328d2 (patch)
tree0f5e5e94e19bde39776c6e85df31421641d563f7
parent819abd0a1eaff9a921f5b917e152b85dab302e33 (diff)
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rockchip: sdram: fix LPDDR5 bank info for sys_reg version 3
This patch add support for additional bank info used by LPDDR5. Series-version: 2 Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
-rw-r--r--arch/arm/mach-rockchip/sdram.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/arch/arm/mach-rockchip/sdram.c b/arch/arm/mach-rockchip/sdram.c
index 99ecbdc..0d9a0ae 100644
--- a/arch/arm/mach-rockchip/sdram.c
+++ b/arch/arm/mach-rockchip/sdram.c
@@ -109,7 +109,14 @@ size_t rockchip_sdram_size(phys_addr_t reg)
cs0_col = 9 + (sys_reg2 >> SYS_REG_COL_SHIFT(ch) &
SYS_REG_COL_MASK);
cs1_col = cs0_col;
- bk = 3 - ((sys_reg2 >> SYS_REG_BK_SHIFT(ch)) & SYS_REG_BK_MASK);
+ if (dram_type == LPDDR5)
+ /* LPDDR5: 0:8bank(bk=3), 1:16bank(bk=4) */
+ bk = 3 + ((sys_reg2 >> SYS_REG_BK_SHIFT(ch)) &
+ SYS_REG_BK_MASK);
+ else
+ /* Other: 0:8bank(bk=3), 1:4bank(bk=2) */
+ bk = 3 - ((sys_reg2 >> SYS_REG_BK_SHIFT(ch)) &
+ SYS_REG_BK_MASK);
if (version >= 2) {
cs1_col = 9 + (sys_reg3 >> SYS_REG_CS1_COL_SHIFT(ch) &
SYS_REG_CS1_COL_MASK);