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author | Richard Zhu <hongxing.zhu@nxp.com> | 2022-01-28 04:41:03 +0100 |
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committer | Stefano Babic <sbabic@denx.de> | 2022-02-05 15:49:01 +0100 |
commit | f1cc43624743655a275da62e92691bafe7465325 (patch) | |
tree | 41ab59fff2d4fc4c228dd1b9d9dee691b25f109f | |
parent | 10a99f0c222e86ffad30f51be20fc04c76c9ae64 (diff) | |
download | u-boot-f1cc43624743655a275da62e92691bafe7465325.zip u-boot-f1cc43624743655a275da62e92691bafe7465325.tar.gz u-boot-f1cc43624743655a275da62e92691bafe7465325.tar.bz2 |
arm64: dts: imx8mm: Add the pcie phy support
Add the PCIe PHY support on iMX8MM platforms.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Tim Harvey <tharvey@gateworks.com>
Tested-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Marek Vasut <marex@denx.de> # Pick from Linux b9ec888f636f ("arm64: dts: imx8mm: Add the pcie phy support")
-rw-r--r-- | arch/arm/dts/imx8mm.dtsi | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/dts/imx8mm.dtsi b/arch/arm/dts/imx8mm.dtsi index b142b80..63cab12 100644 --- a/arch/arm/dts/imx8mm.dtsi +++ b/arch/arm/dts/imx8mm.dtsi @@ -1041,6 +1041,19 @@ reg = <0x32e50200 0x200>; }; + pcie_phy: pcie-phy@32f00000 { + compatible = "fsl,imx8mm-pcie-phy"; + reg = <0x32f00000 0x10000>; + clocks = <&clk IMX8MM_CLK_PCIE1_PHY>; + clock-names = "ref"; + assigned-clocks = <&clk IMX8MM_CLK_PCIE1_PHY>; + assigned-clock-rates = <100000000>; + assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_100M>; + resets = <&src IMX8MQ_RESET_PCIEPHY>; + reset-names = "pciephy"; + #phy-cells = <0>; + status = "disabled"; + }; }; dma_apbh: dma-controller@33000000 { |