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| author | Ang, Chee Hong <chee.hong.ang@intel.com> | 2018-12-19 18:35:12 -0800 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2018-12-20 17:12:25 +0100 |
| commit | d99f1e92a20b4e7025da76bcad6ec18bab9d14be (patch) | |
| tree | 4c5927a3757dad7ee1aeab43e2c2ad273a8084fb | |
| parent | 1f2e948d6d53f77a2ddb2dde3531b0d5bc2815ad (diff) | |
| download | u-boot-d99f1e92a20b4e7025da76bcad6ec18bab9d14be.zip u-boot-d99f1e92a20b4e7025da76bcad6ec18bab9d14be.tar.gz u-boot-d99f1e92a20b4e7025da76bcad6ec18bab9d14be.tar.bz2 | |
arm: socfpga: stratix10: Add generic FPGA reconfig mailbox API for S10
Add a generic mailbox API for FPGA reconfig status which can be
called by others. This new function accepts 2 different mailbox
commands: CONFIG_STATUS or RECONFIG_STATUS.
Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
| -rw-r--r-- | arch/arm/mach-socfpga/include/mach/mailbox_s10.h | 3 | ||||
| -rw-r--r-- | arch/arm/mach-socfpga/mailbox_s10.c | 48 |
2 files changed, 50 insertions, 1 deletions
diff --git a/arch/arm/mach-socfpga/include/mach/mailbox_s10.h b/arch/arm/mach-socfpga/include/mach/mailbox_s10.h index 81a609d..660df35 100644 --- a/arch/arm/mach-socfpga/include/mach/mailbox_s10.h +++ b/arch/arm/mach-socfpga/include/mach/mailbox_s10.h @@ -140,5 +140,6 @@ int mbox_qspi_open(void); #endif int mbox_reset_cold(void); - +int mbox_get_fpga_config_status(u32 cmd); +int mbox_get_fpga_config_status_psci(u32 cmd); #endif /* _MAILBOX_S10_H_ */ diff --git a/arch/arm/mach-socfpga/mailbox_s10.c b/arch/arm/mach-socfpga/mailbox_s10.c index 0d906c3..3c33223 100644 --- a/arch/arm/mach-socfpga/mailbox_s10.c +++ b/arch/arm/mach-socfpga/mailbox_s10.c @@ -342,6 +342,54 @@ int mbox_reset_cold(void) return 0; } +/* Accepted commands: CONFIG_STATUS or RECONFIG_STATUS */ +static __always_inline int mbox_get_fpga_config_status_common(u32 cmd) +{ + u32 reconfig_status_resp_len; + u32 reconfig_status_resp[RECONFIG_STATUS_RESPONSE_LEN]; + int ret; + + reconfig_status_resp_len = RECONFIG_STATUS_RESPONSE_LEN; + ret = mbox_send_cmd_common(MBOX_ID_UBOOT, cmd, + MBOX_CMD_DIRECT, 0, NULL, 0, + &reconfig_status_resp_len, + reconfig_status_resp); + + if (ret) + return ret; + + /* Check for any error */ + ret = reconfig_status_resp[RECONFIG_STATUS_STATE]; + if (ret && ret != MBOX_CFGSTAT_STATE_CONFIG) + return ret; + + /* Make sure nStatus is not 0 */ + ret = reconfig_status_resp[RECONFIG_STATUS_PIN_STATUS]; + if (!(ret & RCF_PIN_STATUS_NSTATUS)) + return MBOX_CFGSTAT_STATE_ERROR_HARDWARE; + + ret = reconfig_status_resp[RECONFIG_STATUS_SOFTFUNC_STATUS]; + if (ret & RCF_SOFTFUNC_STATUS_SEU_ERROR) + return MBOX_CFGSTAT_STATE_ERROR_HARDWARE; + + if ((ret & RCF_SOFTFUNC_STATUS_CONF_DONE) && + (ret & RCF_SOFTFUNC_STATUS_INIT_DONE) && + !reconfig_status_resp[RECONFIG_STATUS_STATE]) + return 0; /* configuration success */ + + return MBOX_CFGSTAT_STATE_CONFIG; +} + +int mbox_get_fpga_config_status(u32 cmd) +{ + return mbox_get_fpga_config_status_common(cmd); +} + +int __secure mbox_get_fpga_config_status_psci(u32 cmd) +{ + return mbox_get_fpga_config_status_common(cmd); +} + int mbox_send_cmd(u8 id, u32 cmd, u8 is_indirect, u32 len, u32 *arg, u8 urgent, u32 *resp_buf_len, u32 *resp_buf) { |