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| author | Tom Rini <trini@konsulko.com> | 2018-01-09 08:45:02 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-01-09 08:45:02 -0500 |
| commit | 8c9e6f28176f85ebf718dfd1f5073f4c0e81a2c5 (patch) | |
| tree | 772d381201ea7d9c451bc5c79eb0a7e102cc6ea9 | |
| parent | f3dd87e0b98999a78e500e8c6d2b063ebadf535a (diff) | |
| parent | a322eb9ff6f4c43d378b683457bdbfc59c1c19a6 (diff) | |
| download | u-boot-8c9e6f28176f85ebf718dfd1f5073f4c0e81a2c5.zip u-boot-8c9e6f28176f85ebf718dfd1f5073f4c0e81a2c5.tar.gz u-boot-8c9e6f28176f85ebf718dfd1f5073f4c0e81a2c5.tar.bz2 | |
Merge git://git.denx.de/u-boot-uniphier
| -rw-r--r-- | arch/arm/mach-uniphier/dram_init.c | 24 | ||||
| -rw-r--r-- | configs/uniphier_v8_defconfig | 1 | ||||
| -rw-r--r-- | include/configs/uniphier.h | 2 |
3 files changed, 25 insertions, 2 deletions
diff --git a/arch/arm/mach-uniphier/dram_init.c b/arch/arm/mach-uniphier/dram_init.c index e9672d2..f678114 100644 --- a/arch/arm/mach-uniphier/dram_init.c +++ b/arch/arm/mach-uniphier/dram_init.c @@ -205,6 +205,7 @@ int dram_init(void) return ret; for (i = 0; i < ARRAY_SIZE(dram_map); i++) { + unsigned long max_size; if (!dram_map[i].size) break; @@ -218,9 +219,32 @@ int dram_init(void) dram_map[i].base) break; + /* + * Do not use memory that exceeds 32bit address range. U-Boot + * relocates itself to the end of the effectively available RAM. + * This could be a problem for DMA engines that do not support + * 64bit address (SDMA of SDHCI, UniPhier AV-ether, etc.) + */ + if (dram_map[i].base >= 1ULL << 32) + break; + + max_size = (1ULL << 32) - dram_map[i].base; + + if (dram_map[i].size > max_size) { + gd->ram_size += max_size; + break; + } + gd->ram_size += dram_map[i].size; } + /* + * LD20 uses the last 64 byte for each channel for dynamic + * DDR PHY training + */ + if (uniphier_get_soc_id() == UNIPHIER_LD20_ID) + gd->ram_size -= 64; + return 0; } diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig index bbcf3b0..2edc3a9 100644 --- a/configs/uniphier_v8_defconfig +++ b/configs/uniphier_v8_defconfig @@ -34,6 +34,7 @@ CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 CONFIG_MMC_UNIPHIER=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_CADENCE=y +CONFIG_MMC_SDHCI_SDMA=y CONFIG_NAND=y CONFIG_NAND_DENALI_DT=y CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8 diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 12cbe9b..5ab06f6 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -215,8 +215,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_NR_DRAM_BANKS 3 -/* for LD20; the last 64 byte is used for dynamic DDR PHY training */ -#define CONFIG_SYS_MEM_TOP_HIDE 64 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE) |