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authorRobert P. J. Day <rpjday@crashcourse.ca>2016-12-29 05:23:19 -0500
committerTom Rini <trini@konsulko.com>2017-01-02 11:14:01 -0500
commit66723eda4ebbb53a0708aa0cbb1853f2b86fb117 (patch)
tree05f2ba3838040c87b606484f666c2d25288f3d53
parentb352548890c2d7d937d156727905b906aaa7eebd (diff)
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doc/README.cfi: Update code snippet, and add example.
First, update the code snippet referenced in the README file. And since there are only two boards that override flash_cmd_reset(), might as well show them both. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
-rw-r--r--doc/README.cfi31
1 files changed, 26 insertions, 5 deletions
diff --git a/doc/README.cfi b/doc/README.cfi
index 81e7cf1..ad52850 100644
--- a/doc/README.cfi
+++ b/doc/README.cfi
@@ -1,7 +1,7 @@
The common CFI driver provides this weak default implementation for
flash_cmd_reset():
-void __flash_cmd_reset(flash_info_t *info)
+static void __flash_cmd_reset(flash_info_t *info)
{
/*
* We do not yet know what kind of commandset to use, so we issue
@@ -9,22 +9,43 @@ void __flash_cmd_reset(flash_info_t *info)
* that AMD flash roms ignore the Intel command.
*/
flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
+ udelay(1);
flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
}
void flash_cmd_reset(flash_info_t *info)
__attribute__((weak,alias("__flash_cmd_reset")));
+Some flash chips seem to have trouble with this reset sequence.
+In this case, board-specific code can override this weak default
+version with a board-specific function.
-Some flash chips seems to have trouble with this reset sequence. In this case
-the board specific code can override this weak default version with a board
-specific function. For example the digsy_mtc board equipped with the M29W128GH
-from Numonyx needs this version to function properly:
+At the time of writing, there are two boards that define their own
+routine for this.
+
+First, the digsy_mtc board equipped with the M29W128GH from Numonyx
+needs this version to function properly:
void flash_cmd_reset(flash_info_t *info)
{
flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
}
+In addition, the t3corp board defines the routine thusly:
+
+void flash_cmd_reset(flash_info_t *info)
+{
+ /*
+ * FLASH at address CONFIG_SYS_FLASH_BASE is a Spansion chip and
+ * needs the Spansion type reset commands. The other flash chip
+ * is located behind a FPGA (Xilinx DS617) and needs the Intel type
+ * reset command.
+ */
+ if (info->start[0] == CONFIG_SYS_FLASH_BASE)
+ flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
+ else
+ flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
+}
+
see also:
http://www.mail-archive.com/u-boot@lists.denx.de/msg24368.html