diff options
author | Tom Rini <trini@konsulko.com> | 2023-04-05 22:19:57 -0400 |
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committer | Tom Rini <trini@konsulko.com> | 2023-04-05 22:19:57 -0400 |
commit | b0b77fdf3d7d2c1a5e48c3971a677f14e372c164 (patch) | |
tree | e9289a1148f23b78f7f76bc7bb833697db24b3d5 | |
parent | 487e42f7bc5e685c9337890a38358581bb4f31bc (diff) | |
parent | 8ac04e9062fc65bb09754cefefc096d554c6881c (diff) | |
download | u-boot-WIP/05Apr2023.zip u-boot-WIP/05Apr2023.tar.gz u-boot-WIP/05Apr2023.tar.bz2 |
Merge tag 'fsl-qoriq-2023-4-6' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriqWIP/05Apr2023
convert NXP LS1028A RDB and QDS to DM_SERIAL
enable DM_SERIAL for ls1088a
sync serial nodes with linux for lx2160a/ls1088a
-rw-r--r-- | arch/arm/dts/fsl-ls1088a-qds.dtsi | 8 | ||||
-rw-r--r-- | arch/arm/dts/fsl-ls1088a-rdb.dts | 8 | ||||
-rw-r--r-- | arch/arm/dts/fsl-ls1088a-ten64.dts | 6 | ||||
-rw-r--r-- | arch/arm/dts/fsl-ls1088a.dtsi | 61 | ||||
-rw-r--r-- | arch/arm/dts/fsl-lx2160a-qds.dtsi | 11 | ||||
-rw-r--r-- | arch/arm/dts/fsl-lx2160a-rdb.dts | 11 | ||||
-rw-r--r-- | arch/arm/dts/fsl-lx2160a.dtsi | 74 | ||||
-rw-r--r-- | board/freescale/lx2160a/lx2160a.c | 34 | ||||
-rw-r--r-- | configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 3 | ||||
-rw-r--r-- | configs/ls1028aqds_tfa_defconfig | 3 | ||||
-rw-r--r-- | configs/ls1028ardb_tfa_SECURE_BOOT_defconfig | 3 | ||||
-rw-r--r-- | configs/ls1028ardb_tfa_defconfig | 3 | ||||
-rw-r--r-- | configs/ls1088aqds_tfa_defconfig | 4 | ||||
-rw-r--r-- | configs/ls1088ardb_tfa_SECURE_BOOT_defconfig | 4 | ||||
-rw-r--r-- | configs/ls1088ardb_tfa_defconfig | 4 |
15 files changed, 146 insertions, 91 deletions
diff --git a/arch/arm/dts/fsl-ls1088a-qds.dtsi b/arch/arm/dts/fsl-ls1088a-qds.dtsi index 85dc745..4d21d4f 100644 --- a/arch/arm/dts/fsl-ls1088a-qds.dtsi +++ b/arch/arm/dts/fsl-ls1088a-qds.dtsi @@ -132,6 +132,14 @@ }; }; +&duart0 { + status = "okay"; +}; + +&duart1 { + status = "okay"; +}; + &dspi { bus-num = <0>; status = "okay"; diff --git a/arch/arm/dts/fsl-ls1088a-rdb.dts b/arch/arm/dts/fsl-ls1088a-rdb.dts index 01f8fcb..c63d415 100644 --- a/arch/arm/dts/fsl-ls1088a-rdb.dts +++ b/arch/arm/dts/fsl-ls1088a-rdb.dts @@ -142,6 +142,14 @@ }; }; +&duart0 { + status = "okay"; +}; + +&duart1 { + status = "okay"; +}; + &qspi { status = "okay"; diff --git a/arch/arm/dts/fsl-ls1088a-ten64.dts b/arch/arm/dts/fsl-ls1088a-ten64.dts index 43b669c..55a7d41 100644 --- a/arch/arm/dts/fsl-ls1088a-ten64.dts +++ b/arch/arm/dts/fsl-ls1088a-ten64.dts @@ -20,6 +20,8 @@ compatible = "traverse,ten64", "fsl,ls1088a"; aliases { + serial0 = &duart0; + serial1 = &duart1; spi0 = &qspi; }; @@ -164,11 +166,11 @@ status = "okay"; }; -&serial0 { +&duart0 { status = "okay"; }; -&serial1 { +&duart1 { status = "okay"; }; diff --git a/arch/arm/dts/fsl-ls1088a.dtsi b/arch/arm/dts/fsl-ls1088a.dtsi index 9b7c54b..4782b83 100644 --- a/arch/arm/dts/fsl-ls1088a.dtsi +++ b/arch/arm/dts/fsl-ls1088a.dtsi @@ -2,9 +2,10 @@ /* * NXP ls1088a SOC common device tree source * - * Copyright 2017, 2020-2021 NXP + * Copyright 2017, 2020-2021, 2023 NXP */ +#include <dt-bindings/clock/fsl,qoriq-clockgen.h> #include <dt-bindings/interrupt-controller/arm-gic.h> / { compatible = "fsl,ls1088a"; @@ -35,6 +36,48 @@ <1 10 0x8>; /* Hypervisor PPI, active-low */ }; + sysclk: sysclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + clock-output-names = "sysclk"; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>; + + clockgen: clocking@1300000 { + compatible = "fsl,ls1088a-clockgen"; + reg = <0 0x1300000 0 0xa0000>; + #clock-cells = <2>; + clocks = <&sysclk>; + }; + + duart0: serial@21c0500 { + compatible = "fsl,ns16550", "ns16550a"; + reg = <0x0 0x21c0500 0x0 0x100>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(4)>; + interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + bootph-all; + }; + + duart1: serial@21c0600 { + compatible = "fsl,ns16550", "ns16550a"; + reg = <0x0 0x21c0600 0x0 0x100>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(4)>; + interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + bootph-all; + }; + }; + i2c0: i2c@2000000 { compatible = "fsl,vf610-i2c"; #address-cells = <1>; @@ -67,22 +110,6 @@ interrupts = <0 35 4>; }; - serial0: serial@21c0500 { - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550a"; - reg = <0x0 0x21c0500 0x0 0x100>; - clock-frequency = <0>; /* Updated by bootloader */ - interrupts = <0 32 0x1>; /* edge triggered */ - }; - - serial1: serial@21c0600 { - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550a"; - reg = <0x0 0x21c0600 0x0 0x100>; - clock-frequency = <0>; /* Updated by bootloader */ - interrupts = <0 32 0x1>; /* edge triggered */ - }; - dspi: dspi@2100000 { compatible = "fsl,vf610-dspi"; #address-cells = <1>; diff --git a/arch/arm/dts/fsl-lx2160a-qds.dtsi b/arch/arm/dts/fsl-lx2160a-qds.dtsi index 6635c52..e96605b 100644 --- a/arch/arm/dts/fsl-lx2160a-qds.dtsi +++ b/arch/arm/dts/fsl-lx2160a-qds.dtsi @@ -2,7 +2,7 @@ /* * NXP LX2160AQDS common device tree source * - * Copyright 2018-2020 NXP + * Copyright 2018-2020, 2023 NXP * */ @@ -11,6 +11,7 @@ / { aliases { spi0 = &fspi; + serial0 = &uart0; }; }; @@ -286,3 +287,11 @@ &sata3 { status = "okay"; }; + +&uart0 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; diff --git a/arch/arm/dts/fsl-lx2160a-rdb.dts b/arch/arm/dts/fsl-lx2160a-rdb.dts index 3994097..aaa5959 100644 --- a/arch/arm/dts/fsl-lx2160a-rdb.dts +++ b/arch/arm/dts/fsl-lx2160a-rdb.dts @@ -5,7 +5,7 @@ * Author: Priyanka Jain <priyanka.jain@nxp.com> * Sriram Dash <sriram.dash@nxp.com> * - * Copyright 2018 NXP + * Copyright 2018, 2023 NXP * */ @@ -18,6 +18,7 @@ compatible = "fsl,lx2160ardb", "fsl,lx2160a"; aliases { spi0 = &fspi; + serial0 = &uart0; }; }; @@ -137,3 +138,11 @@ &sata3 { status = "okay"; }; + +&uart0 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; diff --git a/arch/arm/dts/fsl-lx2160a.dtsi b/arch/arm/dts/fsl-lx2160a.dtsi index 57c7d3e..680c69c 100644 --- a/arch/arm/dts/fsl-lx2160a.dtsi +++ b/arch/arm/dts/fsl-lx2160a.dtsi @@ -2,7 +2,7 @@ /* * NXP lx2160a SOC common device tree source * - * Copyright 2018-2021 NXP + * Copyright 2018-2021, 2023 NXP * */ @@ -27,6 +27,50 @@ clock-output-names = "sysclk"; }; + soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>; + + uart0: serial@21c0000 { + compatible = "arm,sbsa-uart","arm,pl011"; + reg = <0x0 0x21c0000 0x0 0x1000>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + current-speed = <115200>; + status = "disabled"; + bootph-all; + }; + + uart1: serial@21d0000 { + compatible = "arm,sbsa-uart","arm,pl011"; + reg = <0x0 0x21d0000 0x0 0x1000>; + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; + current-speed = <115200>; + status = "disabled"; + bootph-all; + }; + + uart2: serial@21e0000 { + compatible = "arm,sbsa-uart","arm,pl011"; + reg = <0x0 0x21e0000 0x0 0x1000>; + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; + current-speed = <115200>; + status = "disabled"; + bootph-all; + }; + + uart3: serial@21f0000 { + compatible = "arm,sbsa-uart","arm,pl011"; + reg = <0x0 0x21f0000 0x0 0x1000>; + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; + current-speed = <115200>; + status = "disabled"; + bootph-all; + }; + }; + crypto: crypto@8000000 { compatible = "fsl,sec-v5.0", "fsl,sec-v4.0"; fsl,sec-era = <10>; @@ -177,34 +221,6 @@ status = "disabled"; }; - uart0: serial@21c0000 { - compatible = "arm,pl011"; - reg = <0x0 0x21c0000 0x0 0x1000>; - clocks = <&clockgen 4 0>; - status = "disabled"; - }; - - uart1: serial@21d0000 { - compatible = "arm,pl011"; - reg = <0x0 0x21d0000 0x0 0x1000>; - clocks = <&clockgen 4 0>; - status = "disabled"; - }; - - uart2: serial@21e0000 { - compatible = "arm,pl011"; - reg = <0x0 0x21e0000 0x0 0x1000>; - clocks = <&clockgen 4 0>; - status = "disabled"; - }; - - uart3: serial@21f0000 { - compatible = "arm,pl011"; - reg = <0x0 0x21f0000 0x0 0x1000>; - clocks = <&clockgen 4 0>; - status = "disabled"; - }; - dspi0: dspi@2100000 { compatible = "fsl,vf610-dspi"; #address-cells = <1>; diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c index 33842d0..2a75205 100644 --- a/board/freescale/lx2160a/lx2160a.c +++ b/board/freescale/lx2160a/lx2160a.c @@ -55,45 +55,11 @@ DECLARE_GLOBAL_DATA_PTR; -static struct pl01x_serial_plat serial0 = { -#if CONFIG_CONS_INDEX == 0 - .base = CFG_SYS_SERIAL0, -#elif CONFIG_CONS_INDEX == 1 - .base = CFG_SYS_SERIAL1, -#else -#error "Unsupported console index value." -#endif - .type = TYPE_PL011, -}; - -U_BOOT_DRVINFO(nxp_serial0) = { - .name = "serial_pl01x", - .plat = &serial0, -}; - -static struct pl01x_serial_plat serial1 = { - .base = CFG_SYS_SERIAL1, - .type = TYPE_PL011, -}; - -U_BOOT_DRVINFO(nxp_serial1) = { - .name = "serial_pl01x", - .plat = &serial1, -}; - -static void uart_get_clock(void) -{ - serial0.clock = get_serial_clock(); - serial1.clock = get_serial_clock(); -} - int board_early_init_f(void) { #if defined(CONFIG_SYS_I2C_EARLY_INIT) && defined(CONFIG_SPL_BUILD) i2c_early_init_f(); #endif - /* get required clock for UART IP */ - uart_get_clock(); #ifdef CONFIG_EMC2305 select_i2c_ch_pca9547(I2C_MUX_CH_EMC2305, 0); diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig index ae01d83..15ac90f 100644 --- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig @@ -86,7 +86,8 @@ CONFIG_DM_RTC=y CONFIG_RTC_PCF2127=y CONFIG_SCSI=y CONFIG_DM_SCSI=y -CONFIG_SYS_NS16550_SERIAL=y +CONFIG_DM_SERIAL=y +CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_DSPI=y diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig index 2361c35..78dd20a 100644 --- a/configs/ls1028aqds_tfa_defconfig +++ b/configs/ls1028aqds_tfa_defconfig @@ -92,7 +92,8 @@ CONFIG_DM_RTC=y CONFIG_RTC_PCF2127=y CONFIG_SCSI=y CONFIG_DM_SCSI=y -CONFIG_SYS_NS16550_SERIAL=y +CONFIG_DM_SERIAL=y +CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_DSPI=y diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig index af560c6..2c3c9bd 100644 --- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig @@ -80,7 +80,8 @@ CONFIG_DM_RTC=y CONFIG_RTC_PCF2127=y CONFIG_SCSI=y CONFIG_DM_SCSI=y -CONFIG_SYS_NS16550_SERIAL=y +CONFIG_DM_SERIAL=y +CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_DSPI=y diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig index 93e8721..3384b98 100644 --- a/configs/ls1028ardb_tfa_defconfig +++ b/configs/ls1028ardb_tfa_defconfig @@ -86,7 +86,8 @@ CONFIG_DM_RTC=y CONFIG_RTC_PCF2127=y CONFIG_SCSI=y CONFIG_DM_SCSI=y -CONFIG_SYS_NS16550_SERIAL=y +CONFIG_DM_SERIAL=y +CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_DSPI=y diff --git a/configs/ls1088aqds_tfa_defconfig b/configs/ls1088aqds_tfa_defconfig index 4195724..09e273a 100644 --- a/configs/ls1088aqds_tfa_defconfig +++ b/configs/ls1088aqds_tfa_defconfig @@ -118,7 +118,9 @@ CONFIG_PCIE_LAYERSCAPE_RC=y CONFIG_DM_RTC=y CONFIG_RTC_PCF2127=y CONFIG_DM_SCSI=y -CONFIG_SYS_NS16550_SERIAL=y +CONFIG_SPECIFY_CONSOLE_INDEX=y +CONFIG_DM_SERIAL=y +CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_DSPI=y diff --git a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig index 5633901..558958c 100644 --- a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig @@ -90,7 +90,9 @@ CONFIG_PCIE_LAYERSCAPE_RC=y CONFIG_DM_RTC=y CONFIG_RTC_PCF2127=y CONFIG_DM_SCSI=y -CONFIG_SYS_NS16550_SERIAL=y +CONFIG_SPECIFY_CONSOLE_INDEX=y +CONFIG_DM_SERIAL=y +CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_DSPI=y diff --git a/configs/ls1088ardb_tfa_defconfig b/configs/ls1088ardb_tfa_defconfig index fd466a5..89f8141 100644 --- a/configs/ls1088ardb_tfa_defconfig +++ b/configs/ls1088ardb_tfa_defconfig @@ -96,7 +96,9 @@ CONFIG_PCIE_LAYERSCAPE_RC=y CONFIG_DM_RTC=y CONFIG_RTC_PCF2127=y CONFIG_DM_SCSI=y -CONFIG_SYS_NS16550_SERIAL=y +CONFIG_SPECIFY_CONSOLE_INDEX=y +CONFIG_DM_SERIAL=y +CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_DSPI=y |