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| author | Suman Anna <s-anna@ti.com> | 2020-07-24 17:51:40 -0500 |
|---|---|---|
| committer | Lokesh Vutla <lokeshvutla@ti.com> | 2020-08-11 20:34:45 +0530 |
| commit | f3f2018f665d7fee26aa61f7eea2015e5a4e6bcb (patch) | |
| tree | 6a4fee1c253e1c90e3d36ace9f5b1edc6d77df20 | |
| parent | 58edc6f68689d64c778d4b1b8cca6e2b11c0be12 (diff) | |
| download | u-boot-f3f2018f665d7fee26aa61f7eea2015e5a4e6bcb.zip u-boot-f3f2018f665d7fee26aa61f7eea2015e5a4e6bcb.tar.gz u-boot-f3f2018f665d7fee26aa61f7eea2015e5a4e6bcb.tar.bz2 | |
arm: dts: k3-j721e: Fix interconnect node names
The various CBASS interconnect nodes on K3 J721E SoCs are defined
using the node name "interconnect". This is not a valid node name
as per the dt-schema. Fix these node names to use the standard name
used for SoC interconnects, "bus".
Signed-off-by: Suman Anna <s-anna@ti.com>
| -rw-r--r-- | arch/arm/dts/k3-j721e.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/dts/k3-j721e.dtsi b/arch/arm/dts/k3-j721e.dtsi index 6bd5aab..b267075 100644 --- a/arch/arm/dts/k3-j721e.dtsi +++ b/arch/arm/dts/k3-j721e.dtsi @@ -131,7 +131,7 @@ interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>; }; - cbass_main: interconnect@100000 { + cbass_main: bus@100000 { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <2>; @@ -164,7 +164,7 @@ <0x05 0x00000000 0x05 0x00000000 0x01 0x00000000>, <0x07 0x00000000 0x07 0x00000000 0x01 0x00000000>; - cbass_mcu_wakeup: interconnect@28380000 { + cbass_mcu_wakeup: bus@28380000 { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <2>; |