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| author | Johan Jonker <jbx6244@gmail.com> | 2022-04-09 18:55:04 +0200 |
|---|---|---|
| committer | Kever Yang <kever.yang@rock-chips.com> | 2022-04-18 11:25:13 +0800 |
| commit | d23f55d21749fc1fc1147edad3b1782d479b9946 (patch) | |
| tree | ea66d587c8c2c036f3f816d71f9fe69e1d8714a4 | |
| parent | 12a716422fa0f30ae1ce4ba27cee81a8fe890efc (diff) | |
| download | u-boot-d23f55d21749fc1fc1147edad3b1782d479b9946.zip u-boot-d23f55d21749fc1fc1147edad3b1782d479b9946.tar.gz u-boot-d23f55d21749fc1fc1147edad3b1782d479b9946.tar.bz2 | |
rockchip: tpl: change call condition rockchip_stimer_init()
The Rockchip SoCs rk3066/rk3188 have no CONFIG_ROCKCHIP_STIMER_BASE
defined. Currently there's no exception in TPL. Make this more
generic and compile the code inside the function rockchip_stimer_init()
only when CONFIG_ROCKCHIP_STIMER_BASE is available.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| -rw-r--r-- | arch/arm/mach-rockchip/tpl.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c index 3c007bb..7f43f58 100644 --- a/arch/arm/mach-rockchip/tpl.c +++ b/arch/arm/mach-rockchip/tpl.c @@ -29,6 +29,7 @@ __weak void rockchip_stimer_init(void) { +#if defined(CONFIG_ROCKCHIP_STIMER_BASE) /* If Timer already enabled, don't re-init it */ u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); @@ -45,6 +46,7 @@ __weak void rockchip_stimer_init(void) writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4); writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); +#endif } void board_init_f(ulong dummy) |