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authorTom Rini <trini@konsulko.com>2022-02-23 12:28:15 -0500
committerTom Rini <trini@konsulko.com>2022-03-03 16:51:19 -0500
commita3041d934f80b142c055c809299ef5c0ceb8fa6e (patch)
treefb6763f80eb688c393f4b0f11e0ea82f3c26c42e
parent3db7b2bb4c23939336c0fb9aaa8bc6795410f5af (diff)
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Convert CONFIG_BTB to Kconfig
This converts the following to Kconfig: CONFIG_BTB Signed-off-by: Tom Rini <trini@konsulko.com>
-rw-r--r--arch/powerpc/cpu/mpc85xx/Kconfig10
-rw-r--r--include/configs/MPC8548CDS.h1
-rw-r--r--include/configs/P1010RDB.h1
-rw-r--r--include/configs/P2041RDB.h1
-rw-r--r--include/configs/T102xRDB.h1
-rw-r--r--include/configs/T104xRDB.h1
-rw-r--r--include/configs/T208xQDS.h1
-rw-r--r--include/configs/T208xRDB.h1
-rw-r--r--include/configs/T4240RDB.h1
-rw-r--r--include/configs/corenet_ds.h1
-rw-r--r--include/configs/kmcent2.h1
-rw-r--r--include/configs/p1_p2_rdb_pc.h1
-rw-r--r--include/configs/socrates.h1
13 files changed, 10 insertions, 12 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index c308447..a978eea 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -317,6 +317,7 @@ config ARCH_MPC8540
config ARCH_MPC8544
bool
+ select BTB
select FSL_LAW
select SYS_CACHE_SHIFT_5
select SYS_FSL_ERRATUM_A005125
@@ -330,6 +331,7 @@ config ARCH_MPC8544
config ARCH_MPC8548
bool
+ select BTB
select FSL_LAW
select SYS_FSL_ERRATUM_A005125
select SYS_FSL_ERRATUM_NMG_DDR120
@@ -352,6 +354,7 @@ config ARCH_MPC8560
config ARCH_P1010
bool
+ select BTB
select FSL_LAW
select SYS_CACHE_SHIFT_5
select SYS_HAS_SERDES
@@ -400,6 +403,7 @@ config ARCH_P1011
config ARCH_P1020
bool
+ select BTB
select FSL_LAW
select SYS_CACHE_SHIFT_5
select SYS_FSL_ERRATUM_A004508
@@ -496,6 +500,7 @@ config ARCH_P1025
config ARCH_P2020
bool
+ select BTB
select FSL_LAW
select SYS_CACHE_SHIFT_5
select SYS_FSL_ERRATUM_A004477
@@ -772,6 +777,9 @@ config MPC85XX_HAVE_RESET_VECTOR
bool "Indicate reset vector at CONFIG_RESET_VECTOR_ADDRESS - 0xffc"
depends on MPC85xx
+config BTB
+ bool "toggle branch predition"
+
config BOOKE
bool
default y
@@ -784,12 +792,14 @@ config E500
config E500MC
bool
+ select BTB
imply CMD_PCI
help
Enble PowerPC E500MC core
config E6500
bool
+ select BTB
help
Enable PowerPC E6500 core
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index e16d870..b5430c9 100644
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -30,7 +30,6 @@
* These can be toggled for performance analysis, otherwise use default.
*/
#define CONFIG_L2_CACHE /* toggle L2 cache */
-#define CONFIG_BTB /* toggle branch predition */
/*
* Only possible on E500 Version 2 or newer cores.
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index 106d1e6..827edf4 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -151,7 +151,6 @@
* These can be toggled for performance analysis, otherwise use default.
*/
#define CONFIG_L2_CACHE /* toggle L2 cache */
-#define CONFIG_BTB /* toggle branch predition */
#define CONFIG_ENABLE_36BIT_PHYS
diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index e6d5321..027f1479 100644
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -58,7 +58,6 @@
#define CONFIG_SYS_CACHE_STASHING
#define CONFIG_BACKSIDE_L2_CACHE
#define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E
-#define CONFIG_BTB /* toggle branch predition */
#define CONFIG_ENABLE_36BIT_PHYS
diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index d24cfce..2fe53bf 100644
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -121,7 +121,6 @@
#define CONFIG_SYS_CACHE_STASHING
#define CONFIG_BACKSIDE_L2_CACHE
#define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E
-#define CONFIG_BTB /* toggle branch predition */
#ifdef CONFIG_DDR_ECC
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index 9433f14..2c4ede9 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -98,7 +98,6 @@
#define CONFIG_SYS_CACHE_STASHING
#define CONFIG_BACKSIDE_L2_CACHE
#define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E
-#define CONFIG_BTB /* toggle branch predition */
#ifdef CONFIG_DDR_ECC
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index a41f9f0..3fcab6a 100644
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -88,7 +88,6 @@
* These can be toggled for performance analysis, otherwise use default.
*/
#define CONFIG_SYS_CACHE_STASHING
-#define CONFIG_BTB /* toggle branch predition */
#ifdef CONFIG_DDR_ECC
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index 7165ba0..8a725cd 100644
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -83,7 +83,6 @@
* These can be toggled for performance analysis, otherwise use default.
*/
#define CONFIG_SYS_CACHE_STASHING
-#define CONFIG_BTB /* toggle branch predition */
#ifdef CONFIG_DDR_ECC
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index daccd81..441ff18 100644
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -65,7 +65,6 @@
* These can be toggled for performance analysis, otherwise use default.
*/
#define CONFIG_SYS_CACHE_STASHING
-#define CONFIG_BTB /* toggle branch predition */
#ifdef CONFIG_DDR_ECC
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index bd26412..79c90a7 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -59,7 +59,6 @@
#define CONFIG_SYS_CACHE_STASHING
#define CONFIG_BACKSIDE_L2_CACHE
#define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E
-#define CONFIG_BTB /* toggle branch predition */
#ifdef CONFIG_DDR_ECC
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h
index ca0cb31..52a5ff9 100644
--- a/include/configs/kmcent2.h
+++ b/include/configs/kmcent2.h
@@ -152,7 +152,6 @@
#define CONFIG_SYS_CACHE_STASHING
#define CONFIG_BACKSIDE_L2_CACHE
#define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E
-#define CONFIG_BTB /* toggle branch predition */
#define CONFIG_ENABLE_36BIT_PHYS
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 92008cd..549adf0 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -145,7 +145,6 @@
* These can be toggled for performance analysis, otherwise use default.
*/
#define CONFIG_L2_CACHE
-#define CONFIG_BTB
#define CONFIG_ENABLE_36BIT_PHYS
diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index a51a162..4eb19b0 100644
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -42,7 +42,6 @@
* These can be toggled for performance analysis, otherwise use default.
*/
#define CONFIG_L2_CACHE /* toggle L2 cache */
-#define CONFIG_BTB /* toggle branch predition */
#define CONFIG_SYS_INIT_DBCR DBCR_IDM /* Enable Debug Exceptions */