Merge tag 'mips-pull-2022-11-03' of https://source.denx.de/u-boot/custodians/u-boot-mipsWIP/03Nov2022

- MIPS: convert CONFIG_SYS_MIPS_TIMER_FREQ to Kconfig
- MIPS: mtmips: fix incorrectly converted default value for CONFIG_SPL_PAD_TO

75 files changed, 64 insertions, 95 deletions

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 2e0793a..9af0133 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -14,6 +14,7 @@ choice
 
 config TARGET_MALTA
 	bool "Support malta"
+	select HAS_FIXED_TIMER_FREQUENCY
 	select BOARD_EARLY_INIT_R
 	select DM
 	select DM_SERIAL
@@ -39,27 +40,22 @@ config TARGET_MALTA
 	select SWAP_IO_SPACE
 	imply CMD_DM
 
-config TARGET_VCT
-	bool "Support vct"
-	select ROM_EXCEPTION_VECTORS
-	select SUPPORTS_BIG_ENDIAN
-	select SUPPORTS_CPU_MIPS32_R1
-	select SUPPORTS_CPU_MIPS32_R2
-	select SYS_MIPS_CACHE_INIT_RAM_LOAD
-
 config ARCH_ATH79
 	bool "Support QCA/Atheros ath79"
+	select HAS_FIXED_TIMER_FREQUENCY
 	select DM
 	select OF_CONTROL
 	imply CMD_DM
 
 config ARCH_MSCC
 	bool "Support MSCC VCore-III"
+	select HAS_FIXED_TIMER_FREQUENCY
 	select OF_CONTROL
 	select DM
 
 config ARCH_BMIPS
 	bool "Support BMIPS SoCs"
+	select HAS_FIXED_TIMER_FREQUENCY
 	select CLK
 	select CPU
 	select DM
@@ -70,6 +66,7 @@ config ARCH_BMIPS
 
 config ARCH_MTMIPS
 	bool "Support MediaTek MIPS platforms"
+	select HAS_FIXED_TIMER_FREQUENCY
 	select CLK
 	imply CMD_DM
 	select DISPLAY_CPUINFO
@@ -96,6 +93,7 @@ config ARCH_MTMIPS
 config ARCH_JZ47XX
 	bool "Support Ingenic JZ47xx"
 	select SUPPORT_SPL
+	select HAS_FIXED_TIMER_FREQUENCY
 	select OF_CONTROL
 	select DM
 
@@ -124,12 +122,14 @@ config ARCH_OCTEON
 
 config MACH_PIC32
 	bool "Support Microchip PIC32"
+	select HAS_FIXED_TIMER_FREQUENCY
 	select DM
 	select OF_CONTROL
 	imply CMD_DM
 
 config TARGET_BOSTON
 	bool "Support Boston"
+	select HAS_FIXED_TIMER_FREQUENCY
 	select DM
 	imply DM_EVENT
 	select DM_SERIAL
@@ -151,6 +151,7 @@ config TARGET_BOSTON
 
 config TARGET_XILFPGA
 	bool "Support Imagination Xilfpga"
+	select HAS_FIXED_TIMER_FREQUENCY
 	select DM
 	select DM_ETH
 	select DM_GPIO
@@ -254,6 +255,12 @@ config ROM_EXCEPTION_VECTORS
 	  Disable this, if the U-Boot image is booted from DRAM (e.g. by SPL).
 	  In that case the image size will be reduced by 0x500 bytes.
 
+config SYS_MIPS_TIMER_FREQ
+	int "Fixed MIPS CPU timer frequency in Hz"
+	depends on HAS_FIXED_TIMER_FREQUENCY
+	help
+	  Configures a fixed CPU timer frequency.
+
 config MIPS_CM_BASE
 	hex "MIPS CM GCR Base Address"
 	depends on MIPS_CM
@@ -435,6 +442,9 @@ config SUPPORTS_CPU_MIPS64_R6
 config SUPPORTS_CPU_MIPS64_OCTEON
 	bool
 
+config HAS_FIXED_TIMER_FREQUENCY
+	bool
+
 config CPU_CAVIUM_OCTEON
 	bool
 
diff --git a/arch/mips/mach-jz47xx/include/mach/jz4780.h b/arch/mips/mach-jz47xx/include/mach/jz4780.h
index 4422e50..880445d 100644
--- a/arch/mips/mach-jz47xx/include/mach/jz4780.h
+++ b/arch/mips/mach-jz47xx/include/mach/jz4780.h
@@ -60,7 +60,7 @@
 
 /* PLL setup */
 #define JZ4780_SYS_EXTAL	48000000
-#define JZ4780_SYS_MEM_SPEED	(CONFIG_SYS_MHZ * 1000000)
+#define JZ4780_SYS_MEM_SPEED	(1200 * 1000000)
 #define JZ4780_SYS_MEM_DIV	3
 #define JZ4780_SYS_AUDIO_SPEED	(768 * 1000000)
 
diff --git a/arch/mips/mach-jz47xx/jz4780/pll.c b/arch/mips/mach-jz47xx/jz4780/pll.c
index 323c634..4519b47 100644
--- a/arch/mips/mach-jz47xx/jz4780/pll.c
+++ b/arch/mips/mach-jz47xx/jz4780/pll.c
@@ -399,11 +399,7 @@ static void cpu_mux_select(int pll)
 			((2 - 1) << CPM_CPCCR_L2DIV_BIT) |
 			((1 - 1) << CPM_CPCCR_CDIV_BIT);
 
-	if (CONFIG_SYS_MHZ >= 1000)
-		clk_ctrl |= (12 - 1) << CPM_CPCCR_PDIV_BIT;
-	else
-		clk_ctrl |= (6 - 1) << CPM_CPCCR_PDIV_BIT;
-
+	clk_ctrl |= (12 - 1) << CPM_CPCCR_PDIV_BIT;
 	clrsetbits_le32(cpm_regs + CPM_CPCCR, 0x00ffffff, clk_ctrl);
 
 	while (readl(cpm_regs + CPM_CPCSR) & (CPM_CPCSR_CDIV_BUSY |
diff --git a/board/imgtec/ci20/ci20.c b/board/imgtec/ci20/ci20.c
index 7cbe49a..89f5e7a 100644
--- a/board/imgtec/ci20/ci20.c
+++ b/board/imgtec/ci20/ci20.c
@@ -350,10 +350,6 @@ static const struct jz4780_ddr_config H5TQ2G83CFR_48_config = {
 	.pulldn = 0x0e,
 };
 
-#if (CONFIG_SYS_MHZ != 1200)
-#error No DDR configuration for CPU speed
-#endif
-
 const struct jz4780_ddr_config *jz4780_get_ddr_config(void)
 {
 	const int board_revision = ci20_revision();
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index b738c74..05181bd 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -98,6 +98,7 @@ config SPL_PAD_TO
 	default 0x11000 if ARCH_MX7 || (ARCH_MX6 && !MX6_OCRAM_256KB)
 	default 0x10000 if ARCH_KEYSTONE
 	default 0x8000 if ARCH_SUNXI && !MACH_SUN50I_H616
+	default 0x0 if ARCH_MTMIPS
 	default TPL_MAX_SIZE if TPL_MAX_SIZE > SPL_MAX_SIZE
 	default SPL_MAX_SIZE
 	help
diff --git a/configs/ap121_defconfig b/configs/ap121_defconfig
index 1f4a793..77d2d1f 100644
--- a/configs/ap121_defconfig
+++ b/configs/ap121_defconfig
@@ -11,6 +11,7 @@ CONFIG_DEBUG_UART_CLOCK=25000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_SYS_LOAD_ADDR=0x81000000
 CONFIG_ARCH_ATH79=y
+CONFIG_SYS_MIPS_TIMER_FREQ=200000000
 CONFIG_DEBUG_UART=y
 CONFIG_SYS_MEMTEST_START=0x80100000
 CONFIG_SYS_MEMTEST_END=0x83f00000
diff --git a/configs/ap143_defconfig b/configs/ap143_defconfig
index b902657..96a86b6 100644
--- a/configs/ap143_defconfig
+++ b/configs/ap143_defconfig
@@ -13,6 +13,7 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_SYS_LOAD_ADDR=0x81000000
 CONFIG_ARCH_ATH79=y
 CONFIG_TARGET_AP143=y
+CONFIG_SYS_MIPS_TIMER_FREQ=325000000
 CONFIG_DEBUG_UART=y
 CONFIG_SYS_MEMTEST_START=0x80100000
 CONFIG_SYS_MEMTEST_END=0x83f00000
diff --git a/configs/ap152_defconfig b/configs/ap152_defconfig
index b46b181..a2e547e 100644
--- a/configs/ap152_defconfig
+++ b/configs/ap152_defconfig
@@ -13,6 +13,7 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_SYS_LOAD_ADDR=0x81000000
 CONFIG_ARCH_ATH79=y
 CONFIG_TARGET_AP152=y
+CONFIG_SYS_MIPS_TIMER_FREQ=375000000
 CONFIG_DEBUG_UART=y
 CONFIG_SYS_MEMTEST_START=0x80100000
 CONFIG_SYS_MEMTEST_END=0x83f00000
diff --git a/configs/bcm968380gerg_ram_defconfig b/configs/bcm968380gerg_ram_defconfig
index 6ddec1b..f0a1317 100644
--- a/configs/bcm968380gerg_ram_defconfig
+++ b/configs/bcm968380gerg_ram_defconfig
@@ -9,6 +9,7 @@ CONFIG_SYS_PROMPT="bcm968380gerg # "
 CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_BMIPS=y
 CONFIG_SOC_BMIPS_BCM6838=y
+CONFIG_SYS_MIPS_TIMER_FREQ=160000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
diff --git a/configs/boston32r2_defconfig b/configs/boston32r2_defconfig
index c680995..d80152b 100644
--- a/configs/boston32r2_defconfig
+++ b/configs/boston32r2_defconfig
@@ -9,6 +9,7 @@ CONFIG_SYS_PROMPT="boston # "
 CONFIG_SYS_LOAD_ADDR=0x88000000
 CONFIG_ENV_ADDR=0xBFFE0000
 CONFIG_TARGET_BOSTON=y
+CONFIG_SYS_MIPS_TIMER_FREQ=30000000
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
 CONFIG_MIPS_BOOT_FDT=y
diff --git a/configs/boston32r2el_defconfig b/configs/boston32r2el_defconfig
index 831ee94..8624853 100644
--- a/configs/boston32r2el_defconfig
+++ b/configs/boston32r2el_defconfig
@@ -9,6 +9,7 @@ CONFIG_SYS_PROMPT="boston # "
 CONFIG_SYS_LOAD_ADDR=0x88000000
 CONFIG_ENV_ADDR=0xBFFE0000
 CONFIG_TARGET_BOSTON=y
+CONFIG_SYS_MIPS_TIMER_FREQ=30000000
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
 CONFIG_MIPS_BOOT_FDT=y
diff --git a/configs/boston32r6_defconfig b/configs/boston32r6_defconfig
index 312616a..464b255 100644
--- a/configs/boston32r6_defconfig
+++ b/configs/boston32r6_defconfig
@@ -10,6 +10,7 @@ CONFIG_SYS_LOAD_ADDR=0x88000000
 CONFIG_ENV_ADDR=0xBFFE0000
 CONFIG_TARGET_BOSTON=y
 CONFIG_CPU_MIPS32_R6=y
+CONFIG_SYS_MIPS_TIMER_FREQ=30000000
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
 CONFIG_MIPS_BOOT_FDT=y
diff --git a/configs/boston32r6el_defconfig b/configs/boston32r6el_defconfig
index 50032dd..67abbb9 100644
--- a/configs/boston32r6el_defconfig
+++ b/configs/boston32r6el_defconfig
@@ -10,6 +10,7 @@ CONFIG_SYS_LOAD_ADDR=0x88000000
 CONFIG_ENV_ADDR=0xBFFE0000
 CONFIG_TARGET_BOSTON=y
 CONFIG_CPU_MIPS32_R6=y
+CONFIG_SYS_MIPS_TIMER_FREQ=30000000
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
 CONFIG_MIPS_BOOT_FDT=y
diff --git a/configs/boston64r2_defconfig b/configs/boston64r2_defconfig
index 9bfe4a7..253d232 100644
--- a/configs/boston64r2_defconfig
+++ b/configs/boston64r2_defconfig
@@ -10,6 +10,7 @@ CONFIG_SYS_LOAD_ADDR=0xffffffff88000000
 CONFIG_ENV_ADDR=0xFFFFFFFFBFFE0000
 CONFIG_TARGET_BOSTON=y
 CONFIG_CPU_MIPS64_R2=y
+CONFIG_SYS_MIPS_TIMER_FREQ=30000000
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
 CONFIG_MIPS_BOOT_FDT=y
diff --git a/configs/boston64r2el_defconfig b/configs/boston64r2el_defconfig
index 9d28e07..190c993 100644
--- a/configs/boston64r2el_defconfig
+++ b/configs/boston64r2el_defconfig
@@ -10,6 +10,7 @@ CONFIG_SYS_LOAD_ADDR=0xffffffff88000000
 CONFIG_ENV_ADDR=0xFFFFFFFFBFFE0000
 CONFIG_TARGET_BOSTON=y
 CONFIG_CPU_MIPS64_R2=y
+CONFIG_SYS_MIPS_TIMER_FREQ=30000000
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
 CONFIG_MIPS_BOOT_FDT=y
diff --git a/configs/boston64r6_defconfig b/configs/boston64r6_defconfig
index 7f6c158..f6e246e 100644
--- a/configs/boston64r6_defconfig
+++ b/configs/boston64r6_defconfig
@@ -10,6 +10,7 @@ CONFIG_SYS_LOAD_ADDR=0xffffffff88000000
 CONFIG_ENV_ADDR=0xFFFFFFFFBFFE0000
 CONFIG_TARGET_BOSTON=y
 CONFIG_CPU_MIPS64_R6=y
+CONFIG_SYS_MIPS_TIMER_FREQ=30000000
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
 CONFIG_MIPS_BOOT_FDT=y
diff --git a/configs/boston64r6el_defconfig b/configs/boston64r6el_defconfig
index e203d20..82e01bb 100644
--- a/configs/boston64r6el_defconfig
+++ b/configs/boston64r6el_defconfig
@@ -10,6 +10,7 @@ CONFIG_SYS_LOAD_ADDR=0xffffffff88000000
 CONFIG_ENV_ADDR=0xFFFFFFFFBFFE0000
 CONFIG_TARGET_BOSTON=y
 CONFIG_CPU_MIPS64_R6=y
+CONFIG_SYS_MIPS_TIMER_FREQ=30000000
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
 CONFIG_MIPS_BOOT_FDT=y
diff --git a/configs/ci20_mmc_defconfig b/configs/ci20_mmc_defconfig
index 8b75883..ecb3c9c 100644
--- a/configs/ci20_mmc_defconfig
+++ b/configs/ci20_mmc_defconfig
@@ -13,6 +13,7 @@ CONFIG_SPL_MMC=y
 CONFIG_SPL=y
 CONFIG_SYS_LOAD_ADDR=0x81000000
 CONFIG_ARCH_JZ47XX=y
+CONFIG_SYS_MIPS_TIMER_FREQ=1200000000
 CONFIG_FIT=y
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS4,115200 rw rootwait root=/dev/mmcblk0p1"
diff --git a/configs/comtrend_ar5315u_ram_defconfig b/configs/comtrend_ar5315u_ram_defconfig
index b7b5865..14dcd60 100644
--- a/configs/comtrend_ar5315u_ram_defconfig
+++ b/configs/comtrend_ar5315u_ram_defconfig
@@ -9,6 +9,7 @@ CONFIG_SYS_PROMPT="AR-5315un # "
 CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_BMIPS=y
 CONFIG_SOC_BMIPS_BCM6318=y
+CONFIG_SYS_MIPS_TIMER_FREQ=166500000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
diff --git a/configs/comtrend_ar5387un_ram_defconfig b/configs/comtrend_ar5387un_ram_defconfig
index f1647a0..d98a36e 100644
--- a/configs/comtrend_ar5387un_ram_defconfig
+++ b/configs/comtrend_ar5387un_ram_defconfig
@@ -9,6 +9,7 @@ CONFIG_SYS_PROMPT="AR-5387un # "
 CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_BMIPS=y
 CONFIG_SOC_BMIPS_BCM6328=y
+CONFIG_SYS_MIPS_TIMER_FREQ=160000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
diff --git a/configs/comtrend_ct5361_ram_defconfig b/configs/comtrend_ct5361_ram_defconfig
index e2f44d5..c5e4c69 100644
--- a/configs/comtrend_ct5361_ram_defconfig
+++ b/configs/comtrend_ct5361_ram_defconfig
@@ -9,6 +9,7 @@ CONFIG_SYS_PROMPT="CT-5361 # "
 CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_BMIPS=y
 CONFIG_SOC_BMIPS_BCM6348=y
+CONFIG_SYS_MIPS_TIMER_FREQ=128000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
diff --git a/configs/comtrend_vr3032u_ram_defconfig b/configs/comtrend_vr3032u_ram_defconfig
index c92059d..51c2248 100644
--- a/configs/comtrend_vr3032u_ram_defconfig
+++ b/configs/comtrend_vr3032u_ram_defconfig
@@ -9,6 +9,7 @@ CONFIG_SYS_PROMPT="VR-3032u # "
 CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_BMIPS=y
 CONFIG_SOC_BMIPS_BCM63268=y
+CONFIG_SYS_MIPS_TIMER_FREQ=200000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
diff --git a/configs/comtrend_wap5813n_ram_defconfig b/configs/comtrend_wap5813n_ram_defconfig
index 0663418..79568cf 100644
--- a/configs/comtrend_wap5813n_ram_defconfig
+++ b/configs/comtrend_wap5813n_ram_defconfig
@@ -9,6 +9,7 @@ CONFIG_SYS_PROMPT="WAP-5813n # "
 CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_BMIPS=y
 CONFIG_SOC_BMIPS_BCM6368=y
+CONFIG_SYS_MIPS_TIMER_FREQ=200000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
diff --git a/configs/gardena-smart-gateway-mt7688_defconfig b/configs/gardena-smart-gateway-mt7688_defconfig
index 992e850..aecd6fb 100644
--- a/configs/gardena-smart-gateway-mt7688_defconfig
+++ b/configs/gardena-smart-gateway-mt7688_defconfig
@@ -17,6 +17,7 @@ CONFIG_ENV_OFFSET_REDUND=0xB0000
 CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_MTMIPS=y
 CONFIG_SOC_MT7628=y
+CONFIG_SYS_MIPS_TIMER_FREQ=290000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
diff --git a/configs/huawei_hg556a_ram_defconfig b/configs/huawei_hg556a_ram_defconfig
index aafec58..b53fc9a 100644
--- a/configs/huawei_hg556a_ram_defconfig
+++ b/configs/huawei_hg556a_ram_defconfig
@@ -9,6 +9,7 @@ CONFIG_SYS_PROMPT="HG556a # "
 CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_BMIPS=y
 CONFIG_SOC_BMIPS_BCM6358=y
+CONFIG_SYS_MIPS_TIMER_FREQ=150000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
diff --git a/configs/imgtec_xilfpga_defconfig b/configs/imgtec_xilfpga_defconfig
index c275990..a0632bc 100644
--- a/configs/imgtec_xilfpga_defconfig
+++ b/configs/imgtec_xilfpga_defconfig
@@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="nexys4ddr"
 CONFIG_SYS_PROMPT="MIPSfpga # "
 CONFIG_SYS_LOAD_ADDR=0x80500000
 CONFIG_TARGET_XILFPGA=y
+CONFIG_SYS_MIPS_TIMER_FREQ=50000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
diff --git a/configs/linkit-smart-7688_defconfig b/configs/linkit-smart-7688_defconfig
index a129679..0bdb4e6 100644
--- a/configs/linkit-smart-7688_defconfig
+++ b/configs/linkit-smart-7688_defconfig
@@ -15,6 +15,7 @@ CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_MTMIPS=y
 CONFIG_SOC_MT7628=y
 CONFIG_BOARD_LINKIT_SMART_7688=y
+CONFIG_SYS_MIPS_TIMER_FREQ=290000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
diff --git a/configs/malta64_defconfig b/configs/malta64_defconfig
index f6bb2d0..054c5e6 100644
--- a/configs/malta64_defconfig
+++ b/configs/malta64_defconfig
@@ -10,6 +10,7 @@ CONFIG_SYS_LOAD_ADDR=0xffffffff81000000
 CONFIG_ENV_ADDR=0xFFFFFFFFBE3E0000
 CONFIG_TARGET_MALTA=y
 CONFIG_CPU_MIPS64_R2=y
+CONFIG_SYS_MIPS_TIMER_FREQ=250000000
 # CONFIG_AUTOBOOT is not set
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_MISC_INIT_R=y
diff --git a/configs/malta64el_defconfig b/configs/malta64el_defconfig
index 7d11966..55f624b 100644
--- a/configs/malta64el_defconfig
+++ b/configs/malta64el_defconfig
@@ -11,6 +11,7 @@ CONFIG_ENV_ADDR=0xFFFFFFFFBE3E0000
 CONFIG_TARGET_MALTA=y
 CONFIG_BUILD_TARGET="u-boot-swap.bin"
 CONFIG_CPU_MIPS64_R2=y
+CONFIG_SYS_MIPS_TIMER_FREQ=250000000
 CONFIG_SYS_LITTLE_ENDIAN=y
 # CONFIG_AUTOBOOT is not set
 CONFIG_BOARD_EARLY_INIT_F=y
diff --git a/configs/malta_defconfig b/configs/malta_defconfig
index f0b46bf..53762a9 100644
--- a/configs/malta_defconfig
+++ b/configs/malta_defconfig
@@ -9,6 +9,7 @@ CONFIG_SYS_PROMPT="malta # "
 CONFIG_SYS_LOAD_ADDR=0x81000000
 CONFIG_ENV_ADDR=0xBE3E0000
 CONFIG_TARGET_MALTA=y
+CONFIG_SYS_MIPS_TIMER_FREQ=250000000
 # CONFIG_AUTOBOOT is not set
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_MISC_INIT_R=y
diff --git a/configs/maltael_defconfig b/configs/maltael_defconfig
index c1829ac..8b86d74 100644
--- a/configs/maltael_defconfig
+++ b/configs/maltael_defconfig
@@ -10,6 +10,7 @@ CONFIG_SYS_LOAD_ADDR=0x81000000
 CONFIG_ENV_ADDR=0xBE3E0000
 CONFIG_TARGET_MALTA=y
 CONFIG_BUILD_TARGET="u-boot-swap.bin"
+CONFIG_SYS_MIPS_TIMER_FREQ=250000000
 CONFIG_SYS_LITTLE_ENDIAN=y
 # CONFIG_AUTOBOOT is not set
 CONFIG_BOARD_EARLY_INIT_F=y
diff --git a/configs/mscc_jr2_defconfig b/configs/mscc_jr2_defconfig
index 1b0d32e..b30b804 100644
--- a/configs/mscc_jr2_defconfig
+++ b/configs/mscc_jr2_defconfig
@@ -14,6 +14,7 @@ CONFIG_ENV_OFFSET_REDUND=0x140000
 CONFIG_SYS_LOAD_ADDR=0x100000
 CONFIG_ARCH_MSCC=y
 CONFIG_SOC_JR2=y
+CONFIG_SYS_MIPS_TIMER_FREQ=250000000
 CONFIG_DEBUG_UART=y
 CONFIG_SYS_MEMTEST_START=0x80000000
 CONFIG_SYS_MEMTEST_END=0x9fc00000
diff --git a/configs/mscc_luton_defconfig b/configs/mscc_luton_defconfig
index 30f7802..9a1e0c3 100644
--- a/configs/mscc_luton_defconfig
+++ b/configs/mscc_luton_defconfig
@@ -15,6 +15,7 @@ CONFIG_SYS_LOAD_ADDR=0x100000
 CONFIG_ARCH_MSCC=y
 CONFIG_SOC_LUTON=y
 CONFIG_DDRTYPE_MT47H128M8HQ=y
+CONFIG_SYS_MIPS_TIMER_FREQ=208333333
 CONFIG_MIPS_BOOT_FDT=y
 CONFIG_DEBUG_UART=y
 CONFIG_SYS_MEMTEST_START=0x80000000
diff --git a/configs/mscc_ocelot_defconfig b/configs/mscc_ocelot_defconfig
index cd1d923..a372b21 100644
--- a/configs/mscc_ocelot_defconfig
+++ b/configs/mscc_ocelot_defconfig
@@ -13,6 +13,7 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_ENV_OFFSET_REDUND=0x140000
 CONFIG_SYS_LOAD_ADDR=0x100000
 CONFIG_ARCH_MSCC=y
+CONFIG_SYS_MIPS_TIMER_FREQ=250000000
 CONFIG_DEBUG_UART=y
 CONFIG_SYS_MEMTEST_START=0x80000000
 CONFIG_SYS_MEMTEST_END=0x9fc00000
diff --git a/configs/mscc_serval_defconfig b/configs/mscc_serval_defconfig
index b5d0190..055ed68 100644
--- a/configs/mscc_serval_defconfig
+++ b/configs/mscc_serval_defconfig
@@ -12,6 +12,7 @@ CONFIG_SYS_LOAD_ADDR=0x100000
 CONFIG_ARCH_MSCC=y
 CONFIG_SOC_SERVAL=y
 CONFIG_DDRTYPE_H5TQ1G63BFA=y
+CONFIG_SYS_MIPS_TIMER_FREQ=208333333
 CONFIG_SYS_MEMTEST_START=0x80000000
 CONFIG_SYS_MEMTEST_END=0x87c00000
 CONFIG_SYS_LITTLE_ENDIAN=y
diff --git a/configs/mscc_servalt_defconfig b/configs/mscc_servalt_defconfig
index d471654..6e225a6 100644
--- a/configs/mscc_servalt_defconfig
+++ b/configs/mscc_servalt_defconfig
@@ -11,6 +11,7 @@ CONFIG_ENV_OFFSET_REDUND=0x140000
 CONFIG_SYS_LOAD_ADDR=0x100000
 CONFIG_ARCH_MSCC=y
 CONFIG_SOC_SERVALT=y
+CONFIG_SYS_MIPS_TIMER_FREQ=250000000
 CONFIG_SYS_MEMTEST_START=0x80000000
 CONFIG_SYS_MEMTEST_END=0x9fc00000
 CONFIG_SYS_LITTLE_ENDIAN=y
diff --git a/configs/mt7620_mt7530_rfb_defconfig b/configs/mt7620_mt7530_rfb_defconfig
index 8c64bb7..96f1092 100644
--- a/configs/mt7620_mt7530_rfb_defconfig
+++ b/configs/mt7620_mt7530_rfb_defconfig
@@ -16,6 +16,7 @@ CONFIG_DEBUG_UART_CLOCK=40000000
 CONFIG_SYS_LOAD_ADDR=0x80010000
 CONFIG_ARCH_MTMIPS=y
 CONFIG_BOARD_MT7620_MT7530_RFB=y
+CONFIG_SYS_MIPS_TIMER_FREQ=290000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
diff --git a/configs/mt7620_rfb_defconfig b/configs/mt7620_rfb_defconfig
index 2aa6eb7..d96da91d 100644
--- a/configs/mt7620_rfb_defconfig
+++ b/configs/mt7620_rfb_defconfig
@@ -15,6 +15,7 @@ CONFIG_DEBUG_UART_BASE=0xb0000c00
 CONFIG_DEBUG_UART_CLOCK=40000000
 CONFIG_SYS_LOAD_ADDR=0x80010000
 CONFIG_ARCH_MTMIPS=y
+CONFIG_SYS_MIPS_TIMER_FREQ=290000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
diff --git a/configs/mt7621_nand_rfb_defconfig b/configs/mt7621_nand_rfb_defconfig
index 0ad4849..ee30f48 100644
--- a/configs/mt7621_nand_rfb_defconfig
+++ b/configs/mt7621_nand_rfb_defconfig
@@ -15,6 +15,7 @@ CONFIG_ARCH_MTMIPS=y
 CONFIG_SOC_MT7621=y
 CONFIG_MT7621_BOOT_FROM_NAND=y
 CONFIG_BOARD_MT7621_NAND_RFB=y
+CONFIG_SYS_MIPS_TIMER_FREQ=440000000
 # CONFIG_MIPS_CACHE_SETUP is not set
 # CONFIG_MIPS_CACHE_DISABLE is not set
 CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
diff --git a/configs/mt7621_rfb_defconfig b/configs/mt7621_rfb_defconfig
index fa66364..9987cc5 100644
--- a/configs/mt7621_rfb_defconfig
+++ b/configs/mt7621_rfb_defconfig
@@ -13,6 +13,7 @@ CONFIG_DEBUG_UART_CLOCK=50000000
 CONFIG_SYS_LOAD_ADDR=0x83000000
 CONFIG_ARCH_MTMIPS=y
 CONFIG_SOC_MT7621=y
+CONFIG_SYS_MIPS_TIMER_FREQ=440000000
 # CONFIG_MIPS_CACHE_SETUP is not set
 # CONFIG_MIPS_CACHE_DISABLE is not set
 CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
diff --git a/configs/mt7628_rfb_defconfig b/configs/mt7628_rfb_defconfig
index 14fc8b0..0e100fc 100644
--- a/configs/mt7628_rfb_defconfig
+++ b/configs/mt7628_rfb_defconfig
@@ -15,6 +15,7 @@ CONFIG_SYS_LOAD_ADDR=0x80010000
 CONFIG_ARCH_MTMIPS=y
 CONFIG_SOC_MT7628=y
 CONFIG_BOARD_MT7628_RFB=y
+CONFIG_SYS_MIPS_TIMER_FREQ=290000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
diff --git a/configs/netgear_cg3100d_ram_defconfig b/configs/netgear_cg3100d_ram_defconfig
index ef7c60a..734a093 100644
--- a/configs/netgear_cg3100d_ram_defconfig
+++ b/configs/netgear_cg3100d_ram_defconfig
@@ -8,6 +8,7 @@ CONFIG_DEFAULT_DEVICE_TREE="netgear,cg3100d"
 CONFIG_SYS_PROMPT="CG3100D # "
 CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_BMIPS=y
+CONFIG_SYS_MIPS_TIMER_FREQ=166500000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
diff --git a/configs/netgear_dgnd3700v2_ram_defconfig b/configs/netgear_dgnd3700v2_ram_defconfig
index 8cf5f1b..b94fe4b 100644
--- a/configs/netgear_dgnd3700v2_ram_defconfig
+++ b/configs/netgear_dgnd3700v2_ram_defconfig
@@ -9,6 +9,7 @@ CONFIG_SYS_PROMPT="DGND3700v2 # "
 CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_BMIPS=y
 CONFIG_SOC_BMIPS_BCM6362=y
+CONFIG_SYS_MIPS_TIMER_FREQ=200000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
diff --git a/configs/pic32mzdask_defconfig b/configs/pic32mzdask_defconfig
index d4eb6f4..529444f 100644
--- a/configs/pic32mzdask_defconfig
+++ b/configs/pic32mzdask_defconfig
@@ -8,6 +8,7 @@ CONFIG_DEFAULT_DEVICE_TREE="pic32mzda_sk"
 CONFIG_SYS_PROMPT="dask # "
 CONFIG_SYS_LOAD_ADDR=0x88500000
 CONFIG_MACH_PIC32=y
+CONFIG_SYS_MIPS_TIMER_FREQ=100000000
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
 CONFIG_MIPS_BOOT_FDT=y
 CONFIG_SYS_MEMTEST_START=0x88000000
diff --git a/configs/sagem_f@st1704_ram_defconfig b/configs/sagem_f@st1704_ram_defconfig
index 744e132..ac3719c 100644
--- a/configs/sagem_f@st1704_ram_defconfig
+++ b/configs/sagem_f@st1704_ram_defconfig
@@ -9,6 +9,7 @@ CONFIG_SYS_PROMPT="F@ST1704 # "
 CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_BMIPS=y
 CONFIG_SOC_BMIPS_BCM6338=y
+CONFIG_SYS_MIPS_TIMER_FREQ=120000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
diff --git a/configs/sfr_nb4-ser_ram_defconfig b/configs/sfr_nb4-ser_ram_defconfig
index 6260939..704a6d4 100644
--- a/configs/sfr_nb4-ser_ram_defconfig
+++ b/configs/sfr_nb4-ser_ram_defconfig
@@ -10,6 +10,7 @@ CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_BMIPS=y
 CONFIG_SOC_BMIPS_BCM6358=y
 CONFIG_BOARD_SFR_NB4_SER=y
+CONFIG_SYS_MIPS_TIMER_FREQ=150000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
diff --git a/configs/tplink_wdr4300_defconfig b/configs/tplink_wdr4300_defconfig
index b60f634..8728906 100644
--- a/configs/tplink_wdr4300_defconfig
+++ b/configs/tplink_wdr4300_defconfig
@@ -6,6 +6,7 @@ CONFIG_DEFAULT_DEVICE_TREE="tplink_wdr4300"
 CONFIG_SYS_LOAD_ADDR=0xa1000000
 CONFIG_ARCH_ATH79=y
 CONFIG_BOARD_TPLINK_WDR4300=y
+CONFIG_SYS_MIPS_TIMER_FREQ=280000000
 CONFIG_SYS_MEMTEST_START=0x80100000
 CONFIG_SYS_MEMTEST_END=0x83f00000
 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
diff --git a/configs/vocore2_defconfig b/configs/vocore2_defconfig
index b362d54..98429a6 100644
--- a/configs/vocore2_defconfig
+++ b/configs/vocore2_defconfig
@@ -16,6 +16,7 @@ CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_MTMIPS=y
 CONFIG_SOC_MT7628=y
 CONFIG_BOARD_VOCORE2=y
+CONFIG_SYS_MIPS_TIMER_FREQ=290000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
diff --git a/include/configs/ap121.h b/include/configs/ap121.h
index 099aac5..650140b 100644
--- a/include/configs/ap121.h
+++ b/include/configs/ap121.h
@@ -6,9 +6,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_SYS_MHZ                  200
-#define CONFIG_SYS_MIPS_TIMER_FREQ      (CONFIG_SYS_MHZ * 1000000)
-
 #define CONFIG_SYS_SDRAM_BASE           0x80000000
 
 #define CONFIG_SYS_INIT_RAM_ADDR        0xbd000000
diff --git a/include/configs/ap143.h b/include/configs/ap143.h
index 60b9e77..0eed8db 100644
--- a/include/configs/ap143.h
+++ b/include/configs/ap143.h
@@ -6,9 +6,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_SYS_MHZ                  325
-#define CONFIG_SYS_MIPS_TIMER_FREQ      (CONFIG_SYS_MHZ * 1000000)
-
 #define CONFIG_SYS_SDRAM_BASE           0x80000000
 
 #define CONFIG_SYS_INIT_RAM_ADDR        0xbd000000
diff --git a/include/configs/ap152.h b/include/configs/ap152.h
index d165ead..7124711 100644
--- a/include/configs/ap152.h
+++ b/include/configs/ap152.h
@@ -6,9 +6,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_SYS_MHZ                  375
-#define CONFIG_SYS_MIPS_TIMER_FREQ      (CONFIG_SYS_MHZ * 1000000)
-
 #define CONFIG_SYS_SDRAM_BASE           0x80000000
 
 #define CONFIG_SYS_INIT_RAM_ADDR        0xbd000000
diff --git a/include/configs/bmips_bcm3380.h b/include/configs/bmips_bcm3380.h
index 66c23cd..c328f41 100644
--- a/include/configs/bmips_bcm3380.h
+++ b/include/configs/bmips_bcm3380.h
@@ -8,9 +8,6 @@
 
 #include <linux/sizes.h>
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	166500000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
diff --git a/include/configs/bmips_bcm6318.h b/include/configs/bmips_bcm6318.h
index 55c1d43..d16d50e 100644
--- a/include/configs/bmips_bcm6318.h
+++ b/include/configs/bmips_bcm6318.h
@@ -8,9 +8,6 @@
 
 #include <linux/sizes.h>
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	166500000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
diff --git a/include/configs/bmips_bcm63268.h b/include/configs/bmips_bcm63268.h
index f046b7e..f69c46b 100644
--- a/include/configs/bmips_bcm63268.h
+++ b/include/configs/bmips_bcm63268.h
@@ -8,9 +8,6 @@
 
 #include <linux/sizes.h>
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	200000000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
diff --git a/include/configs/bmips_bcm6328.h b/include/configs/bmips_bcm6328.h
index 7e48807..acd021e 100644
--- a/include/configs/bmips_bcm6328.h
+++ b/include/configs/bmips_bcm6328.h
@@ -8,9 +8,6 @@
 
 #include <linux/sizes.h>
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	160000000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
diff --git a/include/configs/bmips_bcm6338.h b/include/configs/bmips_bcm6338.h
index b8a962d..fa9e5f0 100644
--- a/include/configs/bmips_bcm6338.h
+++ b/include/configs/bmips_bcm6338.h
@@ -8,9 +8,6 @@
 
 #include <linux/sizes.h>
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	120000000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
diff --git a/include/configs/bmips_bcm6348.h b/include/configs/bmips_bcm6348.h
index b23ab6a..bcf5c87 100644
--- a/include/configs/bmips_bcm6348.h
+++ b/include/configs/bmips_bcm6348.h
@@ -8,9 +8,6 @@
 
 #include <linux/sizes.h>
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	128000000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
diff --git a/include/configs/bmips_bcm6358.h b/include/configs/bmips_bcm6358.h
index 106af2d..e31b8bc 100644
--- a/include/configs/bmips_bcm6358.h
+++ b/include/configs/bmips_bcm6358.h
@@ -8,9 +8,6 @@
 
 #include <linux/sizes.h>
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	150000000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
diff --git a/include/configs/bmips_bcm6362.h b/include/configs/bmips_bcm6362.h
index 34e5425..6e707d3 100644
--- a/include/configs/bmips_bcm6362.h
+++ b/include/configs/bmips_bcm6362.h
@@ -8,9 +8,6 @@
 
 #include <linux/sizes.h>
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	200000000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
diff --git a/include/configs/bmips_bcm6368.h b/include/configs/bmips_bcm6368.h
index fb1d760..bb72c8c 100644
--- a/include/configs/bmips_bcm6368.h
+++ b/include/configs/bmips_bcm6368.h
@@ -8,9 +8,6 @@
 
 #include <linux/sizes.h>
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	200000000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
diff --git a/include/configs/bmips_bcm6838.h b/include/configs/bmips_bcm6838.h
index 481dfc2..a1c992b 100644
--- a/include/configs/bmips_bcm6838.h
+++ b/include/configs/bmips_bcm6838.h
@@ -8,9 +8,6 @@
 
 #include <linux/sizes.h>
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	160000000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
diff --git a/include/configs/boston.h b/include/configs/boston.h
index 5d6da77..a09e831 100644
--- a/include/configs/boston.h
+++ b/include/configs/boston.h
@@ -13,7 +13,6 @@
 /*
  * CPU
  */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	30000000
 
 /*
  * PCI
diff --git a/include/configs/ci20.h b/include/configs/ci20.h
index 192da01..d094fb5 100644
--- a/include/configs/ci20.h
+++ b/include/configs/ci20.h
@@ -9,10 +9,6 @@
 #ifndef __CONFIG_CI20_H__
 #define __CONFIG_CI20_H__
 
-/* Ingenic JZ4780 clock configuration. */
-#define CONFIG_SYS_MHZ			1200
-#define CONFIG_SYS_MIPS_TIMER_FREQ	(CONFIG_SYS_MHZ * 1000000)
-
 /* Memory configuration */
 #define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
 
diff --git a/include/configs/gardena-smart-gateway-mt7688.h b/include/configs/gardena-smart-gateway-mt7688.h
index 5f33470..965fa87 100644
--- a/include/configs/gardena-smart-gateway-mt7688.h
+++ b/include/configs/gardena-smart-gateway-mt7688.h
@@ -6,9 +6,6 @@
 #ifndef __CONFIG_GARDENA_SMART_GATEWAY_H
 #define __CONFIG_GARDENA_SMART_GATEWAY_H
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	290000000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
diff --git a/include/configs/imgtec_xilfpga.h b/include/configs/imgtec_xilfpga.h
index 599b0c5..1fc45f9 100644
--- a/include/configs/imgtec_xilfpga.h
+++ b/include/configs/imgtec_xilfpga.h
@@ -15,8 +15,6 @@
 /*--------------------------------------------
  * CPU configuration
  */
-/* CPU Timer rate */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	50000000
 
 /*----------------------------------------------------------------------
  * Memory Layout
diff --git a/include/configs/linkit-smart-7688.h b/include/configs/linkit-smart-7688.h
index a65decd..9eedd47 100644
--- a/include/configs/linkit-smart-7688.h
+++ b/include/configs/linkit-smart-7688.h
@@ -6,9 +6,6 @@
 #ifndef __CONFIG_LINKIT_SMART_7688_H
 #define __CONFIG_LINKIT_SMART_7688_H
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	290000000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
diff --git a/include/configs/malta.h b/include/configs/malta.h
index 5a42cee..ff70a59 100644
--- a/include/configs/malta.h
+++ b/include/configs/malta.h
@@ -18,8 +18,6 @@
 /*
  * CPU Configuration
  */
-#define CONFIG_SYS_MHZ			250	/* arbitrary value */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	(CONFIG_SYS_MHZ * 1000000)
 
 /*
  * Memory map
diff --git a/include/configs/mt7620.h b/include/configs/mt7620.h
index c6bee5f..c76e1fc 100644
--- a/include/configs/mt7620.h
+++ b/include/configs/mt7620.h
@@ -8,8 +8,6 @@
 #ifndef __CONFIG_MT7620_H
 #define __CONFIG_MT7620_H
 
-#define CONFIG_SYS_MIPS_TIMER_FREQ	290000000
-
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
 #define CONFIG_SYS_INIT_SP_OFFSET	0x400000
diff --git a/include/configs/mt7621.h b/include/configs/mt7621.h
index 1f68997..554c435 100644
--- a/include/configs/mt7621.h
+++ b/include/configs/mt7621.h
@@ -8,8 +8,6 @@
 #ifndef __CONFIG_MT7621_H
 #define __CONFIG_MT7621_H
 
-#define CONFIG_SYS_MIPS_TIMER_FREQ	440000000
-
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
 #define CONFIG_VERY_BIG_RAM
diff --git a/include/configs/mt7628.h b/include/configs/mt7628.h
index 317d1d2..4352701 100644
--- a/include/configs/mt7628.h
+++ b/include/configs/mt7628.h
@@ -8,8 +8,6 @@
 #ifndef __CONFIG_MT7628_H
 #define __CONFIG_MT7628_H
 
-#define CONFIG_SYS_MIPS_TIMER_FREQ	290000000
-
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
 #define CONFIG_SYS_INIT_SP_OFFSET	0x80000
diff --git a/include/configs/pic32mzdask.h b/include/configs/pic32mzdask.h
index 0a07c9c..9d796f9 100644
--- a/include/configs/pic32mzdask.h
+++ b/include/configs/pic32mzdask.h
@@ -13,8 +13,6 @@
 /*--------------------------------------------
  * CPU configuration
  */
-/* CPU Timer rate */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	100000000
 
 /*----------------------------------------------------------------------
  * Memory Layout
diff --git a/include/configs/tplink_wdr4300.h b/include/configs/tplink_wdr4300.h
index f5466fd..b14726a 100644
--- a/include/configs/tplink_wdr4300.h
+++ b/include/configs/tplink_wdr4300.h
@@ -6,9 +6,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_SYS_MHZ			280
-#define CONFIG_SYS_MIPS_TIMER_FREQ	(CONFIG_SYS_MHZ * 1000000)
-
 #define CONFIG_SYS_SDRAM_BASE		0xa0000000
 
 #define CONFIG_SYS_INIT_RAM_ADDR	0xbd000000
diff --git a/include/configs/vcoreiii.h b/include/configs/vcoreiii.h
index 78a62a8..02ddc6f 100644
--- a/include/configs/vcoreiii.h
+++ b/include/configs/vcoreiii.h
@@ -12,13 +12,6 @@
 
 #define CONFIG_SYS_INIT_SP_OFFSET       0x400000
 
-#if defined(CONFIG_SOC_LUTON) || defined(CONFIG_SOC_SERVAL)
-#define CPU_CLOCK_RATE			416666666 /* Clock for the MIPS core */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	208333333
-#else
-#define CPU_CLOCK_RATE			500000000 /* Clock for the MIPS core */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	(CPU_CLOCK_RATE / 2)
-#endif
 #define CONFIG_SYS_NS16550_CLK		CONFIG_SYS_MIPS_TIMER_FREQ
 
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
diff --git a/include/configs/vocore2.h b/include/configs/vocore2.h
index b2572ca..6f36d69 100644
--- a/include/configs/vocore2.h
+++ b/include/configs/vocore2.h
@@ -6,9 +6,6 @@
 #ifndef __VOCORE2_CONFIG_H__
 #define __VOCORE2_CONFIG_H__
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	290000000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 1855652..c3e0f53 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -872,8 +872,6 @@ CONFIG_SYS_MDIO1_OFFSET
 CONFIG_SYS_MEMORY_BASE
 CONFIG_SYS_MEM_RESERVE_SECURE
 CONFIG_SYS_MFD
-CONFIG_SYS_MHZ
-CONFIG_SYS_MIPS_TIMER_FREQ
 CONFIG_SYS_MMC_CD_PIN
 CONFIG_SYS_MMC_CLK_OD
 CONFIG_SYS_MMC_MAX_BLK_COUNT