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| author | Tom Rini <trini@konsulko.com> | 2022-03-03 16:51:24 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-03-03 16:51:45 -0500 |
| commit | fd690a5e932010d0309a859169aeb77af94dff24 (patch) | |
| tree | 12f411ba7a217c285530f43de3f76ec838bc8cb9 | |
| parent | 09cb77d22e8b87f02718a2e8f8ec7952f7673622 (diff) | |
| parent | f9147d636ce26eec8719ce8167887736c321ef94 (diff) | |
| download | u-boot-fd690a5e932010d0309a859169aeb77af94dff24.zip u-boot-fd690a5e932010d0309a859169aeb77af94dff24.tar.gz u-boot-fd690a5e932010d0309a859169aeb77af94dff24.tar.bz2 | |
Merge branch '2022-03-03-Kconfig-migrations' into nextWIP/03Mar2022-next
- Assorted Kconfig migrations and related cleanups.
518 files changed, 713 insertions, 2857 deletions
@@ -1172,35 +1172,6 @@ The following options need to be configured: from a BOOTP client in networks with unusually high latency. - DHCP Advanced Options: - You can fine tune the DHCP functionality by defining - CONFIG_BOOTP_* symbols: - - CONFIG_BOOTP_NISDOMAIN - CONFIG_BOOTP_BOOTFILESIZE - CONFIG_BOOTP_NTPSERVER - CONFIG_BOOTP_TIMEOFFSET - CONFIG_BOOTP_VENDOREX - CONFIG_BOOTP_MAY_FAIL - - CONFIG_BOOTP_MAY_FAIL - If the DHCP server is not found - after the configured retry count, the call will fail - instead of starting over. This can be used to fail over - to Link-local IP address configuration if the DHCP server - is not available. - - CONFIG_BOOTP_DHCP_REQUEST_DELAY - - A 32bit value in microseconds for a delay between - receiving a "DHCP Offer" and sending the "DHCP Request". - This fixes a problem with certain DHCP servers that don't - respond 100% of the time to a "DHCP request". E.g. On an - AT91RM9200 processor running at 180MHz, this delay needed - to be *at least* 15,000 usec before a Windows Server 2003 - DHCP server would reply 100% of the time. I recommend at - least 50,000 usec to be safe. The alternative is to hope - that one of the retries will be successful but note that - the DHCP timeout and retry process takes a longer than - this delay. - Link-local IP address negotiation: Negotiate with other link-local clients on the local network @@ -1972,7 +1943,6 @@ typically in board_init_f() and board_init_r(). - CONFIG_BOARD_EARLY_INIT_F: Call board_early_init_f() - CONFIG_BOARD_EARLY_INIT_R: Call board_early_init_r() - CONFIG_BOARD_LATE_INIT: Call board_late_init() -- CONFIG_BOARD_POSTCLK_INIT: Call board_postclk_init() Configuration Settings: ----------------------- diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 391a77c..06a540d 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -869,6 +869,7 @@ config ARCH_MX31 config ARCH_MX7ULP bool "NXP MX7ULP" + select BOARD_POSTCLK_INIT select CPU_V7A select GPIO_EXTRA_HEADER select MACH_IMX @@ -894,6 +895,7 @@ config ARCH_MX7 config ARCH_MX6 bool "Freescale MX6" + select BOARD_POSTCLK_INIT select CPU_V7A select GPIO_EXTRA_HEADER select MACH_IMX diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig index 6a948d7..ef1f456 100644 --- a/arch/arm/cpu/armv7/ls102xa/Kconfig +++ b/arch/arm/cpu/armv7/ls102xa/Kconfig @@ -5,7 +5,7 @@ config ARCH_LS1021A select SYS_FSL_DDR_VER_50 if SYS_FSL_DDR select SYS_FSL_ERRATUM_A008378 select SYS_FSL_ERRATUM_A008407 - select SYS_FSL_ERRATUM_A008850 + select SYS_FSL_ERRATUM_A008850 if SYS_FSL_DDR select SYS_FSL_ERRATUM_A008997 if USB select SYS_FSL_ERRATUM_A009007 if USB select SYS_FSL_ERRATUM_A009008 if USB diff --git a/arch/arm/cpu/armv7/ls102xa/soc.c b/arch/arm/cpu/armv7/ls102xa/soc.c index 8a95ee8..c131d92 100644 --- a/arch/arm/cpu/armv7/ls102xa/soc.c +++ b/arch/arm/cpu/armv7/ls102xa/soc.c @@ -12,7 +12,9 @@ #include <asm/arch/ls102xa_soc.h> #include <asm/arch/ls102xa_stream_id.h> #include <fsl_csu.h> +#ifdef CONFIG_SYS_FSL_ERRATUM_A008850 #include <fsl_ddr_sdram.h> +#endif struct liodn_id_table sec_liodn_tbl[] = { SET_SEC_JR_LIODN_ENTRY(0, 0x10, 0x10), diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index 2ded3e4..177f568 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -8,7 +8,6 @@ #include <clock_legacy.h> #include <cpu_func.h> #include <env.h> -#include <fsl_ddr_sdram.h> #include <init.h> #include <hang.h> #include <log.h> @@ -36,6 +35,7 @@ #endif #include <asm/armv8/sec_firmware.h> #ifdef CONFIG_SYS_FSL_DDR +#include <fsl_ddr_sdram.h> #include <fsl_ddr.h> #endif #include <asm/arch/clock.h> @@ -1632,12 +1632,14 @@ void update_early_mmu_table(void) __weak int dram_init(void) { +#ifdef CONFIG_SYS_FSL_DDR fsl_initdram(); #if (!defined(CONFIG_SPL) && !defined(CONFIG_TFABOOT)) || \ defined(CONFIG_SPL_BUILD) /* This will break-before-make MMU for DDR */ update_early_mmu_table(); #endif +#endif return 0; } diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 6087d93..f73dbbb 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -1,5 +1,9 @@ if ARCH_EXYNOS +config BOARD_COMMON + def_bool y + depends on !TARGET_SMDKV310 && !TARGET_ARNDALE + choice prompt "EXYNOS architecture type select" optional diff --git a/arch/arm/mach-exynos/spl_boot.c b/arch/arm/mach-exynos/spl_boot.c index 72244988..93fea9c 100644 --- a/arch/arm/mach-exynos/spl_boot.c +++ b/arch/arm/mach-exynos/spl_boot.c @@ -22,6 +22,36 @@ #include "common_setup.h" #include "clock_init.h" +#ifdef CONFIG_ARCH_EXYNOS5 +#define SECURE_BL1_ONLY + +/* Secure FW size configuration */ +#ifdef SECURE_BL1_ONLY +#define SEC_FW_SIZE (8 << 10) /* 8KB */ +#else +#define SEC_FW_SIZE 0 +#endif + +/* Configuration of BL1, BL2, ENV Blocks on mmc */ +#define RES_BLOCK_SIZE (512) +#define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/ +#define BL2_SIZE (512UL << 10UL) /* 512 KB */ + +#define BL1_OFFSET (RES_BLOCK_SIZE + SEC_FW_SIZE) +#define BL2_OFFSET (BL1_OFFSET + BL1_SIZE) + +/* U-Boot copy size from boot Media to DRAM.*/ +#define BL2_START_OFFSET (BL2_OFFSET/512) +#define BL2_SIZE_BLOC_COUNT (BL2_SIZE/512) + +#define EXYNOS_COPY_SPI_FNPTR_ADDR 0x02020058 +#define SPI_FLASH_UBOOT_POS (SEC_FW_SIZE + BL1_SIZE) +#elif defined(CONFIG_ARCH_EXYNOS4) +#define COPY_BL2_SIZE 0x80000 +#define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512) +#define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512) +#endif + DECLARE_GLOBAL_DATA_PTR; /* Index into irom ptr table */ diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig index 7d487f2..e17a55a 100644 --- a/arch/arm/mach-mvebu/Kconfig +++ b/arch/arm/mach-mvebu/Kconfig @@ -152,6 +152,7 @@ config TARGET_OCTEONTX2_CN913x config TARGET_DB_MV784MP_GP bool "Support db-mv784mp-gp" + select BOARD_ECC_SUPPORT select MV78460 config TARGET_DS414 @@ -160,6 +161,7 @@ config TARGET_DS414 config TARGET_MAXBCM bool "Support maxbcm" + select BOARD_ECC_SUPPORT select MV78460 config TARGET_THEADORABLE @@ -226,6 +228,9 @@ config DDR_RESET_ON_TRAINING_FAILURE device will still hang - it doesn't make sense to reset the board in such a case. +config BOARD_ECC_SUPPORT + bool + config SYS_BOARD default "clearfog" if TARGET_CLEARFOG default "helios4" if TARGET_HELIOS4 diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index c308447..a978eea 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -317,6 +317,7 @@ config ARCH_MPC8540 config ARCH_MPC8544 bool + select BTB select FSL_LAW select SYS_CACHE_SHIFT_5 select SYS_FSL_ERRATUM_A005125 @@ -330,6 +331,7 @@ config ARCH_MPC8544 config ARCH_MPC8548 bool + select BTB select FSL_LAW select SYS_FSL_ERRATUM_A005125 select SYS_FSL_ERRATUM_NMG_DDR120 @@ -352,6 +354,7 @@ config ARCH_MPC8560 config ARCH_P1010 bool + select BTB select FSL_LAW select SYS_CACHE_SHIFT_5 select SYS_HAS_SERDES @@ -400,6 +403,7 @@ config ARCH_P1011 config ARCH_P1020 bool + select BTB select FSL_LAW select SYS_CACHE_SHIFT_5 select SYS_FSL_ERRATUM_A004508 @@ -496,6 +500,7 @@ config ARCH_P1025 config ARCH_P2020 bool + select BTB select FSL_LAW select SYS_CACHE_SHIFT_5 select SYS_FSL_ERRATUM_A004477 @@ -772,6 +777,9 @@ config MPC85XX_HAVE_RESET_VECTOR bool "Indicate reset vector at CONFIG_RESET_VECTOR_ADDRESS - 0xffc" depends on MPC85xx +config BTB + bool "toggle branch predition" + config BOOKE bool default y @@ -784,12 +792,14 @@ config E500 config E500MC bool + select BTB imply CMD_PCI help Enble PowerPC E500MC core config E6500 bool + select BTB help Enable PowerPC E6500 core diff --git a/arch/powerpc/cpu/mpc85xx/Makefile b/arch/powerpc/cpu/mpc85xx/Makefile index 6f4ad1f..c32cde0 100644 --- a/arch/powerpc/cpu/mpc85xx/Makefile +++ b/arch/powerpc/cpu/mpc85xx/Makefile @@ -27,7 +27,6 @@ obj-$(CONFIG_MP) += release.o ifndef CONFIG_SPL_BUILD obj-$(CONFIG_CMD_ERRATA) += cmd_errata.o endif -obj-$(CONFIG_CPM2) += commproc.o obj-$(CONFIG_OF_LIBFDT) += fdt.o obj-$(CONFIG_FSL_CORENET) += liodn.o @@ -49,7 +48,6 @@ obj-$(CONFIG_ARCH_T2080) += t2080_ids.o obj-$(CONFIG_QE) += qe_io.o -obj-$(CONFIG_CPM2) += serial_scc.o obj-$(CONFIG_SYS_FSL_QORIQ_CHASSIS1) += fsl_corenet_serdes.o obj-$(CONFIG_SYS_FSL_QORIQ_CHASSIS2) += fsl_corenet2_serdes.o diff --git a/arch/powerpc/cpu/mpc85xx/commproc.c b/arch/powerpc/cpu/mpc85xx/commproc.c deleted file mode 100644 index 8e8427a..0000000 --- a/arch/powerpc/cpu/mpc85xx/commproc.c +++ /dev/null @@ -1,188 +0,0 @@ -/* - * Adapted for Motorola MPC8560 chips - * Xianghua Xiao <x.xiao@motorola.com> - * - * This file is based on "arch/powerpc/8260_io/commproc.c" - here is it's - * copyright notice: - * - * General Purpose functions for the global management of the - * 8220 Communication Processor Module. - * Copyright (c) 1999 Dan Malek (dmalek@jlc.net) - * Copyright (c) 2000 MontaVista Software, Inc (source@mvista.com) - * 2.3.99 Updates - * Copyright (c) 2003 Motorola,Inc. - * - * In addition to the individual control of the communication - * channels, there are a few functions that globally affect the - * communication processor. - * - * Buffer descriptors must be allocated from the dual ported memory - * space. The allocator for that is here. When the communication - * process is reset, we reclaim the memory available. There is - * currently no deallocator for this memory. - */ -#include <common.h> -#include <asm-offsets.h> -#include <asm/cpm_85xx.h> -#include <asm/global_data.h> - -DECLARE_GLOBAL_DATA_PTR; - -/* - * because we have stack and init data in dual port ram - * we must reduce the size - */ -#undef CPM_DATAONLY_SIZE -#define CPM_DATAONLY_SIZE ((uint)(8 * 1024) - CPM_DATAONLY_BASE) - -void -m8560_cpm_reset(void) -{ - volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CONFIG_SYS_MPC85xx_CPM_ADDR; - volatile ulong count; - - gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET); - - /* Reclaim the DP memory for our use. - */ - gd->arch.dp_alloc_base = CPM_DATAONLY_BASE; - gd->arch.dp_alloc_top = gd->arch.dp_alloc_base + CPM_DATAONLY_SIZE; - - /* - * Reset CPM - */ - cpm->im_cpm_cp.cpcr = CPM_CR_RST; - count = 0; - do { /* Spin until command processed */ - __asm__ __volatile__ ("eieio"); - } while ((cpm->im_cpm_cp.cpcr & CPM_CR_FLG) && ++count < 1000000); -} - -/* Allocate some memory from the dual ported ram. - * To help protocols with object alignment restrictions, we do that - * if they ask. - */ -uint -m8560_cpm_dpalloc(uint size, uint align) -{ - volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CONFIG_SYS_MPC85xx_CPM_ADDR; - uint retloc; - uint align_mask, off; - uint savebase; - - align_mask = align - 1; - savebase = gd->arch.dp_alloc_base; - - off = gd->arch.dp_alloc_base & align_mask; - if (off != 0) - gd->arch.dp_alloc_base += (align - off); - - if ((off = size & align_mask) != 0) - size += align - off; - - if ((gd->arch.dp_alloc_base + size) >= gd->arch.dp_alloc_top) { - gd->arch.dp_alloc_base = savebase; - panic("m8560_cpm_dpalloc: ran out of dual port ram!"); - } - - retloc = gd->arch.dp_alloc_base; - gd->arch.dp_alloc_base += size; - - memset((void *)&(cpm->im_dprambase[retloc]), 0, size); - - return(retloc); -} - -/* We also own one page of host buffer space for the allocation of - * UART "fifos" and the like. - */ -uint -m8560_cpm_hostalloc(uint size, uint align) -{ - /* the host might not even have RAM yet - just use dual port RAM */ - return (m8560_cpm_dpalloc(size, align)); -} - -/* Set a baud rate generator. This needs lots of work. There are - * eight BRGs, which can be connected to the CPM channels or output - * as clocks. The BRGs are in two different block of internal - * memory mapped space. - * The baud rate clock is the system clock divided by something. - * It was set up long ago during the initial boot phase and is - * is given to us. - * Baud rate clocks are zero-based in the driver code (as that maps - * to port numbers). Documentation uses 1-based numbering. - */ -#define BRG_INT_CLK gd->arch.brg_clk -#define BRG_UART_CLK ((BRG_INT_CLK + 15) / 16) - -/* This function is used by UARTS, or anything else that uses a 16x - * oversampled clock. - */ -void -m8560_cpm_setbrg(uint brg, uint rate) -{ - volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CONFIG_SYS_MPC85xx_CPM_ADDR; - volatile uint *bp; - - /* This is good enough to get SMCs running..... - */ - if (brg < 4) { - bp = (uint *)&(cpm->im_cpm_brg1.brgc1); - } - else { - bp = (uint *)&(cpm->im_cpm_brg2.brgc5); - brg -= 4; - } - bp += brg; - *bp = (((((BRG_UART_CLK+rate-1)/rate)-1)&0xfff)<<1)|CPM_BRG_EN; -} - -/* This function is used to set high speed synchronous baud rate - * clocks. - */ -void -m8560_cpm_fastbrg(uint brg, uint rate, int div16) -{ - volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CONFIG_SYS_MPC85xx_CPM_ADDR; - volatile uint *bp; - - /* This is good enough to get SMCs running..... - */ - if (brg < 4) { - bp = (uint *)&(cpm->im_cpm_brg1.brgc1); - } - else { - bp = (uint *)&(cpm->im_cpm_brg2.brgc5); - brg -= 4; - } - bp += brg; - *bp = (((((BRG_INT_CLK+rate-1)/rate)-1)&0xfff)<<1)|CPM_BRG_EN; - if (div16) - *bp |= CPM_BRG_DIV16; -} - -/* This function is used to set baud rate generators using an external - * clock source and 16x oversampling. - */ - -void -m8560_cpm_extcbrg(uint brg, uint rate, uint extclk, int pinsel) -{ - volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CONFIG_SYS_MPC85xx_CPM_ADDR; - volatile uint *bp; - - if (brg < 4) { - bp = (uint *)&(cpm->im_cpm_brg1.brgc1); - } - else { - bp = (uint *)&(cpm->im_cpm_brg2.brgc5); - brg -= 4; - } - bp += brg; - *bp = ((((((extclk/16)+rate-1)/rate)-1)&0xfff)<<1)|CPM_BRG_EN; - if (pinsel == 0) - *bp |= CPM_BRG_EXTC_CLK3_9; - else - *bp |= CPM_BRG_EXTC_CLK5_15; -} diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c index cd32290..cc1d02d 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu.c +++ b/arch/powerpc/cpu/mpc85xx/cpu.c @@ -241,10 +241,6 @@ int checkcpu (void) printf("IFC:%-4s MHz\n", strmhz(buf1, sysinfo.freq_localbus)); #endif -#ifdef CONFIG_CPM2 - printf("CPM: %s MHz\n", strmhz(buf1, sysinfo.freq_systembus)); -#endif - #ifdef CONFIG_QE printf(" QE:%-4s MHz\n", strmhz(buf1, sysinfo.freq_qe)); #endif diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index e920e01..e9e133b 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -152,70 +152,6 @@ static void config_qe_ioports(void) } #endif -#ifdef CONFIG_CPM2 -void config_8560_ioports (volatile ccsr_cpm_t * cpm) -{ - int portnum; - - for (portnum = 0; portnum < 4; portnum++) { - uint pmsk = 0, - ppar = 0, - psor = 0, - pdir = 0, - podr = 0, - pdat = 0; - iop_conf_t *iopc = (iop_conf_t *) & iop_conf_tab[portnum][0]; - iop_conf_t *eiopc = iopc + 32; - uint msk = 1; - - /* - * NOTE: - * index 0 refers to pin 31, - * index 31 refers to pin 0 - */ - while (iopc < eiopc) { - if (iopc->conf) { - pmsk |= msk; - if (iopc->ppar) - ppar |= msk; - if (iopc->psor) - psor |= msk; - if (iopc->pdir) - pdir |= msk; - if (iopc->podr) - podr |= msk; - if (iopc->pdat) - pdat |= msk; - } - - msk <<= 1; - iopc++; - } - - if (pmsk != 0) { - volatile ioport_t *iop = ioport_addr (cpm, portnum); - uint tpmsk = ~pmsk; - - /* - * the (somewhat confused) paragraph at the - * bottom of page 35-5 warns that there might - * be "unknown behaviour" when programming - * PSORx and PDIRx, if PPARx = 1, so I - * decided this meant I had to disable the - * dedicated function first, and enable it - * last. - */ - iop->ppar &= tpmsk; - iop->psor = (iop->psor & tpmsk) | psor; - iop->podr = (iop->podr & tpmsk) | podr; - iop->pdat = (iop->pdat & tpmsk) | pdat; - iop->pdir = (iop->pdir & tpmsk) | pdir; - iop->ppar |= ppar; - } - } -} -#endif - #ifdef CONFIG_SYS_FSL_CPC #if defined(CONFIG_RAMBOOT_PBL) || defined(CONFIG_SYS_CPC_REINIT_F) void disable_cpc_sram(void) @@ -474,16 +410,8 @@ ulong cpu_init_f(void) #endif #endif -#ifdef CONFIG_CPM2 - config_8560_ioports((ccsr_cpm_t *)CONFIG_SYS_MPC85xx_CPM_ADDR); -#endif - init_early_memctl_regs(); -#if defined(CONFIG_CPM2) - m8560_cpm_reset(); -#endif - #if defined(CONFIG_QE) && !defined(CONFIG_U_QE) /* Config QE ioports */ config_qe_ioports(); diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c index d4b828e..c8ad6a1 100644 --- a/arch/powerpc/cpu/mpc85xx/fdt.c +++ b/arch/powerpc/cpu/mpc85xx/fdt.c @@ -652,14 +652,6 @@ void ft_cpu_setup(void *blob, struct bd_info *bd) "clock-frequency", CONFIG_SYS_NS16550_CLK, 1); #endif -#ifdef CONFIG_CPM2 - do_fixup_by_compat_u32(blob, "fsl,cpm2-scc-uart", - "current-speed", gd->baudrate, 1); - - do_fixup_by_compat_u32(blob, "fsl,cpm2-brg", - "clock-frequency", bd->bi_brgfreq, 1); -#endif - #ifdef CONFIG_FSL_CORENET do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-1.0", "clock-frequency", get_board_sys_clk(), 1); diff --git a/arch/powerpc/cpu/mpc85xx/serial_scc.c b/arch/powerpc/cpu/mpc85xx/serial_scc.c deleted file mode 100644 index a2505d1..0000000 --- a/arch/powerpc/cpu/mpc85xx/serial_scc.c +++ /dev/null @@ -1,262 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2003 Motorola Inc. - * Xianghua Xiao (X.Xiao@motorola.com) - * Modified based on 8260 for 8560. - * - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * Hacked for MPC8260 by Murray.Jensen@cmst.csiro.au, 19-Oct-00. - */ - -/* - * Minimal serial functions needed to use one of the SCC ports - * as serial console interface. - */ - -#include <common.h> -#include <asm/cpm_85xx.h> -#include <serial.h> -#include <asm/global_data.h> -#include <linux/compiler.h> - -DECLARE_GLOBAL_DATA_PTR; - -#if defined(CONFIG_CONS_ON_SCC) - -#if CONFIG_CONS_INDEX == 1 /* Console on SCC1 */ - -#define SCC_INDEX 0 -#define PROFF_SCC PROFF_SCC1 -#define CMXSCR_MASK (CMXSCR_GR1|CMXSCR_SC1|\ - CMXSCR_RS1CS_MSK|CMXSCR_TS1CS_MSK) -#define CMXSCR_VALUE (CMXSCR_RS1CS_BRG1|CMXSCR_TS1CS_BRG1) -#define CPM_CR_SCC_PAGE CPM_CR_SCC1_PAGE -#define CPM_CR_SCC_SBLOCK CPM_CR_SCC1_SBLOCK - -#elif CONFIG_CONS_INDEX == 2 /* Console on SCC2 */ - -#define SCC_INDEX 1 -#define PROFF_SCC PROFF_SCC2 -#define CMXSCR_MASK (CMXSCR_GR2|CMXSCR_SC2|\ - CMXSCR_RS2CS_MSK|CMXSCR_TS2CS_MSK) -#define CMXSCR_VALUE (CMXSCR_RS2CS_BRG2|CMXSCR_TS2CS_BRG2) -#define CPM_CR_SCC_PAGE CPM_CR_SCC2_PAGE -#define CPM_CR_SCC_SBLOCK CPM_CR_SCC2_SBLOCK - -#elif CONFIG_CONS_INDEX == 3 /* Console on SCC3 */ - -#define SCC_INDEX 2 -#define PROFF_SCC PROFF_SCC3 -#define CMXSCR_MASK (CMXSCR_GR3|CMXSCR_SC3|\ - CMXSCR_RS3CS_MSK|CMXSCR_TS3CS_MSK) -#define CMXSCR_VALUE (CMXSCR_RS3CS_BRG3|CMXSCR_TS3CS_BRG3) -#define CPM_CR_SCC_PAGE CPM_CR_SCC3_PAGE -#define CPM_CR_SCC_SBLOCK CPM_CR_SCC3_SBLOCK - -#elif CONFIG_CONS_INDEX == 4 /* Console on SCC4 */ - -#define SCC_INDEX 3 -#define PROFF_SCC PROFF_SCC4 -#define CMXSCR_MASK (CMXSCR_GR4|CMXSCR_SC4|\ - CMXSCR_RS4CS_MSK|CMXSCR_TS4CS_MSK) -#define CMXSCR_VALUE (CMXSCR_RS4CS_BRG4|CMXSCR_TS4CS_BRG4) -#define CPM_CR_SCC_PAGE CPM_CR_SCC4_PAGE -#define CPM_CR_SCC_SBLOCK CPM_CR_SCC4_SBLOCK - -#else - -#error "console not correctly defined" - -#endif - -static int mpc85xx_serial_init(void) -{ - volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CONFIG_SYS_MPC85xx_CPM_ADDR; - volatile ccsr_cpm_scc_t *sp; - volatile scc_uart_t *up; - volatile cbd_t *tbdf, *rbdf; - volatile ccsr_cpm_cp_t *cp = &(cpm->im_cpm_cp); - uint dpaddr; - - /* initialize pointers to SCC */ - - sp = (ccsr_cpm_scc_t *) &(cpm->im_cpm_scc[SCC_INDEX]); - up = (scc_uart_t *)&(cpm->im_dprambase[PROFF_SCC]); - - /* Disable transmitter/receiver. - */ - sp->gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); - - /* put the SCC channel into NMSI (non multiplexd serial interface) - * mode and wire the selected SCC Tx and Rx clocks to BRGx (15-15). - */ - cpm->im_cpm_mux.cmxscr = \ - (cpm->im_cpm_mux.cmxscr&~CMXSCR_MASK)|CMXSCR_VALUE; - - /* Set up the baud rate generator. - */ - serial_setbrg (); - - /* Allocate space for two buffer descriptors in the DP ram. - * damm: allocating space after the two buffers for rx/tx data - */ - - dpaddr = m8560_cpm_dpalloc((2 * sizeof (cbd_t)) + 2, 16); - - /* Set the physical address of the host memory buffers in - * the buffer descriptors. - */ - rbdf = (cbd_t *)&(cpm->im_dprambase[dpaddr]); - rbdf->cbd_bufaddr = (uint) (rbdf+2); - rbdf->cbd_sc = BD_SC_EMPTY | BD_SC_WRAP; - tbdf = rbdf + 1; - tbdf->cbd_bufaddr = ((uint) (rbdf+2)) + 1; - tbdf->cbd_sc = BD_SC_WRAP; - - /* Set up the uart parameters in the parameter ram. - */ - up->scc_genscc.scc_rbase = dpaddr; - up->scc_genscc.scc_tbase = dpaddr+sizeof(cbd_t); - up->scc_genscc.scc_rfcr = CPMFCR_EB; - up->scc_genscc.scc_tfcr = CPMFCR_EB; - up->scc_genscc.scc_mrblr = 1; - up->scc_maxidl = 0; - up->scc_brkcr = 1; - up->scc_parec = 0; - up->scc_frmec = 0; - up->scc_nosec = 0; - up->scc_brkec = 0; - up->scc_uaddr1 = 0; - up->scc_uaddr2 = 0; - up->scc_toseq = 0; - up->scc_char1 = up->scc_char2 = up->scc_char3 = up->scc_char4 = 0x8000; - up->scc_char5 = up->scc_char6 = up->scc_char7 = up->scc_char8 = 0x8000; - up->scc_rccm = 0xc0ff; - - /* Mask all interrupts and remove anything pending. - */ - sp->sccm = 0; - sp->scce = 0xffff; - - /* Set 8 bit FIFO, 16 bit oversampling and UART mode. - */ - sp->gsmrh = SCC_GSMRH_RFW; /* 8 bit FIFO */ - sp->gsmrl = \ - SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16 | SCC_GSMRL_MODE_UART; - - /* Set CTS no flow control, 1 stop bit, 8 bit character length, - * normal async UART mode, no parity - */ - sp->psmr = SCU_PSMR_CL; - - /* execute the "Init Rx and Tx params" CP command. - */ - - while (cp->cpcr & CPM_CR_FLG) /* wait if cp is busy */ - ; - - cp->cpcr = mk_cr_cmd(CPM_CR_SCC_PAGE, CPM_CR_SCC_SBLOCK, - 0, CPM_CR_INIT_TRX) | CPM_CR_FLG; - - while (cp->cpcr & CPM_CR_FLG) /* wait if cp is busy */ - ; - - /* Enable transmitter/receiver. - */ - sp->gsmrl |= SCC_GSMRL_ENR | SCC_GSMRL_ENT; - - return (0); -} - -static void mpc85xx_serial_setbrg(void) -{ -#if defined(CONFIG_CONS_USE_EXTC) - m8560_cpm_extcbrg(SCC_INDEX, gd->baudrate, - CONFIG_CONS_EXTC_RATE, CONFIG_CONS_EXTC_PINSEL); -#else - m8560_cpm_setbrg(SCC_INDEX, gd->baudrate); -#endif -} - -static void mpc85xx_serial_putc(const char c) -{ - volatile scc_uart_t *up; - volatile cbd_t *tbdf; - volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CONFIG_SYS_MPC85xx_CPM_ADDR; - - if (c == '\n') - serial_putc ('\r'); - - up = (scc_uart_t *)&(cpm->im_dprambase[PROFF_SCC]); - tbdf = (cbd_t *)&(cpm->im_dprambase[up->scc_genscc.scc_tbase]); - - /* Wait for last character to go. - */ - while (tbdf->cbd_sc & BD_SC_READY) - ; - - /* Load the character into the transmit buffer. - */ - *(volatile char *)tbdf->cbd_bufaddr = c; - tbdf->cbd_datlen = 1; - tbdf->cbd_sc |= BD_SC_READY; -} - -static int mpc85xx_serial_getc(void) -{ - volatile cbd_t *rbdf; - volatile scc_uart_t *up; - volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CONFIG_SYS_MPC85xx_CPM_ADDR; - unsigned char c; - - up = (scc_uart_t *)&(cpm->im_dprambase[PROFF_SCC]); - rbdf = (cbd_t *)&(cpm->im_dprambase[up->scc_genscc.scc_rbase]); - - /* Wait for character to show up. - */ - while (rbdf->cbd_sc & BD_SC_EMPTY) - ; - - /* Grab the char and clear the buffer again. - */ - c = *(volatile unsigned char *)rbdf->cbd_bufaddr; - rbdf->cbd_sc |= BD_SC_EMPTY; - - return (c); -} - -static int mpc85xx_serial_tstc(void) -{ - volatile cbd_t *rbdf; - volatile scc_uart_t *up; - volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CONFIG_SYS_MPC85xx_CPM_ADDR; - - up = (scc_uart_t *)&(cpm->im_dprambase[PROFF_SCC]); - rbdf = (cbd_t *)&(cpm->im_dprambase[up->scc_genscc.scc_rbase]); - - return ((rbdf->cbd_sc & BD_SC_EMPTY) == 0); -} - -static struct serial_device mpc85xx_serial_drv = { - .name = "mpc85xx_serial", - .start = mpc85xx_serial_init, - .stop = NULL, - .setbrg = mpc85xx_serial_setbrg, - .putc = mpc85xx_serial_putc, - .puts = default_serial_puts, - .getc = mpc85xx_serial_getc, - .tstc = mpc85xx_serial_tstc, -}; - -void mpc85xx_serial_initialize(void) -{ - serial_register(&mpc85xx_serial_drv); -} - -__weak struct serial_device *default_serial_console(void) -{ - return &mpc85xx_serial_drv; -} -#endif /* CONFIG_CONS_ON_SCC */ diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c index 5a9cd28..4b6f3d2 100644 --- a/arch/powerpc/cpu/mpc85xx/speed.c +++ b/arch/powerpc/cpu/mpc85xx/speed.c @@ -581,15 +581,6 @@ int get_clocks(void) #ifdef CONFIG_ARCH_MPC8544 volatile ccsr_gur_t *gur = (void *) CONFIG_SYS_MPC85xx_GUTS_ADDR; #endif -#if defined(CONFIG_CPM2) - volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CONFIG_SYS_MPC85xx_CPM_ADDR; - uint sccr, dfbrg; - - /* set VCO = 4 * BRG */ - cpm->im_cpm_intctl.sccr &= 0xfffffffc; - sccr = cpm->im_cpm_intctl.sccr; - dfbrg = (sccr & SCCR_DFBRG_MSK) >> SCCR_DFBRG_SHIFT; -#endif get_sys_info (&sys_info); gd->cpu_clk = sys_info.freq_processor[0]; gd->bus_clk = sys_info.freq_systembus; @@ -635,13 +626,6 @@ int get_clocks(void) #endif #endif /* defined(CONFIG_FSL_ESDHC) */ -#if defined(CONFIG_CPM2) - gd->arch.vco_out = 2*sys_info.freq_systembus; - gd->arch.cpm_clk = gd->arch.vco_out / 2; - gd->arch.scc_clk = gd->arch.vco_out / 4; - gd->arch.brg_clk = gd->arch.vco_out / (1 << (2 * (dfbrg + 1))); -#endif - if(gd->cpu_clk != 0) return (0); else return (1); } diff --git a/arch/powerpc/include/asm/cpm_85xx.h b/arch/powerpc/include/asm/cpm_85xx.h deleted file mode 100644 index d42469c..0000000 --- a/arch/powerpc/include/asm/cpm_85xx.h +++ /dev/null @@ -1,824 +0,0 @@ -/* - * MPC85xx Communication Processor Module - * Copyright (c) 2003,Motorola Inc. - * Xianghua Xiao (X.Xiao@motorola.com) - * - * MPC8260 Communication Processor Module. - * Copyright (c) 1999 Dan Malek (dmalek@jlc.net) - * - * This file contains structures and information for the communication - * processor channels found in the dual port RAM or parameter RAM. - * All CPM control and status is available through the MPC8260 internal - * memory map. See immap.h for details. - */ -#ifndef __CPM_85XX__ -#define __CPM_85XX__ - -#include <asm/immap_85xx.h> - -/* CPM Command register. -*/ -#define CPM_CR_RST ((uint)0x80000000) -#define CPM_CR_PAGE ((uint)0x7c000000) -#define CPM_CR_SBLOCK ((uint)0x03e00000) -#define CPM_CR_FLG ((uint)0x00010000) -#define CPM_CR_MCN ((uint)0x00003fc0) -#define CPM_CR_OPCODE ((uint)0x0000000f) - -/* Device sub-block and page codes. -*/ -#define CPM_CR_SCC1_SBLOCK (0x04) -#define CPM_CR_SCC2_SBLOCK (0x05) -#define CPM_CR_SCC3_SBLOCK (0x06) -#define CPM_CR_SCC4_SBLOCK (0x07) -#define CPM_CR_SMC1_SBLOCK (0x08) -#define CPM_CR_SMC2_SBLOCK (0x09) -#define CPM_CR_SPI_SBLOCK (0x0a) -#define CPM_CR_I2C_SBLOCK (0x0b) -#define CPM_CR_TIMER_SBLOCK (0x0f) -#define CPM_CR_RAND_SBLOCK (0x0e) -#define CPM_CR_FCC1_SBLOCK (0x10) -#define CPM_CR_FCC2_SBLOCK (0x11) -#define CPM_CR_FCC3_SBLOCK (0x12) -#define CPM_CR_MCC1_SBLOCK (0x1c) - -#define CPM_CR_SCC1_PAGE (0x00) -#define CPM_CR_SCC2_PAGE (0x01) -#define CPM_CR_SCC3_PAGE (0x02) -#define CPM_CR_SCC4_PAGE (0x03) -#define CPM_CR_SPI_PAGE (0x09) -#define CPM_CR_I2C_PAGE (0x0a) -#define CPM_CR_TIMER_PAGE (0x0a) -#define CPM_CR_RAND_PAGE (0x0a) -#define CPM_CR_FCC1_PAGE (0x04) -#define CPM_CR_FCC2_PAGE (0x05) -#define CPM_CR_FCC3_PAGE (0x06) -#define CPM_CR_MCC1_PAGE (0x07) -#define CPM_CR_MCC2_PAGE (0x08) - -/* Some opcodes (there are more...later) -*/ -#define CPM_CR_INIT_TRX ((ushort)0x0000) -#define CPM_CR_INIT_RX ((ushort)0x0001) -#define CPM_CR_INIT_TX ((ushort)0x0002) -#define CPM_CR_HUNT_MODE ((ushort)0x0003) -#define CPM_CR_STOP_TX ((ushort)0x0004) -#define CPM_CR_RESTART_TX ((ushort)0x0006) -#define CPM_CR_SET_GADDR ((ushort)0x0008) - -#define mk_cr_cmd(PG, SBC, MCN, OP) \ - ((PG << 26) | (SBC << 21) | (MCN << 6) | OP) - -/* Dual Port RAM addresses. The first 16K is available for almost - * any CPM use, so we put the BDs there. The first 128 bytes are - * used for SMC1 and SMC2 parameter RAM, so we start allocating - * BDs above that. All of this must change when we start - * downloading RAM microcode. - */ -#define CPM_DATAONLY_BASE ((uint)128) -#define CPM_DP_NOSPACE ((uint)0x7FFFFFFF) -#define CPM_FCC_SPECIAL_BASE ((uint)0x0000B000) -#define CPM_DATAONLY_SIZE ((uint)(16 * 1024) - CPM_DATAONLY_BASE) - -/* The number of pages of host memory we allocate for CPM. This is - * done early in kernel initialization to get physically contiguous - * pages. - */ -#define NUM_CPM_HOST_PAGES 2 - -/* Export the base address of the communication processor registers - * and dual port ram. - */ -/*extern cpm8560_t *cpmp; Pointer to comm processor */ -uint m8560_cpm_dpalloc(uint size, uint align); -uint m8560_cpm_hostalloc(uint size, uint align); -void m8560_cpm_setbrg(uint brg, uint rate); -void m8560_cpm_fastbrg(uint brg, uint rate, int div16); -void m8560_cpm_extcbrg(uint brg, uint rate, uint extclk, int pinsel); - -/* Buffer descriptors used by many of the CPM protocols. -*/ -typedef struct cpm_buf_desc { - ushort cbd_sc; /* Status and Control */ - ushort cbd_datlen; /* Data length in buffer */ - uint cbd_bufaddr; /* Buffer address in host memory */ -} cbd_t; - -#define BD_SC_EMPTY ((ushort)0x8000) /* Receive is empty */ -#define BD_SC_READY ((ushort)0x8000) /* Transmit is ready */ -#define BD_SC_WRAP ((ushort)0x2000) /* Last buffer descriptor */ -#define BD_SC_INTRPT ((ushort)0x1000) /* Interrupt on change */ -#define BD_SC_LAST ((ushort)0x0800) /* Last buffer in frame */ -#define BD_SC_CM ((ushort)0x0200) /* Continous mode */ -#define BD_SC_ID ((ushort)0x0100) /* Rec'd too many idles */ -#define BD_SC_P ((ushort)0x0100) /* xmt preamble */ -#define BD_SC_BR ((ushort)0x0020) /* Break received */ -#define BD_SC_FR ((ushort)0x0010) /* Framing error */ -#define BD_SC_PR ((ushort)0x0008) /* Parity error */ -#define BD_SC_OV ((ushort)0x0002) /* Overrun */ -#define BD_SC_CD ((ushort)0x0001) /* ?? */ - -/* Function code bits, usually generic to devices. -*/ -#define CPMFCR_GBL ((u_char)0x20) /* Set memory snooping */ -#define CPMFCR_EB ((u_char)0x10) /* Set big endian byte order */ -#define CPMFCR_TC2 ((u_char)0x04) /* Transfer code 2 value */ -#define CPMFCR_DTB ((u_char)0x02) /* Use local bus for data when set */ -#define CPMFCR_BDB ((u_char)0x01) /* Use local bus for BD when set */ - -/* Parameter RAM offsets from the base. -*/ -#define CPM_POST_WORD_ADDR 0x80FC /* steal a long at the end of SCC1 */ -#define PROFF_SCC1 ((uint)0x8000) -#define PROFF_SCC2 ((uint)0x8100) -#define PROFF_SCC3 ((uint)0x8200) -#define PROFF_SCC4 ((uint)0x8300) -#define PROFF_FCC1 ((uint)0x8400) -#define PROFF_FCC2 ((uint)0x8500) -#define PROFF_FCC3 ((uint)0x8600) -#define PROFF_MCC1 ((uint)0x8700) -#define PROFF_MCC2 ((uint)0x8800) -#define PROFF_SPI_BASE ((uint)0x89fc) -#define PROFF_TIMERS ((uint)0x8ae0) -#define PROFF_REVNUM ((uint)0x8af0) -#define PROFF_RAND ((uint)0x8af8) -#define PROFF_I2C_BASE ((uint)0x8afc) - -/* Baud rate generators. -*/ -#define CPM_BRG_RST ((uint)0x00020000) -#define CPM_BRG_EN ((uint)0x00010000) -#define CPM_BRG_EXTC_INT ((uint)0x00000000) -#define CPM_BRG_EXTC_CLK3_9 ((uint)0x00004000) -#define CPM_BRG_EXTC_CLK5_15 ((uint)0x00008000) -#define CPM_BRG_ATB ((uint)0x00002000) -#define CPM_BRG_CD_MASK ((uint)0x00001ffe) -#define CPM_BRG_DIV16 ((uint)0x00000001) - -/* SCCs. -*/ -#define SCC_GSMRH_IRP ((uint)0x00040000) -#define SCC_GSMRH_GDE ((uint)0x00010000) -#define SCC_GSMRH_TCRC_CCITT ((uint)0x00008000) -#define SCC_GSMRH_TCRC_BISYNC ((uint)0x00004000) -#define SCC_GSMRH_TCRC_HDLC ((uint)0x00000000) -#define SCC_GSMRH_REVD ((uint)0x00002000) -#define SCC_GSMRH_TRX ((uint)0x00001000) -#define SCC_GSMRH_TTX ((uint)0x00000800) -#define SCC_GSMRH_CDP ((uint)0x00000400) -#define SCC_GSMRH_CTSP ((uint)0x00000200) -#define SCC_GSMRH_CDS ((uint)0x00000100) -#define SCC_GSMRH_CTSS ((uint)0x00000080) -#define SCC_GSMRH_TFL ((uint)0x00000040) -#define SCC_GSMRH_RFW ((uint)0x00000020) -#define SCC_GSMRH_TXSY ((uint)0x00000010) -#define SCC_GSMRH_SYNL16 ((uint)0x0000000c) -#define SCC_GSMRH_SYNL8 ((uint)0x00000008) -#define SCC_GSMRH_SYNL4 ((uint)0x00000004) -#define SCC_GSMRH_RTSM ((uint)0x00000002) -#define SCC_GSMRH_RSYN ((uint)0x00000001) - -#define SCC_GSMRL_SIR ((uint)0x80000000) /* SCC2 only */ -#define SCC_GSMRL_EDGE_NONE ((uint)0x60000000) -#define SCC_GSMRL_EDGE_NEG ((uint)0x40000000) -#define SCC_GSMRL_EDGE_POS ((uint)0x20000000) -#define SCC_GSMRL_EDGE_BOTH ((uint)0x00000000) -#define SCC_GSMRL_TCI ((uint)0x10000000) -#define SCC_GSMRL_TSNC_3 ((uint)0x0c000000) -#define SCC_GSMRL_TSNC_4 ((uint)0x08000000) -#define SCC_GSMRL_TSNC_14 ((uint)0x04000000) -#define SCC_GSMRL_TSNC_INF ((uint)0x00000000) -#define SCC_GSMRL_RINV ((uint)0x02000000) -#define SCC_GSMRL_TINV ((uint)0x01000000) -#define SCC_GSMRL_TPL_128 ((uint)0x00c00000) -#define SCC_GSMRL_TPL_64 ((uint)0x00a00000) -#define SCC_GSMRL_TPL_48 ((uint)0x00800000) -#define SCC_GSMRL_TPL_32 ((uint)0x00600000) -#define SCC_GSMRL_TPL_16 ((uint)0x00400000) -#define SCC_GSMRL_TPL_8 ((uint)0x00200000) -#define SCC_GSMRL_TPL_NONE ((uint)0x00000000) -#define SCC_GSMRL_TPP_ALL1 ((uint)0x00180000) -#define SCC_GSMRL_TPP_01 ((uint)0x00100000) -#define SCC_GSMRL_TPP_10 ((uint)0x00080000) -#define SCC_GSMRL_TPP_ZEROS ((uint)0x00000000) -#define SCC_GSMRL_TEND ((uint)0x00040000) -#define SCC_GSMRL_TDCR_32 ((uint)0x00030000) -#define SCC_GSMRL_TDCR_16 ((uint)0x00020000) -#define SCC_GSMRL_TDCR_8 ((uint)0x00010000) -#define SCC_GSMRL_TDCR_1 ((uint)0x00000000) -#define SCC_GSMRL_RDCR_32 ((uint)0x0000c000) -#define SCC_GSMRL_RDCR_16 ((uint)0x00008000) -#define SCC_GSMRL_RDCR_8 ((uint)0x00004000) -#define SCC_GSMRL_RDCR_1 ((uint)0x00000000) -#define SCC_GSMRL_RENC_DFMAN ((uint)0x00003000) -#define SCC_GSMRL_RENC_MANCH ((uint)0x00002000) -#define SCC_GSMRL_RENC_FM0 ((uint)0x00001000) -#define SCC_GSMRL_RENC_NRZI ((uint)0x00000800) -#define SCC_GSMRL_RENC_NRZ ((uint)0x00000000) -#define SCC_GSMRL_TENC_DFMAN ((uint)0x00000600) -#define SCC_GSMRL_TENC_MANCH ((uint)0x00000400) -#define SCC_GSMRL_TENC_FM0 ((uint)0x00000200) -#define SCC_GSMRL_TENC_NRZI ((uint)0x00000100) -#define SCC_GSMRL_TENC_NRZ ((uint)0x00000000) -#define SCC_GSMRL_DIAG_LE ((uint)0x000000c0) /* Loop and echo */ -#define SCC_GSMRL_DIAG_ECHO ((uint)0x00000080) -#define SCC_GSMRL_DIAG_LOOP ((uint)0x00000040) -#define SCC_GSMRL_DIAG_NORM ((uint)0x00000000) -#define SCC_GSMRL_ENR ((uint)0x00000020) -#define SCC_GSMRL_ENT ((uint)0x00000010) -#define SCC_GSMRL_MODE_ENET ((uint)0x0000000c) -#define SCC_GSMRL_MODE_DDCMP ((uint)0x00000009) -#define SCC_GSMRL_MODE_BISYNC ((uint)0x00000008) -#define SCC_GSMRL_MODE_V14 ((uint)0x00000007) -#define SCC_GSMRL_MODE_AHDLC ((uint)0x00000006) -#define SCC_GSMRL_MODE_PROFIBUS ((uint)0x00000005) -#define SCC_GSMRL_MODE_UART ((uint)0x00000004) -#define SCC_GSMRL_MODE_SS7 ((uint)0x00000003) -#define SCC_GSMRL_MODE_ATALK ((uint)0x00000002) -#define SCC_GSMRL_MODE_HDLC ((uint)0x00000000) - -#define SCC_TODR_TOD ((ushort)0x8000) - -/* SCC Event and Mask register. -*/ -#define SCCM_TXE ((unsigned char)0x10) -#define SCCM_BSY ((unsigned char)0x04) -#define SCCM_TX ((unsigned char)0x02) -#define SCCM_RX ((unsigned char)0x01) - -typedef struct scc_param { - ushort scc_rbase; /* Rx Buffer descriptor base address */ - ushort scc_tbase; /* Tx Buffer descriptor base address */ - u_char scc_rfcr; /* Rx function code */ - u_char scc_tfcr; /* Tx function code */ - ushort scc_mrblr; /* Max receive buffer length */ - uint scc_rstate; /* Internal */ - uint scc_idp; /* Internal */ - ushort scc_rbptr; /* Internal */ - ushort scc_ibc; /* Internal */ - uint scc_rxtmp; /* Internal */ - uint scc_tstate; /* Internal */ - uint scc_tdp; /* Internal */ - ushort scc_tbptr; /* Internal */ - ushort scc_tbc; /* Internal */ - uint scc_txtmp; /* Internal */ - uint scc_rcrc; /* Internal */ - uint scc_tcrc; /* Internal */ -} sccp_t; - -/* CPM Ethernet through SCC1. - */ -typedef struct scc_enet { - sccp_t sen_genscc; - uint sen_cpres; /* Preset CRC */ - uint sen_cmask; /* Constant mask for CRC */ - uint sen_crcec; /* CRC Error counter */ - uint sen_alec; /* alignment error counter */ - uint sen_disfc; /* discard frame counter */ - ushort sen_pads; /* Tx short frame pad character */ - ushort sen_retlim; /* Retry limit threshold */ - ushort sen_retcnt; /* Retry limit counter */ - ushort sen_maxflr; /* maximum frame length register */ - ushort sen_minflr; /* minimum frame length register */ - ushort sen_maxd1; /* maximum DMA1 length */ - ushort sen_maxd2; /* maximum DMA2 length */ - ushort sen_maxd; /* Rx max DMA */ - ushort sen_dmacnt; /* Rx DMA counter */ - ushort sen_maxb; /* Max BD byte count */ - ushort sen_gaddr1; /* Group address filter */ - ushort sen_gaddr2; - ushort sen_gaddr3; - ushort sen_gaddr4; - uint sen_tbuf0data0; /* Save area 0 - current frame */ - uint sen_tbuf0data1; /* Save area 1 - current frame */ - uint sen_tbuf0rba; /* Internal */ - uint sen_tbuf0crc; /* Internal */ - ushort sen_tbuf0bcnt; /* Internal */ - ushort sen_paddrh; /* physical address (MSB) */ - ushort sen_paddrm; - ushort sen_paddrl; /* physical address (LSB) */ - ushort sen_pper; /* persistence */ - ushort sen_rfbdptr; /* Rx first BD pointer */ - ushort sen_tfbdptr; /* Tx first BD pointer */ - ushort sen_tlbdptr; /* Tx last BD pointer */ - uint sen_tbuf1data0; /* Save area 0 - current frame */ - uint sen_tbuf1data1; /* Save area 1 - current frame */ - uint sen_tbuf1rba; /* Internal */ - uint sen_tbuf1crc; /* Internal */ - ushort sen_tbuf1bcnt; /* Internal */ - ushort sen_txlen; /* Tx Frame length counter */ - ushort sen_iaddr1; /* Individual address filter */ - ushort sen_iaddr2; - ushort sen_iaddr3; - ushort sen_iaddr4; - ushort sen_boffcnt; /* Backoff counter */ - - /* NOTE: Some versions of the manual have the following items - * incorrectly documented. Below is the proper order. - */ - ushort sen_taddrh; /* temp address (MSB) */ - ushort sen_taddrm; - ushort sen_taddrl; /* temp address (LSB) */ -} scc_enet_t; - - -/* SCC Event register as used by Ethernet. -*/ -#define SCCE_ENET_GRA ((ushort)0x0080) /* Graceful stop complete */ -#define SCCE_ENET_TXE ((ushort)0x0010) /* Transmit Error */ -#define SCCE_ENET_RXF ((ushort)0x0008) /* Full frame received */ -#define SCCE_ENET_BSY ((ushort)0x0004) /* All incoming buffers full */ -#define SCCE_ENET_TXB ((ushort)0x0002) /* A buffer was transmitted */ -#define SCCE_ENET_RXB ((ushort)0x0001) /* A buffer was received */ - -/* SCC Mode Register (PSMR) as used by Ethernet. -*/ -#define SCC_PSMR_HBC ((ushort)0x8000) /* Enable heartbeat */ -#define SCC_PSMR_FC ((ushort)0x4000) /* Force collision */ -#define SCC_PSMR_RSH ((ushort)0x2000) /* Receive short frames */ -#define SCC_PSMR_IAM ((ushort)0x1000) /* Check individual hash */ -#define SCC_PSMR_ENCRC ((ushort)0x0800) /* Ethernet CRC mode */ -#define SCC_PSMR_PRO ((ushort)0x0200) /* Promiscuous mode */ -#define SCC_PSMR_BRO ((ushort)0x0100) /* Catch broadcast pkts */ -#define SCC_PSMR_SBT ((ushort)0x0080) /* Special backoff timer */ -#define SCC_PSMR_LPB ((ushort)0x0040) /* Set Loopback mode */ -#define SCC_PSMR_SIP ((ushort)0x0020) /* Sample Input Pins */ -#define SCC_PSMR_LCW ((ushort)0x0010) /* Late collision window */ -#define SCC_PSMR_NIB22 ((ushort)0x000a) /* Start frame search */ -#define SCC_PSMR_FDE ((ushort)0x0001) /* Full duplex enable */ - -/* Buffer descriptor control/status used by Ethernet receive. - * Common to SCC and FCC. - */ -#define BD_ENET_RX_EMPTY ((ushort)0x8000) -#define BD_ENET_RX_WRAP ((ushort)0x2000) -#define BD_ENET_RX_INTR ((ushort)0x1000) -#define BD_ENET_RX_LAST ((ushort)0x0800) -#define BD_ENET_RX_FIRST ((ushort)0x0400) -#define BD_ENET_RX_MISS ((ushort)0x0100) -#define BD_ENET_RX_BC ((ushort)0x0080) /* FCC Only */ -#define BD_ENET_RX_MC ((ushort)0x0040) /* FCC Only */ -#define BD_ENET_RX_LG ((ushort)0x0020) -#define BD_ENET_RX_NO ((ushort)0x0010) -#define BD_ENET_RX_SH ((ushort)0x0008) -#define BD_ENET_RX_CR ((ushort)0x0004) -#define BD_ENET_RX_OV ((ushort)0x0002) -#define BD_ENET_RX_CL ((ushort)0x0001) -#define BD_ENET_RX_STATS ((ushort)0x01ff) /* All status bits */ - -/* Buffer descriptor control/status used by Ethernet transmit. - * Common to SCC and FCC. - */ -#define BD_ENET_TX_READY ((ushort)0x8000) -#define BD_ENET_TX_PAD ((ushort)0x4000) -#define BD_ENET_TX_WRAP ((ushort)0x2000) -#define BD_ENET_TX_INTR ((ushort)0x1000) -#define BD_ENET_TX_LAST ((ushort)0x0800) -#define BD_ENET_TX_TC ((ushort)0x0400) -#define BD_ENET_TX_DEF ((ushort)0x0200) -#define BD_ENET_TX_HB ((ushort)0x0100) -#define BD_ENET_TX_LC ((ushort)0x0080) -#define BD_ENET_TX_RL ((ushort)0x0040) -#define BD_ENET_TX_RCMASK ((ushort)0x003c) -#define BD_ENET_TX_UN ((ushort)0x0002) -#define BD_ENET_TX_CSL ((ushort)0x0001) -#define BD_ENET_TX_STATS ((ushort)0x03ff) /* All status bits */ - -/* SCC as UART -*/ -typedef struct scc_uart { - sccp_t scc_genscc; - uint scc_res1; /* Reserved */ - uint scc_res2; /* Reserved */ - ushort scc_maxidl; /* Maximum idle chars */ - ushort scc_idlc; /* temp idle counter */ - ushort scc_brkcr; /* Break count register */ - ushort scc_parec; /* receive parity error counter */ - ushort scc_frmec; /* receive framing error counter */ - ushort scc_nosec; /* receive noise counter */ - ushort scc_brkec; /* receive break condition counter */ - ushort scc_brkln; /* last received break length */ - ushort scc_uaddr1; /* UART address character 1 */ - ushort scc_uaddr2; /* UART address character 2 */ - ushort scc_rtemp; /* Temp storage */ - ushort scc_toseq; /* Transmit out of sequence char */ - ushort scc_char1; /* control character 1 */ - ushort scc_char2; /* control character 2 */ - ushort scc_char3; /* control character 3 */ - ushort scc_char4; /* control character 4 */ - ushort scc_char5; /* control character 5 */ - ushort scc_char6; /* control character 6 */ - ushort scc_char7; /* control character 7 */ - ushort scc_char8; /* control character 8 */ - ushort scc_rccm; /* receive control character mask */ - ushort scc_rccr; /* receive control character register */ - ushort scc_rlbc; /* receive last break character */ -} scc_uart_t; - -/* SCC Event and Mask registers when it is used as a UART. -*/ -#define UART_SCCM_GLR ((ushort)0x1000) -#define UART_SCCM_GLT ((ushort)0x0800) -#define UART_SCCM_AB ((ushort)0x0200) -#define UART_SCCM_IDL ((ushort)0x0100) -#define UART_SCCM_GRA ((ushort)0x0080) -#define UART_SCCM_BRKE ((ushort)0x0040) -#define UART_SCCM_BRKS ((ushort)0x0020) -#define UART_SCCM_CCR ((ushort)0x0008) -#define UART_SCCM_BSY ((ushort)0x0004) -#define UART_SCCM_TX ((ushort)0x0002) -#define UART_SCCM_RX ((ushort)0x0001) - -/* The SCC PSMR when used as a UART. -*/ -#define SCU_PSMR_FLC ((ushort)0x8000) -#define SCU_PSMR_SL ((ushort)0x4000) -#define SCU_PSMR_CL ((ushort)0x3000) -#define SCU_PSMR_UM ((ushort)0x0c00) -#define SCU_PSMR_FRZ ((ushort)0x0200) -#define SCU_PSMR_RZS ((ushort)0x0100) -#define SCU_PSMR_SYN ((ushort)0x0080) -#define SCU_PSMR_DRT ((ushort)0x0040) -#define SCU_PSMR_PEN ((ushort)0x0010) -#define SCU_PSMR_RPM ((ushort)0x000c) -#define SCU_PSMR_REVP ((ushort)0x0008) -#define SCU_PSMR_TPM ((ushort)0x0003) -#define SCU_PSMR_TEVP ((ushort)0x0003) - -/* CPM Transparent mode SCC. - */ -typedef struct scc_trans { - sccp_t st_genscc; - uint st_cpres; /* Preset CRC */ - uint st_cmask; /* Constant mask for CRC */ -} scc_trans_t; - -#define BD_SCC_TX_LAST ((ushort)0x0800) - -/* How about some FCCs..... -*/ -#define FCC_GFMR_DIAG_NORM ((uint)0x00000000) -#define FCC_GFMR_DIAG_LE ((uint)0x40000000) -#define FCC_GFMR_DIAG_AE ((uint)0x80000000) -#define FCC_GFMR_DIAG_ALE ((uint)0xc0000000) -#define FCC_GFMR_TCI ((uint)0x20000000) -#define FCC_GFMR_TRX ((uint)0x10000000) -#define FCC_GFMR_TTX ((uint)0x08000000) -#define FCC_GFMR_TTX ((uint)0x08000000) -#define FCC_GFMR_CDP ((uint)0x04000000) -#define FCC_GFMR_CTSP ((uint)0x02000000) -#define FCC_GFMR_CDS ((uint)0x01000000) -#define FCC_GFMR_CTSS ((uint)0x00800000) -#define FCC_GFMR_SYNL_NONE ((uint)0x00000000) -#define FCC_GFMR_SYNL_AUTO ((uint)0x00004000) -#define FCC_GFMR_SYNL_8 ((uint)0x00008000) -#define FCC_GFMR_SYNL_16 ((uint)0x0000c000) -#define FCC_GFMR_RTSM ((uint)0x00002000) -#define FCC_GFMR_RENC_NRZ ((uint)0x00000000) -#define FCC_GFMR_RENC_NRZI ((uint)0x00000800) -#define FCC_GFMR_REVD ((uint)0x00000400) -#define FCC_GFMR_TENC_NRZ ((uint)0x00000000) -#define FCC_GFMR_TENC_NRZI ((uint)0x00000100) -#define FCC_GFMR_TCRC_16 ((uint)0x00000000) -#define FCC_GFMR_TCRC_32 ((uint)0x00000080) -#define FCC_GFMR_ENR ((uint)0x00000020) -#define FCC_GFMR_ENT ((uint)0x00000010) -#define FCC_GFMR_MODE_ENET ((uint)0x0000000c) -#define FCC_GFMR_MODE_ATM ((uint)0x0000000a) -#define FCC_GFMR_MODE_HDLC ((uint)0x00000000) - -/* Generic FCC parameter ram. -*/ -typedef struct fcc_param { - ushort fcc_riptr; /* Rx Internal temp pointer */ - ushort fcc_tiptr; /* Tx Internal temp pointer */ - ushort fcc_res1; - ushort fcc_mrblr; /* Max receive buffer length, mod 32 bytes */ - uint fcc_rstate; /* Upper byte is Func code, must be set */ - uint fcc_rbase; /* Receive BD base */ - ushort fcc_rbdstat; /* RxBD status */ - ushort fcc_rbdlen; /* RxBD down counter */ - uint fcc_rdptr; /* RxBD internal data pointer */ - uint fcc_tstate; /* Upper byte is Func code, must be set */ - uint fcc_tbase; /* Transmit BD base */ - ushort fcc_tbdstat; /* TxBD status */ - ushort fcc_tbdlen; /* TxBD down counter */ - uint fcc_tdptr; /* TxBD internal data pointer */ - uint fcc_rbptr; /* Rx BD Internal buf pointer */ - uint fcc_tbptr; /* Tx BD Internal buf pointer */ - uint fcc_rcrc; /* Rx temp CRC */ - uint fcc_res2; - uint fcc_tcrc; /* Tx temp CRC */ -} fccp_t; - - -/* Ethernet controller through FCC. -*/ -typedef struct fcc_enet { - fccp_t fen_genfcc; - uint fen_statbuf; /* Internal status buffer */ - uint fen_camptr; /* CAM address */ - uint fen_cmask; /* Constant mask for CRC */ - uint fen_cpres; /* Preset CRC */ - uint fen_crcec; /* CRC Error counter */ - uint fen_alec; /* alignment error counter */ - uint fen_disfc; /* discard frame counter */ - ushort fen_retlim; /* Retry limit */ - ushort fen_retcnt; /* Retry counter */ - ushort fen_pper; /* Persistence */ - ushort fen_boffcnt; /* backoff counter */ - uint fen_gaddrh; /* Group address filter, high 32-bits */ - uint fen_gaddrl; /* Group address filter, low 32-bits */ - ushort fen_tfcstat; /* out of sequence TxBD */ - ushort fen_tfclen; - uint fen_tfcptr; - ushort fen_mflr; /* Maximum frame length (1518) */ - ushort fen_paddrh; /* MAC address */ - ushort fen_paddrm; - ushort fen_paddrl; - ushort fen_ibdcount; /* Internal BD counter */ - ushort fen_ibdstart; /* Internal BD start pointer */ - ushort fen_ibdend; /* Internal BD end pointer */ - ushort fen_txlen; /* Internal Tx frame length counter */ - uint fen_ibdbase[8]; /* Internal use */ - uint fen_iaddrh; /* Individual address filter */ - uint fen_iaddrl; - ushort fen_minflr; /* Minimum frame length (64) */ - ushort fen_taddrh; /* Filter transfer MAC address */ - ushort fen_taddrm; - ushort fen_taddrl; - ushort fen_padptr; /* Pointer to pad byte buffer */ - ushort fen_cftype; /* control frame type */ - ushort fen_cfrange; /* control frame range */ - ushort fen_maxb; /* maximum BD count */ - ushort fen_maxd1; /* Max DMA1 length (1520) */ - ushort fen_maxd2; /* Max DMA2 length (1520) */ - ushort fen_maxd; /* internal max DMA count */ - ushort fen_dmacnt; /* internal DMA counter */ - uint fen_octc; /* Total octect counter */ - uint fen_colc; /* Total collision counter */ - uint fen_broc; /* Total broadcast packet counter */ - uint fen_mulc; /* Total multicast packet count */ - uint fen_uspc; /* Total packets < 64 bytes */ - uint fen_frgc; /* Total packets < 64 bytes with errors */ - uint fen_ospc; /* Total packets > 1518 */ - uint fen_jbrc; /* Total packets > 1518 with errors */ - uint fen_p64c; /* Total packets == 64 bytes */ - uint fen_p65c; /* Total packets 64 < bytes <= 127 */ - uint fen_p128c; /* Total packets 127 < bytes <= 255 */ - uint fen_p256c; /* Total packets 256 < bytes <= 511 */ - uint fen_p512c; /* Total packets 512 < bytes <= 1023 */ - uint fen_p1024c; /* Total packets 1024 < bytes <= 1518 */ - uint fen_cambuf; /* Internal CAM buffer poiner */ - ushort fen_rfthr; /* Received frames threshold */ - ushort fen_rfcnt; /* Received frames count */ -} fcc_enet_t; - -/* FCC Event/Mask register as used by Ethernet. -*/ -#define FCC_ENET_GRA ((ushort)0x0080) /* Graceful stop complete */ -#define FCC_ENET_RXC ((ushort)0x0040) /* Control Frame Received */ -#define FCC_ENET_TXC ((ushort)0x0020) /* Out of seq. Tx sent */ -#define FCC_ENET_TXE ((ushort)0x0010) /* Transmit Error */ -#define FCC_ENET_RXF ((ushort)0x0008) /* Full frame received */ -#define FCC_ENET_BSY ((ushort)0x0004) /* Busy. Rx Frame dropped */ -#define FCC_ENET_TXB ((ushort)0x0002) /* A buffer was transmitted */ -#define FCC_ENET_RXB ((ushort)0x0001) /* A buffer was received */ - -/* FCC Mode Register (FPSMR) as used by Ethernet. -*/ -#define FCC_PSMR_HBC ((uint)0x80000000) /* Enable heartbeat */ -#define FCC_PSMR_FC ((uint)0x40000000) /* Force Collision */ -#define FCC_PSMR_SBT ((uint)0x20000000) /* Stop backoff timer */ -#define FCC_PSMR_LPB ((uint)0x10000000) /* Local protect. 1 = FDX */ -#define FCC_PSMR_LCW ((uint)0x08000000) /* Late collision select */ -#define FCC_PSMR_FDE ((uint)0x04000000) /* Full Duplex Enable */ -#define FCC_PSMR_MON ((uint)0x02000000) /* RMON Enable */ -#define FCC_PSMR_PRO ((uint)0x00400000) /* Promiscuous Enable */ -#define FCC_PSMR_FCE ((uint)0x00200000) /* Flow Control Enable */ -#define FCC_PSMR_RSH ((uint)0x00100000) /* Receive Short Frames */ -#define FCC_PSMR_CAM ((uint)0x00000400) /* CAM enable */ -#define FCC_PSMR_BRO ((uint)0x00000200) /* Broadcast pkt discard */ -#define FCC_PSMR_ENCRC ((uint)0x00000080) /* Use 32-bit CRC */ - -/* IIC parameter RAM. -*/ -typedef struct iic { - ushort iic_rbase; /* Rx Buffer descriptor base address */ - ushort iic_tbase; /* Tx Buffer descriptor base address */ - u_char iic_rfcr; /* Rx function code */ - u_char iic_tfcr; /* Tx function code */ - ushort iic_mrblr; /* Max receive buffer length */ - uint iic_rstate; /* Internal */ - uint iic_rdp; /* Internal */ - ushort iic_rbptr; /* Internal */ - ushort iic_rbc; /* Internal */ - uint iic_rxtmp; /* Internal */ - uint iic_tstate; /* Internal */ - uint iic_tdp; /* Internal */ - ushort iic_tbptr; /* Internal */ - ushort iic_tbc; /* Internal */ - uint iic_txtmp; /* Internal */ -} iic_t; - -/* SPI parameter RAM. -*/ -typedef struct spi { - ushort spi_rbase; /* Rx Buffer descriptor base address */ - ushort spi_tbase; /* Tx Buffer descriptor base address */ - u_char spi_rfcr; /* Rx function code */ - u_char spi_tfcr; /* Tx function code */ - ushort spi_mrblr; /* Max receive buffer length */ - uint spi_rstate; /* Internal */ - uint spi_rdp; /* Internal */ - ushort spi_rbptr; /* Internal */ - ushort spi_rbc; /* Internal */ - uint spi_rxtmp; /* Internal */ - uint spi_tstate; /* Internal */ - uint spi_tdp; /* Internal */ - ushort spi_tbptr; /* Internal */ - ushort spi_tbc; /* Internal */ - uint spi_txtmp; /* Internal */ - uint spi_res; /* Tx temp. */ - uint spi_res1[4]; /* SDMA temp. */ -} spi_t; - -/* SPI Mode register. -*/ -#define SPMODE_LOOP ((ushort)0x4000) /* Loopback */ -#define SPMODE_CI ((ushort)0x2000) /* Clock Invert */ -#define SPMODE_CP ((ushort)0x1000) /* Clock Phase */ -#define SPMODE_DIV16 ((ushort)0x0800) /* BRG/16 mode */ -#define SPMODE_REV ((ushort)0x0400) /* Reversed Data */ -#define SPMODE_MSTR ((ushort)0x0200) /* SPI Master */ -#define SPMODE_EN ((ushort)0x0100) /* Enable */ -#define SPMODE_LENMSK ((ushort)0x00f0) /* character length */ -#define SPMODE_PMMSK ((ushort)0x000f) /* prescale modulus */ - -#define SPMODE_LEN(x) ((((x)-1)&0xF)<<4) -#define SPMODE_PM(x) ((x) &0xF) - -#define SPI_EB ((u_char)0x10) /* big endian byte order */ - -#define BD_IIC_START ((ushort)0x0400) - -/*----------------------------------------------------------------------- - * CMXFCR - CMX FCC Clock Route Register 15-12 - */ -#define CMXFCR_FC1 0x40000000 /* FCC1 connection */ -#define CMXFCR_RF1CS_MSK 0x38000000 /* Receive FCC1 Clock Source Mask */ -#define CMXFCR_TF1CS_MSK 0x07000000 /* Transmit FCC1 Clock Source Mask */ -#define CMXFCR_FC2 0x00400000 /* FCC2 connection */ -#define CMXFCR_RF2CS_MSK 0x00380000 /* Receive FCC2 Clock Source Mask */ -#define CMXFCR_TF2CS_MSK 0x00070000 /* Transmit FCC2 Clock Source Mask */ -#define CMXFCR_FC3 0x00004000 /* FCC3 connection */ -#define CMXFCR_RF3CS_MSK 0x00003800 /* Receive FCC3 Clock Source Mask */ -#define CMXFCR_TF3CS_MSK 0x00000700 /* Transmit FCC3 Clock Source Mask */ - -#define CMXFCR_RF1CS_BRG5 0x00000000 /* Receive FCC1 Clock Source is BRG5 */ -#define CMXFCR_RF1CS_BRG6 0x08000000 /* Receive FCC1 Clock Source is BRG6 */ -#define CMXFCR_RF1CS_BRG7 0x10000000 /* Receive FCC1 Clock Source is BRG7 */ -#define CMXFCR_RF1CS_BRG8 0x18000000 /* Receive FCC1 Clock Source is BRG8 */ -#define CMXFCR_RF1CS_CLK9 0x20000000 /* Receive FCC1 Clock Source is CLK9 */ -#define CMXFCR_RF1CS_CLK10 0x28000000 /* Receive FCC1 Clock Source is CLK10 */ -#define CMXFCR_RF1CS_CLK11 0x30000000 /* Receive FCC1 Clock Source is CLK11 */ -#define CMXFCR_RF1CS_CLK12 0x38000000 /* Receive FCC1 Clock Source is CLK12 */ - -#define CMXFCR_TF1CS_BRG5 0x00000000 /* Transmit FCC1 Clock Source is BRG5 */ -#define CMXFCR_TF1CS_BRG6 0x01000000 /* Transmit FCC1 Clock Source is BRG6 */ -#define CMXFCR_TF1CS_BRG7 0x02000000 /* Transmit FCC1 Clock Source is BRG7 */ -#define CMXFCR_TF1CS_BRG8 0x03000000 /* Transmit FCC1 Clock Source is BRG8 */ -#define CMXFCR_TF1CS_CLK9 0x04000000 /* Transmit FCC1 Clock Source is CLK9 */ -#define CMXFCR_TF1CS_CLK10 0x05000000 /* Transmit FCC1 Clock Source is CLK10 */ -#define CMXFCR_TF1CS_CLK11 0x06000000 /* Transmit FCC1 Clock Source is CLK11 */ -#define CMXFCR_TF1CS_CLK12 0x07000000 /* Transmit FCC1 Clock Source is CLK12 */ - -#define CMXFCR_RF2CS_BRG5 0x00000000 /* Receive FCC2 Clock Source is BRG5 */ -#define CMXFCR_RF2CS_BRG6 0x00080000 /* Receive FCC2 Clock Source is BRG6 */ -#define CMXFCR_RF2CS_BRG7 0x00100000 /* Receive FCC2 Clock Source is BRG7 */ -#define CMXFCR_RF2CS_BRG8 0x00180000 /* Receive FCC2 Clock Source is BRG8 */ -#define CMXFCR_RF2CS_CLK13 0x00200000 /* Receive FCC2 Clock Source is CLK13 */ -#define CMXFCR_RF2CS_CLK14 0x00280000 /* Receive FCC2 Clock Source is CLK14 */ -#define CMXFCR_RF2CS_CLK15 0x00300000 /* Receive FCC2 Clock Source is CLK15 */ -#define CMXFCR_RF2CS_CLK16 0x00380000 /* Receive FCC2 Clock Source is CLK16 */ - -#define CMXFCR_TF2CS_BRG5 0x00000000 /* Transmit FCC2 Clock Source is BRG5 */ -#define CMXFCR_TF2CS_BRG6 0x00010000 /* Transmit FCC2 Clock Source is BRG6 */ -#define CMXFCR_TF2CS_BRG7 0x00020000 /* Transmit FCC2 Clock Source is BRG7 */ -#define CMXFCR_TF2CS_BRG8 0x00030000 /* Transmit FCC2 Clock Source is BRG8 */ -#define CMXFCR_TF2CS_CLK13 0x00040000 /* Transmit FCC2 Clock Source is CLK13 */ -#define CMXFCR_TF2CS_CLK14 0x00050000 /* Transmit FCC2 Clock Source is CLK14 */ -#define CMXFCR_TF2CS_CLK15 0x00060000 /* Transmit FCC2 Clock Source is CLK15 */ -#define CMXFCR_TF2CS_CLK16 0x00070000 /* Transmit FCC2 Clock Source is CLK16 */ - -#define CMXFCR_RF3CS_BRG5 0x00000000 /* Receive FCC3 Clock Source is BRG5 */ -#define CMXFCR_RF3CS_BRG6 0x00000800 /* Receive FCC3 Clock Source is BRG6 */ -#define CMXFCR_RF3CS_BRG7 0x00001000 /* Receive FCC3 Clock Source is BRG7 */ -#define CMXFCR_RF3CS_BRG8 0x00001800 /* Receive FCC3 Clock Source is BRG8 */ -#define CMXFCR_RF3CS_CLK13 0x00002000 /* Receive FCC3 Clock Source is CLK13 */ -#define CMXFCR_RF3CS_CLK14 0x00002800 /* Receive FCC3 Clock Source is CLK14 */ -#define CMXFCR_RF3CS_CLK15 0x00003000 /* Receive FCC3 Clock Source is CLK15 */ -#define CMXFCR_RF3CS_CLK16 0x00003800 /* Receive FCC3 Clock Source is CLK16 */ - -#define CMXFCR_TF3CS_BRG5 0x00000000 /* Transmit FCC3 Clock Source is BRG5 */ -#define CMXFCR_TF3CS_BRG6 0x00000100 /* Transmit FCC3 Clock Source is BRG6 */ -#define CMXFCR_TF3CS_BRG7 0x00000200 /* Transmit FCC3 Clock Source is BRG7 */ -#define CMXFCR_TF3CS_BRG8 0x00000300 /* Transmit FCC3 Clock Source is BRG8 */ -#define CMXFCR_TF3CS_CLK13 0x00000400 /* Transmit FCC3 Clock Source is CLK13 */ -#define CMXFCR_TF3CS_CLK14 0x00000500 /* Transmit FCC3 Clock Source is CLK14 */ -#define CMXFCR_TF3CS_CLK15 0x00000600 /* Transmit FCC3 Clock Source is CLK15 */ -#define CMXFCR_TF3CS_CLK16 0x00000700 /* Transmit FCC3 Clock Source is CLK16 */ - -/*----------------------------------------------------------------------- - * CMXSCR - CMX SCC Clock Route Register 15-14 - */ -#define CMXSCR_GR1 0x80000000 /* Grant Support of SCC1 */ -#define CMXSCR_SC1 0x40000000 /* SCC1 connection */ -#define CMXSCR_RS1CS_MSK 0x38000000 /* Receive SCC1 Clock Source Mask */ -#define CMXSCR_TS1CS_MSK 0x07000000 /* Transmit SCC1 Clock Source Mask */ -#define CMXSCR_GR2 0x00800000 /* Grant Support of SCC2 */ -#define CMXSCR_SC2 0x00400000 /* SCC2 connection */ -#define CMXSCR_RS2CS_MSK 0x00380000 /* Receive SCC2 Clock Source Mask */ -#define CMXSCR_TS2CS_MSK 0x00070000 /* Transmit SCC2 Clock Source Mask */ -#define CMXSCR_GR3 0x00008000 /* Grant Support of SCC3 */ -#define CMXSCR_SC3 0x00004000 /* SCC3 connection */ -#define CMXSCR_RS3CS_MSK 0x00003800 /* Receive SCC3 Clock Source Mask */ -#define CMXSCR_TS3CS_MSK 0x00000700 /* Transmit SCC3 Clock Source Mask */ -#define CMXSCR_GR4 0x00000080 /* Grant Support of SCC4 */ -#define CMXSCR_SC4 0x00000040 /* SCC4 connection */ -#define CMXSCR_RS4CS_MSK 0x00000038 /* Receive SCC4 Clock Source Mask */ -#define CMXSCR_TS4CS_MSK 0x00000007 /* Transmit SCC4 Clock Source Mask */ - -#define CMXSCR_RS1CS_BRG1 0x00000000 /* SCC1 Rx Clock Source is BRG1 */ -#define CMXSCR_RS1CS_BRG2 0x08000000 /* SCC1 Rx Clock Source is BRG2 */ -#define CMXSCR_RS1CS_BRG3 0x10000000 /* SCC1 Rx Clock Source is BRG3 */ -#define CMXSCR_RS1CS_BRG4 0x18000000 /* SCC1 Rx Clock Source is BRG4 */ -#define CMXSCR_RS1CS_CLK11 0x20000000 /* SCC1 Rx Clock Source is CLK11 */ -#define CMXSCR_RS1CS_CLK12 0x28000000 /* SCC1 Rx Clock Source is CLK12 */ -#define CMXSCR_RS1CS_CLK3 0x30000000 /* SCC1 Rx Clock Source is CLK3 */ -#define CMXSCR_RS1CS_CLK4 0x38000000 /* SCC1 Rx Clock Source is CLK4 */ - -#define CMXSCR_TS1CS_BRG1 0x00000000 /* SCC1 Tx Clock Source is BRG1 */ -#define CMXSCR_TS1CS_BRG2 0x01000000 /* SCC1 Tx Clock Source is BRG2 */ -#define CMXSCR_TS1CS_BRG3 0x02000000 /* SCC1 Tx Clock Source is BRG3 */ -#define CMXSCR_TS1CS_BRG4 0x03000000 /* SCC1 Tx Clock Source is BRG4 */ -#define CMXSCR_TS1CS_CLK11 0x04000000 /* SCC1 Tx Clock Source is CLK11 */ -#define CMXSCR_TS1CS_CLK12 0x05000000 /* SCC1 Tx Clock Source is CLK12 */ -#define CMXSCR_TS1CS_CLK3 0x06000000 /* SCC1 Tx Clock Source is CLK3 */ -#define CMXSCR_TS1CS_CLK4 0x07000000 /* SCC1 Tx Clock Source is CLK4 */ - -#define CMXSCR_RS2CS_BRG1 0x00000000 /* SCC2 Rx Clock Source is BRG1 */ -#define CMXSCR_RS2CS_BRG2 0x00080000 /* SCC2 Rx Clock Source is BRG2 */ -#define CMXSCR_RS2CS_BRG3 0x00100000 /* SCC2 Rx Clock Source is BRG3 */ -#define CMXSCR_RS2CS_BRG4 0x00180000 /* SCC2 Rx Clock Source is BRG4 */ -#define CMXSCR_RS2CS_CLK11 0x00200000 /* SCC2 Rx Clock Source is CLK11 */ -#define CMXSCR_RS2CS_CLK12 0x00280000 /* SCC2 Rx Clock Source is CLK12 */ -#define CMXSCR_RS2CS_CLK3 0x00300000 /* SCC2 Rx Clock Source is CLK3 */ -#define CMXSCR_RS2CS_CLK4 0x00380000 /* SCC2 Rx Clock Source is CLK4 */ - -#define CMXSCR_TS2CS_BRG1 0x00000000 /* SCC2 Tx Clock Source is BRG1 */ -#define CMXSCR_TS2CS_BRG2 0x00010000 /* SCC2 Tx Clock Source is BRG2 */ -#define CMXSCR_TS2CS_BRG3 0x00020000 /* SCC2 Tx Clock Source is BRG3 */ -#define CMXSCR_TS2CS_BRG4 0x00030000 /* SCC2 Tx Clock Source is BRG4 */ -#define CMXSCR_TS2CS_CLK11 0x00040000 /* SCC2 Tx Clock Source is CLK11 */ -#define CMXSCR_TS2CS_CLK12 0x00050000 /* SCC2 Tx Clock Source is CLK12 */ -#define CMXSCR_TS2CS_CLK3 0x00060000 /* SCC2 Tx Clock Source is CLK3 */ -#define CMXSCR_TS2CS_CLK4 0x00070000 /* SCC2 Tx Clock Source is CLK4 */ - -#define CMXSCR_RS3CS_BRG1 0x00000000 /* SCC3 Rx Clock Source is BRG1 */ -#define CMXSCR_RS3CS_BRG2 0x00000800 /* SCC3 Rx Clock Source is BRG2 */ -#define CMXSCR_RS3CS_BRG3 0x00001000 /* SCC3 Rx Clock Source is BRG3 */ -#define CMXSCR_RS3CS_BRG4 0x00001800 /* SCC3 Rx Clock Source is BRG4 */ -#define CMXSCR_RS3CS_CLK5 0x00002000 /* SCC3 Rx Clock Source is CLK5 */ -#define CMXSCR_RS3CS_CLK6 0x00002800 /* SCC3 Rx Clock Source is CLK6 */ -#define CMXSCR_RS3CS_CLK7 0x00003000 /* SCC3 Rx Clock Source is CLK7 */ -#define CMXSCR_RS3CS_CLK8 0x00003800 /* SCC3 Rx Clock Source is CLK8 */ - -#define CMXSCR_TS3CS_BRG1 0x00000000 /* SCC3 Tx Clock Source is BRG1 */ -#define CMXSCR_TS3CS_BRG2 0x00000100 /* SCC3 Tx Clock Source is BRG2 */ -#define CMXSCR_TS3CS_BRG3 0x00000200 /* SCC3 Tx Clock Source is BRG3 */ -#define CMXSCR_TS3CS_BRG4 0x00000300 /* SCC3 Tx Clock Source is BRG4 */ -#define CMXSCR_TS3CS_CLK5 0x00000400 /* SCC3 Tx Clock Source is CLK5 */ -#define CMXSCR_TS3CS_CLK6 0x00000500 /* SCC3 Tx Clock Source is CLK6 */ -#define CMXSCR_TS3CS_CLK7 0x00000600 /* SCC3 Tx Clock Source is CLK7 */ -#define CMXSCR_TS3CS_CLK8 0x00000700 /* SCC3 Tx Clock Source is CLK8 */ - -#define CMXSCR_RS4CS_BRG1 0x00000000 /* SCC4 Rx Clock Source is BRG1 */ -#define CMXSCR_RS4CS_BRG2 0x00000008 /* SCC4 Rx Clock Source is BRG2 */ -#define CMXSCR_RS4CS_BRG3 0x00000010 /* SCC4 Rx Clock Source is BRG3 */ -#define CMXSCR_RS4CS_BRG4 0x00000018 /* SCC4 Rx Clock Source is BRG4 */ -#define CMXSCR_RS4CS_CLK5 0x00000020 /* SCC4 Rx Clock Source is CLK5 */ -#define CMXSCR_RS4CS_CLK6 0x00000028 /* SCC4 Rx Clock Source is CLK6 */ -#define CMXSCR_RS4CS_CLK7 0x00000030 /* SCC4 Rx Clock Source is CLK7 */ -#define CMXSCR_RS4CS_CLK8 0x00000038 /* SCC4 Rx Clock Source is CLK8 */ - -#define CMXSCR_TS4CS_BRG1 0x00000000 /* SCC4 Tx Clock Source is BRG1 */ -#define CMXSCR_TS4CS_BRG2 0x00000001 /* SCC4 Tx Clock Source is BRG2 */ -#define CMXSCR_TS4CS_BRG3 0x00000002 /* SCC4 Tx Clock Source is BRG3 */ -#define CMXSCR_TS4CS_BRG4 0x00000003 /* SCC4 Tx Clock Source is BRG4 */ -#define CMXSCR_TS4CS_CLK5 0x00000004 /* SCC4 Tx Clock Source is CLK5 */ -#define CMXSCR_TS4CS_CLK6 0x00000005 /* SCC4 Tx Clock Source is CLK6 */ -#define CMXSCR_TS4CS_CLK7 0x00000006 /* SCC4 Tx Clock Source is CLK7 */ -#define CMXSCR_TS4CS_CLK8 0x00000007 /* SCC4 Tx Clock Source is CLK8 */ - -#endif /* __CPM_85XX__ */ diff --git a/arch/powerpc/include/asm/global_data.h b/arch/powerpc/include/asm/global_data.h index 2975255..770adcd 100644 --- a/arch/powerpc/include/asm/global_data.h +++ b/arch/powerpc/include/asm/global_data.h @@ -20,13 +20,6 @@ struct arch_global_data { #if defined(CONFIG_MPC8xx) unsigned long brg_clk; #endif -#if defined(CONFIG_CPM2) - /* There are many clocks on the MPC8260 - see page 9-5 */ - unsigned long vco_out; - unsigned long cpm_clk; - unsigned long scc_clk; - unsigned long brg_clk; -#endif /* TODO: sjg@chromium.org: Should these be unslgned long? */ #if defined(CONFIG_MPC83xx) #ifdef CONFIG_CLK_MPC83XX @@ -88,10 +81,6 @@ struct arch_global_data { unsigned long arbiter_event_attributes; unsigned long arbiter_event_address; #endif -#if defined(CONFIG_CPM2) - unsigned int dp_alloc_base; - unsigned int dp_alloc_top; -#endif #ifdef CONFIG_SYS_FPGA_COUNT unsigned fpga_state[CONFIG_SYS_FPGA_COUNT]; #endif diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index 770705a..b8bc584 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -921,330 +921,6 @@ typedef struct ccsr_pic { u8 res150[130892]; } ccsr_pic_t; -/* CPM Block */ -#ifndef CONFIG_CPM2 -typedef struct ccsr_cpm { - u8 res[262144]; -} ccsr_cpm_t; -#else -/* - * DPARM - * General SIU - */ -typedef struct ccsr_cpm_siu { - u8 res1[80]; - u32 smaer; - u32 smser; - u32 smevr; - u8 res2[4]; - u32 lmaer; - u32 lmser; - u32 lmevr; - u8 res3[2964]; -} ccsr_cpm_siu_t; - -/* IRQ Controller */ -typedef struct ccsr_cpm_intctl { - u16 sicr; - u8 res1[2]; - u32 sivec; - u32 sipnrh; - u32 sipnrl; - u32 siprr; - u32 scprrh; - u32 scprrl; - u32 simrh; - u32 simrl; - u32 siexr; - u8 res2[88]; - u32 sccr; - u8 res3[124]; -} ccsr_cpm_intctl_t; - -/* input/output port */ -typedef struct ccsr_cpm_iop { - u32 pdira; - u32 ppara; - u32 psora; - u32 podra; - u32 pdata; - u8 res1[12]; - u32 pdirb; - u32 pparb; - u32 psorb; - u32 podrb; - u32 pdatb; - u8 res2[12]; - u32 pdirc; - u32 pparc; - u32 psorc; - u32 podrc; - u32 pdatc; - u8 res3[12]; - u32 pdird; - u32 ppard; - u32 psord; - u32 podrd; - u32 pdatd; - u8 res4[12]; -} ccsr_cpm_iop_t; - -/* CPM timers */ -typedef struct ccsr_cpm_timer { - u8 tgcr1; - u8 res1[3]; - u8 tgcr2; - u8 res2[11]; - u16 tmr1; - u16 tmr2; - u16 trr1; - u16 trr2; - u16 tcr1; - u16 tcr2; - u16 tcn1; - u16 tcn2; - u16 tmr3; - u16 tmr4; - u16 trr3; - u16 trr4; - u16 tcr3; - u16 tcr4; - u16 tcn3; - u16 tcn4; - u16 ter1; - u16 ter2; - u16 ter3; - u16 ter4; - u8 res3[608]; -} ccsr_cpm_timer_t; - -/* SDMA */ -typedef struct ccsr_cpm_sdma { - u8 sdsr; - u8 res1[3]; - u8 sdmr; - u8 res2[739]; -} ccsr_cpm_sdma_t; - -/* FCC1 */ -typedef struct ccsr_cpm_fcc1 { - u32 gfmr; - u32 fpsmr; - u16 ftodr; - u8 res1[2]; - u16 fdsr; - u8 res2[2]; - u16 fcce; - u8 res3[2]; - u16 fccm; - u8 res4[2]; - u8 fccs; - u8 res5[3]; - u8 ftirr_phy[4]; -} ccsr_cpm_fcc1_t; - -/* FCC2 */ -typedef struct ccsr_cpm_fcc2 { - u32 gfmr; - u32 fpsmr; - u16 ftodr; - u8 res1[2]; - u16 fdsr; - u8 res2[2]; - u16 fcce; - u8 res3[2]; - u16 fccm; - u8 res4[2]; - u8 fccs; - u8 res5[3]; - u8 ftirr_phy[4]; -} ccsr_cpm_fcc2_t; - -/* FCC3 */ -typedef struct ccsr_cpm_fcc3 { - u32 gfmr; - u32 fpsmr; - u16 ftodr; - u8 res1[2]; - u16 fdsr; - u8 res2[2]; - u16 fcce; - u8 res3[2]; - u16 fccm; - u8 res4[2]; - u8 fccs; - u8 res5[3]; - u8 res[36]; -} ccsr_cpm_fcc3_t; - -/* FCC1 extended */ -typedef struct ccsr_cpm_fcc1_ext { - u32 firper; - u32 firer; - u32 firsr_h; - u32 firsr_l; - u8 gfemr; - u8 res[15]; - -} ccsr_cpm_fcc1_ext_t; - -/* FCC2 extended */ -typedef struct ccsr_cpm_fcc2_ext { - u32 firper; - u32 firer; - u32 firsr_h; - u32 firsr_l; - u8 gfemr; - u8 res[31]; -} ccsr_cpm_fcc2_ext_t; - -/* FCC3 extended */ -typedef struct ccsr_cpm_fcc3_ext { - u8 gfemr; - u8 res[47]; -} ccsr_cpm_fcc3_ext_t; - -/* TC layers */ -typedef struct ccsr_cpm_tmp1 { - u8 res[496]; -} ccsr_cpm_tmp1_t; - -/* BRGs:5,6,7,8 */ -typedef struct ccsr_cpm_brg2 { - u32 brgc5; - u32 brgc6; - u32 brgc7; - u32 brgc8; - u8 res[608]; -} ccsr_cpm_brg2_t; - -/* I2C */ -typedef struct ccsr_cpm_i2c { - u8 i2mod; - u8 res1[3]; - u8 i2add; - u8 res2[3]; - u8 i2brg; - u8 res3[3]; - u8 i2com; - u8 res4[3]; - u8 i2cer; - u8 res5[3]; - u8 i2cmr; - u8 res6[331]; -} ccsr_cpm_i2c_t; - -/* CPM core */ -typedef struct ccsr_cpm_cp { - u32 cpcr; - u32 rccr; - u8 res1[14]; - u16 rter; - u8 res2[2]; - u16 rtmr; - u16 rtscr; - u8 res3[2]; - u32 rtsr; - u8 res4[12]; -} ccsr_cpm_cp_t; - -/* BRGs:1,2,3,4 */ -typedef struct ccsr_cpm_brg1 { - u32 brgc1; - u32 brgc2; - u32 brgc3; - u32 brgc4; -} ccsr_cpm_brg1_t; - -/* SCC1-SCC4 */ -typedef struct ccsr_cpm_scc { - u32 gsmrl; - u32 gsmrh; - u16 psmr; - u8 res1[2]; - u16 todr; - u16 dsr; - u16 scce; - u8 res2[2]; - u16 sccm; - u8 res3; - u8 sccs; - u8 res4[8]; -} ccsr_cpm_scc_t; - -typedef struct ccsr_cpm_tmp2 { - u8 res[32]; -} ccsr_cpm_tmp2_t; - -/* SPI */ -typedef struct ccsr_cpm_spi { - u16 spmode; - u8 res1[4]; - u8 spie; - u8 res2[3]; - u8 spim; - u8 res3[2]; - u8 spcom; - u8 res4[82]; -} ccsr_cpm_spi_t; - -/* CPM MUX */ -typedef struct ccsr_cpm_mux { - u8 cmxsi1cr; - u8 res1; - u8 cmxsi2cr; - u8 res2; - u32 cmxfcr; - u32 cmxscr; - u8 res3[2]; - u16 cmxuar; - u8 res4[16]; -} ccsr_cpm_mux_t; - -/* SI,MCC,etc */ -typedef struct ccsr_cpm_tmp3 { - u8 res[58592]; -} ccsr_cpm_tmp3_t; - -typedef struct ccsr_cpm_iram { - u32 iram[8192]; - u8 res[98304]; -} ccsr_cpm_iram_t; - -typedef struct ccsr_cpm { - /* Some references are into the unique & known dpram spaces, - * others are from the generic base. - */ -#define im_dprambase im_dpram1 - u8 im_dpram1[16*1024]; - u8 res1[16*1024]; - u8 im_dpram2[16*1024]; - u8 res2[16*1024]; - ccsr_cpm_siu_t im_cpm_siu; /* SIU Configuration */ - ccsr_cpm_intctl_t im_cpm_intctl; /* IRQ Controller */ - ccsr_cpm_iop_t im_cpm_iop; /* IO Port control/status */ - ccsr_cpm_timer_t im_cpm_timer; /* CPM timers */ - ccsr_cpm_sdma_t im_cpm_sdma; /* SDMA control/status */ - ccsr_cpm_fcc1_t im_cpm_fcc1; - ccsr_cpm_fcc2_t im_cpm_fcc2; - ccsr_cpm_fcc3_t im_cpm_fcc3; - ccsr_cpm_fcc1_ext_t im_cpm_fcc1_ext; - ccsr_cpm_fcc2_ext_t im_cpm_fcc2_ext; - ccsr_cpm_fcc3_ext_t im_cpm_fcc3_ext; - ccsr_cpm_tmp1_t im_cpm_tmp1; - ccsr_cpm_brg2_t im_cpm_brg2; - ccsr_cpm_i2c_t im_cpm_i2c; - ccsr_cpm_cp_t im_cpm_cp; - ccsr_cpm_brg1_t im_cpm_brg1; - ccsr_cpm_scc_t im_cpm_scc[4]; - ccsr_cpm_tmp2_t im_cpm_tmp2; - ccsr_cpm_spi_t im_cpm_spi; - ccsr_cpm_mux_t im_cpm_mux; - ccsr_cpm_tmp3_t im_cpm_tmp3; - ccsr_cpm_iram_t im_cpm_iram; -} ccsr_cpm_t; -#endif - #ifdef CONFIG_SYS_SRIO /* Architectural regsiters */ struct rio_arch { @@ -2888,7 +2564,6 @@ struct ccsr_pman { #define CONFIG_SYS_MPC85xx_SERDES1_OFFSET 0xE3000 #define CONFIG_SYS_SEC_MON_OFFSET 0xE6000 #define CONFIG_SYS_SFP_OFFSET 0xE7000 -#define CONFIG_SYS_MPC85xx_CPM_OFFSET 0x80000 #define CONFIG_SYS_FSL_QMAN_OFFSET 0x88000 #define CONFIG_SYS_FSL_BMAN_OFFSET 0x8a000 #define CONFIG_SYS_FSL_FM1_OFFSET 0x100000 @@ -2965,8 +2640,6 @@ struct ccsr_pman { (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_ESDHC_OFFSET) #define CONFIG_SYS_MPC8xxx_PIC_ADDR \ (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PIC_OFFSET) -#define CONFIG_SYS_MPC85xx_CPM_ADDR \ - (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_CPM_OFFSET) #define CONFIG_SYS_MPC85xx_SERDES1_ADDR \ (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_SERDES1_OFFSET) #define CONFIG_SYS_MPC85xx_SERDES2_ADDR \ diff --git a/arch/powerpc/lib/bdinfo.c b/arch/powerpc/lib/bdinfo.c index d2e5e60..55dcad5 100644 --- a/arch/powerpc/lib/bdinfo.c +++ b/arch/powerpc/lib/bdinfo.c @@ -27,13 +27,6 @@ int arch_setup_bdinfo(void) bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ -#if defined(CONFIG_CPM2) - bd->bi_cpmfreq = gd->arch.cpm_clk; - bd->bi_brgfreq = gd->arch.brg_clk; - bd->bi_sccfreq = gd->arch.scc_clk; - bd->bi_vco = gd->arch.vco_out; -#endif /* CONFIG_CPM2 */ - return 0; } @@ -59,10 +52,4 @@ void arch_print_bdinfo(void) puts("addressing = 32-bit\n"); #endif board_detail(); -#if defined(CONFIG_CPM2) - bdinfo_print_mhz("cpmfreq", bd->bi_cpmfreq); - bdinfo_print_mhz("vco", bd->bi_vco); - bdinfo_print_mhz("sccfreq", bd->bi_sccfreq); - bdinfo_print_mhz("brgfreq", bd->bi_brgfreq); -#endif } diff --git a/arch/powerpc/lib/bootm.c b/arch/powerpc/lib/bootm.c index 8d65047..3b43066 100644 --- a/arch/powerpc/lib/bootm.c +++ b/arch/powerpc/lib/bootm.c @@ -266,12 +266,6 @@ static void set_clocks_in_mhz (struct bd_info *kbd) /* convert all clock information to MHz */ kbd->bi_intfreq /= 1000000L; kbd->bi_busfreq /= 1000000L; -#if defined(CONFIG_CPM2) - kbd->bi_cpmfreq /= 1000000L; - kbd->bi_brgfreq /= 1000000L; - kbd->bi_sccfreq /= 1000000L; - kbd->bi_vco /= 1000000L; -#endif } } diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig index 35e5b89..8f668cc 100644 --- a/arch/xtensa/Kconfig +++ b/arch/xtensa/Kconfig @@ -13,6 +13,7 @@ choice config TARGET_XTFPGA bool "Support XTFPGA" + select BOARD_POSTCLK_INIT endchoice diff --git a/board/google/Kconfig b/board/google/Kconfig index 22c4be3..c57e518 100644 --- a/board/google/Kconfig +++ b/board/google/Kconfig @@ -4,12 +4,16 @@ if VENDOR_GOOGLE +config BIOSEMU + bool + choice prompt "Mainboard model" optional config TARGET_CHROMEBOOK_CORAL bool "Chromebook coral" + select BIOSEMU help This is a range of Intel-based laptops released in 2018. They use an Intel Apollo Lake SoC. The design supports WiFi, 4GB to 16GB of @@ -24,6 +28,7 @@ config TARGET_CHROMEBOOK_CORAL config TARGET_CHROMEBOOK_LINK bool "Chromebook link" + select BIOSEMU help This is the Chromebook Pixel released in 2013. It uses an Intel i5 Ivybridge which is a die-shrink of Sandybridge, with 4GB of @@ -36,6 +41,7 @@ config TARGET_CHROMEBOOK_LINK config TARGET_CHROMEBOOK_LINK64 bool "Chromebook link 64-bit" + select BIOSEMU help This is the Chromebook Pixel released in 2013. With this config U-Boot is built as a 64-bit binary. This allows testing while this @@ -43,6 +49,7 @@ config TARGET_CHROMEBOOK_LINK64 config TARGET_CHROMEBOX_PANTHER bool "Chromebox panther (not available)" + select BIOSEMU help Note: At present this must be used with coreboot. See README.x86 for instructions. diff --git a/cmd/Kconfig b/cmd/Kconfig index 5e25e45..d10deed 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -1485,6 +1485,15 @@ config CMD_DHCP help Boot image via network using DHCP/TFTP protocol +config BOOTP_MAY_FAIL + bool "Allow for the BOOTP/DHCP server to not be found" + depends on CMD_BOOTP + help + If the DHCP server is not found after the configured retry count, the + call will fail instead of starting over. This can be used to fail + over to Link-local IP address configuration if the DHCP server is not + available. + config BOOTP_BOOTPATH bool "Request & store 'rootpath' from BOOTP/DHCP server" default y @@ -1493,6 +1502,14 @@ config BOOTP_BOOTPATH Even though the config is called BOOTP_BOOTPATH, it stores the path in the variable 'rootpath'. +config BOOTP_VENDOREX + bool "Support vendor extensions from BOOTP/DHCP server" + depends on CMD_BOOTP + +config BOOTP_BOOTFILESIZE + bool "Request & store 'bootfilesize' from BOOTP/DHCP server" + depends on CMD_BOOTP + config BOOTP_DNS bool "Request & store 'dnsip' from BOOTP/DHCP server" default y @@ -1540,10 +1557,18 @@ config BOOTP_SUBNETMASK default y depends on CMD_BOOTP +config BOOTP_NISDOMAIN + bool "Request & store 'nisdomain' from BOOTP/DHCP server" + depends on CMD_BOOTP + config BOOTP_NTPSERVER bool "Request & store 'ntpserverip' from BOOTP/DHCP server" depends on CMD_BOOTP +config BOOTP_TIMEOFFSET + bool "Request & store 'timeoffset' from BOOTP/DHCP server" + depends on CMD_BOOTP && CMD_SNTP + config CMD_PCAP bool "pcap capture" help diff --git a/common/Kconfig b/common/Kconfig index 82cd864..add4cda 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -524,6 +524,12 @@ config BOARD_EARLY_INIT_R relocation. With this option, U-Boot calls board_early_init_r() in the post-relocation init sequence. +config BOARD_POSTCLK_INIT + bool "Call board_postclk_init" + help + Some boards need this to initialize select items, after clocks / + timebase and before env / serial. + config BOARD_LATE_INIT bool "Execute Board late init" help diff --git a/configs/10m50_defconfig b/configs/10m50_defconfig index 7f5ca9a..e98b81e 100644 --- a/configs/10m50_defconfig +++ b/configs/10m50_defconfig @@ -18,6 +18,7 @@ CONFIG_CMD_CPU=y CONFIG_CMD_GPIO=y # CONFIG_CMD_ITEST is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_MII=y CONFIG_CMD_PING=y diff --git a/configs/3c120_defconfig b/configs/3c120_defconfig index e7911f0..ba2dce8 100644 --- a/configs/3c120_defconfig +++ b/configs/3c120_defconfig @@ -18,6 +18,7 @@ CONFIG_CMD_CPU=y CONFIG_CMD_GPIO=y # CONFIG_CMD_ITEST is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_MII=y CONFIG_CMD_PING=y diff --git a/configs/M5235EVB_Flash32_defconfig b/configs/M5235EVB_Flash32_defconfig index abac898..424e816 100644 --- a/configs/M5235EVB_Flash32_defconfig +++ b/configs/M5235EVB_Flash32_defconfig @@ -18,12 +18,15 @@ CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xFFE04000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="u-boot.bin" CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_FSL=y CONFIG_SYS_FSL_I2C_OFFSET=0x300 diff --git a/configs/M5235EVB_defconfig b/configs/M5235EVB_defconfig index 8a12e4b..9a8656a 100644 --- a/configs/M5235EVB_defconfig +++ b/configs/M5235EVB_defconfig @@ -18,12 +18,15 @@ CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xFFE04000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="u-boot.bin" CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_FSL=y CONFIG_SYS_FSL_I2C_OFFSET=0x300 diff --git a/configs/M5272C3_defconfig b/configs/M5272C3_defconfig index e46b097..90f98ee 100644 --- a/configs/M5272C3_defconfig +++ b/configs/M5272C3_defconfig @@ -15,6 +15,7 @@ CONFIG_CMD_IMLS=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y diff --git a/configs/M5275EVB_defconfig b/configs/M5275EVB_defconfig index 3cb77b7..073bc96 100644 --- a/configs/M5275EVB_defconfig +++ b/configs/M5275EVB_defconfig @@ -19,6 +19,7 @@ CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y diff --git a/configs/M5282EVB_defconfig b/configs/M5282EVB_defconfig index 0d17cf5..3e8e8b5 100644 --- a/configs/M5282EVB_defconfig +++ b/configs/M5282EVB_defconfig @@ -15,6 +15,7 @@ CONFIG_CMD_IMLS=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y diff --git a/configs/MPC837XERDB_defconfig b/configs/MPC837XERDB_defconfig index eac5b74..c21caee 100644 --- a/configs/MPC837XERDB_defconfig +++ b/configs/MPC837XERDB_defconfig @@ -160,6 +160,7 @@ CONFIG_CMD_PCI=y CONFIG_CMD_SATA=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_DATE=y @@ -168,6 +169,8 @@ CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_ADDR=0xFE080000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_FSL_SATA=y CONFIG_SYS_SATA_MAX_DEVICE=2 diff --git a/configs/MPC8548CDS_36BIT_defconfig b/configs/MPC8548CDS_36BIT_defconfig index d6351d5..76d2b55 100644 --- a/configs/MPC8548CDS_36BIT_defconfig +++ b/configs/MPC8548CDS_36BIT_defconfig @@ -23,13 +23,17 @@ CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y # CONFIG_CMD_HASH is not set CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_ADDR=0xFFF60000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="8548cds/uImage.uboot" CONFIG_DM=y +CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/MPC8548CDS_defconfig b/configs/MPC8548CDS_defconfig index da0b80b..6a55087 100644 --- a/configs/MPC8548CDS_defconfig +++ b/configs/MPC8548CDS_defconfig @@ -22,13 +22,17 @@ CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y # CONFIG_CMD_HASH is not set CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_ADDR=0xFFF60000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="8548cds/uImage.uboot" CONFIG_DM=y +CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/MPC8548CDS_legacy_defconfig b/configs/MPC8548CDS_legacy_defconfig index 87d1fd7..ae262bf 100644 --- a/configs/MPC8548CDS_legacy_defconfig +++ b/configs/MPC8548CDS_legacy_defconfig @@ -22,13 +22,17 @@ CONFIG_CMD_IMLS=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y # CONFIG_CMD_HASH is not set CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_ADDR=0xFFF60000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="8548cds/uImage.uboot" CONFIG_DM=y +CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index 61fd2a7..0782dce 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -53,10 +53,13 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_TPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index 0e537eb..9c0df84 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -35,10 +35,13 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index dc113be..5804ba7 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -47,10 +47,13 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index cd5c80c..bcf82eb 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -49,10 +49,13 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index f80a0d9..a1cd44b 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -52,10 +52,13 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_TPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index 035aac2..3ce8e3f 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -34,10 +34,13 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index cd031d2..7a6b19c 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -46,10 +46,13 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index f339502..22798d8 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -48,10 +48,13 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index ba64f88..f861734 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -54,10 +54,13 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_TPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index a8e9556..80a8f4e 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -36,10 +36,13 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index 8719967..4082cef 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -48,10 +48,13 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index 2d646f9..4b58168 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -50,10 +50,13 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index f8437ff..d8e5882 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -53,10 +53,13 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_TPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index b99531c..bec233f 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -35,10 +35,13 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index ebe2af6..f8a795d 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -47,10 +47,13 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index 7893782..510ff5e 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -49,10 +49,13 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index 30b841d..b499ec3 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -53,8 +53,11 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFF800C21 CONFIG_SYS_OR0_PRELIM=0xFFFF8396 diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index 79edbf3..530693b 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -48,8 +48,11 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index c5a64de..75e5851 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -50,8 +50,11 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index 9671a6d..79afdab 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -37,8 +37,11 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index 0201c51..44a4ec9 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -52,8 +52,11 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFF800C21 CONFIG_SYS_OR0_PRELIM=0xFFFF8396 diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index 371a8b5..7e06a9a 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -47,8 +47,11 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index 7c8b3c8..da35cdd 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -49,8 +49,11 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index 01b4fd3..c8919b7 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -36,8 +36,11 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index e70c1a7..cfc73c4 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -55,8 +55,11 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFF800C21 CONFIG_SYS_OR0_PRELIM=0xFFFF8796 diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index 2596b52..2d35773 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -50,8 +50,11 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEC001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index f6f8888..bce232e 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -52,8 +52,11 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEC001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig index e1a4965..5b10317 100644 --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -39,8 +39,11 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEC001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index 2c302b6..1731d4f 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -57,8 +57,11 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFF800C21 CONFIG_SYS_OR0_PRELIM=0xFFFF8396 diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index 2d08071..6662fe9 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -52,8 +52,11 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index 7b53b02..d9d1f8b 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -54,8 +54,11 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index 5e8a474..6111d3b 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -41,8 +41,11 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index 74165dc..9e0de44 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -56,8 +56,11 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFF800C21 CONFIG_SYS_OR0_PRELIM=0xFFFF8396 diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index 0505f40..cbe30d3 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -51,8 +51,11 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index f1085fd..7f73500 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -53,8 +53,11 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index f933ed4..728336e 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -40,8 +40,11 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig index 01d6192..4103ac8 100644 --- a/configs/P2041RDB_NAND_defconfig +++ b/configs/P2041RDB_NAND_defconfig @@ -39,6 +39,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig index dc56c79..b28903e 100644 --- a/configs/P2041RDB_SDCARD_defconfig +++ b/configs/P2041RDB_SDCARD_defconfig @@ -40,6 +40,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig index 78a2450..d0959f8 100644 --- a/configs/P2041RDB_SPIFLASH_defconfig +++ b/configs/P2041RDB_SPIFLASH_defconfig @@ -41,6 +41,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig index f6bf4da..54f649f 100644 --- a/configs/P2041RDB_defconfig +++ b/configs/P2041RDB_defconfig @@ -36,6 +36,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig index ec58500..3b6585a 100644 --- a/configs/P3041DS_NAND_defconfig +++ b/configs/P3041DS_NAND_defconfig @@ -37,6 +37,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig index 58a3eae..c92b6f7 100644 --- a/configs/P3041DS_SDCARD_defconfig +++ b/configs/P3041DS_SDCARD_defconfig @@ -38,6 +38,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig index c48976b..98fe2d5 100644 --- a/configs/P3041DS_SPIFLASH_defconfig +++ b/configs/P3041DS_SPIFLASH_defconfig @@ -39,6 +39,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig index fcc7361..fbcc1e4 100644 --- a/configs/P3041DS_defconfig +++ b/configs/P3041DS_defconfig @@ -34,6 +34,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig index 25f7861..b9dbb7b 100644 --- a/configs/P4080DS_SDCARD_defconfig +++ b/configs/P4080DS_SDCARD_defconfig @@ -38,6 +38,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig index c32c394..66d95e6 100644 --- a/configs/P4080DS_SPIFLASH_defconfig +++ b/configs/P4080DS_SPIFLASH_defconfig @@ -39,6 +39,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig index e3c41c3..1d0c710 100644 --- a/configs/P4080DS_defconfig +++ b/configs/P4080DS_defconfig @@ -34,6 +34,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig index 279976c..7cd2ae6 100644 --- a/configs/P5040DS_NAND_defconfig +++ b/configs/P5040DS_NAND_defconfig @@ -38,6 +38,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig index 34ebc51..fdde26e 100644 --- a/configs/P5040DS_SDCARD_defconfig +++ b/configs/P5040DS_SDCARD_defconfig @@ -38,6 +38,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig index ea8b673..3e4ef80 100644 --- a/configs/P5040DS_SPIFLASH_defconfig +++ b/configs/P5040DS_SPIFLASH_defconfig @@ -39,6 +39,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig index e9bf7ff..94afb8b 100644 --- a/configs/P5040DS_defconfig +++ b/configs/P5040DS_defconfig @@ -34,6 +34,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index 20ded48..d4dc7bf 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -61,6 +61,8 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index 8a82082..ea1ff59 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -60,6 +60,8 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index 87d4083..4077ed9 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -62,6 +62,8 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig index de34ba7..5bc0735 100644 --- a/configs/T1024RDB_defconfig +++ b/configs/T1024RDB_defconfig @@ -45,6 +45,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index a755d9c..76747d4 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -52,9 +52,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_DM_I2C=y diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig index efb46b3..a8d1fbe 100644 --- a/configs/T1042D4RDB_SDCARD_defconfig +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -51,9 +51,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_DM_I2C=y diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index 1568c79..9734511 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -53,9 +53,12 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_DM_I2C=y diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig index 3abd079..a73bbb0 100644 --- a/configs/T1042D4RDB_defconfig +++ b/configs/T1042D4RDB_defconfig @@ -36,9 +36,12 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_DM_I2C=y diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index 1b6ef8a..56ab58a 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -55,6 +55,8 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index 8ab1c5d..f87c52c 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -54,6 +54,8 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig index a84b7ad..ddf43f6 100644 --- a/configs/T2080QDS_SECURE_BOOT_defconfig +++ b/configs/T2080QDS_SECURE_BOOT_defconfig @@ -39,6 +39,8 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_DYNAMIC_DDR_CLK_FREQ=y diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index 8fd0248..78d859a 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -56,6 +56,8 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig index f9dbc84..65aa560 100644 --- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig @@ -36,6 +36,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_REMOTE=y CONFIG_ENV_ADDR=0xFFE20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig index 424b3f2..e65b8d1 100644 --- a/configs/T2080QDS_defconfig +++ b/configs/T2080QDS_defconfig @@ -39,6 +39,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index 1c55d30..73bd84e 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -59,6 +59,8 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index ea9c479..72d8417 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -58,6 +58,8 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index 5e08b82..ec0fd47 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -60,6 +60,8 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig index 1c1fea6..344d8c3 100644 --- a/configs/T2080RDB_defconfig +++ b/configs/T2080RDB_defconfig @@ -43,6 +43,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig index ae924b1..cbab106 100644 --- a/configs/T2080RDB_revD_NAND_defconfig +++ b/configs/T2080RDB_revD_NAND_defconfig @@ -60,6 +60,8 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig index fef0893..68e7987 100644 --- a/configs/T2080RDB_revD_SDCARD_defconfig +++ b/configs/T2080RDB_revD_SDCARD_defconfig @@ -59,6 +59,8 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig index 0b7e715..a0a331b 100644 --- a/configs/T2080RDB_revD_SPIFLASH_defconfig +++ b/configs/T2080RDB_revD_SPIFLASH_defconfig @@ -61,6 +61,8 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080RDB_revD_defconfig b/configs/T2080RDB_revD_defconfig index c78b21d..9001131 100644 --- a/configs/T2080RDB_revD_defconfig +++ b/configs/T2080RDB_revD_defconfig @@ -44,6 +44,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index ea6a528..ae8a57b 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -50,6 +50,8 @@ CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig index e17e8b1..57d4ea6 100644 --- a/configs/T4240RDB_defconfig +++ b/configs/T4240RDB_defconfig @@ -35,6 +35,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig index e287e8e..e18bdea 100644 --- a/configs/am3517_evm_defconfig +++ b/configs/am3517_evm_defconfig @@ -52,6 +52,8 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y # CONFIG_ENV_IS_IN_FAT is not set CONFIG_ENV_IS_IN_NAND=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_SPL_DM=y diff --git a/configs/at91sam9260ek_dataflash_cs0_defconfig b/configs/at91sam9260ek_dataflash_cs0_defconfig index ebcf14d..0a6295e 100644 --- a/configs/at91sam9260ek_dataflash_cs0_defconfig +++ b/configs/at91sam9260ek_dataflash_cs0_defconfig @@ -33,6 +33,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/at91sam9260ek_dataflash_cs1_defconfig b/configs/at91sam9260ek_dataflash_cs1_defconfig index 7b9e0a4..1ddee34 100644 --- a/configs/at91sam9260ek_dataflash_cs1_defconfig +++ b/configs/at91sam9260ek_dataflash_cs1_defconfig @@ -33,6 +33,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/at91sam9260ek_nandflash_defconfig b/configs/at91sam9260ek_nandflash_defconfig index 6e7da85..0e92e3a 100644 --- a/configs/at91sam9260ek_nandflash_defconfig +++ b/configs/at91sam9260ek_nandflash_defconfig @@ -31,6 +31,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/at91sam9261ek_dataflash_cs0_defconfig b/configs/at91sam9261ek_dataflash_cs0_defconfig index 5ec1e61..28e48b2 100644 --- a/configs/at91sam9261ek_dataflash_cs0_defconfig +++ b/configs/at91sam9261ek_dataflash_cs0_defconfig @@ -32,6 +32,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/at91sam9261ek_dataflash_cs3_defconfig b/configs/at91sam9261ek_dataflash_cs3_defconfig index 94c2834..7110e92 100644 --- a/configs/at91sam9261ek_dataflash_cs3_defconfig +++ b/configs/at91sam9261ek_dataflash_cs3_defconfig @@ -32,6 +32,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/at91sam9261ek_nandflash_defconfig b/configs/at91sam9261ek_nandflash_defconfig index ed2b04b..22fd19e 100644 --- a/configs/at91sam9261ek_nandflash_defconfig +++ b/configs/at91sam9261ek_nandflash_defconfig @@ -30,6 +30,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/at91sam9263ek_dataflash_cs0_defconfig b/configs/at91sam9263ek_dataflash_cs0_defconfig index 29b3923..5508855 100644 --- a/configs/at91sam9263ek_dataflash_cs0_defconfig +++ b/configs/at91sam9263ek_dataflash_cs0_defconfig @@ -36,6 +36,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/at91sam9263ek_dataflash_defconfig b/configs/at91sam9263ek_dataflash_defconfig index 29b3923..5508855 100644 --- a/configs/at91sam9263ek_dataflash_defconfig +++ b/configs/at91sam9263ek_dataflash_defconfig @@ -36,6 +36,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/at91sam9263ek_nandflash_defconfig b/configs/at91sam9263ek_nandflash_defconfig index 4551cfd..4df2bfe 100644 --- a/configs/at91sam9263ek_nandflash_defconfig +++ b/configs/at91sam9263ek_nandflash_defconfig @@ -34,6 +34,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/at91sam9263ek_norflash_boot_defconfig b/configs/at91sam9263ek_norflash_boot_defconfig index ae69c54..4eb24a8 100644 --- a/configs/at91sam9263ek_norflash_boot_defconfig +++ b/configs/at91sam9263ek_norflash_boot_defconfig @@ -30,6 +30,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/at91sam9263ek_norflash_defconfig b/configs/at91sam9263ek_norflash_defconfig index 21ed22a..99c4d67 100644 --- a/configs/at91sam9263ek_norflash_defconfig +++ b/configs/at91sam9263ek_norflash_defconfig @@ -31,6 +31,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/at91sam9g10ek_dataflash_cs0_defconfig b/configs/at91sam9g10ek_dataflash_cs0_defconfig index f4d5dba..0eead52 100644 --- a/configs/at91sam9g10ek_dataflash_cs0_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs0_defconfig @@ -32,6 +32,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/at91sam9g10ek_dataflash_cs3_defconfig b/configs/at91sam9g10ek_dataflash_cs3_defconfig index 72228b5..fd28775 100644 --- a/configs/at91sam9g10ek_dataflash_cs3_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs3_defconfig @@ -32,6 +32,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/at91sam9g10ek_nandflash_defconfig b/configs/at91sam9g10ek_nandflash_defconfig index 293683c..60c8016 100644 --- a/configs/at91sam9g10ek_nandflash_defconfig +++ b/configs/at91sam9g10ek_nandflash_defconfig @@ -30,6 +30,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/at91sam9g20ek_2mmc_defconfig b/configs/at91sam9g20ek_2mmc_defconfig index 97057b5..cbfaef4 100644 --- a/configs/at91sam9g20ek_2mmc_defconfig +++ b/configs/at91sam9g20ek_2mmc_defconfig @@ -33,6 +33,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/at91sam9g20ek_2mmc_nandflash_defconfig b/configs/at91sam9g20ek_2mmc_nandflash_defconfig index cb381e2..77d9ab6 100644 --- a/configs/at91sam9g20ek_2mmc_nandflash_defconfig +++ b/configs/at91sam9g20ek_2mmc_nandflash_defconfig @@ -32,6 +32,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/at91sam9g20ek_dataflash_cs0_defconfig b/configs/at91sam9g20ek_dataflash_cs0_defconfig index cff3b1a..2e09c7d 100644 --- a/configs/at91sam9g20ek_dataflash_cs0_defconfig +++ b/configs/at91sam9g20ek_dataflash_cs0_defconfig @@ -33,6 +33,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/at91sam9g20ek_dataflash_cs1_defconfig b/configs/at91sam9g20ek_dataflash_cs1_defconfig index 350faaf..5ad7c4c 100644 --- a/configs/at91sam9g20ek_dataflash_cs1_defconfig +++ b/configs/at91sam9g20ek_dataflash_cs1_defconfig @@ -33,6 +33,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/at91sam9g20ek_nandflash_defconfig b/configs/at91sam9g20ek_nandflash_defconfig index ef37695..763a5f4 100644 --- a/configs/at91sam9g20ek_nandflash_defconfig +++ b/configs/at91sam9g20ek_nandflash_defconfig @@ -31,6 +31,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/at91sam9m10g45ek_mmc_defconfig b/configs/at91sam9m10g45ek_mmc_defconfig index 21ad962..ea7b07d 100644 --- a/configs/at91sam9m10g45ek_mmc_defconfig +++ b/configs/at91sam9m10g45ek_mmc_defconfig @@ -34,6 +34,7 @@ CONFIG_CMD_NAND=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/at91sam9m10g45ek_nandflash_defconfig b/configs/at91sam9m10g45ek_nandflash_defconfig index 695b4c5..c242c5c 100644 --- a/configs/at91sam9m10g45ek_nandflash_defconfig +++ b/configs/at91sam9m10g45ek_nandflash_defconfig @@ -34,6 +34,7 @@ CONFIG_CMD_NAND=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/at91sam9n12ek_mmc_defconfig b/configs/at91sam9n12ek_mmc_defconfig index 998bacf..b84f924 100644 --- a/configs/at91sam9n12ek_mmc_defconfig +++ b/configs/at91sam9n12ek_mmc_defconfig @@ -28,6 +28,7 @@ CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_CMD_MTDPARTS=y diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig index 90a832a..b5964de 100644 --- a/configs/at91sam9n12ek_nandflash_defconfig +++ b/configs/at91sam9n12ek_nandflash_defconfig @@ -28,6 +28,7 @@ CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_CMD_MTDPARTS=y diff --git a/configs/at91sam9n12ek_spiflash_defconfig b/configs/at91sam9n12ek_spiflash_defconfig index e704ee0..852d635 100644 --- a/configs/at91sam9n12ek_spiflash_defconfig +++ b/configs/at91sam9n12ek_spiflash_defconfig @@ -30,6 +30,7 @@ CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_CMD_MTDPARTS=y diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig index f00f3c8..923ed9a 100644 --- a/configs/at91sam9x5ek_dataflash_defconfig +++ b/configs/at91sam9x5ek_dataflash_defconfig @@ -36,6 +36,7 @@ CONFIG_CMD_NAND_TRIMFFS=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_CMD_MTDPARTS=y diff --git a/configs/at91sam9x5ek_mmc_defconfig b/configs/at91sam9x5ek_mmc_defconfig index 1b89828..b23c4b6 100644 --- a/configs/at91sam9x5ek_mmc_defconfig +++ b/configs/at91sam9x5ek_mmc_defconfig @@ -32,6 +32,7 @@ CONFIG_CMD_NAND_TRIMFFS=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_CMD_MTDPARTS=y diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig index 124c58d..edb16c9 100644 --- a/configs/at91sam9x5ek_nandflash_defconfig +++ b/configs/at91sam9x5ek_nandflash_defconfig @@ -34,6 +34,7 @@ CONFIG_CMD_NAND_TRIMFFS=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_CMD_MTDPARTS=y diff --git a/configs/at91sam9x5ek_spiflash_defconfig b/configs/at91sam9x5ek_spiflash_defconfig index 4eecdf3..781a854 100644 --- a/configs/at91sam9x5ek_spiflash_defconfig +++ b/configs/at91sam9x5ek_spiflash_defconfig @@ -36,6 +36,7 @@ CONFIG_CMD_NAND_TRIMFFS=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_CMD_MTDPARTS=y diff --git a/configs/at91sam9xeek_dataflash_cs0_defconfig b/configs/at91sam9xeek_dataflash_cs0_defconfig index 28479b9..8b4a146 100644 --- a/configs/at91sam9xeek_dataflash_cs0_defconfig +++ b/configs/at91sam9xeek_dataflash_cs0_defconfig @@ -33,6 +33,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/at91sam9xeek_dataflash_cs1_defconfig b/configs/at91sam9xeek_dataflash_cs1_defconfig index 5072a9b..57484df 100644 --- a/configs/at91sam9xeek_dataflash_cs1_defconfig +++ b/configs/at91sam9xeek_dataflash_cs1_defconfig @@ -33,6 +33,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/at91sam9xeek_nandflash_defconfig b/configs/at91sam9xeek_nandflash_defconfig index fa7f052..6c25da9 100644 --- a/configs/at91sam9xeek_nandflash_defconfig +++ b/configs/at91sam9xeek_nandflash_defconfig @@ -31,6 +31,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig index 083f50e..1220a94 100644 --- a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig +++ b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig @@ -32,6 +32,8 @@ CONFIG_CMD_FPGA_LOADBP=y CONFIG_CMD_FPGA_LOADP=y CONFIG_CMD_MMC=y CONFIG_CMD_SPI=y +CONFIG_BOOTP_MAY_FAIL=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_TIME=y CONFIG_CMD_TIMER=y CONFIG_CMD_EXT4_WRITE=y diff --git a/configs/axs101_defconfig b/configs/axs101_defconfig index 5dd323d..ff2e5e4 100644 --- a/configs/axs101_defconfig +++ b/configs/axs101_defconfig @@ -32,6 +32,8 @@ CONFIG_OF_EMBED=y CONFIG_ENV_IS_IN_FAT=y CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_HSDK_CREG_GPIO=y CONFIG_MMC=y diff --git a/configs/axs103_defconfig b/configs/axs103_defconfig index 698dbda..82bac62 100644 --- a/configs/axs103_defconfig +++ b/configs/axs103_defconfig @@ -32,6 +32,8 @@ CONFIG_OF_EMBED=y CONFIG_ENV_IS_IN_FAT=y CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_HSDK_CREG_GPIO=y CONFIG_MMC=y diff --git a/configs/bayleybay_defconfig b/configs/bayleybay_defconfig index 1f72c53..667240b 100644 --- a/configs/bayleybay_defconfig +++ b/configs/bayleybay_defconfig @@ -34,6 +34,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y @@ -48,6 +49,8 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/bitmain_antminer_s9_defconfig b/configs/bitmain_antminer_s9_defconfig index 7b42b7a..f3d5e5d 100644 --- a/configs/bitmain_antminer_s9_defconfig +++ b/configs/bitmain_antminer_s9_defconfig @@ -43,6 +43,7 @@ CONFIG_CMD_NAND_LOCK_UNLOCK=y CONFIG_CMD_PART=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_MAY_FAIL=y # CONFIG_CMD_NFS is not set CONFIG_CMD_MII=y CONFIG_CMD_PING=y diff --git a/configs/blanche_defconfig b/configs/blanche_defconfig index 1e117c9..82d54de 100644 --- a/configs/blanche_defconfig +++ b/configs/blanche_defconfig @@ -53,6 +53,7 @@ CONFIG_RENESAS_SDHI=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_CFI=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig index 6e96ed5..be3959a 100644 --- a/configs/brppt1_mmc_defconfig +++ b/configs/brppt1_mmc_defconfig @@ -53,6 +53,7 @@ CONFIG_CMD_PART=y CONFIG_CMD_USB=y # CONFIG_CMD_ITEST is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_MAY_FAIL=y # CONFIG_CMD_NFS is not set CONFIG_CMD_MII=y CONFIG_CMD_PING=y diff --git a/configs/brppt1_nand_defconfig b/configs/brppt1_nand_defconfig index 551eda8..0561e62 100644 --- a/configs/brppt1_nand_defconfig +++ b/configs/brppt1_nand_defconfig @@ -54,6 +54,7 @@ CONFIG_CMD_PART=y CONFIG_CMD_USB=y # CONFIG_CMD_ITEST is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_MAY_FAIL=y # CONFIG_CMD_NFS is not set CONFIG_CMD_MII=y CONFIG_CMD_PING=y diff --git a/configs/brppt1_spi_defconfig b/configs/brppt1_spi_defconfig index ad6cc44..10749f0 100644 --- a/configs/brppt1_spi_defconfig +++ b/configs/brppt1_spi_defconfig @@ -62,6 +62,7 @@ CONFIG_CMD_PART=y CONFIG_CMD_USB=y # CONFIG_CMD_ITEST is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_MAY_FAIL=y # CONFIG_CMD_NFS is not set CONFIG_CMD_MII=y CONFIG_CMD_PING=y diff --git a/configs/brppt2_defconfig b/configs/brppt2_defconfig index ddcf8ee..cd53e21 100644 --- a/configs/brppt2_defconfig +++ b/configs/brppt2_defconfig @@ -52,6 +52,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_MAY_FAIL=y # CONFIG_CMD_NFS is not set CONFIG_CMD_MII=y CONFIG_CMD_CACHE=y diff --git a/configs/brsmarc1_defconfig b/configs/brsmarc1_defconfig index 343d75a..5d1a8af 100644 --- a/configs/brsmarc1_defconfig +++ b/configs/brsmarc1_defconfig @@ -65,6 +65,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_ITEST is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_MAY_FAIL=y # CONFIG_CMD_NFS is not set CONFIG_CMD_MII=y CONFIG_CMD_PING=y diff --git a/configs/brxre1_defconfig b/configs/brxre1_defconfig index a30c1b8..ca29f9b 100644 --- a/configs/brxre1_defconfig +++ b/configs/brxre1_defconfig @@ -56,6 +56,7 @@ CONFIG_CMD_PART=y CONFIG_CMD_USB=y # CONFIG_CMD_ITEST is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_MAY_FAIL=y # CONFIG_CMD_NFS is not set CONFIG_CMD_MII=y CONFIG_CMD_PING=y diff --git a/configs/cherryhill_defconfig b/configs/cherryhill_defconfig index 7bfbcf6..38302dd 100644 --- a/configs/cherryhill_defconfig +++ b/configs/cherryhill_defconfig @@ -25,6 +25,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y @@ -37,6 +38,8 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig index 0cd8f39..70d62c0 100644 --- a/configs/chromebook_coral_defconfig +++ b/configs/chromebook_coral_defconfig @@ -59,6 +59,7 @@ CONFIG_CMD_READ=y CONFIG_CMD_SATA=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_TIME=y CONFIG_CMD_SOUND=y CONFIG_CMD_BOOTSTAGE=y @@ -77,6 +78,8 @@ CONFIG_EFI_PARTITION=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_OF_SPL_REMOVE_PROPS="clocks clock-names interrupt-parent interrupts linux-name acpi,name acpi,path u-boot,acpi-dsdt-order u-boot,acpi-ssdt-order" CONFIG_ENV_OVERWRITE=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/chromebook_link64_defconfig b/configs/chromebook_link64_defconfig index a575437..b29c5cc 100644 --- a/configs/chromebook_link64_defconfig +++ b/configs/chromebook_link64_defconfig @@ -48,6 +48,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y @@ -61,6 +62,8 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig index 4bb52b6..9186621 100644 --- a/configs/chromebook_link_defconfig +++ b/configs/chromebook_link_defconfig @@ -35,6 +35,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y @@ -52,6 +53,8 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/chromebook_samus_defconfig b/configs/chromebook_samus_defconfig index fc1292b..93f1d40 100644 --- a/configs/chromebook_samus_defconfig +++ b/configs/chromebook_samus_defconfig @@ -37,6 +37,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y @@ -54,6 +55,8 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/chromebook_samus_tpl_defconfig b/configs/chromebook_samus_tpl_defconfig index 6839d8c..ef1d770 100644 --- a/configs/chromebook_samus_tpl_defconfig +++ b/configs/chromebook_samus_tpl_defconfig @@ -71,6 +71,8 @@ CONFIG_EFI_PARTITION=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" # CONFIG_NET is not set CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/chromebox_panther_defconfig b/configs/chromebox_panther_defconfig index 748a0e7..363b5f3 100644 --- a/configs/chromebox_panther_defconfig +++ b/configs/chromebox_panther_defconfig @@ -30,6 +30,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y @@ -46,6 +47,8 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/cobra5272_defconfig b/configs/cobra5272_defconfig index 4fc3b0a..ce1c4e0 100644 --- a/configs/cobra5272_defconfig +++ b/configs/cobra5272_defconfig @@ -15,6 +15,7 @@ CONFIG_CMD_IMLS=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_ENV_ADDR=0xFFE04000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y diff --git a/configs/colibri_pxa270_defconfig b/configs/colibri_pxa270_defconfig index 0116cfa..a955ba5 100644 --- a/configs/colibri_pxa270_defconfig +++ b/configs/colibri_pxa270_defconfig @@ -31,6 +31,7 @@ CONFIG_CMD_DM=y CONFIG_CMD_MMC=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y diff --git a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig index c1cf8cc..1c5efec 100644 --- a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig +++ b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig @@ -41,6 +41,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y @@ -55,6 +56,8 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/conga-qeval20-qa3-e3845_defconfig b/configs/conga-qeval20-qa3-e3845_defconfig index 5cad4d7..5aba0e2 100644 --- a/configs/conga-qeval20-qa3-e3845_defconfig +++ b/configs/conga-qeval20-qa3-e3845_defconfig @@ -37,6 +37,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y @@ -51,6 +52,8 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/controlcenterdc_defconfig b/configs/controlcenterdc_defconfig index fa41c5e..657af57 100644 --- a/configs/controlcenterdc_defconfig +++ b/configs/controlcenterdc_defconfig @@ -57,6 +57,8 @@ CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="ccdc.img" CONFIG_SPL_OF_TRANSLATE=y CONFIG_SCSI_AHCI=y CONFIG_DM_PCA953X=y diff --git a/configs/coreboot64_defconfig b/configs/coreboot64_defconfig index 933bea6..79b42a8 100644 --- a/configs/coreboot64_defconfig +++ b/configs/coreboot64_defconfig @@ -26,6 +26,7 @@ CONFIG_CMD_PART=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y @@ -43,6 +44,8 @@ CONFIG_EFI_PARTITION=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/coreboot_defconfig b/configs/coreboot_defconfig index dcf8ab3..5a0bf1f 100644 --- a/configs/coreboot_defconfig +++ b/configs/coreboot_defconfig @@ -24,6 +24,7 @@ CONFIG_CMD_PART=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y @@ -38,6 +39,8 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/cortina_presidio-asic-emmc_defconfig b/configs/cortina_presidio-asic-emmc_defconfig index cbabdab..00ea238 100644 --- a/configs/cortina_presidio-asic-emmc_defconfig +++ b/configs/cortina_presidio-asic-emmc_defconfig @@ -20,6 +20,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PART=y CONFIG_CMD_WDT=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIMER=y CONFIG_CMD_SMC=y diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig index d448113..4688e0a 100644 --- a/configs/corvus_defconfig +++ b/configs/corvus_defconfig @@ -46,6 +46,7 @@ CONFIG_CMD_USB=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_MTDPARTS=y CONFIG_DOS_PARTITION=y diff --git a/configs/cougarcanyon2_defconfig b/configs/cougarcanyon2_defconfig index 073807b..9226c78 100644 --- a/configs/cougarcanyon2_defconfig +++ b/configs/cougarcanyon2_defconfig @@ -28,6 +28,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y @@ -41,6 +42,8 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig index f7dc932..590fee9 100644 --- a/configs/crownbay_defconfig +++ b/configs/crownbay_defconfig @@ -31,6 +31,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y @@ -45,6 +46,8 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig index 0c27677..bbd1401 100644 --- a/configs/da850evm_defconfig +++ b/configs/da850evm_defconfig @@ -61,6 +61,8 @@ CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_DM=y diff --git a/configs/da850evm_direct_nor_defconfig b/configs/da850evm_direct_nor_defconfig index 694e17c..d40f875 100644 --- a/configs/da850evm_direct_nor_defconfig +++ b/configs/da850evm_direct_nor_defconfig @@ -47,6 +47,8 @@ CONFIG_CMD_DIAG=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0x60100000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_DM=y diff --git a/configs/da850evm_nand_defconfig b/configs/da850evm_nand_defconfig index aeb9c35..5d417a8 100644 --- a/configs/da850evm_nand_defconfig +++ b/configs/da850evm_nand_defconfig @@ -58,6 +58,8 @@ CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_DM=y diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig index af17900..2210fab 100644 --- a/configs/devkit3250_defconfig +++ b/configs/devkit3250_defconfig @@ -41,6 +41,8 @@ CONFIG_CMD_FAT=y CONFIG_CMD_JFFS2=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y CONFIG_DMA_LPC32XX=y CONFIG_LPC32XX_GPIO=y diff --git a/configs/devkit8000_defconfig b/configs/devkit8000_defconfig index 6f03714..a0e423d 100644 --- a/configs/devkit8000_defconfig +++ b/configs/devkit8000_defconfig @@ -26,7 +26,9 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_NAND_LOCK_UNLOCK=y # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_BOOTP_DNS2=y +CONFIG_BOOTP_NISDOMAIN=y CONFIG_BOOTP_NTPSERVER=y CONFIG_CMD_JFFS2=y CONFIG_JFFS2_DEV="nand0" diff --git a/configs/dfi-bt700-q7x-151_defconfig b/configs/dfi-bt700-q7x-151_defconfig index 60077ed..0dfb7bb 100644 --- a/configs/dfi-bt700-q7x-151_defconfig +++ b/configs/dfi-bt700-q7x-151_defconfig @@ -35,6 +35,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y @@ -49,6 +50,8 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/dragonboard410c_defconfig b/configs/dragonboard410c_defconfig index a6a0c66..ce90b7f 100644 --- a/configs/dragonboard410c_defconfig +++ b/configs/dragonboard410c_defconfig @@ -25,6 +25,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIMER=y CONFIG_ENV_IS_IN_MMC=y diff --git a/configs/dragonboard820c_defconfig b/configs/dragonboard820c_defconfig index 7a9771e..b780a32 100644 --- a/configs/dragonboard820c_defconfig +++ b/configs/dragonboard820c_defconfig @@ -21,6 +21,7 @@ CONFIG_CMD_MEMINFO=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIMER=y CONFIG_CMD_PMIC=y diff --git a/configs/eb_cpu5282_defconfig b/configs/eb_cpu5282_defconfig index f695429..d93104e 100644 --- a/configs/eb_cpu5282_defconfig +++ b/configs/eb_cpu5282_defconfig @@ -18,6 +18,7 @@ CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_DATE=y CONFIG_ENV_ADDR=0xFF040000 diff --git a/configs/eb_cpu5282_internal_defconfig b/configs/eb_cpu5282_internal_defconfig index 0c00ead..f9a00b8 100644 --- a/configs/eb_cpu5282_internal_defconfig +++ b/configs/eb_cpu5282_internal_defconfig @@ -17,6 +17,7 @@ CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_DATE=y CONFIG_ENV_ADDR=0xFF040000 diff --git a/configs/efi-x86_app32_defconfig b/configs/efi-x86_app32_defconfig index bb4c405..228643a 100644 --- a/configs/efi-x86_app32_defconfig +++ b/configs/efi-x86_app32_defconfig @@ -32,6 +32,8 @@ CONFIG_EFI_PARTITION=y CONFIG_OF_EMBED=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_REGMAP=y CONFIG_SYSCON=y # CONFIG_REGEX is not set diff --git a/configs/efi-x86_app64_defconfig b/configs/efi-x86_app64_defconfig index 3a2e789..1ed2f13 100644 --- a/configs/efi-x86_app64_defconfig +++ b/configs/efi-x86_app64_defconfig @@ -32,6 +32,8 @@ CONFIG_EFI_PARTITION=y CONFIG_OF_EMBED=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_REGMAP=y CONFIG_SYSCON=y # CONFIG_REGEX is not set diff --git a/configs/efi-x86_payload32_defconfig b/configs/efi-x86_payload32_defconfig index 04573fc..ceadd82 100644 --- a/configs/efi-x86_payload32_defconfig +++ b/configs/efi-x86_payload32_defconfig @@ -23,6 +23,7 @@ CONFIG_CMD_PART=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y @@ -36,6 +37,8 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/efi-x86_payload64_defconfig b/configs/efi-x86_payload64_defconfig index df904c8..b5d1cf1 100644 --- a/configs/efi-x86_payload64_defconfig +++ b/configs/efi-x86_payload64_defconfig @@ -23,6 +23,7 @@ CONFIG_CMD_PART=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y @@ -36,6 +37,8 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/emsdp_defconfig b/configs/emsdp_defconfig index 75a3d93..28fce77 100644 --- a/configs/emsdp_defconfig +++ b/configs/emsdp_defconfig @@ -22,6 +22,8 @@ CONFIG_OF_EMBED=y CONFIG_ENV_IS_IN_FAT=y CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="app.bin" CONFIG_VERSION_VARIABLE=y # CONFIG_NET is not set CONFIG_MMC=y diff --git a/configs/ethernut5_defconfig b/configs/ethernut5_defconfig index 658fbfe..1bb0aa7 100644 --- a/configs/ethernut5_defconfig +++ b/configs/ethernut5_defconfig @@ -35,6 +35,7 @@ CONFIG_CMD_NAND=y CONFIG_CMD_SAVES=y CONFIG_CMD_SPI=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_RARP=y CONFIG_CMD_MII=y # CONFIG_CMD_MDIO is not set diff --git a/configs/evb-ast2500_defconfig b/configs/evb-ast2500_defconfig index ea00185..03c5cc6 100644 --- a/configs/evb-ast2500_defconfig +++ b/configs/evb-ast2500_defconfig @@ -21,6 +21,7 @@ CONFIG_HUSH_PARSER=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_ENV_OVERWRITE=y diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig index 172b08e..17d6dcb 100644 --- a/configs/evb-ast2600_defconfig +++ b/configs/evb-ast2600_defconfig @@ -42,6 +42,7 @@ CONFIG_HUSH_PARSER=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_SPL_OF_CONTROL=y diff --git a/configs/galileo_defconfig b/configs/galileo_defconfig index 0a4c207..58c8bb9 100644 --- a/configs/galileo_defconfig +++ b/configs/galileo_defconfig @@ -27,6 +27,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y @@ -40,6 +41,8 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y diff --git a/configs/gazerbeam_defconfig b/configs/gazerbeam_defconfig index 199afb4..03cad40 100644 --- a/configs/gazerbeam_defconfig +++ b/configs/gazerbeam_defconfig @@ -152,6 +152,8 @@ CONFIG_ENV_OVERWRITE=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_ADDR=0xFE080000 CONFIG_ENV_ADDR_REDUND=0xFE090000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_REGMAP=y CONFIG_AXI=y diff --git a/configs/gurnard_defconfig b/configs/gurnard_defconfig index 05e9d18..26b97b2 100644 --- a/configs/gurnard_defconfig +++ b/configs/gurnard_defconfig @@ -27,6 +27,7 @@ CONFIG_CMD_USB=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y # CONFIG_CMD_MDIO is not set CONFIG_CMD_PING=y diff --git a/configs/hikey_defconfig b/configs/hikey_defconfig index 9f1ce4e..3bf235d 100644 --- a/configs/hikey_defconfig +++ b/configs/hikey_defconfig @@ -20,6 +20,7 @@ CONFIG_MISC_INIT_R=y CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_CACHE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y diff --git a/configs/hsdk_4xd_defconfig b/configs/hsdk_4xd_defconfig index 792cc1a..d78261f 100644 --- a/configs/hsdk_4xd_defconfig +++ b/configs/hsdk_4xd_defconfig @@ -36,6 +36,8 @@ CONFIG_OF_EMBED=y CONFIG_ENV_IS_IN_FAT=y CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_CLK_HSDK=y CONFIG_HSDK_CREG_GPIO=y diff --git a/configs/hsdk_defconfig b/configs/hsdk_defconfig index c72ad9f..cd9f697 100644 --- a/configs/hsdk_defconfig +++ b/configs/hsdk_defconfig @@ -35,6 +35,8 @@ CONFIG_OF_EMBED=y CONFIG_ENV_IS_IN_FAT=y CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_CLK_HSDK=y CONFIG_HSDK_CREG_GPIO=y diff --git a/configs/ids8313_defconfig b/configs/ids8313_defconfig index 246cc3d..64e2a4c 100644 --- a/configs/ids8313_defconfig +++ b/configs/ids8313_defconfig @@ -142,6 +142,7 @@ CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_SNTP=y @@ -154,6 +155,8 @@ CONFIG_CMD_UBI=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_ADDR=0xFFFC0000 CONFIG_ENV_ADDR_REDUND=0xFFFE0000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="ids8313/uImage" CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_I2C=y diff --git a/configs/imx28_xea_defconfig b/configs/imx28_xea_defconfig index 4273b4b..418bd06 100644 --- a/configs/imx28_xea_defconfig +++ b/configs/imx28_xea_defconfig @@ -74,6 +74,8 @@ CONFIG_SPL_OF_PLATDATA=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SPL_DM=y diff --git a/configs/imx28_xea_sb_defconfig b/configs/imx28_xea_sb_defconfig index 332ff3f..7c777a5 100644 --- a/configs/imx28_xea_sb_defconfig +++ b/configs/imx28_xea_sb_defconfig @@ -60,6 +60,8 @@ CONFIG_SPL_OF_PLATDATA=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SPL_DM=y diff --git a/configs/integratorap_cm720t_defconfig b/configs/integratorap_cm720t_defconfig index 420aae6..7b970b9 100644 --- a/configs/integratorap_cm720t_defconfig +++ b/configs/integratorap_cm720t_defconfig @@ -20,6 +20,7 @@ CONFIG_SYS_PROMPT="Integrator-AP # " CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y diff --git a/configs/integratorap_cm920t_defconfig b/configs/integratorap_cm920t_defconfig index 3ff47e1..05aa6dc 100644 --- a/configs/integratorap_cm920t_defconfig +++ b/configs/integratorap_cm920t_defconfig @@ -20,6 +20,7 @@ CONFIG_SYS_PROMPT="Integrator-AP # " CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y diff --git a/configs/integratorap_cm926ejs_defconfig b/configs/integratorap_cm926ejs_defconfig index 2160887..52973da 100644 --- a/configs/integratorap_cm926ejs_defconfig +++ b/configs/integratorap_cm926ejs_defconfig @@ -20,6 +20,7 @@ CONFIG_SYS_PROMPT="Integrator-AP # " CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y diff --git a/configs/integratorap_cm946es_defconfig b/configs/integratorap_cm946es_defconfig index b384dc6..336f1d3 100644 --- a/configs/integratorap_cm946es_defconfig +++ b/configs/integratorap_cm946es_defconfig @@ -20,6 +20,7 @@ CONFIG_SYS_PROMPT="Integrator-AP # " CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y diff --git a/configs/integratorcp_cm1136_defconfig b/configs/integratorcp_cm1136_defconfig index ba6450b..4cfe0bd 100644 --- a/configs/integratorcp_cm1136_defconfig +++ b/configs/integratorcp_cm1136_defconfig @@ -23,6 +23,8 @@ CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_SETEXPR is not set CONFIG_ENV_ADDR=0x24F00000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y diff --git a/configs/integratorcp_cm920t_defconfig b/configs/integratorcp_cm920t_defconfig index 06bfdff..ddff8ac 100644 --- a/configs/integratorcp_cm920t_defconfig +++ b/configs/integratorcp_cm920t_defconfig @@ -23,6 +23,8 @@ CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_SETEXPR is not set CONFIG_ENV_ADDR=0x24F00000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y diff --git a/configs/integratorcp_cm926ejs_defconfig b/configs/integratorcp_cm926ejs_defconfig index 3d15887..87e2a97 100644 --- a/configs/integratorcp_cm926ejs_defconfig +++ b/configs/integratorcp_cm926ejs_defconfig @@ -23,6 +23,8 @@ CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_SETEXPR is not set CONFIG_ENV_ADDR=0x24F00000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y diff --git a/configs/integratorcp_cm946es_defconfig b/configs/integratorcp_cm946es_defconfig index 8d49ef4..c1868fb 100644 --- a/configs/integratorcp_cm946es_defconfig +++ b/configs/integratorcp_cm946es_defconfig @@ -23,6 +23,8 @@ CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_SETEXPR is not set CONFIG_ENV_ADDR=0x24F00000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y diff --git a/configs/iot_devkit_defconfig b/configs/iot_devkit_defconfig index 431491e..14a30e3 100644 --- a/configs/iot_devkit_defconfig +++ b/configs/iot_devkit_defconfig @@ -27,6 +27,8 @@ CONFIG_OF_EMBED=y CONFIG_ENV_IS_IN_FAT=y CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="app.bin" # CONFIG_NET is not set CONFIG_MMC=y CONFIG_MMC_DW=y diff --git a/configs/km_kirkwood_128m16_defconfig b/configs/km_kirkwood_128m16_defconfig index f4b1abf..75f8a0b 100644 --- a/configs/km_kirkwood_128m16_defconfig +++ b/configs/km_kirkwood_128m16_defconfig @@ -33,6 +33,7 @@ CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_MTDPARTS=y diff --git a/configs/km_kirkwood_defconfig b/configs/km_kirkwood_defconfig index eba4f09..44a87ca 100644 --- a/configs/km_kirkwood_defconfig +++ b/configs/km_kirkwood_defconfig @@ -33,6 +33,7 @@ CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_MTDPARTS=y diff --git a/configs/km_kirkwood_pci_defconfig b/configs/km_kirkwood_pci_defconfig index 5d19c51..e4bd6df 100644 --- a/configs/km_kirkwood_pci_defconfig +++ b/configs/km_kirkwood_pci_defconfig @@ -34,6 +34,7 @@ CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_MTDPARTS=y diff --git a/configs/kmcent2_defconfig b/configs/kmcent2_defconfig index cf0748c..40f471e 100644 --- a/configs/kmcent2_defconfig +++ b/configs/kmcent2_defconfig @@ -27,6 +27,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_MTD=y CONFIG_CMD_NAND_TRIMFFS=y CONFIG_CMD_SPI=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_ETHSW=y CONFIG_CMD_CRAMFS=y @@ -47,6 +48,7 @@ CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_SYS_FSL_DDR3=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_FSL=y diff --git a/configs/kmcoge5ne_defconfig b/configs/kmcoge5ne_defconfig index 53f7abc..b4e2938 100644 --- a/configs/kmcoge5ne_defconfig +++ b/configs/kmcoge5ne_defconfig @@ -178,6 +178,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y # CONFIG_CMD_PINMUX is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_JFFS2=y diff --git a/configs/kmcoge5un_defconfig b/configs/kmcoge5un_defconfig index 9124504..61a6502 100644 --- a/configs/kmcoge5un_defconfig +++ b/configs/kmcoge5un_defconfig @@ -37,6 +37,7 @@ CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_MTDPARTS=y diff --git a/configs/kmeter1_defconfig b/configs/kmeter1_defconfig index 228bbe6..510ff45 100644 --- a/configs/kmeter1_defconfig +++ b/configs/kmeter1_defconfig @@ -147,6 +147,7 @@ CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 CONFIG_CMD_I2C=y # CONFIG_CMD_PINMUX is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_JFFS2=y diff --git a/configs/kmnusa_defconfig b/configs/kmnusa_defconfig index d81c787..b8433b7 100644 --- a/configs/kmnusa_defconfig +++ b/configs/kmnusa_defconfig @@ -37,6 +37,7 @@ CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_MTDPARTS=y diff --git a/configs/kmopti2_defconfig b/configs/kmopti2_defconfig index d230638..9bdd7ae 100644 --- a/configs/kmopti2_defconfig +++ b/configs/kmopti2_defconfig @@ -159,6 +159,7 @@ CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 CONFIG_CMD_I2C=y # CONFIG_CMD_PINMUX is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_JFFS2=y diff --git a/configs/kmsupx5_defconfig b/configs/kmsupx5_defconfig index b0b5926..0fd6ec7 100644 --- a/configs/kmsupx5_defconfig +++ b/configs/kmsupx5_defconfig @@ -138,6 +138,7 @@ CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 CONFIG_CMD_I2C=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_JFFS2=y diff --git a/configs/kmsuse2_defconfig b/configs/kmsuse2_defconfig index d274c95..43db187 100644 --- a/configs/kmsuse2_defconfig +++ b/configs/kmsuse2_defconfig @@ -38,6 +38,7 @@ CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_MTDPARTS=y diff --git a/configs/kmtegr1_defconfig b/configs/kmtegr1_defconfig index 53aaf6c..42990da 100644 --- a/configs/kmtegr1_defconfig +++ b/configs/kmtegr1_defconfig @@ -139,6 +139,7 @@ CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_JFFS2=y diff --git a/configs/kmtepr2_defconfig b/configs/kmtepr2_defconfig index b333769..fff5b1d 100644 --- a/configs/kmtepr2_defconfig +++ b/configs/kmtepr2_defconfig @@ -158,6 +158,7 @@ CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 CONFIG_CMD_I2C=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_JFFS2=y diff --git a/configs/legoev3_defconfig b/configs/legoev3_defconfig index 87890cd..d616610 100644 --- a/configs/legoev3_defconfig +++ b/configs/legoev3_defconfig @@ -36,6 +36,8 @@ CONFIG_CMD_FAT=y CONFIG_CMD_DIAG=y CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y # CONFIG_NET is not set CONFIG_DM=y diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig index 925d68d..1bc73db 100644 --- a/configs/ls1021aqds_ddr4_nor_defconfig +++ b/configs/ls1021aqds_ddr4_nor_defconfig @@ -65,6 +65,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_BANKS=2 diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig index c71c864..2a3348f 100644 --- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig +++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig @@ -66,6 +66,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_BANKS=2 diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig index 58629be..c31047f 100644 --- a/configs/ls1021aqds_nand_defconfig +++ b/configs/ls1021aqds_nand_defconfig @@ -87,6 +87,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_BANKS=2 diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig index d252ed4..7ad5c16 100644 --- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig @@ -64,6 +64,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_BANKS=2 diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig index fb9f457..3e8b34b 100644 --- a/configs/ls1021aqds_nor_defconfig +++ b/configs/ls1021aqds_nor_defconfig @@ -66,6 +66,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_BANKS=2 diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig index 1d6d88f..fdfcf9d 100644 --- a/configs/ls1021aqds_nor_lpuart_defconfig +++ b/configs/ls1021aqds_nor_lpuart_defconfig @@ -67,6 +67,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_BANKS=2 diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig index 38b1704..29045bf 100644 --- a/configs/ls1021aqds_sdcard_ifc_defconfig +++ b/configs/ls1021aqds_sdcard_ifc_defconfig @@ -84,6 +84,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_BANKS=2 diff --git a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig index 2f66d83..834a2d3 100644 --- a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig @@ -54,6 +54,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_ATHEROS=y diff --git a/configs/ls1021atwr_nor_defconfig b/configs/ls1021atwr_nor_defconfig index c1adc6e..a31560a 100644 --- a/configs/ls1021atwr_nor_defconfig +++ b/configs/ls1021atwr_nor_defconfig @@ -56,6 +56,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_ATHEROS=y diff --git a/configs/ls1021atwr_nor_lpuart_defconfig b/configs/ls1021atwr_nor_lpuart_defconfig index 150179d..427fa1b 100644 --- a/configs/ls1021atwr_nor_lpuart_defconfig +++ b/configs/ls1021atwr_nor_lpuart_defconfig @@ -57,6 +57,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_ATHEROS=y diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig index a8288e9..0139f03 100644 --- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig @@ -74,6 +74,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_ATHEROS=y diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig index 695505a..aec9e5c7 100644 --- a/configs/ls1021atwr_sdcard_ifc_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_defconfig @@ -74,6 +74,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_ATHEROS=y diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig index ef1a591..ad59689 100644 --- a/configs/ls1043aqds_defconfig +++ b/configs/ls1043aqds_defconfig @@ -65,6 +65,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig index 8dd6ce4..d583573 100644 --- a/configs/ls1043aqds_lpuart_defconfig +++ b/configs/ls1043aqds_lpuart_defconfig @@ -66,6 +66,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig index 3e54803..8027b01 100644 --- a/configs/ls1043aqds_nand_defconfig +++ b/configs/ls1043aqds_nand_defconfig @@ -85,6 +85,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_NAND_FSL_IFC=y diff --git a/configs/ls1043aqds_nor_ddr3_defconfig b/configs/ls1043aqds_nor_ddr3_defconfig index 97fe2ce..5be7e4c 100644 --- a/configs/ls1043aqds_nor_ddr3_defconfig +++ b/configs/ls1043aqds_nor_ddr3_defconfig @@ -66,6 +66,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig index be40f49..dd36d81 100644 --- a/configs/ls1043aqds_sdcard_ifc_defconfig +++ b/configs/ls1043aqds_sdcard_ifc_defconfig @@ -84,6 +84,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig index e196c44..7fadadb 100644 --- a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig @@ -65,6 +65,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/ls1043aqds_tfa_defconfig b/configs/ls1043aqds_tfa_defconfig index 6a89794..5510d50 100644 --- a/configs/ls1043aqds_tfa_defconfig +++ b/configs/ls1043aqds_tfa_defconfig @@ -74,6 +74,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig index e7c277d..c0ffae9 100644 --- a/configs/ls1043ardb_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_SECURE_BOOT_defconfig @@ -47,6 +47,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig index 94daa1f..173109e 100644 --- a/configs/ls1043ardb_defconfig +++ b/configs/ls1043ardb_defconfig @@ -50,6 +50,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig index a86138f..37687fc 100644 --- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig @@ -61,6 +61,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_NAND_FSL_IFC=y diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig index 19a54d1..a8dc348 100644 --- a/configs/ls1043ardb_nand_defconfig +++ b/configs/ls1043ardb_nand_defconfig @@ -69,6 +69,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_NAND_FSL_IFC=y diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig index 61e3482..bd1c455 100644 --- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig @@ -63,6 +63,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig index ef82842..0976b96 100644 --- a/configs/ls1043ardb_sdcard_defconfig +++ b/configs/ls1043ardb_sdcard_defconfig @@ -68,6 +68,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig index 6ff5614..4b0ef66 100644 --- a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig @@ -48,6 +48,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/ls1043ardb_tfa_defconfig b/configs/ls1043ardb_tfa_defconfig index 551807e..ea5d004 100644 --- a/configs/ls1043ardb_tfa_defconfig +++ b/configs/ls1043ardb_tfa_defconfig @@ -54,6 +54,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/ls1046aqds_SECURE_BOOT_defconfig b/configs/ls1046aqds_SECURE_BOOT_defconfig index c15302c..bbeea5a 100644 --- a/configs/ls1046aqds_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_SECURE_BOOT_defconfig @@ -62,6 +62,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_BANKS=2 diff --git a/configs/ls1046aqds_defconfig b/configs/ls1046aqds_defconfig index bc32611..f1f82d7 100644 --- a/configs/ls1046aqds_defconfig +++ b/configs/ls1046aqds_defconfig @@ -65,6 +65,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_BANKS=2 diff --git a/configs/ls1046aqds_lpuart_defconfig b/configs/ls1046aqds_lpuart_defconfig index 52855d1..282cb43 100644 --- a/configs/ls1046aqds_lpuart_defconfig +++ b/configs/ls1046aqds_lpuart_defconfig @@ -66,6 +66,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_BANKS=2 diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig index ab780c1..9f158aa 100644 --- a/configs/ls1046aqds_nand_defconfig +++ b/configs/ls1046aqds_nand_defconfig @@ -84,6 +84,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_BANKS=2 diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig index b5b501c..f906202 100644 --- a/configs/ls1046aqds_sdcard_ifc_defconfig +++ b/configs/ls1046aqds_sdcard_ifc_defconfig @@ -85,6 +85,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_BANKS=2 diff --git a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig index 740838b..5d71bbe 100644 --- a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig @@ -65,6 +65,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_BANKS=2 diff --git a/configs/ls1046aqds_tfa_defconfig b/configs/ls1046aqds_tfa_defconfig index 11de0d4..b817907 100644 --- a/configs/ls1046aqds_tfa_defconfig +++ b/configs/ls1046aqds_tfa_defconfig @@ -74,6 +74,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_BANKS=2 diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig index c713a44..5d8dd4b 100644 --- a/configs/m53menlo_defconfig +++ b/configs/m53menlo_defconfig @@ -67,6 +67,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="boot/fitImage" CONFIG_VERSION_VARIABLE=y CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y diff --git a/configs/meesc_dataflash_defconfig b/configs/meesc_dataflash_defconfig index 5d9f783..0d09d91 100644 --- a/configs/meesc_dataflash_defconfig +++ b/configs/meesc_dataflash_defconfig @@ -25,6 +25,7 @@ CONFIG_CMD_BOOTZ=y # CONFIG_CMD_LOADS is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y diff --git a/configs/meesc_defconfig b/configs/meesc_defconfig index cc7697b..e9f7288 100644 --- a/configs/meesc_defconfig +++ b/configs/meesc_defconfig @@ -24,6 +24,7 @@ CONFIG_CMD_BOOTZ=y CONFIG_CMD_NAND=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig index 5409ca7..b59445e 100644 --- a/configs/microblaze-generic_defconfig +++ b/configs/microblaze-generic_defconfig @@ -35,6 +35,7 @@ CONFIG_CMD_ASKENV=y CONFIG_CMD_GPIO=y CONFIG_CMD_SAVES=y # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_CACHE=y CONFIG_CMD_JFFS2=y diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig index c4d37db..c051e00 100644 --- a/configs/minnowmax_defconfig +++ b/configs/minnowmax_defconfig @@ -40,6 +40,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y @@ -54,6 +55,8 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/mx23_olinuxino_defconfig b/configs/mx23_olinuxino_defconfig index fc1606a..062d922 100644 --- a/configs/mx23_olinuxino_defconfig +++ b/configs/mx23_olinuxino_defconfig @@ -35,6 +35,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y CONFIG_DM=y CONFIG_MXS_GPIO=y diff --git a/configs/mx23evk_defconfig b/configs/mx23evk_defconfig index f51398c..d48ac4c 100644 --- a/configs/mx23evk_defconfig +++ b/configs/mx23evk_defconfig @@ -36,6 +36,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y # CONFIG_NET is not set CONFIG_DM=y diff --git a/configs/mx28evk_auart_console_defconfig b/configs/mx28evk_auart_console_defconfig index 22310f5..0b0459e 100644 --- a/configs/mx28evk_auart_console_defconfig +++ b/configs/mx28evk_auart_console_defconfig @@ -43,6 +43,8 @@ CONFIG_CMD_UBI=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y CONFIG_MXS_GPIO=y CONFIG_MMC_MXS=y diff --git a/configs/mx28evk_defconfig b/configs/mx28evk_defconfig index b7502aa..4bd9982 100644 --- a/configs/mx28evk_defconfig +++ b/configs/mx28evk_defconfig @@ -44,6 +44,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y # CONFIG_NET is not set CONFIG_DM=y diff --git a/configs/mx28evk_nand_defconfig b/configs/mx28evk_nand_defconfig index 090e5fa..7ffdb81 100644 --- a/configs/mx28evk_nand_defconfig +++ b/configs/mx28evk_nand_defconfig @@ -44,6 +44,8 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y CONFIG_MXS_GPIO=y CONFIG_MMC_MXS=y diff --git a/configs/mx28evk_spi_defconfig b/configs/mx28evk_spi_defconfig index 6cb21b9..1bac585 100644 --- a/configs/mx28evk_spi_defconfig +++ b/configs/mx28evk_spi_defconfig @@ -40,6 +40,8 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:3m(bootloader)ro,512k(environment),5 CONFIG_CMD_UBI=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y CONFIG_MXS_GPIO=y CONFIG_MMC_MXS=y diff --git a/configs/novena_defconfig b/configs/novena_defconfig index 664a9b2..db33d11 100644 --- a/configs/novena_defconfig +++ b/configs/novena_defconfig @@ -52,6 +52,8 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="fitImage" CONFIG_VERSION_VARIABLE=y CONFIG_NETCONSOLE=y CONFIG_DM=y diff --git a/configs/nsim_700_defconfig b/configs/nsim_700_defconfig index 3607583..71d6fe5 100644 --- a/configs/nsim_700_defconfig +++ b/configs/nsim_700_defconfig @@ -17,6 +17,8 @@ CONFIG_SYS_PROMPT="nsim# " CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" # CONFIG_NET is not set CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_SHIFT=2 diff --git a/configs/nsim_700be_defconfig b/configs/nsim_700be_defconfig index 2d8a3e4..954ea42 100644 --- a/configs/nsim_700be_defconfig +++ b/configs/nsim_700be_defconfig @@ -18,6 +18,8 @@ CONFIG_SYS_PROMPT="nsim# " CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" # CONFIG_NET is not set CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_SHIFT=2 diff --git a/configs/nsim_hs38_defconfig b/configs/nsim_hs38_defconfig index 51ce560..60b7a01 100644 --- a/configs/nsim_hs38_defconfig +++ b/configs/nsim_hs38_defconfig @@ -21,6 +21,8 @@ CONFIG_CMD_DHCP=y CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_BLK=y CONFIG_HAVE_BLOCK_DEVICE=y CONFIG_DM_ETH=y diff --git a/configs/nsim_hs38be_defconfig b/configs/nsim_hs38be_defconfig index 60e6094..bd1cdf3 100644 --- a/configs/nsim_hs38be_defconfig +++ b/configs/nsim_hs38be_defconfig @@ -19,6 +19,8 @@ CONFIG_SYS_PROMPT="nsim# " CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" # CONFIG_NET is not set CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_SHIFT=2 diff --git a/configs/octeontx2_95xx_defconfig b/configs/octeontx2_95xx_defconfig index d29c850..823e3e4 100644 --- a/configs/octeontx2_95xx_defconfig +++ b/configs/octeontx2_95xx_defconfig @@ -47,6 +47,7 @@ CONFIG_CMD_PCI=y CONFIG_CMD_SF_TEST=y CONFIG_CMD_WDT=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_TFTPSRV=y CONFIG_CMD_RARP=y diff --git a/configs/octeontx2_96xx_defconfig b/configs/octeontx2_96xx_defconfig index 1ce892d..28c093e 100644 --- a/configs/octeontx2_96xx_defconfig +++ b/configs/octeontx2_96xx_defconfig @@ -48,6 +48,7 @@ CONFIG_CMD_SF_TEST=y CONFIG_CMD_USB=y CONFIG_CMD_WDT=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_TFTPSRV=y CONFIG_CMD_RARP=y diff --git a/configs/octeontx_81xx_defconfig b/configs/octeontx_81xx_defconfig index ddb9007..5eab817 100644 --- a/configs/octeontx_81xx_defconfig +++ b/configs/octeontx_81xx_defconfig @@ -48,6 +48,7 @@ CONFIG_CMD_SF_TEST=y CONFIG_CMD_USB=y CONFIG_CMD_WDT=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_TFTPSRV=y CONFIG_CMD_RARP=y diff --git a/configs/octeontx_83xx_defconfig b/configs/octeontx_83xx_defconfig index b8ebc28..6ad0359 100644 --- a/configs/octeontx_83xx_defconfig +++ b/configs/octeontx_83xx_defconfig @@ -46,6 +46,7 @@ CONFIG_CMD_SF_TEST=y CONFIG_CMD_USB=y CONFIG_CMD_WDT=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_TFTPSRV=y CONFIG_CMD_RARP=y diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig index ca1a581..cdba090 100644 --- a/configs/omapl138_lcdk_defconfig +++ b/configs/omapl138_lcdk_defconfig @@ -54,6 +54,8 @@ CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="zImage" CONFIG_VERSION_VARIABLE=y CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/pg_wcom_expu1_defconfig b/configs/pg_wcom_expu1_defconfig index f92532f..706aacf 100644 --- a/configs/pg_wcom_expu1_defconfig +++ b/configs/pg_wcom_expu1_defconfig @@ -45,6 +45,7 @@ CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_CRAMFS=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=60000000.nor,nand0=68000000.flash" @@ -66,6 +67,7 @@ CONFIG_SYS_I2C_LEGACY=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/pg_wcom_expu1_update_defconfig b/configs/pg_wcom_expu1_update_defconfig index 1020b68..9cd4798 100644 --- a/configs/pg_wcom_expu1_update_defconfig +++ b/configs/pg_wcom_expu1_update_defconfig @@ -43,6 +43,7 @@ CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_CRAMFS=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=60000000.nor,nand0=68000000.flash" @@ -64,6 +65,7 @@ CONFIG_SYS_I2C_LEGACY=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/pg_wcom_seli8_defconfig b/configs/pg_wcom_seli8_defconfig index 1a2ba8c..8ca1a60 100644 --- a/configs/pg_wcom_seli8_defconfig +++ b/configs/pg_wcom_seli8_defconfig @@ -45,6 +45,7 @@ CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_CRAMFS=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=60000000.nor,nand0=68000000.flash" @@ -66,6 +67,7 @@ CONFIG_SYS_I2C_LEGACY=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/pg_wcom_seli8_update_defconfig b/configs/pg_wcom_seli8_update_defconfig index 3a51d4e..5575ee8 100644 --- a/configs/pg_wcom_seli8_update_defconfig +++ b/configs/pg_wcom_seli8_update_defconfig @@ -43,6 +43,7 @@ CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_CRAMFS=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=60000000.nor,nand0=68000000.flash" @@ -64,6 +65,7 @@ CONFIG_SYS_I2C_LEGACY=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/pic32mzdask_defconfig b/configs/pic32mzdask_defconfig index 9d5aa3a..4efddc0 100644 --- a/configs/pic32mzdask_defconfig +++ b/configs/pic32mzdask_defconfig @@ -24,6 +24,7 @@ CONFIG_CMD_CLK=y CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_RARP=y CONFIG_CMD_TIME=y CONFIG_CMD_EXT4_WRITE=y diff --git a/configs/pm9263_defconfig b/configs/pm9263_defconfig index e8a5b4d..f0767a4 100644 --- a/configs/pm9263_defconfig +++ b/configs/pm9263_defconfig @@ -28,6 +28,7 @@ CONFIG_SYS_PROMPT="u-boot-pm9263> " CONFIG_CMD_NAND=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_JFFS2=y diff --git a/configs/pm9g45_defconfig b/configs/pm9g45_defconfig index 7fbbbab..96bd30c 100644 --- a/configs/pm9g45_defconfig +++ b/configs/pm9g45_defconfig @@ -33,6 +33,7 @@ CONFIG_CMD_NAND=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y diff --git a/configs/qemu-ppce500_defconfig b/configs/qemu-ppce500_defconfig index d1f928d..3b3632f 100644 --- a/configs/qemu-ppce500_defconfig +++ b/configs/qemu-ppce500_defconfig @@ -30,11 +30,14 @@ CONFIG_DOS_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SIMPLE_BUS_CORRECT_RANGE=y CONFIG_BLK=y CONFIG_HAVE_BLOCK_DEVICE=y +CONFIG_CHIP_SELECTS_PER_CTRL=0 CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_FSL=y diff --git a/configs/qemu-x86_64_defconfig b/configs/qemu-x86_64_defconfig index 591b311..36214fc 100644 --- a/configs/qemu-x86_64_defconfig +++ b/configs/qemu-x86_64_defconfig @@ -44,6 +44,7 @@ CONFIG_CMD_IDE=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_TIME=y CONFIG_CMD_QFW=y @@ -51,6 +52,8 @@ CONFIG_CMD_BOOTSTAGE=y CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/qemu-x86_defconfig b/configs/qemu-x86_defconfig index 928fa68..6010b61 100644 --- a/configs/qemu-x86_defconfig +++ b/configs/qemu-x86_defconfig @@ -26,6 +26,7 @@ CONFIG_CMD_IDE=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_TIME=y CONFIG_CMD_QFW=y @@ -34,6 +35,8 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_MAC_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/qemu_arm64_defconfig b/configs/qemu_arm64_defconfig index 606a7fd..62aa341 100644 --- a/configs/qemu_arm64_defconfig +++ b/configs/qemu_arm64_defconfig @@ -41,6 +41,7 @@ CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_CFI_FLASH=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/qemu_arm_defconfig b/configs/qemu_arm_defconfig index febf8f2..791a26c 100644 --- a/configs/qemu_arm_defconfig +++ b/configs/qemu_arm_defconfig @@ -43,6 +43,7 @@ CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_CFI_FLASH=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/r8a77990_ebisu_defconfig b/configs/r8a77990_ebisu_defconfig index 9470bee..0d8c9d5 100644 --- a/configs/r8a77990_ebisu_defconfig +++ b/configs/r8a77990_ebisu_defconfig @@ -68,6 +68,7 @@ CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_CFI_FLASH=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/r8a77995_draak_defconfig b/configs/r8a77995_draak_defconfig index ea94d5c..de9cfd9 100644 --- a/configs/r8a77995_draak_defconfig +++ b/configs/r8a77995_draak_defconfig @@ -62,6 +62,7 @@ CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_CFI_FLASH=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_CFI=y CONFIG_RENESAS_RPC_HF=y diff --git a/configs/rcar3_salvator-x_defconfig b/configs/rcar3_salvator-x_defconfig index d4dc8ec..5fb27d2 100644 --- a/configs/rcar3_salvator-x_defconfig +++ b/configs/rcar3_salvator-x_defconfig @@ -69,6 +69,7 @@ CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_CFI_FLASH=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/rcar3_ulcb_defconfig b/configs/rcar3_ulcb_defconfig index 3a5e433..ade9286 100644 --- a/configs/rcar3_ulcb_defconfig +++ b/configs/rcar3_ulcb_defconfig @@ -70,6 +70,7 @@ CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_CFI_FLASH=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/sam9x60ek_mmc_defconfig b/configs/sam9x60ek_mmc_defconfig index 59fc4a9..25181d7 100644 --- a/configs/sam9x60ek_mmc_defconfig +++ b/configs/sam9x60ek_mmc_defconfig @@ -36,6 +36,7 @@ CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y diff --git a/configs/sam9x60ek_nandflash_defconfig b/configs/sam9x60ek_nandflash_defconfig index 48b6a6a..a786f5a 100644 --- a/configs/sam9x60ek_nandflash_defconfig +++ b/configs/sam9x60ek_nandflash_defconfig @@ -37,6 +37,7 @@ CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y diff --git a/configs/sam9x60ek_qspiflash_defconfig b/configs/sam9x60ek_qspiflash_defconfig index 4e46e46..bc30c4c 100644 --- a/configs/sam9x60ek_qspiflash_defconfig +++ b/configs/sam9x60ek_qspiflash_defconfig @@ -38,6 +38,7 @@ CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y diff --git a/configs/sama5d27_som1_ek_mmc1_defconfig b/configs/sama5d27_som1_ek_mmc1_defconfig index afcd41a..c958f2a 100644 --- a/configs/sama5d27_som1_ek_mmc1_defconfig +++ b/configs/sama5d27_som1_ek_mmc1_defconfig @@ -44,6 +44,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y CONFIG_HASH_VERIFY=y diff --git a/configs/sama5d27_som1_ek_mmc_defconfig b/configs/sama5d27_som1_ek_mmc_defconfig index 149e480..279a5f3 100644 --- a/configs/sama5d27_som1_ek_mmc_defconfig +++ b/configs/sama5d27_som1_ek_mmc_defconfig @@ -45,6 +45,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y CONFIG_HASH_VERIFY=y diff --git a/configs/sama5d27_som1_ek_qspiflash_defconfig b/configs/sama5d27_som1_ek_qspiflash_defconfig index 3fb79be..8753790 100644 --- a/configs/sama5d27_som1_ek_qspiflash_defconfig +++ b/configs/sama5d27_som1_ek_qspiflash_defconfig @@ -43,6 +43,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y CONFIG_HASH_VERIFY=y diff --git a/configs/sama5d27_wlsom1_ek_mmc_defconfig b/configs/sama5d27_wlsom1_ek_mmc_defconfig index d1dee02..ac2e916 100644 --- a/configs/sama5d27_wlsom1_ek_mmc_defconfig +++ b/configs/sama5d27_wlsom1_ek_mmc_defconfig @@ -46,6 +46,7 @@ CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y diff --git a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig index 700aef7..a44ba50 100644 --- a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig +++ b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig @@ -50,6 +50,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y diff --git a/configs/sama5d2_icp_mmc_defconfig b/configs/sama5d2_icp_mmc_defconfig index 7761a57..49fe180 100644 --- a/configs/sama5d2_icp_mmc_defconfig +++ b/configs/sama5d2_icp_mmc_defconfig @@ -47,6 +47,7 @@ CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y CONFIG_HASH_VERIFY=y diff --git a/configs/sama5d2_icp_qspiflash_defconfig b/configs/sama5d2_icp_qspiflash_defconfig index 88bbbb4..78b65a9 100644 --- a/configs/sama5d2_icp_qspiflash_defconfig +++ b/configs/sama5d2_icp_qspiflash_defconfig @@ -46,6 +46,7 @@ CONFIG_CMD_SDRAM=y CONFIG_CMD_SF_TEST=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_GETTIME=y CONFIG_CMD_TIMER=y diff --git a/configs/sama5d2_ptc_ek_mmc_defconfig b/configs/sama5d2_ptc_ek_mmc_defconfig index 9f458e1..46f9bd3 100644 --- a/configs/sama5d2_ptc_ek_mmc_defconfig +++ b/configs/sama5d2_ptc_ek_mmc_defconfig @@ -37,6 +37,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y CONFIG_HASH_VERIFY=y diff --git a/configs/sama5d2_ptc_ek_nandflash_defconfig b/configs/sama5d2_ptc_ek_nandflash_defconfig index 6460ff3..cbef580 100644 --- a/configs/sama5d2_ptc_ek_nandflash_defconfig +++ b/configs/sama5d2_ptc_ek_nandflash_defconfig @@ -37,6 +37,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y CONFIG_HASH_VERIFY=y diff --git a/configs/sama5d2_xplained_emmc_defconfig b/configs/sama5d2_xplained_emmc_defconfig index 844a9cd..47672b5 100644 --- a/configs/sama5d2_xplained_emmc_defconfig +++ b/configs/sama5d2_xplained_emmc_defconfig @@ -43,6 +43,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y CONFIG_HASH_VERIFY=y diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig index 0de0636..4f22d6b 100644 --- a/configs/sama5d2_xplained_mmc_defconfig +++ b/configs/sama5d2_xplained_mmc_defconfig @@ -45,6 +45,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y CONFIG_HASH_VERIFY=y diff --git a/configs/sama5d2_xplained_qspiflash_defconfig b/configs/sama5d2_xplained_qspiflash_defconfig index a6e002e..e21b6a8 100644 --- a/configs/sama5d2_xplained_qspiflash_defconfig +++ b/configs/sama5d2_xplained_qspiflash_defconfig @@ -45,6 +45,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y CONFIG_HASH_VERIFY=y diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig index 676385f..e4a2e45 100644 --- a/configs/sama5d2_xplained_spiflash_defconfig +++ b/configs/sama5d2_xplained_spiflash_defconfig @@ -49,6 +49,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y CONFIG_HASH_VERIFY=y diff --git a/configs/sama5d36ek_cmp_mmc_defconfig b/configs/sama5d36ek_cmp_mmc_defconfig index 1967352..3732b68 100644 --- a/configs/sama5d36ek_cmp_mmc_defconfig +++ b/configs/sama5d36ek_cmp_mmc_defconfig @@ -33,6 +33,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y diff --git a/configs/sama5d36ek_cmp_nandflash_defconfig b/configs/sama5d36ek_cmp_nandflash_defconfig index a7cf6b2..2a26140 100644 --- a/configs/sama5d36ek_cmp_nandflash_defconfig +++ b/configs/sama5d36ek_cmp_nandflash_defconfig @@ -33,6 +33,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y diff --git a/configs/sama5d36ek_cmp_spiflash_defconfig b/configs/sama5d36ek_cmp_spiflash_defconfig index 33ce03c..df62e0e 100644 --- a/configs/sama5d36ek_cmp_spiflash_defconfig +++ b/configs/sama5d36ek_cmp_spiflash_defconfig @@ -35,6 +35,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig index 7660dbe..d89b6f3 100644 --- a/configs/sama5d3_xplained_mmc_defconfig +++ b/configs/sama5d3_xplained_mmc_defconfig @@ -42,6 +42,7 @@ CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig index 97361a0..a06f524 100644 --- a/configs/sama5d3_xplained_nandflash_defconfig +++ b/configs/sama5d3_xplained_nandflash_defconfig @@ -42,6 +42,7 @@ CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig index 7828bfd..8bb3706 100644 --- a/configs/sama5d3xek_mmc_defconfig +++ b/configs/sama5d3xek_mmc_defconfig @@ -45,6 +45,7 @@ CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT4=y diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig index 5e2b79e..b4568cd 100644 --- a/configs/sama5d3xek_nandflash_defconfig +++ b/configs/sama5d3xek_nandflash_defconfig @@ -45,6 +45,7 @@ CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig index bffcc49..03c2b20 100644 --- a/configs/sama5d3xek_spiflash_defconfig +++ b/configs/sama5d3xek_spiflash_defconfig @@ -48,6 +48,7 @@ CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig index c664274..878f3a3 100644 --- a/configs/sama5d4_xplained_mmc_defconfig +++ b/configs/sama5d4_xplained_mmc_defconfig @@ -42,6 +42,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y CONFIG_HASH_VERIFY=y diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig index c6cb19e..1061762 100644 --- a/configs/sama5d4_xplained_nandflash_defconfig +++ b/configs/sama5d4_xplained_nandflash_defconfig @@ -42,6 +42,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y CONFIG_HASH_VERIFY=y diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig index 3a7da73..21e9fc3 100644 --- a/configs/sama5d4_xplained_spiflash_defconfig +++ b/configs/sama5d4_xplained_spiflash_defconfig @@ -47,6 +47,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y CONFIG_HASH_VERIFY=y diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig index b0689fb..01b2a58 100644 --- a/configs/sama5d4ek_mmc_defconfig +++ b/configs/sama5d4ek_mmc_defconfig @@ -44,6 +44,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig index a853026..25e2b98 100644 --- a/configs/sama5d4ek_nandflash_defconfig +++ b/configs/sama5d4ek_nandflash_defconfig @@ -44,6 +44,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig index b36f4b5..484df6a 100644 --- a/configs/sama5d4ek_spiflash_defconfig +++ b/configs/sama5d4ek_spiflash_defconfig @@ -47,6 +47,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/slimbootloader_defconfig b/configs/slimbootloader_defconfig index 1597616..5988777 100644 --- a/configs/slimbootloader_defconfig +++ b/configs/slimbootloader_defconfig @@ -15,11 +15,14 @@ CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig index 0e99c36..36593ec 100644 --- a/configs/smartweb_defconfig +++ b/configs/smartweb_defconfig @@ -43,6 +43,7 @@ CONFIG_CMD_DFU=y CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_CMD_MTDPARTS=y diff --git a/configs/snapper9260_defconfig b/configs/snapper9260_defconfig index 4b3267e..bd8c17f 100644 --- a/configs/snapper9260_defconfig +++ b/configs/snapper9260_defconfig @@ -27,6 +27,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y # CONFIG_CMD_MDIO is not set CONFIG_CMD_PING=y diff --git a/configs/snapper9g20_defconfig b/configs/snapper9g20_defconfig index 3674c8f..eb62cfd 100644 --- a/configs/snapper9g20_defconfig +++ b/configs/snapper9g20_defconfig @@ -26,6 +26,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y # CONFIG_CMD_MDIO is not set CONFIG_CMD_PING=y diff --git a/configs/socfpga_agilex_atf_defconfig b/configs/socfpga_agilex_atf_defconfig index f85953f..6b15bc3 100644 --- a/configs/socfpga_agilex_atf_defconfig +++ b/configs/socfpga_agilex_atf_defconfig @@ -47,6 +47,8 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="kernel.itb" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_ALTERA_SDRAM=y diff --git a/configs/socfpga_agilex_defconfig b/configs/socfpga_agilex_defconfig index 2e116fb..342a702 100644 --- a/configs/socfpga_agilex_defconfig +++ b/configs/socfpga_agilex_defconfig @@ -41,6 +41,8 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="Image" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_ALTERA_SDRAM=y diff --git a/configs/socfpga_agilex_vab_defconfig b/configs/socfpga_agilex_vab_defconfig index b62f509..486c88f 100644 --- a/configs/socfpga_agilex_vab_defconfig +++ b/configs/socfpga_agilex_vab_defconfig @@ -48,6 +48,8 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="kernel.itb" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_ALTERA_SDRAM=y diff --git a/configs/socfpga_dbm_soc1_defconfig b/configs/socfpga_dbm_soc1_defconfig index 15652a1..24687f1 100644 --- a/configs/socfpga_dbm_soc1_defconfig +++ b/configs/socfpga_dbm_soc1_defconfig @@ -46,6 +46,8 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="fitImage" CONFIG_VERSION_VARIABLE=y CONFIG_DFU_MMC=y CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1000000 diff --git a/configs/socfpga_is1_defconfig b/configs/socfpga_is1_defconfig index 2124a08..01b7086 100644 --- a/configs/socfpga_is1_defconfig +++ b/configs/socfpga_is1_defconfig @@ -38,6 +38,8 @@ CONFIG_CMD_UBI=y # CONFIG_EFI_PARTITION is not set CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="zImage" CONFIG_VERSION_VARIABLE=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_BOOTCOUNT_LIMIT=y diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig index d31c3f5..a6e3a77 100644 --- a/configs/socfpga_mcvevk_defconfig +++ b/configs/socfpga_mcvevk_defconfig @@ -37,6 +37,8 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="fitImage" CONFIG_VERSION_VARIABLE=y CONFIG_DFU_MMC=y CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1000000 diff --git a/configs/socfpga_n5x_atf_defconfig b/configs/socfpga_n5x_atf_defconfig index 31346fc..d458818 100644 --- a/configs/socfpga_n5x_atf_defconfig +++ b/configs/socfpga_n5x_atf_defconfig @@ -47,6 +47,8 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="kernel.itb" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_DWAPB_GPIO=y diff --git a/configs/socfpga_n5x_defconfig b/configs/socfpga_n5x_defconfig index 7e7d1cc..57ccf70 100644 --- a/configs/socfpga_n5x_defconfig +++ b/configs/socfpga_n5x_defconfig @@ -39,6 +39,8 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="Image" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_DWAPB_GPIO=y diff --git a/configs/socfpga_n5x_vab_defconfig b/configs/socfpga_n5x_vab_defconfig index cf7bf23..91b05ca 100644 --- a/configs/socfpga_n5x_vab_defconfig +++ b/configs/socfpga_n5x_vab_defconfig @@ -48,6 +48,8 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="kernel.itb" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_DWAPB_GPIO=y diff --git a/configs/socfpga_secu1_defconfig b/configs/socfpga_secu1_defconfig index f7bdb90..e71b1e1 100644 --- a/configs/socfpga_secu1_defconfig +++ b/configs/socfpga_secu1_defconfig @@ -54,6 +54,8 @@ CONFIG_CMD_UBI=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="zImage" CONFIG_VERSION_VARIABLE=y CONFIG_SPL_DM_SEQ_ALIAS=y # CONFIG_SPL_BLK is not set diff --git a/configs/socfpga_stratix10_atf_defconfig b/configs/socfpga_stratix10_atf_defconfig index 60e7750..386a773 100644 --- a/configs/socfpga_stratix10_atf_defconfig +++ b/configs/socfpga_stratix10_atf_defconfig @@ -48,6 +48,8 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="kernel.itb" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_ALTERA_SDRAM=y diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig index 8249a12..038e0b6 100644 --- a/configs/socfpga_stratix10_defconfig +++ b/configs/socfpga_stratix10_defconfig @@ -45,6 +45,8 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="Image" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_ALTERA_SDRAM=y diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig index 4e2c0c1..15848af 100644 --- a/configs/socfpga_vining_fpga_defconfig +++ b/configs/socfpga_vining_fpga_defconfig @@ -50,6 +50,8 @@ CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="fitImage" CONFIG_VERSION_VARIABLE=y CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig index bad08e7..e24be7a 100644 --- a/configs/socrates_defconfig +++ b/configs/socrates_defconfig @@ -32,6 +32,7 @@ CONFIG_CMD_SDRAM=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_MII=y CONFIG_CMD_PING=y @@ -45,6 +46,7 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_ADDR=0xFFF40000 CONFIG_ENV_ADDR_REDUND=0xFFF20000 CONFIG_DM=y +CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFE001001 CONFIG_SYS_OR0_PRELIM=0xFE000030 diff --git a/configs/som-db5800-som-6867_defconfig b/configs/som-db5800-som-6867_defconfig index 9781b10..fb630bd 100644 --- a/configs/som-db5800-som-6867_defconfig +++ b/configs/som-db5800-som-6867_defconfig @@ -35,6 +35,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y @@ -49,6 +50,8 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/stih410-b2260_defconfig b/configs/stih410-b2260_defconfig index 90a4ec4..e99bb1e 100644 --- a/configs/stih410-b2260_defconfig +++ b/configs/stih410-b2260_defconfig @@ -25,6 +25,8 @@ CONFIG_CMD_EXT4_WRITE=y # CONFIG_ISO_PARTITION is not set CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_CLK=y diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig index 6dbf8c2..cbc6208 100644 --- a/configs/syzygy_hub_defconfig +++ b/configs/syzygy_hub_defconfig @@ -37,6 +37,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_MAY_FAIL=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4_WRITE=y diff --git a/configs/tb100_defconfig b/configs/tb100_defconfig index 94ed3fb..0adf050 100644 --- a/configs/tb100_defconfig +++ b/configs/tb100_defconfig @@ -16,6 +16,8 @@ CONFIG_CMD_PING=y CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y CONFIG_DM_SERIAL=y diff --git a/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig b/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig index 4a9bbef..25758b4 100644 --- a/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig +++ b/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig @@ -35,6 +35,7 @@ CONFIG_CMD_PART=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_BMP=y @@ -51,6 +52,8 @@ CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/theadorable-x86-conga-qa3-e3845_defconfig b/configs/theadorable-x86-conga-qa3-e3845_defconfig index 66aab79..73241ae 100644 --- a/configs/theadorable-x86-conga-qa3-e3845_defconfig +++ b/configs/theadorable-x86-conga-qa3-e3845_defconfig @@ -34,6 +34,7 @@ CONFIG_CMD_PART=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_BMP=y @@ -50,6 +51,8 @@ CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/theadorable-x86-dfi-bt700_defconfig b/configs/theadorable-x86-dfi-bt700_defconfig index 2f87c08..9dd2d4f 100644 --- a/configs/theadorable-x86-dfi-bt700_defconfig +++ b/configs/theadorable-x86-dfi-bt700_defconfig @@ -32,6 +32,7 @@ CONFIG_CMD_PART=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_BMP=y @@ -48,6 +49,8 @@ CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/tuge1_defconfig b/configs/tuge1_defconfig index 6078b46..4ba18e9 100644 --- a/configs/tuge1_defconfig +++ b/configs/tuge1_defconfig @@ -138,6 +138,7 @@ CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 CONFIG_CMD_I2C=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_JFFS2=y diff --git a/configs/tuxx1_defconfig b/configs/tuxx1_defconfig index cc9bbab..7dbc3cc 100644 --- a/configs/tuxx1_defconfig +++ b/configs/tuxx1_defconfig @@ -160,6 +160,7 @@ CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 CONFIG_CMD_I2C=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_JFFS2=y diff --git a/configs/uniphier_ld4_sld8_defconfig b/configs/uniphier_ld4_sld8_defconfig index 304d6a8..3c9fee3 100644 --- a/configs/uniphier_ld4_sld8_defconfig +++ b/configs/uniphier_ld4_sld8_defconfig @@ -38,6 +38,8 @@ CONFIG_CMD_UBI=y # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="zImage" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_GPIO_UNIPHIER=y CONFIG_MISC=y diff --git a/configs/uniphier_v7_defconfig b/configs/uniphier_v7_defconfig index 87eb939..0bedfe1 100644 --- a/configs/uniphier_v7_defconfig +++ b/configs/uniphier_v7_defconfig @@ -39,6 +39,8 @@ CONFIG_CMD_UBI=y # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="zImage" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_GPIO_UNIPHIER=y CONFIG_MISC=y diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig index b9e2d9b..8269aab 100644 --- a/configs/uniphier_v8_defconfig +++ b/configs/uniphier_v8_defconfig @@ -34,6 +34,8 @@ CONFIG_MTDIDS_DEFAULT="nand0=uniphier-nand.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=uniphier-nand.0:1m(firmware),-(UBI)" CONFIG_CMD_UBI=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="Image" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_GPIO_UNIPHIER=y CONFIG_MISC=y diff --git a/configs/usb_a9263_dataflash_defconfig b/configs/usb_a9263_dataflash_defconfig index 5792d78..2dccfb1 100644 --- a/configs/usb_a9263_dataflash_defconfig +++ b/configs/usb_a9263_dataflash_defconfig @@ -30,6 +30,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_ITEST is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_MTDPARTS_DEFAULT="mtdparts=atmel_nand:16m(kernel)ro,120m(root1),-(root2)" CONFIG_OF_CONTROL=y diff --git a/configs/vexpress_aemv8a_juno_defconfig b/configs/vexpress_aemv8a_juno_defconfig index e02124c..aac4c4c 100644 --- a/configs/vexpress_aemv8a_juno_defconfig +++ b/configs/vexpress_aemv8a_juno_defconfig @@ -30,6 +30,7 @@ CONFIG_CMD_SATA=y CONFIG_CMD_USB=y # CONFIG_CMD_ITEST is not set # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_CACHE=y # CONFIG_CMD_SLEEP is not set diff --git a/configs/vexpress_aemv8a_semi_defconfig b/configs/vexpress_aemv8a_semi_defconfig index 82a5b52..d55e560 100644 --- a/configs/vexpress_aemv8a_semi_defconfig +++ b/configs/vexpress_aemv8a_semi_defconfig @@ -30,6 +30,7 @@ CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_LOADS is not set # CONFIG_CMD_ITEST is not set # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_CACHE=y # CONFIG_CMD_SLEEP is not set diff --git a/configs/vexpress_ca9x4_defconfig b/configs/vexpress_ca9x4_defconfig index dfcaafb..10e93cf 100644 --- a/configs/vexpress_ca9x4_defconfig +++ b/configs/vexpress_ca9x4_defconfig @@ -22,6 +22,7 @@ CONFIG_DEFAULT_FDT_FILE="vexpress-v2p-ca9.dtb" CONFIG_CMD_MMC=y # CONFIG_CMD_ITEST is not set # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set # CONFIG_CMD_SLEEP is not set CONFIG_CMD_UBI=y diff --git a/configs/vinco_defconfig b/configs/vinco_defconfig index 52d5506..9df9da4 100644 --- a/configs/vinco_defconfig +++ b/configs/vinco_defconfig @@ -28,6 +28,7 @@ CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y diff --git a/configs/work_92105_defconfig b/configs/work_92105_defconfig index 8b21dc2..c702491 100644 --- a/configs/work_92105_defconfig +++ b/configs/work_92105_defconfig @@ -45,6 +45,8 @@ CONFIG_CMD_DATE=y CONFIG_DOS_PARTITION=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y CONFIG_LPC32XX_GPIO=y CONFIG_SYS_I2C_LEGACY=y diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index adc30a7..6e7d0ac 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -35,6 +35,8 @@ CONFIG_CMD_MMC=y CONFIG_CMD_MTD=y CONFIG_CMD_SF_TEST=y CONFIG_CMD_USB=y +CONFIG_BOOTP_MAY_FAIL=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_CACHE=y CONFIG_CMD_EFIDEBUG=y diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index 9122b24..5e035d1 100644 --- a/configs/xilinx_zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig @@ -50,6 +50,7 @@ CONFIG_CMD_NAND_LOCK_UNLOCK=y CONFIG_CMD_SF_TEST=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_MAY_FAIL=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_CACHE=y CONFIG_CMD_EFIDEBUG=y diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 976cb02..f12bad7 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -64,6 +64,8 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_WDT=y +CONFIG_BOOTP_MAY_FAIL=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_BMP=y CONFIG_CMD_CACHE=y diff --git a/configs/xtfpga_defconfig b/configs/xtfpga_defconfig index 1c8d57b..0e1a193 100644 --- a/configs/xtfpga_defconfig +++ b/configs/xtfpga_defconfig @@ -24,6 +24,8 @@ CONFIG_CMD_PING=y CONFIG_CMD_DIAG=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xF7FE0000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y CONFIG_DM=y # CONFIG_DM_WARN is not set diff --git a/drivers/ddr/fsl/Kconfig b/drivers/ddr/fsl/Kconfig index b0e6df8..2771670 100644 --- a/drivers/ddr/fsl/Kconfig +++ b/drivers/ddr/fsl/Kconfig @@ -49,6 +49,10 @@ config SYS_NUM_DDR_CTLRS ARCH_LX2162A default 1 +config CHIP_SELECTS_PER_CTRL + int "Number of chip selects per controller" + default 4 + config SYS_FSL_DDR_VER int default 50 if SYS_FSL_DDR_VER_50 diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig index bde3004..588ebe9 100644 --- a/drivers/mtd/Kconfig +++ b/drivers/mtd/Kconfig @@ -52,6 +52,13 @@ config CFI_FLASH option. Visit <http://www.amd.com/products/nvd/overview/cfi.html> for more information on CFI. +config CFI_FLASH_USE_WEAK_ACCESSORS + bool "Allow read/write functions to be overridden" + depends on FLASH_CFI_DRIVER + help + Enable this option to allow for the flash_{read,write}{8,16,32,64} + functions to be overridden by the platform. + config SYS_FLASH_USE_BUFFER_WRITE bool "Enable buffered writes to flash" depends on FLASH_CFI_DRIVER diff --git a/drivers/pci/pci_mpc85xx.c b/drivers/pci/pci_mpc85xx.c index 1e180ee..8a81a74 100644 --- a/drivers/pci/pci_mpc85xx.c +++ b/drivers/pci/pci_mpc85xx.c @@ -6,7 +6,6 @@ */ #include <common.h> #include <asm/bitops.h> -#include <asm/cpm_85xx.h> #include <pci.h> #include <dm.h> #include <asm/fsl_law.h> diff --git a/env/Kconfig b/env/Kconfig index 6dc8d8d..20f395f 100644 --- a/env/Kconfig +++ b/env/Kconfig @@ -819,6 +819,19 @@ config TPL_ENV_IS_IN_FLASH endif +config USE_BOOTFILE + bool "Add a 'bootfile' environment variable" + help + The "bootfile" variable is used in some cases to allow for + controlling what file U-Boot will attempt to load and boot. To set + this, enable this option and set the value in the next question. + +config BOOTFILE + string "'bootfile' environment variable value" + depends on USE_BOOTFILE + help + The value to set the "bootfile" variable to. + config VERSION_VARIABLE bool "Add a 'ver' environment variable with the U-Boot version" help diff --git a/include/asm-generic/u-boot.h b/include/asm-generic/u-boot.h index 637de0c..1becc66 100644 --- a/include/asm-generic/u-boot.h +++ b/include/asm-generic/u-boot.h @@ -52,12 +52,6 @@ struct bd_info { unsigned short bi_ethspeed; /* Ethernet speed in Mbps */ unsigned long bi_intfreq; /* Internal Freq, in MHz */ unsigned long bi_busfreq; /* Bus Freq, in MHz */ -#if defined(CONFIG_CPM2) - unsigned long bi_cpmfreq; /* CPM_CLK Freq, in MHz */ - unsigned long bi_brgfreq; /* BRG_CLK Freq, in MHz */ - unsigned long bi_sccfreq; /* SCC_CLK Freq, in MHz */ - unsigned long bi_vco; /* VCO Out from PLL, in MHz */ -#endif #if defined(CONFIG_M68K) unsigned long bi_pcifreq; /* PCI Bus Freq, in MHz */ #endif diff --git a/include/configs/10m50_devboard.h b/include/configs/10m50_devboard.h index 3b4d1fd..ed971e5 100644 --- a/include/configs/10m50_devboard.h +++ b/include/configs/10m50_devboard.h @@ -31,7 +31,6 @@ /* * BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE /* * MEMORY ORGANIZATION diff --git a/include/configs/3c120_devboard.h b/include/configs/3c120_devboard.h index 763cb8d..c33616b 100644 --- a/include/configs/3c120_devboard.h +++ b/include/configs/3c120_devboard.h @@ -29,11 +29,6 @@ #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - -/* * MEMORY ORGANIZATION * -Monitor at top of sdram. * -The heap is placed below the monitor diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index 9f4c3af..25f784e 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -22,11 +22,6 @@ #define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */ -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - #ifdef CONFIG_MCFFEC # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY @@ -52,7 +47,6 @@ #define CONFIG_SYS_I2C_PINMUX_SET (GPIO_PAR_FECI2C_SCL_I2CSCL | GPIO_PAR_FECI2C_SDA_I2CSDA) /* this must be included AFTER the definition of CONFIG COMMANDS (if any) */ -#define CONFIG_BOOTFILE "u-boot.bin" #ifdef CONFIG_MCFFEC # define CONFIG_IPADDR 192.162.1.2 # define CONFIG_NETMASK 255.255.255.0 diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h index 3267149..ff02921 100644 --- a/include/configs/M5249EVB.h +++ b/include/configs/M5249EVB.h @@ -24,11 +24,6 @@ #undef CONFIG_MONITOR_IS_IN_RAM /* no pre-loader required!!! ;-) */ /* - * BOOTP options - */ -#undef CONFIG_BOOTP_BOOTFILESIZE - -/* * Clock configuration: enable only one of the following options */ diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h index df89a0f..c3fcf73 100644 --- a/include/configs/M5272C3.h +++ b/include/configs/M5272C3.h @@ -32,11 +32,6 @@ . = DEFINED(env_offset) ? env_offset : .; \ env/embedded.o(.text); -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - #ifdef CONFIG_MCFFEC # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h index 7926ed4..78904ac 100644 --- a/include/configs/M5275EVB.h +++ b/include/configs/M5275EVB.h @@ -33,11 +33,6 @@ . = DEFINED(env_offset) ? env_offset : .; \ env/embedded.o(.text); -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* Available command configuration */ #ifdef CONFIG_MCFFEC diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index df95eea..cf87795 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -30,11 +30,6 @@ . = DEFINED(env_offset) ? env_offset : .; \ env/embedded.o(.text*); -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - #ifdef CONFIG_MCFFEC # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 538d9c2..8bbc5f4 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -295,11 +295,6 @@ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - #ifdef CONFIG_MMC #define CONFIG_FSL_ESDHC_PIN_MUX #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_ADDR @@ -329,7 +324,6 @@ #define CONFIG_HOSTNAME "mpc837x_rdb" #define CONFIG_ROOTPATH "/nfsroot" #define CONFIG_RAMDISKFILE "rootfs.ext2.gz.uboot" -#define CONFIG_BOOTFILE "uImage" /* U-Boot image on TFTP server */ #define CONFIG_UBOOTPATH "u-boot.bin" #define CONFIG_FDTFILE "mpc8379_rdb.dtb" diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h deleted file mode 100644 index 57097b1..0000000 --- a/include/configs/MPC8540ADS.h +++ /dev/null @@ -1,303 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright 2004, 2011 Freescale Semiconductor. - * (C) Copyright 2002,2003 Motorola,Inc. - * Xianghua Xiao <X.Xiao@motorola.com> - */ - -/* - * mpc8540ads board configuration file - * - * Please refer to doc/README.mpc85xx for more info. - * - * Make sure you change the MAC address and other network params first, - * search for CONFIG_SERVERIP, etc in this file. - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * default CCARBAR is at 0xff700000 - * assume U-Boot is less than 0.5MB - */ - -#ifndef CONFIG_HAS_FEC -#define CONFIG_HAS_FEC 1 /* 8540 has FEC */ -#endif - -/* - * sysclk for MPC85xx - * - * Two valid values are: - * 33000000 - * 66000000 - * - * Most PCI cards are still 33Mhz, so in the presence of PCI, 33MHz - * is likely the desired value here, so that is now the default. - * The board, however, can run at 66MHz. In any event, this value - * must match the settings of some switches. Details can be found - * in the README.mpc85xxads. - * - * XXX -- Can't we run at 66 MHz, anyway? PCI should drop to - * 33MHz to accommodate, based on a PCI pin. - * Note that PCI-X won't work at 33MHz. - */ - -/* - * These can be toggled for performance analysis, otherwise use default. - */ -#define CONFIG_L2_CACHE /* toggle L2 cache */ -#define CONFIG_BTB /* toggle branch predition */ - -#define CONFIG_SYS_CCSRBAR 0xe0000000 -#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR - -/* DDR Setup */ -#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ - -#define CONFIG_MEM_INIT_VALUE 0xDeadBeef - -#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/ -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE - -#define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) - -/* I2C addresses of SPD EEPROMs */ -#define SPD_EEPROM_ADDRESS 0x51 /* CTLR 0 DIMM 0 */ - -/* These are used when DDR doesn't use SPD. */ -#define CONFIG_SYS_SDRAM_SIZE 128 /* DDR is 128MB */ -#define CONFIG_SYS_DDR_CS0_BNDS 0x00000007 /* 0-128MB */ -#define CONFIG_SYS_DDR_CS0_CONFIG 0x80000002 -#define CONFIG_SYS_DDR_TIMING_1 0x37344321 -#define CONFIG_SYS_DDR_TIMING_2 0x00000800 /* P9-45,may need tuning */ -#define CONFIG_SYS_DDR_CONTROL 0xc2000000 /* unbuffered,no DYN_PWR */ -#define CONFIG_SYS_DDR_MODE 0x00000062 /* DLL,normal,seq,4/2.5 */ -#define CONFIG_SYS_DDR_INTERVAL 0x05200100 /* autocharge,no open page */ - -/* - * SDRAM on the Local Bus - */ -#define CONFIG_SYS_LBC_SDRAM_BASE 0xf0000000 /* Localbus SDRAM */ -#define CONFIG_SYS_LBC_SDRAM_SIZE 64 /* LBC SDRAM is 64MB */ - -#define CONFIG_SYS_FLASH_BASE 0xff000000 /* start of FLASH 16M */ - -#define CONFIG_SYS_MAX_FLASH_SECT 64 /* sectors per device */ -#undef CONFIG_SYS_FLASH_CHECKSUM -#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ -#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ - -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ - -#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) -#define CONFIG_SYS_RAMBOOT -#else -#undef CONFIG_SYS_RAMBOOT -#endif - -#define CONFIG_SYS_FLASH_EMPTY_INFO - -/* - * Local Bus Definitions - */ - -/* - * Base Register 2 and Option Register 2 configure SDRAM. - * The SDRAM base address, CONFIG_SYS_LBC_SDRAM_BASE, is 0xf0000000. - * - * For BR2, need: - * Base address of 0xf0000000 = BR[0:16] = 1111 0000 0000 0000 0 - * port-size = 32-bits = BR2[19:20] = 11 - * no parity checking = BR2[21:22] = 00 - * SDRAM for MSEL = BR2[24:26] = 011 - * Valid = BR[31] = 1 - * - * 0 4 8 12 16 20 24 28 - * 1111 0000 0000 0000 0001 1000 0110 0001 = f0001861 - * - * FIXME: CONFIG_SYS_LBC_SDRAM_BASE should be masked and OR'ed into - * FIXME: the top 17 bits of BR2. - */ - -/* - * The SDRAM size in MB, CONFIG_SYS_LBC_SDRAM_SIZE, is 64. - * - * For OR2, need: - * 64MB mask for AM, OR2[0:7] = 1111 1100 - * XAM, OR2[17:18] = 11 - * 9 columns OR2[19-21] = 010 - * 13 rows OR2[23-25] = 100 - * EAD set for extra time OR[31] = 1 - * - * 0 4 8 12 16 20 24 28 - * 1111 1100 0000 0000 0110 1001 0000 0001 = fc006901 - */ - -#define CONFIG_SYS_LBC_LCRR 0x00030004 /* LB clock ratio reg */ -#define CONFIG_SYS_LBC_LBCR 0x00000000 /* LB config reg */ -#define CONFIG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */ -#define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer prescal*/ - -#define CONFIG_SYS_LBC_LSDMR_COMMON ( LSDMR_BSMA1516 \ - | LSDMR_RFCR5 \ - | LSDMR_PRETOACT3 \ - | LSDMR_ACTTORW3 \ - | LSDMR_BL8 \ - | LSDMR_WRC2 \ - | LSDMR_CL3 \ - | LSDMR_RFEN \ - ) - -/* - * SDRAM Controller configuration sequence. - */ -#define CONFIG_SYS_LBC_LSDMR_1 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_PCHALL) -#define CONFIG_SYS_LBC_LSDMR_2 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH) -#define CONFIG_SYS_LBC_LSDMR_3 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH) -#define CONFIG_SYS_LBC_LSDMR_4 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_MRW) -#define CONFIG_SYS_LBC_LSDMR_5 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_NORMAL) - -/* - * 32KB, 8-bit wide for ADS config reg - */ -#define CONFIG_SYS_BCSR (CONFIG_SYS_BR4_PRELIM & 0xffff8000) - -#define CONFIG_SYS_INIT_RAM_LOCK 1 -#define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ -#define CONFIG_SYS_INIT_RAM_SIZE 0x4000 /* Size of used area in RAM */ - -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */ - -/* Serial Port */ -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 1 -#define CONFIG_SYS_NS16550_CLK get_bus_freq(0) - -#define CONFIG_SYS_BAUDRATE_TABLE \ - {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200} - -#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500) -#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600) - -/* - * I2C - */ -#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } - -/* RapidIO MMU */ -#define CONFIG_SYS_RIO_MEM_VIRT 0xc0000000 /* base address */ -#define CONFIG_SYS_RIO_MEM_BUS 0xc0000000 /* base address */ -#define CONFIG_SYS_RIO_MEM_PHYS 0xc0000000 -#define CONFIG_SYS_RIO_MEM_SIZE 0x20000000 /* 128M */ - -/* - * General PCI - * Memory space is mapped 1-1, but I/O space must start from 0. - */ -#define CONFIG_SYS_PCI1_MEM_VIRT 0x80000000 -#define CONFIG_SYS_PCI1_MEM_BUS 0x80000000 -#define CONFIG_SYS_PCI1_MEM_PHYS 0x80000000 -#define CONFIG_SYS_PCI1_MEM_SIZE 0x20000000 /* 512M */ -#define CONFIG_SYS_PCI1_IO_VIRT 0xe2000000 -#define CONFIG_SYS_PCI1_IO_BUS 0x00000000 -#define CONFIG_SYS_PCI1_IO_PHYS 0xe2000000 -#define CONFIG_SYS_PCI1_IO_SIZE 0x100000 /* 1M */ - -#if defined(CONFIG_PCI) - -#if !defined(CONFIG_PCI_PNP) - #define PCI_ENET0_IOADDR 0xe0000000 - #define PCI_ENET0_MEMADDR 0xe0000000 - #define PCI_IDSEL_NUMBER 0x0c /* slot0->3(IDSEL)=12->15 */ -#endif - -#undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ - -#endif /* CONFIG_PCI */ - -#if defined(CONFIG_TSEC_ENET) - -#define CONFIG_TSEC1 1 -#define CONFIG_TSEC1_NAME "TSEC0" -#define CONFIG_TSEC2 1 -#define CONFIG_TSEC2_NAME "TSEC1" -#define TSEC1_PHY_ADDR 0 -#define TSEC2_PHY_ADDR 1 -#define TSEC1_PHYIDX 0 -#define TSEC2_PHYIDX 0 -#define TSEC1_FLAGS TSEC_GIGABIT -#define TSEC2_FLAGS TSEC_GIGABIT - -#if CONFIG_HAS_FEC -#define CONFIG_MPC85XX_FEC 1 -#define CONFIG_MPC85XX_FEC_NAME "FEC" -#define FEC_PHY_ADDR 3 -#define FEC_PHYIDX 0 -#define FEC_FLAGS 0 -#endif - -/* Options are: TSEC[0-1], FEC */ -#define CONFIG_ETHPRIME "TSEC0" - -#endif /* CONFIG_TSEC_ENET */ - -/* - * Environment - */ - -#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ -#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - -/* - * Miscellaneous configurable options - */ - -/* - * For booting Linux, the board info and command line data - * have to be in the first 64 MB of memory, since this is - * the maximum mapped by the Linux kernel during initialization. - */ -#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory map for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ - -/* - * Environment Configuration - */ - -/* The mac addresses for all ethernet interface */ -#if defined(CONFIG_TSEC_ENET) -#define CONFIG_HAS_ETH0 -#define CONFIG_HAS_ETH1 -#define CONFIG_HAS_ETH2 -#endif - -#define CONFIG_IPADDR 192.168.1.253 - -#define CONFIG_HOSTNAME "unknown" -#define CONFIG_ROOTPATH "/nfsroot" -#define CONFIG_BOOTFILE "your.uImage" - -#define CONFIG_SERVERIP 192.168.1.1 -#define CONFIG_GATEWAYIP 192.168.1.1 -#define CONFIG_NETMASK 255.255.255.0 - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "netdev=eth0\0" \ - "consoledev=ttyS0\0" \ - "ramdiskaddr=1000000\0" \ - "ramdiskfile=your.ramdisk.u-boot\0" \ - "fdtaddr=400000\0" \ - "fdtfile=your.fdt.dtb\0" - -#endif /* __CONFIG_H */ diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index e16d870..093061b 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -30,7 +30,6 @@ * These can be toggled for performance analysis, otherwise use default. */ #define CONFIG_L2_CACHE /* toggle L2 cache */ -#define CONFIG_BTB /* toggle branch predition */ /* * Only possible on E500 Version 2 or newer cores. @@ -49,7 +48,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) /* I2C addresses of SPD EEPROMs */ #define SPD_EEPROM_ADDRESS 0x51 /* CTLR 0 DIMM 0 */ @@ -376,11 +374,6 @@ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ /* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - -/* * Miscellaneous configurable options */ @@ -406,7 +399,6 @@ #define CONFIG_HOSTNAME "unknown" #define CONFIG_ROOTPATH "/nfsroot" -#define CONFIG_BOOTFILE "8548cds/uImage.uboot" #define CONFIG_UBOOTPATH 8548cds/u-boot.bin /* TFTP server */ #define CONFIG_SERVERIP 192.168.1.1 diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h deleted file mode 100644 index d23cf0e..0000000 --- a/include/configs/MPC8560ADS.h +++ /dev/null @@ -1,292 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright 2004, 2011 Freescale Semiconductor. - * (C) Copyright 2002,2003 Motorola,Inc. - * Xianghua Xiao <X.Xiao@motorola.com> - */ - -/* - * mpc8560ads board configuration file - * - * Please refer to doc/README.mpc85xx for more info. - * - * Make sure you change the MAC address and other network params first, - * search for CONFIG_SERVERIP, etc. in this file. - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include <linux/delay.h> - -/* High Level Configuration Options */ -#define CONFIG_CPM2 1 /* has CPM2 */ - -/* - * default CCARBAR is at 0xff700000 - * assume U-Boot is less than 0.5MB - */ - -#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */ - -/* - * sysclk for MPC85xx - * - * Two valid values are: - * 33000000 - * 66000000 - * - * Most PCI cards are still 33Mhz, so in the presence of PCI, 33MHz - * is likely the desired value here, so that is now the default. - * The board, however, can run at 66MHz. In any event, this value - * must match the settings of some switches. Details can be found - * in the README.mpc85xxads. - */ - -/* - * These can be toggled for performance analysis, otherwise use default. - */ -#define CONFIG_L2_CACHE /* toggle L2 cache */ -#define CONFIG_BTB /* toggle branch predition */ - -#define CONFIG_SYS_INIT_DBCR DBCR_IDM /* Enable Debug Exceptions */ - -#define CONFIG_SYS_CCSRBAR 0xe0000000 -#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR - -/* DDR Setup */ -#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ - -#define CONFIG_MEM_INIT_VALUE 0xDeadBeef - -#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/ -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE - -#define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) - -/* I2C addresses of SPD EEPROMs */ -#define SPD_EEPROM_ADDRESS 0x51 /* CTLR 0 DIMM 0 */ - -/* These are used when DDR doesn't use SPD. */ -#define CONFIG_SYS_SDRAM_SIZE 128 /* DDR is 128MB */ -#define CONFIG_SYS_DDR_CS0_BNDS 0x00000007 /* 0-128MB */ -#define CONFIG_SYS_DDR_CS0_CONFIG 0x80000002 -#define CONFIG_SYS_DDR_TIMING_1 0x37344321 -#define CONFIG_SYS_DDR_TIMING_2 0x00000800 /* P9-45,may need tuning */ -#define CONFIG_SYS_DDR_CONTROL 0xc2000000 /* unbuffered,no DYN_PWR */ -#define CONFIG_SYS_DDR_MODE 0x00000062 /* DLL,normal,seq,4/2.5 */ -#define CONFIG_SYS_DDR_INTERVAL 0x05200100 /* autocharge,no open page */ - -/* - * SDRAM on the Local Bus - */ -#define CONFIG_SYS_LBC_SDRAM_BASE 0xf0000000 /* Localbus SDRAM */ -#define CONFIG_SYS_LBC_SDRAM_SIZE 64 /* LBC SDRAM is 64MB */ - -#define CONFIG_SYS_FLASH_BASE 0xff000000 /* start of FLASH 16M */ - -#define CONFIG_SYS_MAX_FLASH_SECT 64 /* sectors per device */ -#undef CONFIG_SYS_FLASH_CHECKSUM -#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ -#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ - -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ - -#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) -#define CONFIG_SYS_RAMBOOT -#else -#undef CONFIG_SYS_RAMBOOT -#endif - -#define CONFIG_SYS_FLASH_EMPTY_INFO - -/* - * Local Bus Definitions - */ - -/* - * Base Register 2 and Option Register 2 configure SDRAM. - * The SDRAM base address, CONFIG_SYS_LBC_SDRAM_BASE, is 0xf0000000. - * - * For BR2, need: - * Base address of 0xf0000000 = BR[0:16] = 1111 0000 0000 0000 0 - * port-size = 32-bits = BR2[19:20] = 11 - * no parity checking = BR2[21:22] = 00 - * SDRAM for MSEL = BR2[24:26] = 011 - * Valid = BR[31] = 1 - * - * 0 4 8 12 16 20 24 28 - * 1111 0000 0000 0000 0001 1000 0110 0001 = f0001861 - * - * FIXME: CONFIG_SYS_LBC_SDRAM_BASE should be masked and OR'ed into - * FIXME: the top 17 bits of BR2. - */ - -/* - * The SDRAM size in MB, CONFIG_SYS_LBC_SDRAM_SIZE, is 64. - * - * For OR2, need: - * 64MB mask for AM, OR2[0:7] = 1111 1100 - * XAM, OR2[17:18] = 11 - * 9 columns OR2[19-21] = 010 - * 13 rows OR2[23-25] = 100 - * EAD set for extra time OR[31] = 1 - * - * 0 4 8 12 16 20 24 28 - * 1111 1100 0000 0000 0110 1001 0000 0001 = fc006901 - */ - -#define CONFIG_SYS_LBC_LCRR 0x00030004 /* LB clock ratio reg */ -#define CONFIG_SYS_LBC_LBCR 0x00000000 /* LB config reg */ -#define CONFIG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */ -#define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer prescal*/ - -#define CONFIG_SYS_LBC_LSDMR_COMMON ( LSDMR_BSMA1516 \ - | LSDMR_RFCR5 \ - | LSDMR_PRETOACT3 \ - | LSDMR_ACTTORW3 \ - | LSDMR_BL8 \ - | LSDMR_WRC2 \ - | LSDMR_CL3 \ - | LSDMR_RFEN \ - ) - -/* - * SDRAM Controller configuration sequence. - */ -#define CONFIG_SYS_LBC_LSDMR_1 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_PCHALL) -#define CONFIG_SYS_LBC_LSDMR_2 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH) -#define CONFIG_SYS_LBC_LSDMR_3 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH) -#define CONFIG_SYS_LBC_LSDMR_4 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_MRW) -#define CONFIG_SYS_LBC_LSDMR_5 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_NORMAL) - -/* - * 32KB, 8-bit wide for ADS config reg - */ -#define CONFIG_SYS_BCSR (CONFIG_SYS_BR4_PRELIM & 0xffff8000) - -#define CONFIG_SYS_INIT_RAM_LOCK 1 -#define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ -#define CONFIG_SYS_INIT_RAM_SIZE 0x4000 /* Size of used area in RAM */ - -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */ - -/* Serial Port */ -#define CONFIG_CONS_ON_SCC /* define if console on SCC */ - -#define CONFIG_SYS_BAUDRATE_TABLE \ - {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200} - -/* - * I2C - */ -#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } - -/* RapidIO MMU */ -#define CONFIG_SYS_RIO_MEM_VIRT 0xc0000000 /* base address */ -#define CONFIG_SYS_RIO_MEM_BUS 0xc0000000 /* base address */ -#define CONFIG_SYS_RIO_MEM_PHYS 0xc0000000 -#define CONFIG_SYS_RIO_MEM_SIZE 0x20000000 /* 128M */ - -/* - * General PCI - * Memory space is mapped 1-1, but I/O space must start from 0. - */ -#define CONFIG_SYS_PCI1_MEM_VIRT 0x80000000 -#define CONFIG_SYS_PCI1_MEM_BUS 0x80000000 -#define CONFIG_SYS_PCI1_MEM_PHYS 0x80000000 -#define CONFIG_SYS_PCI1_MEM_SIZE 0x20000000 /* 512M */ -#define CONFIG_SYS_PCI1_IO_VIRT 0xe2000000 -#define CONFIG_SYS_PCI1_IO_BUS 0x00000000 -#define CONFIG_SYS_PCI1_IO_PHYS 0xe2000000 -#define CONFIG_SYS_PCI1_IO_SIZE 0x100000 /* 1M */ - -#if defined(CONFIG_PCI) - -#if !defined(CONFIG_PCI_PNP) - #define PCI_ENET0_IOADDR 0xe0000000 - #define PCI_ENET0_MEMADDR 0xe0000000 - #define PCI_IDSEL_NUMBER 0x0c /* slot0->3(IDSEL)=12->15 */ -#endif - -#undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ - -#endif /* CONFIG_PCI */ - -#ifdef CONFIG_TSEC_ENET - -#define CONFIG_TSEC1 1 -#define CONFIG_TSEC1_NAME "TSEC0" -#define CONFIG_TSEC2 1 -#define CONFIG_TSEC2_NAME "TSEC1" -#define TSEC1_PHY_ADDR 0 -#define TSEC2_PHY_ADDR 1 -#define TSEC1_PHYIDX 0 -#define TSEC2_PHYIDX 0 -#define TSEC1_FLAGS TSEC_GIGABIT -#define TSEC2_FLAGS TSEC_GIGABIT - -/* Options are: TSEC[0-1] */ -#define CONFIG_ETHPRIME "TSEC0" - -#endif /* CONFIG_TSEC_ENET */ - -/* - * Environment - */ - -#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ -#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - -/* - * Miscellaneous configurable options - */ - -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -/* - * For booting Linux, the board info and command line data - * have to be in the first 64 MB of memory, since this is - * the maximum mapped by the Linux kernel during initialization. - */ -#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory map for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ - -/* - * Environment Configuration - */ -#if defined(CONFIG_TSEC_ENET) -#define CONFIG_HAS_ETH0 -#define CONFIG_HAS_ETH1 -#define CONFIG_HAS_ETH2 -#define CONFIG_HAS_ETH3 -#endif - -#define CONFIG_IPADDR 192.168.1.253 - -#define CONFIG_HOSTNAME "unknown" -#define CONFIG_ROOTPATH "/nfsroot" -#define CONFIG_BOOTFILE "your.uImage" - -#define CONFIG_SERVERIP 192.168.1.1 -#define CONFIG_GATEWAYIP 192.168.1.1 -#define CONFIG_NETMASK 255.255.255.0 - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "netdev=eth0\0" \ - "consoledev=ttyCPM\0" \ - "ramdiskaddr=1000000\0" \ - "ramdiskfile=your.ramdisk.u-boot\0" \ - "fdtaddr=400000\0" \ - "fdtfile=mpc8560ads.dtb\0" - -#endif /* __CONFIG_H */ diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 106d1e6..5f36951 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -151,7 +151,6 @@ * These can be toggled for performance analysis, otherwise use default. */ #define CONFIG_L2_CACHE /* toggle L2 cache */ -#define CONFIG_BTB /* toggle branch predition */ #define CONFIG_ENABLE_36BIT_PHYS @@ -171,7 +170,6 @@ extern unsigned long get_sdram_size(void); #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 1 /* DDR3 Controller Settings */ #define CONFIG_SYS_DDR_CS0_BNDS 0x0000003f @@ -613,7 +611,6 @@ extern unsigned long get_sdram_size(void); #endif #define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "uImage" #define CONFIG_UBOOTPATH u-boot.bin/* U-Boot image on TFTP server */ #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -643,10 +640,10 @@ extern unsigned long get_sdram_size(void); "ext2load usb 0:4 $fdtaddr $fdtfile;" \ "ext2load usb 0:4 $ramdiskaddr $ramdiskfile;" \ "bootm $loadaddr $ramdiskaddr $fdtaddr\0" \ - CONFIG_BOOTMODE + BOOTMODE #if defined(CONFIG_TARGET_P1010RDB_PA) -#define CONFIG_BOOTMODE \ +#define BOOTMODE \ "boot_bank0=i2c dev 0; i2c mw 18 1 f1; i2c mw 18 3 f0;" \ "mw.b ffb00011 0; mw.b ffb00009 0; reset\0" \ "boot_bank1=i2c dev 0; i2c mw 18 1 f1; i2c mw 18 3 f0;" \ @@ -655,7 +652,7 @@ extern unsigned long get_sdram_size(void); "mw.b ffb00011 0; mw.b ffb00017 1; reset\0" #elif defined(CONFIG_TARGET_P1010RDB_PB) -#define CONFIG_BOOTMODE \ +#define BOOTMODE \ "boot_bank0=i2c dev 0; i2c mw 18 1 fe; i2c mw 18 3 0;" \ "i2c mw 19 1 2; i2c mw 19 3 e1; reset\0" \ "boot_bank1=i2c dev 0; i2c mw 18 1 fe; i2c mw 18 3 0;" \ diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index e6d5321..045d911 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -58,7 +58,6 @@ #define CONFIG_SYS_CACHE_STASHING #define CONFIG_BACKSIDE_L2_CACHE #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E -#define CONFIG_BTB /* toggle branch predition */ #define CONFIG_ENABLE_36BIT_PHYS @@ -94,7 +93,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x52 @@ -414,7 +412,6 @@ * Environment Configuration */ #define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "uImage" #define CONFIG_UBOOTPATH u-boot.bin #define __USB_PHY_TYPE utmi diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index d24cfce..f803b51 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -121,7 +121,6 @@ #define CONFIG_SYS_CACHE_STASHING #define CONFIG_BACKSIDE_L2_CACHE #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E -#define CONFIG_BTB /* toggle branch predition */ #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif @@ -153,7 +152,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #if defined(CONFIG_TARGET_T1024RDB) #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x51 @@ -373,7 +371,6 @@ #ifdef CONFIG_FSL_DIU_FB #define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_CCSRBAR + 0x180000) #define CONFIG_VIDEO_BMP_LOGO -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS /* * With CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS, flash I/O is really slow, so * disable empty flash sector detection, which is I/O-intensive. @@ -535,7 +532,6 @@ * Environment Configuration */ #define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "uImage" #define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */ #define __USB_PHY_TYPE utmi diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 9433f14..8a71807 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -98,7 +98,6 @@ #define CONFIG_SYS_CACHE_STASHING #define CONFIG_BACKSIDE_L2_CACHE #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E -#define CONFIG_BTB /* toggle branch predition */ #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif @@ -133,7 +132,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x51 @@ -553,7 +551,6 @@ * Environment Configuration */ #define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "uImage" #define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/ #define __USB_PHY_TYPE utmi diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index a41f9f0..76e00cc 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -88,7 +88,6 @@ * These can be toggled for performance analysis, otherwise use default. */ #define CONFIG_SYS_CACHE_STASHING -#define CONFIG_BTB /* toggle branch predition */ #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif @@ -118,7 +117,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 2 -#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_SYS_SPD_BUS_NUM 0 #define CONFIG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ #define SPD_EEPROM_ADDRESS1 0x51 @@ -539,7 +537,6 @@ * Environment Configuration */ #define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "uImage" #define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server */ #define __USB_PHY_TYPE utmi diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 7165ba0..35064fe 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -83,7 +83,6 @@ * These can be toggled for performance analysis, otherwise use default. */ #define CONFIG_SYS_CACHE_STASHING -#define CONFIG_BTB /* toggle branch predition */ #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif @@ -113,7 +112,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_SYS_SPD_BUS_NUM 0 #define CONFIG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ #define SPD_EEPROM_ADDRESS1 0x51 @@ -492,7 +490,6 @@ * Environment Configuration */ #define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "uImage" #define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server */ #define __USB_PHY_TYPE utmi diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index daccd81..8c9e580 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -65,7 +65,6 @@ * These can be toggled for performance analysis, otherwise use default. */ #define CONFIG_SYS_CACHE_STASHING -#define CONFIG_BTB /* toggle branch predition */ #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif @@ -94,7 +93,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 /* * IFC Definitions @@ -216,7 +214,6 @@ * Environment Configuration */ #define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "uImage" #define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/ #define HVBOOT \ diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index 63805d3..456ed43 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -44,9 +44,6 @@ #endif /* CONFIG_MTD_RAW_NAND */ /* Environment information */ - -#define CONFIG_BOOTFILE "uImage" - #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=0x82000000\0" \ "console=ttyS2,115200n8\0" \ diff --git a/include/configs/aspeed-common.h b/include/configs/aspeed-common.h index 96526e1..0954bc0 100644 --- a/include/configs/aspeed-common.h +++ b/include/configs/aspeed-common.h @@ -33,9 +33,4 @@ * NS16550 Configuration */ -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - #endif /* __AST_COMMON_CONFIG_H */ diff --git a/include/configs/at91-sama5_common.h b/include/configs/at91-sama5_common.h index b93c67b..669a8ec 100644 --- a/include/configs/at91-sama5_common.h +++ b/include/configs/at91-sama5_common.h @@ -15,11 +15,6 @@ #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - #ifdef CONFIG_SD_BOOT #else diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index c9344e8..820c6a9 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -40,11 +40,6 @@ #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ /* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE 1 - -/* * SDRAM: 1 bank, min 32, max 128 MB * Initialized before u-boot gets started. */ diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index 7fce98f..995b009 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -39,11 +39,6 @@ #define CONFIG_ATMEL_LCD_BGR555 #endif -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* SDRAM */ #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x04000000 diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index 485211c..f523d47 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -41,11 +41,6 @@ #define CONFIG_ATMEL_LCD 1 #define CONFIG_ATMEL_LCD_BGR555 1 -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE 1 - /* SDRAM */ #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 #define CONFIG_SYS_SDRAM_SIZE 0x04000000 diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index 973e889..a6f0844 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -32,11 +32,6 @@ /* board specific(not enough SRAM) */ #define CONFIG_AT91SAM9G45_LCD_BASE 0x73E00000 -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* SDRAM */ #define CONFIG_SYS_SDRAM_BASE 0x70000000 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h index f102dbe..1771def 100644 --- a/include/configs/at91sam9n12ek.h +++ b/include/configs/at91sam9n12ek.h @@ -23,11 +23,6 @@ #define CONFIG_LCD_INFO_BELOW_LOGO #define CONFIG_ATMEL_LCD_RGB565 -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index e6d5b99..47c55ba 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -16,11 +16,6 @@ #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ /* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - -/* * define CONFIG_USB_EHCI_HCD to enable USB Hi-Speed (aka 2.0) * NB: in this case, USB 1.1 devices won't be recognized. */ diff --git a/include/configs/axs10x.h b/include/configs/axs10x.h index c02d25c..8d74df4 100644 --- a/include/configs/axs10x.h +++ b/include/configs/axs10x.h @@ -58,11 +58,6 @@ "; fi\0" /* - * Environment configuration - */ -#define CONFIG_BOOTFILE "uImage" - -/* * Console configuration */ diff --git a/include/configs/blanche.h b/include/configs/blanche.h index 2135ba7..4f8da59 100644 --- a/include/configs/blanche.h +++ b/include/configs/blanche.h @@ -29,7 +29,6 @@ #define CONFIG_SH_QSPI_BASE 0xE6B10000 #else #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define CONFIG_FLASH_SHOW_PROGRESS 45 #define CONFIG_SYS_FLASH_BASE 0x00000000 #define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MB */ diff --git a/include/configs/brppt2.h b/include/configs/brppt2.h index 7ab7f55..612999f 100644 --- a/include/configs/brppt2.h +++ b/include/configs/brppt2.h @@ -17,7 +17,6 @@ #define CONFIG_SYS_PL310_BASE L2_PL310_BASE #endif /* !CONFIG_SYS_L2CACHE_OFF */ -#define CONFIG_BOARD_POSTCLK_INIT #define CONFIG_MXC_GPT_HCLK /* MMC */ diff --git a/include/configs/bur_cfg_common.h b/include/configs/bur_cfg_common.h index 05915b4..9d5a038 100644 --- a/include/configs/bur_cfg_common.h +++ b/include/configs/bur_cfg_common.h @@ -27,7 +27,6 @@ #define CONFIG_NET_RETRY_COUNT 10 /* Network console */ -#define CONFIG_BOOTP_MAY_FAIL /* if we don't have DHCP environment */ /* As stated above, the following choices are optional. */ diff --git a/include/configs/chromebook_samus.h b/include/configs/chromebook_samus.h index 9d5a63c..e29be3f 100644 --- a/include/configs/chromebook_samus.h +++ b/include/configs/chromebook_samus.h @@ -15,9 +15,6 @@ #include <configs/x86-common.h> #include <configs/x86-chromebook.h> -/* We can rely on running natively, and this saves code size */ -#undef CONFIG_BIOSEMU - #undef CONFIG_STD_DEVICES_SETTINGS #define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,i8042-kbd,serial\0" \ "stdout=vidconsole,serial\0" \ diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h index 81315f6..9d3ee7f 100644 --- a/include/configs/cobra5272.h +++ b/include/configs/cobra5272.h @@ -88,11 +88,6 @@ . = DEFINED(env_offset) ? env_offset : .; \ env/embedded.o(.text); -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - #ifdef CONFIG_MCFFEC # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY diff --git a/include/configs/colibri_pxa270.h b/include/configs/colibri_pxa270.h index 975f745..6cb75e5 100644 --- a/include/configs/colibri_pxa270.h +++ b/include/configs/colibri_pxa270.h @@ -51,8 +51,6 @@ #define DM9000_IO (CONFIG_DM9000_BASE) #define DM9000_DATA (CONFIG_DM9000_BASE + 4) #define CONFIG_NET_RETRY_COUNT 10 - -#define CONFIG_BOOTP_BOOTFILESIZE #endif /* diff --git a/include/configs/controlcenterdc.h b/include/configs/controlcenterdc.h index 7fb96e8..cad5796 100644 --- a/include/configs/controlcenterdc.h +++ b/include/configs/controlcenterdc.h @@ -76,7 +76,6 @@ #define CONFIG_HOSTNAME "ccdc" #define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "ccdc.img" #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth1\0" \ diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index bd26412..c5a8567 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -59,7 +59,6 @@ #define CONFIG_SYS_CACHE_STASHING #define CONFIG_BACKSIDE_L2_CACHE #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E -#define CONFIG_BTB /* toggle branch predition */ #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif @@ -97,7 +96,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_SYS_SPD_BUS_NUM 1 #define SPD_EEPROM_ADDRESS1 0x51 @@ -411,7 +409,6 @@ * Environment Configuration */ #define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "uImage" #define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */ #ifdef CONFIG_TARGET_P4080DS diff --git a/include/configs/corvus.h b/include/configs/corvus.h index 27284f7..5347115 100644 --- a/include/configs/corvus.h +++ b/include/configs/corvus.h @@ -42,12 +42,6 @@ #define CONFIG_RED_LED AT91_PIN_PD31 /* this is the user1 led */ #define CONFIG_GREEN_LED AT91_PIN_PD0 /* this is the user2 led */ - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* SDRAM */ #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 956a965..fa7afab 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -155,7 +155,6 @@ /* * U-Boot general configuration */ -#define CONFIG_BOOTFILE "uImage" /* Boot file name */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index 7baae3b..41d469d 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -72,6 +72,5 @@ /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ #define CONFIG_SPD_EEPROM 0x4e -#define CONFIG_BOARD_ECC_SUPPORT /* this board supports ECC */ #endif /* _CONFIG_DB_MV7846MP_GP_H */ diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index f30958f..0a701e7 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -94,8 +94,6 @@ * U-Boot Commands */ -#define CONFIG_BOOTFILE "uImage" - /* * SPL specific defines */ diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index 3059bc0..0637c7d 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -47,10 +47,6 @@ /* TWL4030 */ /* BOOTP/DHCP options */ -#define CONFIG_BOOTP_NISDOMAIN -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_TIMEOFFSET -#undef CONFIG_BOOTP_VENDOREX /* Environment information */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/draak.h b/include/configs/draak.h index e3e2b6a..c66a481 100644 --- a/include/configs/draak.h +++ b/include/configs/draak.h @@ -19,7 +19,6 @@ /* Environment in eMMC, at the end of 2nd "boot sector" */ -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define CONFIG_FLASH_SHOW_PROGRESS 45 #define CONFIG_SYS_FLASH_BANKS_LIST { 0x08000000 } #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT diff --git a/include/configs/dragonboard410c.h b/include/configs/dragonboard410c.h index 9f765fa..43a179f 100644 --- a/include/configs/dragonboard410c.h +++ b/include/configs/dragonboard410c.h @@ -30,9 +30,6 @@ * it has to be done after each HCD reset */ #define CONFIG_EHCI_HCD_INIT_AFTER_RESET -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE - #define BOOT_TARGET_DEVICES(func) \ func(USB, usb, 0) \ func(MMC, mmc, 1) \ diff --git a/include/configs/dragonboard820c.h b/include/configs/dragonboard820c.h index e71dd24..229e1a3 100644 --- a/include/configs/dragonboard820c.h +++ b/include/configs/dragonboard820c.h @@ -26,9 +26,6 @@ /* Generic Timer Definitions */ #define COUNTER_FREQUENCY 19000000 -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE - #ifndef CONFIG_SPL_BUILD #include <config_distro_bootcmd.h> #endif diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index 6ad8722..d983cb7 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -32,11 +32,6 @@ * Environment is in the second sector of the first 256k of flash * *----------------------------------------------------------------------*/ -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - #define CONFIG_MCFTMR #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ diff --git a/include/configs/ebisu.h b/include/configs/ebisu.h index 178b050..cbd1445 100644 --- a/include/configs/ebisu.h +++ b/include/configs/ebisu.h @@ -21,7 +21,6 @@ /* Environment in eMMC, at the end of 2nd "boot sector" */ -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define CONFIG_FLASH_SHOW_PROGRESS 45 #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_BANKS_LIST { 0x08000000 } diff --git a/include/configs/emsdp.h b/include/configs/emsdp.h index 2ceefed..f1b2dda 100644 --- a/include/configs/emsdp.h +++ b/include/configs/emsdp.h @@ -18,7 +18,6 @@ /* * Environment */ -#define CONFIG_BOOTFILE "app.bin" #define CONFIG_EXTRA_ENV_SETTINGS \ "upgrade_image=u-boot.bin\0" \ diff --git a/include/configs/espresso7420.h b/include/configs/espresso7420.h index 2495db9..d936b7f 100644 --- a/include/configs/espresso7420.h +++ b/include/configs/espresso7420.h @@ -10,8 +10,6 @@ #include <configs/exynos7420-common.h> -#define CONFIG_BOARD_COMMON - #define CONFIG_ESPRESSO7420 #define CONFIG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h index d88c14a..ef91146 100644 --- a/include/configs/ethernut5.h +++ b/include/configs/ethernut5.h @@ -105,7 +105,6 @@ /* DHCP/BOOTP options */ #ifdef CONFIG_CMD_DHCP -#define CONFIG_BOOTP_BOOTFILESIZE #define CONFIG_SYS_AUTOLOAD "n" #endif diff --git a/include/configs/exynos4-common.h b/include/configs/exynos4-common.h index 52dcf7a..4202c62 100644 --- a/include/configs/exynos4-common.h +++ b/include/configs/exynos4-common.h @@ -12,8 +12,6 @@ #include "exynos-common.h" -#define CONFIG_BOARD_COMMON - /* SD/MMC configuration */ #define CONFIG_MMC_DEFAULT_DEV 0 diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h index 90d095d..410243b 100644 --- a/include/configs/exynos5-common.h +++ b/include/configs/exynos5-common.h @@ -58,30 +58,6 @@ #define CONFIG_SYS_MONITOR_BASE 0x00000000 -#define CONFIG_SECURE_BL1_ONLY - -/* Secure FW size configuration */ -#ifdef CONFIG_SECURE_BL1_ONLY -#define CONFIG_SEC_FW_SIZE (8 << 10) /* 8KB */ -#else -#define CONFIG_SEC_FW_SIZE 0 -#endif - -/* Configuration of BL1, BL2, ENV Blocks on mmc */ -#define CONFIG_RES_BLOCK_SIZE (512) -#define CONFIG_BL1_SIZE (16 << 10) /*16 K reserved for BL1*/ -#define CONFIG_BL2_SIZE (512UL << 10UL) /* 512 KB */ - -#define CONFIG_BL1_OFFSET (CONFIG_RES_BLOCK_SIZE + CONFIG_SEC_FW_SIZE) -#define CONFIG_BL2_OFFSET (CONFIG_BL1_OFFSET + CONFIG_BL1_SIZE) - -/* U-Boot copy size from boot Media to DRAM.*/ -#define BL2_START_OFFSET (CONFIG_BL2_OFFSET/512) -#define BL2_SIZE_BLOC_COUNT (CONFIG_BL2_SIZE/512) - -#define EXYNOS_COPY_SPI_FNPTR_ADDR 0x02020058 -#define SPI_FLASH_UBOOT_POS (CONFIG_SEC_FW_SIZE + CONFIG_BL1_SIZE) - /* SPI */ /* Ethernet Controllor Driver */ diff --git a/include/configs/exynos5-dt-common.h b/include/configs/exynos5-dt-common.h index 00b6778..bcbdfa7 100644 --- a/include/configs/exynos5-dt-common.h +++ b/include/configs/exynos5-dt-common.h @@ -21,8 +21,6 @@ #define FLASH_SIZE (4 << 20) #define CONFIG_SPI_BOOTING -#define CONFIG_BOARD_COMMON - /* Display */ #ifdef CONFIG_LCD #define CONFIG_EXYNOS_FB diff --git a/include/configs/exynos78x0-common.h b/include/configs/exynos78x0-common.h index 8d3449f..6b1df63 100644 --- a/include/configs/exynos78x0-common.h +++ b/include/configs/exynos78x0-common.h @@ -36,8 +36,6 @@ #define CONFIG_SYS_BAUDRATE_TABLE \ {9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600} -#define CONFIG_BOARD_COMMON - #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_2M - GENERATED_GBL_DATA_SIZE) /* DRAM Memory Banks */ diff --git a/include/configs/gazerbeam.h b/include/configs/gazerbeam.h index 7e13464..7a08c33 100644 --- a/include/configs/gazerbeam.h +++ b/include/configs/gazerbeam.h @@ -83,7 +83,6 @@ /* TODO: Turn into string option and migrate to Kconfig */ #define CONFIG_HOSTNAME "gazerbeam" #define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "uImage" #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ diff --git a/include/configs/hikey.h b/include/configs/hikey.h index c5f9bce..29a0d94 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -41,9 +41,6 @@ #define CONFIG_HIKEY_GPIO -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* Initial environment variables */ /* diff --git a/include/configs/hsdk-4xd.h b/include/configs/hsdk-4xd.h index 21a984a..09fbbe9 100644 --- a/include/configs/hsdk-4xd.h +++ b/include/configs/hsdk-4xd.h @@ -104,7 +104,6 @@ setenv core_iccm_3 0x6; setenv core_dccm_3 0x6;\0" /* * Environment configuration */ -#define CONFIG_BOOTFILE "uImage" /* Cli configuration */ #define CONFIG_SYS_CBSIZE SZ_2K diff --git a/include/configs/hsdk.h b/include/configs/hsdk.h index c8c28bb..aa00b0f 100644 --- a/include/configs/hsdk.h +++ b/include/configs/hsdk.h @@ -100,11 +100,6 @@ setenv core_iccm_1 0x6; setenv core_dccm_1 0x6; \ setenv core_iccm_2 0x10; setenv core_dccm_2 0x10; \ setenv core_iccm_3 0x6; setenv core_dccm_3 0x6;\0" -/* - * Environment configuration - */ -#define CONFIG_BOOTFILE "uImage" - /* Cli configuration */ #define CONFIG_SYS_CBSIZE SZ_2K diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h index 8de89a4..08b9ec7 100644 --- a/include/configs/ids8313.h +++ b/include/configs/ids8313.h @@ -199,7 +199,6 @@ /* * U-Boot environment setup */ -#define CONFIG_BOOTP_BOOTFILESIZE /* * The reserved memory @@ -214,7 +213,6 @@ #define CONFIG_NETDEV eth1 #define CONFIG_HOSTNAME "ids8313" #define CONFIG_ROOTPATH "/opt/eldk-4.2/ppc_6xx" -#define CONFIG_BOOTFILE "ids8313/uImage" #define CONFIG_UBOOTPATH "ids8313/u-boot.bin" #define CONFIG_FDTFILE "ids8313/ids8313.dtb" #define CONFIG_ENV_FLAGS_LIST_STATIC "ethaddr:mo,eth1addr:mo" diff --git a/include/configs/integratorap.h b/include/configs/integratorap.h index 6d7d798..91116f1 100644 --- a/include/configs/integratorap.h +++ b/include/configs/integratorap.h @@ -19,11 +19,6 @@ /* Integrator/AP-specific configuration */ #define CONFIG_SYS_HZ_CLOCK 24000000 /* Timer 1 is clocked at 24Mhz */ -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* Flash settings */ #define CONFIG_SYS_FLASH_SIZE 0x02000000 /* 32 MiB */ #define CONFIG_SYS_MAX_FLASH_SECT 128 diff --git a/include/configs/integratorcp.h b/include/configs/integratorcp.h index 3ff7bb9..467423d 100644 --- a/include/configs/integratorcp.h +++ b/include/configs/integratorcp.h @@ -29,7 +29,6 @@ #define CONFIG_SERVERIP 192.168.1.100 #define CONFIG_IPADDR 192.168.1.104 -#define CONFIG_BOOTFILE "uImage" /* * Miscellaneous configurable options diff --git a/include/configs/iot_devkit.h b/include/configs/iot_devkit.h index a1b8c06..6092933 100644 --- a/include/configs/iot_devkit.h +++ b/include/configs/iot_devkit.h @@ -68,10 +68,4 @@ CONFIG_SYS_SDRAM_BASE) - \ CONFIG_SYS_MALLOC_LEN - \ CONFIG_ENV_SIZE - -/* - * Environment - */ -#define CONFIG_BOOTFILE "app.bin" - #endif /* _CONFIG_IOT_DEVKIT_H_ */ diff --git a/include/configs/km/keymile-common.h b/include/configs/km/keymile-common.h index d321ebd..85cf516 100644 --- a/include/configs/km/keymile-common.h +++ b/include/configs/km/keymile-common.h @@ -27,11 +27,6 @@ #define CONFIG_LOADS_ECHO #define CONFIG_SYS_LOADS_BAUD_CHANGE -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - #ifndef CONFIG_KM_DEF_ENV_BOOTPARAMS #define CONFIG_KM_DEF_ENV_BOOTPARAMS \ "actual_bank=0\0" diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index 8453be8..97f6453 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -23,7 +23,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x54 @@ -75,7 +74,6 @@ #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE_PHYS } -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define CONFIG_SYS_WRITE_SWAPPED_DATA #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index ca0cb31..707926f 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -152,7 +152,6 @@ #define CONFIG_SYS_CACHE_STASHING #define CONFIG_BACKSIDE_L2_CACHE #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E -#define CONFIG_BTB /* toggle branch predition */ #define CONFIG_ENABLE_36BIT_PHYS @@ -176,7 +175,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x54 diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h index 448749a..9eeb7ef 100644 --- a/include/configs/kontron_sl28.h +++ b/include/configs/kontron_sl28.h @@ -19,7 +19,6 @@ #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #define CONFIG_VERY_BIG_RAM -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h index b912db1..83bd6bc 100644 --- a/include/configs/legoev3.h +++ b/include/configs/legoev3.h @@ -50,7 +50,6 @@ /* * U-Boot general configuration */ -#define CONFIG_BOOTFILE "uImage" /* Boot file name */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ diff --git a/include/configs/ls1012a2g5rdb.h b/include/configs/ls1012a2g5rdb.h index 0263bb8..8191c85 100644 --- a/include/configs/ls1012a2g5rdb.h +++ b/include/configs/ls1012a2g5rdb.h @@ -10,7 +10,6 @@ /* DDR */ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 1 #define CONFIG_SYS_SDRAM_SIZE 0x40000000 /* SATA */ diff --git a/include/configs/ls1012afrdm.h b/include/configs/ls1012afrdm.h index ef57cf6..7735a00 100644 --- a/include/configs/ls1012afrdm.h +++ b/include/configs/ls1012afrdm.h @@ -10,9 +10,7 @@ /* DDR */ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 1 #define CONFIG_SYS_SDRAM_SIZE 0x20000000 -#define CONFIG_CHIP_SELECTS_PER_CTRL 1 #ifndef CONFIG_SPL_BUILD #undef BOOT_TARGET_DEVICES diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h index c61865c..7d8d6ee 100644 --- a/include/configs/ls1012afrwy.h +++ b/include/configs/ls1012afrwy.h @@ -14,10 +14,8 @@ #define BOARD_REV_MASK 0x001A0000 /* DDR */ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 1 #define SYS_SDRAM_SIZE_512 0x20000000 #define SYS_SDRAM_SIZE_1024 0x40000000 -#define CONFIG_CHIP_SELECTS_PER_CTRL 1 /* ENV */ #define CONFIG_SYS_FSL_QSPI_BASE 0x40000000 diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h index cbcb3f7..d57f28e 100644 --- a/include/configs/ls1012aqds.h +++ b/include/configs/ls1012aqds.h @@ -11,7 +11,6 @@ /* DDR */ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 1 #define CONFIG_SYS_SDRAM_SIZE 0x40000000 /* diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h index c9a152e..c51c4f2 100644 --- a/include/configs/ls1012ardb.h +++ b/include/configs/ls1012ardb.h @@ -11,7 +11,6 @@ /* DDR */ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 1 #define CONFIG_SYS_SDRAM_SIZE 0x40000000 /* diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 2e5b804..4e5228a 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -59,8 +59,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 - /* * Serial Port */ diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 8c4cb7b..b6501e8 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -54,7 +54,6 @@ #define CONFIG_SYS_DDR_RAW_TIMING #endif #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE @@ -99,7 +98,6 @@ #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_FLASH_SHOW_PROGRESS 45 -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define CONFIG_SYS_WRITE_SWAPPED_DATA #define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */ diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index 5f6c2a0..824078d 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -77,8 +77,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 - /* Serial Port */ #define CONFIG_SYS_NS16550_SERIAL #ifndef CONFIG_DM_SERIAL diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index dcee79d..fada8aa 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -79,8 +79,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 - /* * IFC Definitions */ @@ -121,7 +119,6 @@ #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE_PHYS } -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define CONFIG_SYS_WRITE_SWAPPED_DATA #endif diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h index a517346..8bdfddc 100644 --- a/include/configs/ls1028a_common.h +++ b/include/configs/ls1028a_common.h @@ -40,7 +40,6 @@ /* Miscellaneous configurable options */ /* Physical Memory Map */ -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index ea6831b..e9919cd 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -12,7 +12,6 @@ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 /* Physical Memory Map */ -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define SPD_EEPROM_ADDRESS 0x51 #define CONFIG_SYS_SPD_BUS_NUM 0 @@ -92,7 +91,6 @@ #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS, \ CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000} -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define CONFIG_SYS_WRITE_SWAPPED_DATA /* diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index 31b578a..c904c9c 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -12,7 +12,6 @@ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 /* Physical Memory Map */ -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_SYS_SPD_BUS_NUM 0 @@ -62,7 +61,6 @@ #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE_PHYS } -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define CONFIG_SYS_WRITE_SWAPPED_DATA /* diff --git a/include/configs/ls1046afrwy.h b/include/configs/ls1046afrwy.h index 14ad84a..8425d17 100644 --- a/include/configs/ls1046afrwy.h +++ b/include/configs/ls1046afrwy.h @@ -11,7 +11,6 @@ #define CONFIG_LAYERSCAPE_NS_ACCESS #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_SYS_UBOOT_BASE 0x40100000 diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index 3d72c67..2972e3b 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -12,7 +12,6 @@ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 /* Physical Memory Map */ -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define SPD_EEPROM_ADDRESS 0x51 #define CONFIG_SYS_SPD_BUS_NUM 0 @@ -105,7 +104,6 @@ #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS, \ CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000} -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define CONFIG_SYS_WRITE_SWAPPED_DATA /* diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index 8ed1dce..f6ff690 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -13,7 +13,6 @@ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 /* Physical Memory Map */ -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define SPD_EEPROM_ADDRESS 0x51 #define CONFIG_SYS_SPD_BUS_NUM 0 diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 33b70c8..965fdfe 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -132,7 +132,6 @@ unsigned long long get_qixis_addr(void); #endif /* Physical Memory Map */ -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index f2725af..766da39 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -139,7 +139,6 @@ unsigned long long get_qixis_addr(void); /* Physical Memory Map */ /* fixme: these need to be checked against the board */ -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index 7554de1..1c59a89 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -27,7 +27,6 @@ #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 #define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */ #define CONFIG_DIMM_SLOTS_PER_CTLR 2 -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #ifdef CONFIG_SYS_FSL_HAS_DP_DDR #define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR 1 #endif diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 1c05b08..de77872 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -37,7 +37,6 @@ #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 #define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */ #define CONFIG_DIMM_SLOTS_PER_CTLR 2 -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #ifdef CONFIG_SYS_FSL_HAS_DP_DDR #define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR 1 #endif diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index e31f8d0..c407fa8 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -34,7 +34,6 @@ #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 #define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */ #define CONFIG_DIMM_SLOTS_PER_CTLR 2 -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_SYS_MONITOR_LEN (936 * 1024) /* Miscellaneous configurable options */ diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index 8486cf8..98fb264 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -119,11 +119,6 @@ /* Watchdog */ /* - * Boot Linux - */ -#define CONFIG_BOOTFILE "boot/fitImage" - -/* * NAND SPL */ #define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx" diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h index 073c5a5..e4df9d8 100644 --- a/include/configs/maxbcm.h +++ b/include/configs/maxbcm.h @@ -64,6 +64,5 @@ /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ #define CONFIG_SYS_SDRAM_SIZE SZ_1G -#define CONFIG_BOARD_ECC_SUPPORT /* this board supports ECC */ #endif /* _CONFIG_DB_MV7846MP_GP_H */ diff --git a/include/configs/meesc.h b/include/configs/meesc.h index 55f64b5..e841c94 100644 --- a/include/configs/meesc.h +++ b/include/configs/meesc.h @@ -38,11 +38,6 @@ */ /* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - -/* * SDRAM: 1 bank, min 32, max 128 MB * Initialized before u-boot gets started. */ diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index fd5a9cf..6bde4c2 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -37,11 +37,6 @@ #define XILINX_DCACHE_BYTE_SIZE 32768 #endif -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* size of console buffer */ #define CONFIG_SYS_CBSIZE 512 /* max number of command args */ diff --git a/include/configs/mx23_olinuxino.h b/include/configs/mx23_olinuxino.h index 370f000..ab466b6 100644 --- a/include/configs/mx23_olinuxino.h +++ b/include/configs/mx23_olinuxino.h @@ -22,9 +22,6 @@ /* Ethernet */ -/* Booting Linux */ -#define CONFIG_BOOTFILE "uImage" - /* Extra Environment */ #define CONFIG_EXTRA_ENV_SETTINGS \ "update_sd_firmware_filename=u-boot.sd\0" \ diff --git a/include/configs/mx23evk.h b/include/configs/mx23evk.h index 552bf5a..3fb0003 100644 --- a/include/configs/mx23evk.h +++ b/include/configs/mx23evk.h @@ -30,9 +30,6 @@ #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (512 << 10) #endif -/* Boot Linux */ -#define CONFIG_BOOTFILE "uImage" - /* Extra Environments */ #define CONFIG_EXTRA_ENV_SETTINGS \ "update_sd_firmware_filename=u-boot.sd\0" \ diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h index caad95b..fe096d4 100644 --- a/include/configs/mx28evk.h +++ b/include/configs/mx28evk.h @@ -44,9 +44,6 @@ #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (512 << 10) #endif -/* Boot Linux */ -#define CONFIG_BOOTFILE "uImage" - /* Extra Environment */ #define CONFIG_EXTRA_ENV_SETTINGS \ "ubifs_file=filesystem.ubifs\0" \ diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index 5ff931e..a0e4817 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -18,7 +18,6 @@ #endif #endif -#define CONFIG_BOARD_POSTCLK_INIT #define CONFIG_MXC_GPT_HCLK #define CONFIG_SYS_BOOTM_LEN 0x1000000 diff --git a/include/configs/mx7ulp_com.h b/include/configs/mx7ulp_com.h index 75f5cf0..319de9b 100644 --- a/include/configs/mx7ulp_com.h +++ b/include/configs/mx7ulp_com.h @@ -15,7 +15,6 @@ #include "imx7ulp_spl.h" #endif -#define CONFIG_BOARD_POSTCLK_INIT #define CONFIG_SYS_BOOTM_LEN 0x1000000 /* diff --git a/include/configs/mx7ulp_evk.h b/include/configs/mx7ulp_evk.h index 8f2cbc6..e80d748 100644 --- a/include/configs/mx7ulp_evk.h +++ b/include/configs/mx7ulp_evk.h @@ -11,7 +11,6 @@ #include <linux/sizes.h> #include <asm/arch/imx-regs.h> -#define CONFIG_BOARD_POSTCLK_INIT #define CONFIG_SYS_BOOTM_LEN 0x1000000 #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */ diff --git a/include/configs/novena.h b/include/configs/novena.h index 1ce2f4e..c11d13a 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -25,7 +25,6 @@ */ /* Booting Linux */ -#define CONFIG_BOOTFILE "fitImage" #define CONFIG_HOSTNAME "novena" /* Physical Memory Map */ diff --git a/include/configs/nsim.h b/include/configs/nsim.h index 62169af..16c4935 100644 --- a/include/configs/nsim.h +++ b/include/configs/nsim.h @@ -23,11 +23,6 @@ #define CONFIG_SYS_BOOTM_LEN SZ_32M /* - * Environment configuration - */ -#define CONFIG_BOOTFILE "uImage" - -/* * Console configuration */ diff --git a/include/configs/octeontx2_common.h b/include/configs/octeontx2_common.h index 536dff2..494f58b 100644 --- a/include/configs/octeontx2_common.h +++ b/include/configs/octeontx2_common.h @@ -21,9 +21,6 @@ #define CONFIG_BOOT_RETRY_TIME -1 #define CONFIG_BOOT_RETRY_MIN 30 -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE - /** Extra environment settings */ #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=20080000\0" \ diff --git a/include/configs/octeontx_common.h b/include/configs/octeontx_common.h index 8185f4b..3ad6a59 100644 --- a/include/configs/octeontx_common.h +++ b/include/configs/octeontx_common.h @@ -50,9 +50,6 @@ #define CONFIG_BOOT_RETRY_TIME -1 #define CONFIG_BOOT_RETRY_MIN 30 -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* AHCI support Definitions */ #ifdef CONFIG_DM_SCSI /** Enable 48-bit SATA addressing */ diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h index a482598..616f25e 100644 --- a/include/configs/odroid_xu3.h +++ b/include/configs/odroid_xu3.h @@ -10,8 +10,6 @@ #include <configs/exynos5420-common.h> #include <configs/exynos5-common.h> -#define CONFIG_BOARD_COMMON - #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define TZPC_BASE_OFFSET 0x10000 diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index 45297b9..e70f5fc 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -146,7 +146,6 @@ /* * U-Boot general configuration */ -#define CONFIG_BOOTFILE "zImage" /* Boot file name */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ diff --git a/include/configs/origen.h b/include/configs/origen.h index 1caeed6..2232518 100644 --- a/include/configs/origen.h +++ b/include/configs/origen.h @@ -58,9 +58,4 @@ #define CONFIG_SYS_INIT_SP_ADDR 0x02040000 -/* U-Boot copy size from boot Media to DRAM.*/ -#define COPY_BL2_SIZE 0x80000 -#define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512) -#define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512) - #endif /* __CONFIG_H */ diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 92008cd..9263189 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -145,7 +145,6 @@ * These can be toggled for performance analysis, otherwise use default. */ #define CONFIG_L2_CACHE -#define CONFIG_BTB #define CONFIG_ENABLE_36BIT_PHYS @@ -165,10 +164,8 @@ #if defined(CONFIG_TARGET_P1020RDB_PD) #define CONFIG_SYS_SDRAM_SIZE_LAW LAW_SIZE_2G -#define CONFIG_CHIP_SELECTS_PER_CTRL 2 #else #define CONFIG_SYS_SDRAM_SIZE_LAW LAW_SIZE_1G -#define CONFIG_CHIP_SELECTS_PER_CTRL 1 #endif #define CONFIG_SYS_SDRAM_SIZE (1u << (CONFIG_SYS_SDRAM_SIZE_LAW - 19)) #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 @@ -549,7 +546,6 @@ */ #define CONFIG_HOSTNAME "unknown" #define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "uImage" #define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */ #ifdef __SW_BOOT_NOR diff --git a/include/configs/pic32mzdask.h b/include/configs/pic32mzdask.h index bcc0781..00aebb9 100644 --- a/include/configs/pic32mzdask.h +++ b/include/configs/pic32mzdask.h @@ -51,11 +51,6 @@ #define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_ARP_TIMEOUT 500 /* millisec */ -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - /*-------------------------------------------------- * USB Configuration */ diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h index f3196ee..3960a5c 100644 --- a/include/configs/pm9261.h +++ b/include/configs/pm9261.h @@ -137,11 +137,6 @@ #define CONFIG_ATMEL_LCD 1 #define CONFIG_ATMEL_LCD_BGR555 1 -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE 1 - /* SDRAM */ #define PHYS_SDRAM 0x20000000 #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index 4856f61..8ee8bbb 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -150,11 +150,6 @@ #define CONFIG_LCD_IN_PSRAM 1 -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE 1 - /* SDRAM */ #define PHYS_SDRAM 0x20000000 #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h index b205391..48b6e1c 100644 --- a/include/configs/pm9g45.h +++ b/include/configs/pm9g45.h @@ -22,11 +22,6 @@ /* general purpose I/O */ #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* SDRAM */ #define CONFIG_SYS_SDRAM_BASE 0x70000000 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 diff --git a/include/configs/presidio_asic.h b/include/configs/presidio_asic.h index 30185b1..3295d43 100644 --- a/include/configs/presidio_asic.h +++ b/include/configs/presidio_asic.h @@ -36,9 +36,6 @@ #define CONFIG_SYS_SERIAL0 PER_UART0_CFG #define CONFIG_SYS_SERIAL1 PER_UART1_CFG -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* SDRAM Bank #1 */ #define DDR_BASE 0x00000000 #define PHYS_SDRAM_1 DDR_BASE diff --git a/include/configs/qemu-arm.h b/include/configs/qemu-arm.h index d45f606..f581107 100644 --- a/include/configs/qemu-arm.h +++ b/include/configs/qemu-arm.h @@ -67,6 +67,5 @@ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MAX_FLASH_SECT 256 /* Sector: 256K, Bank: 64M */ -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #endif /* __CONFIG_H */ diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index e257c0e..296361a 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -43,8 +43,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void); #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_CHIP_SELECTS_PER_CTRL 0 - #define CONFIG_SYS_BOOT_BLOCK 0x00000000 /* boot TLB */ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE @@ -93,7 +91,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void); * Environment Configuration */ #define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "uImage" #define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/ #endif /* __QEMU_PPCE500_H */ diff --git a/include/configs/salvator-x.h b/include/configs/salvator-x.h index 9542b0d..1b3aa30 100644 --- a/include/configs/salvator-x.h +++ b/include/configs/salvator-x.h @@ -19,7 +19,6 @@ /* Environment in eMMC, at the end of 2nd "boot sector" */ -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define CONFIG_FLASH_SHOW_PROGRESS 45 #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_BANKS_LIST { 0x08000000 } diff --git a/include/configs/sam9x60ek.h b/include/configs/sam9x60ek.h index eb96e50..7716ac2 100644 --- a/include/configs/sam9x60ek.h +++ b/include/configs/sam9x60ek.h @@ -21,11 +21,6 @@ #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ /* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - -/* * define CONFIG_USB_EHCI_HCD to enable USB Hi-Speed (aka 2.0) * NB: in this case, USB 1.1 devices won't be recognized. */ diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index 8bfd1fc..2a00bfa 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -90,7 +90,6 @@ #define CONFIG_AT91_WANTS_COMMON_PHY /* BOOTP and DHCP options */ -#define CONFIG_BOOTP_BOOTFILESIZE #if !defined(CONFIG_SPL_BUILD) /* USB configuration */ diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h index d7e86f2..1ea3b65 100644 --- a/include/configs/smdk5250.h +++ b/include/configs/smdk5250.h @@ -15,6 +15,4 @@ #undef CONFIG_EXYNOS_FB #undef CONFIG_EXYNOS_DP -#define CONFIG_BOARD_COMMON - #endif /* __CONFIG_SMDK_H */ diff --git a/include/configs/smdk5420.h b/include/configs/smdk5420.h index 38691b6..f26995d 100644 --- a/include/configs/smdk5420.h +++ b/include/configs/smdk5420.h @@ -15,8 +15,6 @@ #undef CONFIG_EXYNOS_FB #undef CONFIG_EXYNOS_DP -#define CONFIG_BOARD_COMMON - #define CONFIG_SMDK5420 /* which is in a SMDK5420 */ #define CONFIG_SYS_SDRAM_BASE 0x20000000 diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h index f113fa4..84b8537 100644 --- a/include/configs/smdkv310.h +++ b/include/configs/smdkv310.h @@ -10,7 +10,6 @@ #include "exynos4-common.h" -#undef CONFIG_BOARD_COMMON #undef CONFIG_USB_GADGET_DWC2_OTG_PHY /* High Level Configuration Options */ @@ -51,11 +50,6 @@ #define CONFIG_SYS_INIT_SP_ADDR 0x02040000 -/* U-Boot copy size from boot Media to DRAM.*/ -#define COPY_BL2_SIZE 0x80000 -#define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512) -#define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512) - /* Ethernet Controllor Driver */ #ifdef CONFIG_CMD_NET #define CONFIG_ENV_SROM_BANK 1 diff --git a/include/configs/snapper9260.h b/include/configs/snapper9260.h index 10f8fde..5820423 100644 --- a/include/configs/snapper9260.h +++ b/include/configs/snapper9260.h @@ -91,8 +91,6 @@ /* Boot options */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* Environment settings */ /* Console settings */ diff --git a/include/configs/snapper9g45.h b/include/configs/snapper9g45.h index 3889a88..2377190 100644 --- a/include/configs/snapper9g45.h +++ b/include/configs/snapper9g45.h @@ -57,8 +57,6 @@ /* Boot options */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* Environment settings */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/snow.h b/include/configs/snow.h index c082b2d8..00d9b4d 100644 --- a/include/configs/snow.h +++ b/include/configs/snow.h @@ -15,6 +15,4 @@ #include <configs/exynos5-dt-common.h> #include <configs/exynos5-common.h> -#define CONFIG_BOARD_COMMON - #endif /* __CONFIG_SNOW_H */ diff --git a/include/configs/socfpga_arria5_secu1.h b/include/configs/socfpga_arria5_secu1.h index 0935eae..5caffa6 100644 --- a/include/configs/socfpga_arria5_secu1.h +++ b/include/configs/socfpga_arria5_secu1.h @@ -24,9 +24,6 @@ */ #define CONFIG_SYS_I2C_RTC_ADDR 0x68 -/* Booting Linux */ -#define CONFIG_BOOTFILE "zImage" - #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Environment settings */ diff --git a/include/configs/socfpga_dbm_soc1.h b/include/configs/socfpga_dbm_soc1.h index 8acddbe..8f1c2de 100644 --- a/include/configs/socfpga_dbm_soc1.h +++ b/include/configs/socfpga_dbm_soc1.h @@ -10,9 +10,6 @@ /* Memory configurations */ #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB */ -/* Booting Linux */ -#define CONFIG_BOOTFILE "fitImage" - /* Environment is in MMC */ /* Extra Environment */ diff --git a/include/configs/socfpga_is1.h b/include/configs/socfpga_is1.h index 06337d4..f387e40 100644 --- a/include/configs/socfpga_is1.h +++ b/include/configs/socfpga_is1.h @@ -11,9 +11,6 @@ /* Memory configurations */ #define PHYS_SDRAM_1_SIZE 0x10000000 -/* Booting Linux */ -#define CONFIG_BOOTFILE "zImage" - /* Ethernet on SoC (EMAC) */ #if defined(CONFIG_CMD_NET) #define CONFIG_ARP_TIMEOUT 500UL diff --git a/include/configs/socfpga_mcvevk.h b/include/configs/socfpga_mcvevk.h index 3aa231c..e76438e 100644 --- a/include/configs/socfpga_mcvevk.h +++ b/include/configs/socfpga_mcvevk.h @@ -10,9 +10,6 @@ /* Memory configurations */ #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on MCV */ -/* Booting Linux */ -#define CONFIG_BOOTFILE "fitImage" - /* Environment is in MMC */ /* Extra Environment */ diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index 51dc2e4..a06ac6b 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -72,13 +72,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); /* * Environment variable */ - -#ifdef CONFIG_FIT -#define CONFIG_BOOTFILE "kernel.itb" -#else -#define CONFIG_BOOTFILE "Image" -#endif - #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ "bootfile=" CONFIG_BOOTFILE "\0" \ diff --git a/include/configs/socfpga_vining_fpga.h b/include/configs/socfpga_vining_fpga.h index d767492..2d4ce3c 100644 --- a/include/configs/socfpga_vining_fpga.h +++ b/include/configs/socfpga_vining_fpga.h @@ -11,7 +11,6 @@ #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on VINING_FPGA */ /* Booting Linux */ -#define CONFIG_BOOTFILE "fitImage" #define CONFIG_SYS_BOOTM_LEN 0x2000000 /* 32 MiB */ /* Extra Environment */ diff --git a/include/configs/socrates.h b/include/configs/socrates.h index a51a162..4d562d4 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -42,7 +42,6 @@ * These can be toggled for performance analysis, otherwise use default. */ #define CONFIG_L2_CACHE /* toggle L2 cache */ -#define CONFIG_BTB /* toggle branch predition */ #define CONFIG_SYS_INIT_DBCR DBCR_IDM /* Enable Debug Exceptions */ @@ -61,7 +60,6 @@ #define CONFIG_VERY_BIG_RAM #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 2 /* I2C addresses of SPD EEPROMs */ #define SPD_EEPROM_ADDRESS 0x50 /* CTLR 0 DIMM 0 */ @@ -170,11 +168,6 @@ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ /* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - -/* * Miscellaneous configurable options */ diff --git a/include/configs/spring.h b/include/configs/spring.h index 0b05245..2f0a580 100644 --- a/include/configs/spring.h +++ b/include/configs/spring.h @@ -10,6 +10,4 @@ #include <configs/exynos5-dt-common.h> #include <configs/exynos5-common.h> -#define CONFIG_BOARD_COMMON - #endif /* __CONFIG_SPRING_H */ diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h index 4c464cf..3e6feae 100644 --- a/include/configs/stih410-b2260.h +++ b/include/configs/stih410-b2260.h @@ -31,7 +31,6 @@ func(USB, usb, 0) \ func(DHCP, dhcp, na) #include <config_distro_bootcmd.h> -#define CONFIG_BOOTFILE "uImage" #define CONFIG_EXTRA_ENV_SETTINGS \ "kernel_addr_r=0x40000000\0" \ "fdtfile=stih410-b2260.dtb\0" \ diff --git a/include/configs/tb100.h b/include/configs/tb100.h index 6e31bd5..290b5eb 100644 --- a/include/configs/tb100.h +++ b/include/configs/tb100.h @@ -46,11 +46,6 @@ #define ETH1_BASE_ADDRESS 0xFE110000 /* - * Environment configuration - */ -#define CONFIG_BOOTFILE "uImage" - -/* * Console configuration */ diff --git a/include/configs/thunderx_88xx.h b/include/configs/thunderx_88xx.h index 3d770f8..d07a8fe 100644 --- a/include/configs/thunderx_88xx.h +++ b/include/configs/thunderx_88xx.h @@ -33,9 +33,6 @@ #define CONFIG_SYS_SERIAL0 0x87e024000000 #define CONFIG_SYS_SERIAL1 0x87e025000000 -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* Miscellaneous configurable options */ /* Physical Memory Map */ diff --git a/include/configs/ulcb.h b/include/configs/ulcb.h index ca79b03..57e6863 100644 --- a/include/configs/ulcb.h +++ b/include/configs/ulcb.h @@ -19,7 +19,6 @@ /* Environment in eMMC, at the end of 2nd "boot sector" */ -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define CONFIG_FLASH_SHOW_PROGRESS 45 #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_BANKS_LIST { 0x08000000 } diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index c9d3c2d..834943a 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -79,7 +79,6 @@ #define CONFIG_ROOTPATH "/nfs/root/path" #ifdef CONFIG_FIT -#define CONFIG_BOOTFILE "fitImage" #define KERNEL_ADDR_R_OFFSET "0x05100000" #define LINUXBOOT_ENV_SETTINGS \ "tftpboot=tftpboot $kernel_addr_r $bootfile &&" \ @@ -87,11 +86,9 @@ "__nfsboot=run tftpboot\0" #else #ifdef CONFIG_ARM64 -#define CONFIG_BOOTFILE "Image" #define LINUXBOOT_CMD "booti" #define KERNEL_ADDR_R_OFFSET "0x02080000" #else -#define CONFIG_BOOTFILE "zImage" #define LINUXBOOT_CMD "bootz" #define KERNEL_ADDR_R_OFFSET "0x00208000" #endif diff --git a/include/configs/usb_a9263.h b/include/configs/usb_a9263.h index ffa6900..bc40029 100644 --- a/include/configs/usb_a9263.h +++ b/include/configs/usb_a9263.h @@ -23,10 +23,6 @@ /* * Hardware drivers */ -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE /* SDRAM */ #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 diff --git a/include/configs/vexpress_aemv8.h b/include/configs/vexpress_aemv8.h index f0c5ceb..b956bd9 100644 --- a/include/configs/vexpress_aemv8.h +++ b/include/configs/vexpress_aemv8.h @@ -99,9 +99,6 @@ #define CONFIG_PL011_CLOCK 24000000 #endif -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* Miscellaneous configurable options */ /* Physical Memory Map */ diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h index 5f119ae..4b958b4 100644 --- a/include/configs/vexpress_common.h +++ b/include/configs/vexpress_common.h @@ -126,9 +126,6 @@ #define CONFIG_SYS_MMC_MAX_BLK_COUNT 127 -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* Miscellaneous configurable options */ #define LINUX_BOOT_PARAM_ADDR (V2M_BASE + 0x2000) diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index a43fd81..2f02f96 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -68,12 +68,6 @@ */ /* - * Boot Linux - */ - -#define CONFIG_BOOTFILE "uImage" - -/* * SPL */ diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h index 0efc715..b45d2bb 100644 --- a/include/configs/x86-chromebook.h +++ b/include/configs/x86-chromebook.h @@ -24,7 +24,6 @@ #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS #define CONFIG_PCI_IO_SIZE 0xefff -#define CONFIG_BIOSEMU #define VIDEO_IO_OFFSET 0 #define CONFIG_X86EMU_RAW_IO diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index 394978b..15fa864 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -62,12 +62,9 @@ * USB configuration */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* Default environment */ #define CONFIG_ROOTPATH "/opt/nfsroot" #define CONFIG_HOSTNAME "x86" -#define CONFIG_BOOTFILE "bzImage" #define CONFIG_RAMDISK_ADDR 0x4000000 #if defined(CONFIG_GENERATE_ACPI_TABLE) || defined(CONFIG_EFI_STUB) #define CONFIG_OTHBOOTARGS "othbootargs=\0" diff --git a/include/configs/xea.h b/include/configs/xea.h index acaf81d..01942ea 100644 --- a/include/configs/xea.h +++ b/include/configs/xea.h @@ -31,11 +31,6 @@ #define PHYS_SDRAM_1_SIZE 0x10000000 /* Max 256 MB RAM */ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -/* Environment */ - -/* Booting Linux */ -#define CONFIG_BOOTFILE "uImage" - /* Extra Environment */ #define CONFIG_HOSTNAME "xea" diff --git a/include/configs/xilinx_versal.h b/include/configs/xilinx_versal.h index bc72f5f..20f5a72 100644 --- a/include/configs/xilinx_versal.h +++ b/include/configs/xilinx_versal.h @@ -27,10 +27,6 @@ #define CONFIG_SYS_BAUDRATE_TABLE \ { 4800, 9600, 19200, 38400, 57600, 115200 } -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_MAY_FAIL - /* Miscellaneous configurable options */ /* Monitor Command Prompt */ diff --git a/include/configs/xilinx_versal_mini.h b/include/configs/xilinx_versal_mini.h index 00c9718..a94ab1f 100644 --- a/include/configs/xilinx_versal_mini.h +++ b/include/configs/xilinx_versal_mini.h @@ -17,10 +17,6 @@ /* Undef unneeded configs */ #undef CONFIG_EXTRA_ENV_SETTINGS -/* BOOTP options */ -#undef CONFIG_BOOTP_BOOTFILESIZE -#undef CONFIG_BOOTP_MAY_FAIL - #undef CONFIG_SYS_CBSIZE #define CONFIG_SYS_CBSIZE 1024 diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index e51d92f..1f0da1a 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -27,10 +27,6 @@ #define CONFIG_SYS_BAUDRATE_TABLE \ { 4800, 9600, 19200, 38400, 57600, 115200 } -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_MAY_FAIL - #ifdef CONFIG_NAND_ARASAN # define CONFIG_SYS_MAX_NAND_DEVICE 1 #endif diff --git a/include/configs/xilinx_zynqmp_mini.h b/include/configs/xilinx_zynqmp_mini.h index c3c8b4c..baef561 100644 --- a/include/configs/xilinx_zynqmp_mini.h +++ b/include/configs/xilinx_zynqmp_mini.h @@ -18,9 +18,6 @@ #undef CONFIG_EXTRA_ENV_SETTINGS #undef CONFIG_SYS_INIT_SP_ADDR -/* BOOTP options */ -#undef CONFIG_BOOTP_BOOTFILESIZE -#undef CONFIG_BOOTP_MAY_FAIL #undef CONFIG_SYS_CBSIZE #define CONFIG_SYS_CBSIZE 1024 diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h index 8c2cdb5..c8cae59 100644 --- a/include/configs/xtfpga.h +++ b/include/configs/xtfpga.h @@ -97,9 +97,6 @@ /* U-Boot general configuration */ /*==============================*/ -#define CONFIG_BOARD_POSTCLK_INIT - -#define CONFIG_BOOTFILE "uImage" /* Console I/O Buffer Size */ #define CONFIG_SYS_CBSIZE 1024 /* Boot Argument Buffer Size */ diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 780952c..a668453 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -28,7 +28,6 @@ /* Ethernet driver */ #if defined(CONFIG_ZYNQ_GEM) # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN -# define CONFIG_BOOTP_MAY_FAIL #endif /* NOR */ diff --git a/include/env_default.h b/include/env_default.h index 21afd7f..7004a6f 100644 --- a/include/env_default.h +++ b/include/env_default.h @@ -77,7 +77,7 @@ const char default_environment[] = { #ifdef CONFIG_HOSTNAME "hostname=" CONFIG_HOSTNAME "\0" #endif -#ifdef CONFIG_BOOTFILE +#ifdef CONFIG_USE_BOOTFILE "bootfile=" CONFIG_BOOTFILE "\0" #endif #ifdef CONFIG_SYS_LOAD_ADDR diff --git a/net/bootp.c b/net/bootp.c index d83e4eb..a896e1e 100644 --- a/net/bootp.c +++ b/net/bootp.c @@ -1038,9 +1038,6 @@ static void dhcp_send_request_packet(struct bootp_hdr *bp_offer) bcast_ip.s_addr = 0xFFFFFFFFL; net_set_udp_header(iphdr, bcast_ip, PORT_BOOTPS, PORT_BOOTPC, iplen); -#ifdef CONFIG_BOOTP_DHCP_REQUEST_DELAY - udelay(CONFIG_BOOTP_DHCP_REQUEST_DELAY); -#endif /* CONFIG_BOOTP_DHCP_REQUEST_DELAY */ debug("Transmitting DHCPREQUEST packet: len = %d\n", pktlen); net_send_packet(net_tx_packet, pktlen); } diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index a6bc234..0b964f6 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -29,26 +29,11 @@ CONFIG_ATMEL_SPI0 CONFIG_AUTO_ZRELADDR CONFIG_BACKSIDE_L2_CACHE CONFIG_BCM2835_GPIO -CONFIG_BIOSEMU CONFIG_BITBANGMII_MULTI -CONFIG_BL1_OFFSET -CONFIG_BL1_SIZE -CONFIG_BL2_OFFSET -CONFIG_BL2_SIZE CONFIG_BOARDDIR CONFIG_BOARDNAME -CONFIG_BOARD_COMMON -CONFIG_BOARD_ECC_SUPPORT CONFIG_BOARD_NAME -CONFIG_BOARD_POSTCLK_INIT CONFIG_BOARD_SIZE_LIMIT -CONFIG_BOOTFILE -CONFIG_BOOTMODE -CONFIG_BOOTP_BOOTFILESIZE -CONFIG_BOOTP_MAY_FAIL -CONFIG_BOOTP_NISDOMAIN -CONFIG_BOOTP_TIMEOFFSET -CONFIG_BOOTP_VENDOREX CONFIG_BOOTROM_ERR_REG CONFIG_BOOTSCRIPT_ADDR CONFIG_BOOTSCRIPT_COPY_RAM @@ -64,12 +49,9 @@ CONFIG_BS_HDR_ADDR_DEVICE CONFIG_BS_HDR_ADDR_RAM CONFIG_BS_HDR_SIZE CONFIG_BS_SIZE -CONFIG_BTB -CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS CONFIG_CF_DSPI CONFIG_CF_SBF CONFIG_CHAIN_BOOT_CMD -CONFIG_CHIP_SELECTS_PER_CTRL CONFIG_CHROMEOS_EXTRA_ENV_SETTINGS CONFIG_CI_UDC_HAS_HOSTPC CONFIG_CLK_1000_400_200 @@ -83,7 +65,6 @@ CONFIG_CM_REMAP CONFIG_CM_SPD_DETECT CONFIG_CM_TCRAM CONFIG_COMMON_BOOT -CONFIG_CONS_ON_SCC CONFIG_CONS_SCIF0 CONFIG_CONS_SCIF1 CONFIG_CONS_SCIF2 @@ -91,7 +72,6 @@ CONFIG_CONS_SCIF4 CONFIG_CON_ROT CONFIG_CPLD_BR_PRELIM CONFIG_CPLD_OR_PRELIM -CONFIG_CPM2 CONFIG_CQSPI_REF_CLK CONFIG_CUSTOMER_BOARD_SUPPORT CONFIG_DB_784MP_GP @@ -274,7 +254,6 @@ CONFIG_HAS_ETH0 CONFIG_HAS_ETH1 CONFIG_HAS_ETH2 CONFIG_HAS_ETH3 -CONFIG_HAS_FEC CONFIG_HAS_FSL_DR_USB CONFIG_HAS_FSL_MPH_USB CONFIG_HDMI_ENCODER_I2C_ADDR @@ -689,7 +668,6 @@ CONFIG_RESET_PHY_R CONFIG_RESET_TO_RETRY CONFIG_RESET_VECTOR_ADDRESS CONFIG_RESTORE_FLASH -CONFIG_RES_BLOCK_SIZE CONFIG_RMII CONFIG_ROCKCHIP_CHIP_TAG CONFIG_ROCKCHIP_MAX_INIT_SIZE @@ -727,8 +705,6 @@ CONFIG_SC_TIMER_CLK CONFIG_SDCARD CONFIG_SDRAM_OFFSET_FOR_RT CONFIG_SECBOOT -CONFIG_SECURE_BL1_ONLY -CONFIG_SEC_FW_SIZE CONFIG_SERIAL_BOOT CONFIG_SERIAL_FLASH CONFIG_SERIAL_SOFTWARE_FIFO @@ -845,7 +821,6 @@ CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION CONFIG_SYS_AUXCORE_BOOTDATA CONFIG_SYS_BARGSIZE CONFIG_SYS_BAUDRATE_TABLE -CONFIG_SYS_BCSR CONFIG_SYS_BFTIC3_BASE CONFIG_SYS_BFTIC3_SIZE CONFIG_SYS_BMAN_CENA_BASE @@ -1446,11 +1421,6 @@ CONFIG_SYS_LBC_CACHE_BASE CONFIG_SYS_LBC_FLASH_BASE CONFIG_SYS_LBC_LBCR CONFIG_SYS_LBC_LCRR -CONFIG_SYS_LBC_LSDMR_1 -CONFIG_SYS_LBC_LSDMR_2 -CONFIG_SYS_LBC_LSDMR_3 -CONFIG_SYS_LBC_LSDMR_4 -CONFIG_SYS_LBC_LSDMR_5 CONFIG_SYS_LBC_LSDMR_COMMON CONFIG_SYS_LBC_LSRT CONFIG_SYS_LBC_MRTPR @@ -1535,8 +1505,6 @@ CONFIG_SYS_MPC83xx_ESDHC_OFFSET CONFIG_SYS_MPC83xx_USB1_ADDR CONFIG_SYS_MPC83xx_USB1_OFFSET CONFIG_SYS_MPC85XX_NO_RESETVEC -CONFIG_SYS_MPC85xx_CPM_ADDR -CONFIG_SYS_MPC85xx_CPM_OFFSET CONFIG_SYS_MPC85xx_DMA CONFIG_SYS_MPC85xx_DMA1_OFFSET CONFIG_SYS_MPC85xx_DMA2_OFFSET @@ -1825,10 +1793,6 @@ CONFIG_SYS_RCAR_I2C3_BASE CONFIG_SYS_RFD CONFIG_SYS_RGMII1_PHY_ADDR CONFIG_SYS_RGMII2_PHY_ADDR -CONFIG_SYS_RIO_MEM_BUS -CONFIG_SYS_RIO_MEM_PHYS -CONFIG_SYS_RIO_MEM_SIZE -CONFIG_SYS_RIO_MEM_VIRT CONFIG_SYS_ROM_BASE CONFIG_SYS_RSTC_RMR_VAL CONFIG_SYS_RTC_BUS_NUM |