Merge branch 'master' of /home/stefan/git/u-boot/u-boot

6 files changed, 26 insertions, 33 deletions

diff --git a/board/amcc/canyonlands/canyonlands.c b/board/amcc/canyonlands/canyonlands.c
index e9eba49..47667ee 100644
--- a/board/amcc/canyonlands/canyonlands.c
+++ b/board/amcc/canyonlands/canyonlands.c
@@ -460,12 +460,8 @@ void ft_board_setup(void *blob, bd_t *bd)
 		 * node in the device tree, so that Linux doesn't initialize
 		 * it.
 		 */
-		rc = fdt_find_and_setprop(blob, "/plb/pciex@d00000000", "status",
-					  "disabled", sizeof("disabled"), 1);
-		if (rc) {
-			printf("Unable to update property status in PCIe node, err=%s\n",
-			       fdt_strerror(rc));
-		}
+		fdt_find_and_setprop(blob, "/plb/pciex@d00000000", "status",
+				     "disabled", sizeof("disabled"), 1);
 	}
 
 	if (gd->board_type == BOARD_CANYONLANDS_PCIE) {
@@ -474,12 +470,8 @@ void ft_board_setup(void *blob, bd_t *bd)
 		 * node in the device tree, so that Linux doesn't initialize
 		 * it.
 		 */
-		rc = fdt_find_and_setprop(blob, "/plb/sata@bffd1000", "status",
-					  "disabled", sizeof("disabled"), 1);
-		if (rc) {
-			printf("Unable to update property status in PCIe node, err=%s\n",
-			       fdt_strerror(rc));
-		}
+		fdt_find_and_setprop(blob, "/plb/sata@bffd1000", "status",
+				     "disabled", sizeof("disabled"), 1);
 	}
 }
 #endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
diff --git a/board/socrates/ddr.c b/board/socrates/ddr.c
index bbb5ee2..62a5951 100644
--- a/board/socrates/ddr.c
+++ b/board/socrates/ddr.c
@@ -57,7 +57,7 @@ void fsl_ddr_board_options(memctl_options_t *popts, unsigned int ctrl_num)
 	 *	- frequency
 	 *	- ddr1 vs. ddr2
 	 */
-	popts->cpo_override = 10;
+	popts->cpo_override = 0;
 
 	/*
 	 * Factors to consider for write data delay:
diff --git a/cpu/mpc8xx/scc.c b/cpu/mpc8xx/scc.c
index 09a3db1..09a6348 100644
--- a/cpu/mpc8xx/scc.c
+++ b/cpu/mpc8xx/scc.c
@@ -215,12 +215,14 @@ static int scc_init (struct eth_device *dev, bd_t * bis)
 	rxIdx = 0;
 	txIdx = 0;
 
+	if (!rtx) {
 #ifdef CFG_ALLOC_DPRAM
-	rtx = (RTXBD *) (immr->im_cpm.cp_dpmem +
-			 dpram_alloc_align (sizeof (RTXBD), 8));
+		rtx = (RTXBD *) (immr->im_cpm.cp_dpmem +
+				 dpram_alloc_align (sizeof (RTXBD), 8));
 #else
-	rtx = (RTXBD *) (immr->im_cpm.cp_dpmem + CPM_SCC_BASE);
-#endif /* 0 */
+		rtx = (RTXBD *) (immr->im_cpm.cp_dpmem + CPM_SCC_BASE);
+#endif
+	}
 
 #if (defined(PA_ENET_RXD) && defined(PA_ENET_TXD))
 	/* Configure port A pins for Txd and Rxd.
diff --git a/disk/part.c b/disk/part.c
index 877e988..80532a7 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -117,6 +117,7 @@ void dev_print (block_dev_desc_t *dev_desc)
 			dev_desc->product,
 			dev_desc->revision);
 		break;
+	case IF_TYPE_ATAPI:
 	case IF_TYPE_IDE:
 	case IF_TYPE_SATA:
 		printf ("Model: %s Firm: %s Ser#: %s\n",
@@ -124,15 +125,22 @@ void dev_print (block_dev_desc_t *dev_desc)
 			dev_desc->revision,
 			dev_desc->product);
 		break;
+	case IF_TYPE_SD:
+	case IF_TYPE_MMC:
 	case IF_TYPE_USB:
 		printf ("Vendor: %s Rev: %s Prod: %s\n",
 			dev_desc->vendor,
 			dev_desc->revision,
 			dev_desc->product);
 		break;
+	case IF_TYPE_DOC:
+		puts("device type DOC\n");
+		return;
 	case IF_TYPE_UNKNOWN:
+		puts("device type unknown\n");
+		return;
 	default:
-		puts ("not available\n");
+		printf("Unhandled device type: %i\n", dev_desc->if_type);
 		return;
 	}
 	puts ("            Type: ");
diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index 0135ac8..bbb9d18 100644
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -87,8 +87,8 @@
 #define CFG_INIT_DBCR DBCR_IDM		/* Enable Debug Exceptions	*/
 
 #undef	CFG_DRAM_TEST			/* memory test, takes time	*/
-#define CFG_MEMTEST_START	0x00000000
-#define CFG_MEMTEST_END		0x10000000
+#define CFG_MEMTEST_START	0x00400000
+#define CFG_MEMTEST_END		0x00C00000
 
 /*
  * Base addresses -- Note these are effective addresses where the
@@ -117,7 +117,7 @@
 #define CONFIG_CHIP_SELECTS_PER_CTRL	2
 
 /* I2C addresses of SPD EEPROMs */
-#define SPD_EEPROM_ADDRESS	0x51	/* CTLR 0 DIMM 0 */
+#define SPD_EEPROM_ADDRESS	0x50	/* CTLR 0 DIMM 0 */
 
 #define CONFIG_DDR_DEFAULT_CL	30		/* CAS latency 3	*/
 
diff --git a/include/spartan3.h b/include/spartan3.h
index 9a3a5d4..b0fa1cd 100644
--- a/include/spartan3.h
+++ b/include/spartan3.h
@@ -81,9 +81,6 @@ typedef struct {
 #define	XILINX_XC3S1200E_SIZE	3841184/8
 #define	XILINX_XC3S1600E_SIZE	5969696/8
 
-/* Spartan-IIIE (1.2V) */
-#define XILINX_XC3S1200E_SIZE	3841184/8
-
 /* Descriptor Macros
  *********************************************************************/
 /* Spartan-III devices */
@@ -103,14 +100,13 @@ typedef struct {
 { Xilinx_Spartan3, iface, XILINX_XC3S1500_SIZE, fn_table, cookie }
 
 #define XILINX_XC3S2000_DESC(iface, fn_table, cookie) \
-{ Xilinx_Spartan3, iface, XILINX_XC3S2000E_SIZE, fn_table, cookie }
+{ Xilinx_Spartan3, iface, XILINX_XC3S2000_SIZE, fn_table, cookie }
 
 #define XILINX_XC3S4000_DESC(iface, fn_table, cookie) \
-{ Xilinx_Spartan3, iface, XILINX_XC3S4000E_SIZE, fn_table, cookie }
+{ Xilinx_Spartan3, iface, XILINX_XC3S4000_SIZE, fn_table, cookie }
 
 #define XILINX_XC3S5000_DESC(iface, fn_table, cookie) \
-{ Xilinx_Spartan3, iface, XILINX_XC3S5000E_SIZE, fn_table, cookie }
-
+{ Xilinx_Spartan3, iface, XILINX_XC3S5000_SIZE, fn_table, cookie }
 
 /* Spartan-3E devices */
 #define XILINX_XC3S100E_DESC(iface, fn_table, cookie) \
@@ -128,9 +124,4 @@ typedef struct {
 #define XILINX_XC3S1600E_DESC(iface, fn_table, cookie) \
 { Xilinx_Spartan3, iface, XILINX_XC3S1600E_SIZE, fn_table, cookie }
 
-
-/* Spartan-IIIE devices */
-#define XILINX_XC3S1200E_DESC(iface, fn_table, cookie) \
-{ Xilinx_Spartan3, iface, XILINX_XC3S1200E_SIZE, fn_table, cookie }
-
 #endif /* _SPARTAN3_H_ */