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authorTom Rini <trini@konsulko.com>2022-06-08 08:24:31 -0400
committerTom Rini <trini@konsulko.com>2022-06-28 17:03:31 -0400
commitd4ae15260bbd0f9962b71ad2af53e4c450abd530 (patch)
tree3c490b52544a3a7b0aa7c66504cf5202517f430b
parent093044735fd7db1616b1c4920c21ea6c0e0b0cc3 (diff)
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Convert CONFIG_USB_EHCI_TXFIFO_THRESH to Kconfig
This converts the following to Kconfig: CONFIG_USB_EHCI_TXFIFO_THRESH Signed-off-by: Tom Rini <trini@konsulko.com>
-rw-r--r--README3
-rw-r--r--drivers/usb/host/Kconfig11
-rw-r--r--include/configs/tegra114-common.h3
-rw-r--r--include/configs/tegra124-common.h3
-rw-r--r--include/configs/tegra20-common.h8
-rw-r--r--include/configs/tegra210-common.h3
-rw-r--r--include/configs/tegra30-common.h3
7 files changed, 11 insertions, 23 deletions
diff --git a/README b/README
index f330422..e01ff98 100644
--- a/README
+++ b/README
@@ -793,9 +793,6 @@ The following options need to be configured:
Supported are USB Keyboards and USB Floppy drives
(TEAC FD-05PUB).
- CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the
- txfilltuning field in the EHCI controller on reset.
-
CONFIG_USB_DWC2_REG_ADDR the physical CPU address of the DWC2
HW module registers.
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 5d0855f..8240ed8 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -268,6 +268,17 @@ config USB_EHCI_FSL
select EHCI_HCD_INIT_AFTER_RESET
---help---
Enables support for the on-chip EHCI controller on FSL chips.
+
+config USB_EHCI_TXFIFO_THRESH
+ hex
+ depends on USB_EHCI_TEGRA
+ default 0x10
+ help
+ This parameter affects a TXFILLTUNING field that controls how much
+ data is sent to the latency fifo before it is sent to the wire.
+ Without this parameter, the default (2) causes occasional Data Buffer
+ Errors in OUT packets depending on the buffer address and size.
+
endif # USB_EHCI_HCD
config USB_OHCI_HCD
diff --git a/include/configs/tegra114-common.h b/include/configs/tegra114-common.h
index 7420831..87ec1f5 100644
--- a/include/configs/tegra114-common.h
+++ b/include/configs/tegra114-common.h
@@ -55,7 +55,4 @@
/* Defines for SPL */
-/* For USB EHCI controller */
-#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10
-
#endif /* _TEGRA114_COMMON_H_ */
diff --git a/include/configs/tegra124-common.h b/include/configs/tegra124-common.h
index 314486a..f509784 100644
--- a/include/configs/tegra124-common.h
+++ b/include/configs/tegra124-common.h
@@ -57,9 +57,6 @@
/* Defines for SPL */
-/* For USB EHCI controller */
-#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10
-
/* GPU needs setup */
#define CONFIG_TEGRA_GPU
diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h
index a2b14d8..71867bb 100644
--- a/include/configs/tegra20-common.h
+++ b/include/configs/tegra20-common.h
@@ -69,12 +69,4 @@
#define TEGRA_LP0_VEC
#endif
-/*
- * This parameter affects a TXFILLTUNING field that controls how much data is
- * sent to the latency fifo before it is sent to the wire. Without this
- * parameter, the default (2) causes occasional Data Buffer Errors in OUT
- * packets depending on the buffer address and size.
- */
-#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10
-
#endif /* _TEGRA20_COMMON_H_ */
diff --git a/include/configs/tegra210-common.h b/include/configs/tegra210-common.h
index 3ba12be..e510820 100644
--- a/include/configs/tegra210-common.h
+++ b/include/configs/tegra210-common.h
@@ -46,9 +46,6 @@
"fdt_addr_r=0x83000000\0" \
"ramdisk_addr_r=0x83420000\0"
-/* For USB EHCI controller */
-#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10
-
/* GPU needs setup */
#define CONFIG_TEGRA_GPU
diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h
index a68da5d..04fcf11 100644
--- a/include/configs/tegra30-common.h
+++ b/include/configs/tegra30-common.h
@@ -52,7 +52,4 @@
/* Defines for SPL */
-/* For USB EHCI controller */
-#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10
-
#endif /* _TEGRA30_COMMON_H_ */