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author | Marek Vasut <marek.vasut+renesas@mailbox.org> | 2023-09-17 16:11:36 +0200 |
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committer | Marek Vasut <marek.vasut+renesas@mailbox.org> | 2023-10-01 00:08:28 +0200 |
commit | 79d4ef4b472912b744e547b843cdddd2351574b2 (patch) | |
tree | eb59cc07d1430fb08937183c4e9b8e5a100e0266 | |
parent | 2387f5613dc78484f3e369f7e45fa7df4e934833 (diff) | |
download | u-boot-79d4ef4b472912b744e547b843cdddd2351574b2.zip u-boot-79d4ef4b472912b744e547b843cdddd2351574b2.tar.gz u-boot-79d4ef4b472912b744e547b843cdddd2351574b2.tar.bz2 |
clk: renesas: Synchronize R8A779F0 S4 clock tables with Linux 6.5.3
Synchronize R-Car R8A779F0 S4 clock tables with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
-rw-r--r-- | drivers/clk/renesas/r8a779f0-cpg-mssr.c | 4 | ||||
-rw-r--r-- | include/dt-bindings/clock/r8a779f0-cpg-mssr.h | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/drivers/clk/renesas/r8a779f0-cpg-mssr.c b/drivers/clk/renesas/r8a779f0-cpg-mssr.c index 7aac28e..643e8b8 100644 --- a/drivers/clk/renesas/r8a779f0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779f0-cpg-mssr.c @@ -47,7 +47,7 @@ enum clk_ids { MOD_CLK_BASE }; -static const struct cpg_core_clk r8a779f0_core_clks[] = { +static const struct cpg_core_clk r8a779f0_core_clks[] __initconst = { /* External Clock Inputs */ DEF_INPUT("extal", CLK_EXTAL), DEF_INPUT("extalr", CLK_EXTALR), @@ -123,7 +123,7 @@ static const struct cpg_core_clk r8a779f0_core_clks[] = { DEF_GEN4_MDSEL("r", R8A779F0_CLK_R, 29, CLK_EXTALR, 1, CLK_OCO, 1), }; -static const struct mssr_mod_clk r8a779f0_mod_clks[] = { +static const struct mssr_mod_clk r8a779f0_mod_clks[] __initconst = { DEF_MOD("hscif0", 514, R8A779F0_CLK_SASYNCPERD1), DEF_MOD("hscif1", 515, R8A779F0_CLK_SASYNCPERD1), DEF_MOD("hscif2", 516, R8A779F0_CLK_SASYNCPERD1), diff --git a/include/dt-bindings/clock/r8a779f0-cpg-mssr.h b/include/dt-bindings/clock/r8a779f0-cpg-mssr.h index f2ae1c6..c34be56 100644 --- a/include/dt-bindings/clock/r8a779f0-cpg-mssr.h +++ b/include/dt-bindings/clock/r8a779f0-cpg-mssr.h @@ -1,4 +1,4 @@ -/* SPDX-License-Identifier: (GPL-2.0 or MIT) */ +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ /* * Copyright (C) 2021 Renesas Electronics Corp. */ |