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Memory allocated with malloc_tmp() can't be used after the POST phase.
So, access boot-fail-wait in post phase and store it for the boot
phase to use. This fixes the regression introduced by commit
59d6ca52.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Signed-off-by: Amos Kong <akong@redhat.com>
(cherry picked from commit 11a7234491cb2a027b0fa5e82af38a3e78b44c80)
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Before we start scsi target scanning, we need to set the
VIRTIO_CONFIG_S_DRIVER_OK flag so the device can do setup properly.
This fix a bug when booting tcm_vhost with seabios.
Signed-off-by: Asias He <asias@redhat.com>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
(cherry picked from commit 5a7730db57ab0715223421e65b54fb50d6fefe5c)
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Device needs the exact size of these data structure. Prevent padding.
This fixes guest hang when booting seabios + tcm_vhost.
Signed-off-by: Asias He <asias@redhat.com>
(cherry picked from commit b44a7be17bdd270ea029a8e2ec0c2e80c6cd0444)
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This should never get called, but if we somehow get a new chipset
that fails to implement their own pci_slot_get_irq function, fail
gracefully and add a debug log message.
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
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q35/ich9 doesn't use the same interrupt mapping function as
i440fx/piix. PIRQA:D and PIRQE:H are programmed identically, but we
start at index 0, not index -1. Slots 25 through 31 are also
programmed independently.
When running qemu w/o this patch, a device at address 0:6.0 will have
its PCI interrupt line register programmed with irq 10 (as seen by
info pci), but it actually uses irq 11 (as reported the guest). Half
of the interrupt lines are misprogrammedi like this. Functionally, a
fully emulated qemu guest doesn't care much, but when we try to use
device assignment, we really need to know the correct irqs.
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
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We seem to use the IRQEN bit of the PIRQn registers interchangeably
to select APIC mode or to disable an IRQ. I can't decide if we're
intending to disable the IRQ or select APIC mode here, but in either
case it prevents PIC mode assigned devices from working. When seabios
writes IRQEN to these registers, qemu interprets that as APIC mode,
so while the boot ROM driver is waiting for an interrupt on ISA
compatible IRQ 10 or 11, KVM is injecting interrupts to APIC pins
16 - 23. Devices on the root bus use PIRQE:H while the root ports
use PIRQA:D. Enable them all so we don't limit where we support boot
ROMs. The guest will later disable unused IRQs with the ACPI _DIS
method.
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
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Remove references to "../" and "out/" from the build so that "make
OUT=/a/b/c/" will work.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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cntl->regs should not be accessed before initializing it.
Signed-off-by: Avik Sil <aviksil@linux.vnet.ibm.com>
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Current seabios will attempt to boot from both configured devices and
a list of default devices. Sometimes it is desirable to only attempt
to boot from the configured devices and not from any of the default
devices. This patch adds support for a "HALT" item in the "bootorder"
file - its presence will prevent SeaBIOS from attempting any default
boot actions.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Signed-off-by: Amos Kong <akong@redhat.com>
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Stupid typo from my side ...
Signed-off-by: Hannes Reinecke <hare@suse.de>
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Place the extra newline as part of the F12 prompt instead of the
SeaBIOS version banner so that a UUID report (when present) is still
visually separated from the boot menu prompt.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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In the v2->v3 change of what would become commit 37676f83
<http://www.seabios.org/pipermail/seabios/2012-December/005166.html>, the
defense against an initial "addr > end" condition ("wraparound") was
erroneously loosened.
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
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Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Commit 4540409 (acpi: LNKS is not needed, 2012-08-07) removed LNKS because
it basically worked by chance: _CRS returns something else then one of the
possible resources from _PRS, _DIS would not really disable the interrupt,
and there was no _SRS method. It just happened to work because all OSes
have some kind of special-casing for SCI.
Unfortunately, the code after the patch is also against the spec, and it
breaks FreeBSD because it treats IRQ 9 polarity as active low without
the Interrupt() entry. Actually, numeric _PRT entries are handled the
same in Linux and FreeBSD (as active-low). However, under Linux it just
happens to trigger another special casing of SCI which sets SCI up from
its override entry in the MADT, ignoring the DSDT completely.
This patch adds back the LNKS, but without using the PIIX register for
LNKA in its methods.
Tested-by: Luigi Rizzo <rizzo@iet.unipi.it>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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There are users who would like to see the UUID at startup, and it probably
won't bother others.
Related RHBZ: 876250.
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
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Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Fixes WinXP BSOD.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Commit 8d7449771068824b8bdb51fe622c10660b373d4f broke this.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Without this windows 7 BSODs, probably because
we are referencing PX13 from ISA.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Use define_link() macro in PIIX4 hardware definitions. Now that all
remaining irq links are the same it's possible to just use a macro to
define the link.
Port several size optimizations to the q35 irq routing definitions:
define the PRQx fields in the _SB scope to reduce size of register
references, define CRS and STA methods in _SB scope to reduce code
duplication, simplify acpi code.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Add comments around major sections of the DSL file. Also, add scope
declarations where needed so that each section only contains one
scope.
This is the q35 equivalent of e9fe15b86c6e98a91b30511d005ecdcc8a3e578d.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Place all the q35 irq definitions close to each other.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Group the hotplug code and definitions together along with the irq
code and definitions.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Recent iasl compilers warn about spurious return calls. Remove extra
return calls from the GPE event methods. This is the q35 dsdt
equivalent of patch 475ce3f5f6a986877d637ac39f6ee23484ecc992.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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This patch is purely cosmetic - no code changes should be observed.
Use a consistent indentation style with the ACPI DSDT code:
1 - Use spaces (no tabs) and 4 space indentation
2 - Place opening braces on same line as statement declaration
3 - Don't put a space between statement and opening parenthesis,
except for control statements (If, Else, While, Return) where a
space is always present
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Stuff them parameterized into #defines, so we can (a) reuse them for
q35 and (b) don't duplicate the serial line.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Model the device enable bits as fields so they can be accessed
directly by name.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Seems important for Windows.
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Jason Baron <jbaron@redhat.com>
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add dsdt for q35 chipset of qemu.
[jbaron: remove suspd bits since they are now auto-generated, move pci window to 0xb0000000,
add framework for auto generated pci windows]
[kraxel: remove pci express root ports + pci bridge]
Cc: Matthew Garrett <mjg59@srcf.ucam.org>
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: Jason Baron <jbaron@redhat.com>
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add q35 initialization functions.
[jbaron@redhat.com: restructured to current seabios base, updated pci base to 0xb0000000]
[kraxel@redhat.com: join the two lpc init funcs into one]
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: Jason Baron <jbaron@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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enable SERR of normal device for AER.
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: Jason Baron <jbaron@redhat.com>
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make while fadt initialization chipset specific.
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: Jason Baron <jbaron@redhat.com>
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Set up the UC area of mtrr dynamically based on mtrr_base. This allows
the bios to work for other chipsets that might want to set the mtrr.
Since BUILD_MAX_HIGHMEM is no longer used we can remove the config parameter.
This change reverses the order of pci_setup() and smm_init() with
mtrr_setup().
Signed-off-by: Jason Baron <jbaron@redhat.com>
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Allow coreboot users to enable the floppy support (via CBFS files
etc/floppy0 and etc/floppy1) on real hardware. It is unknown if the
Bochs derived floppy controller support will work on real hardware,
but this option will make it easier for those wishing to test.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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The diskette_param_table is a copy of diskette_param_table2 - just
memcpy it at runtime instead of duplicating the configuration in the
code.
Also, setup the floppy interrupt vector in the floppy.c code instead
of the post.c code.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Align the start of PCI memory space to simplify mtrr ranges. This is
configured per chipset so future chipsets can configure different
start addresses.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Use just one "struct pci_device_id" device table list in the
pci_bios_init_devices initialization code instead of three separate
tables. There isn't any compelling reason to use multiple tables.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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The HBA does DMA, thus we must enable the busmaster bit,
otherwise dma access will fail with recent qemu versions.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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