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| author | Kevin O'Connor <kevin@koconnor.net> | 2014-12-03 12:22:14 -0500 |
|---|---|---|
| committer | Kevin O'Connor <kevin@koconnor.net> | 2014-12-03 12:24:15 -0500 |
| commit | 56b252ea737c1514916d6df4493f89ff71322f60 (patch) | |
| tree | e517bde532a82db31f22219c2c5b9366cb3cbcdc | |
| parent | ca087779edbbc52e364dd901927dbe868ec085fc (diff) | |
| download | seabios-56b252ea737c1514916d6df4493f89ff71322f60.zip seabios-56b252ea737c1514916d6df4493f89ff71322f60.tar.gz seabios-56b252ea737c1514916d6df4493f89ff71322f60.tar.bz2 | |
Minor - be consistent in placement of .code16/32 in romlayout.S
Place .code32 in those functions that need it, and make sure every
function ends in .code16 mode.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
| -rw-r--r-- | src/romlayout.S | 17 |
1 files changed, 11 insertions, 6 deletions
diff --git a/src/romlayout.S b/src/romlayout.S index 221f27d..6b3aabd 100644 --- a/src/romlayout.S +++ b/src/romlayout.S @@ -11,6 +11,8 @@ #include "hw/rtc.h" // CMOS_RESET_CODE #include "x86.h" // CR0_* + .code16 + /**************************************************************** * 16bit / 32bit call trampolines @@ -20,7 +22,6 @@ // %edx = return location (in 32bit mode) // Clobbers: ecx, flags, segment registers, cr0, idt/gdt DECLFUNC transition32 - .code16 transition32_for_smi: movl %eax, %ecx jmp 1f @@ -64,12 +65,14 @@ transition32: movl %ecx, %eax jmpl *%edx + .code16 // Place CPU into 16bit mode from 32bit mode. // %edx = return location (in 16bit mode) // Clobbers: ecx, flags, segment registers, cr0, idt/gdt DECLFUNC transition16 .global transition16big + .code32 transition16: movl %eax, %ecx @@ -136,7 +139,6 @@ transition16big: // Far call a 16bit function from 16bit mode with a specified cpu register state // %eax = address of struct bregs, %edx = segment of struct bregs // Clobbers: %e[bc]x, %e[ds]i, flags - .code16 DECLFUNC __farcall16 __farcall16: // Save %edx/%eax, %ebp @@ -302,8 +304,8 @@ entry_apm16: popfw // restore flags lretw - .code32 DECLFUNC entry_apm32 + .code32 entry_apm32: pushfl pushl %gs @@ -314,9 +316,11 @@ entry_apm32: popl %gs popfl lretl + .code16 // PCI-BIOS entry points DECLFUNC entry_pcibios32 + .code32 entry_pcibios32: pushfl pushl %gs // Backup %gs and set %gs=%ds @@ -326,8 +330,8 @@ entry_pcibios32: popl %gs popfl lretl - .code16 + DECLFUNC entry_pcibios16 entry_pcibios16: ENTRY_ARG handle_pcibios @@ -340,8 +344,8 @@ entry_1589: iretw // BIOS32 support - .code32 DECLFUNC entry_bios32 + .code32 entry_bios32: pushfl #if CONFIG_PCIBIOS @@ -359,9 +363,11 @@ entry_bios32: // Return to caller 2: popfl lretl + .code16 // 32bit elf entry point DECLFUNC entry_elf + .code32 entry_elf: cli cld @@ -375,7 +381,6 @@ entry_elf: movw %ax, %ss movl $BUILD_STACK_ADDR, %esp ljmpl $SEG32_MODE32_CS, $_cfunc32flat_handle_post - .code16 // UEFI Compatibility Support Module (CSM) entry point |