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| author | Helge Deller <deller@gmx.de> | 2023-06-24 00:47:00 +0200 |
|---|---|---|
| committer | Helge Deller <deller@gmx.de> | 2023-06-24 02:19:13 +0200 |
| commit | 50a79cbf004f93b05b9c22c858ae940ace926bd9 (patch) | |
| tree | 63a7ceb6acccc68a7537f08b52b93cbd8842721c | |
| parent | fa008172af24ba3288d325e3c8631f2150bee22b (diff) | |
| download | seabios-hppa-50a79cbf004f93b05b9c22c858ae940ace926bd9.zip seabios-hppa-50a79cbf004f93b05b9c22c858ae940ace926bd9.tar.gz seabios-hppa-50a79cbf004f93b05b9c22c858ae940ace926bd9.tar.bz2 | |
parisc: Enable PSW_Q bit at bootup
Qemu currently only supports PSW_Q handling, so enable it by default.
Signed-off-by: Helge Deller <deller@gmx.de>
| -rw-r--r-- | src/parisc/head.S | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/parisc/head.S b/src/parisc/head.S index b578790..28541dd 100644 --- a/src/parisc/head.S +++ b/src/parisc/head.S @@ -101,6 +101,7 @@ marker: .align 0x80 ENTRY(startup) rsm PSW_I, %r0 /* disable local irqs */ + ssm PSW_Q, %r0 /* enable PSW_Q flag */ /* Make sure space registers are set to zero */ mtsp %r0,%sr0 @@ -152,7 +153,7 @@ ENTRY(enter_smp_idle_loop) /* IDLE LOOP for SMP CPUs - wait for rendenzvous. */ mfctl CPU_HPA_CR_REG, %r25 /* get CPU HPA from cr7 */ - rsm PSW_I | PSW_Q, %r0 /* disable local irqs */ + rsm PSW_I, %r0 /* disable local irqs */ mtctl %r0, CR_EIEM /* disable all external irqs */ /* EIRR : clear all pending external intr */ |