diff options
| author | Helge Deller <deller@gmx.de> | 2024-05-18 18:54:31 +0200 |
|---|---|---|
| committer | Helge Deller <deller@gmx.de> | 2024-05-18 18:54:31 +0200 |
| commit | e182f5f395fe1057ebc5236b06a87818790f8c37 (patch) | |
| tree | 241f9201db444849c4e2a6625b2e4fdf36767d94 | |
| parent | eb7e7c1e13950c22582410d895473017f21788bc (diff) | |
| download | seabios-hppa-e182f5f395fe1057ebc5236b06a87818790f8c37.zip seabios-hppa-e182f5f395fe1057ebc5236b06a87818790f8c37.tar.gz seabios-hppa-e182f5f395fe1057ebc5236b06a87818790f8c37.tar.bz2 | |
add some constants which can be used by qemu too
| -rw-r--r-- | src/parisc/head.S | 2 | ||||
| -rw-r--r-- | src/parisc/hppa_hardware.h | 4 | ||||
| -rw-r--r-- | src/parisc/parisc.c | 6 |
3 files changed, 8 insertions, 4 deletions
diff --git a/src/parisc/head.S b/src/parisc/head.S index 7b448e7..0438f97 100644 --- a/src/parisc/head.S +++ b/src/parisc/head.S @@ -492,7 +492,7 @@ ENTRY(sr_hashing_enabled) copy %r0,%r28 /* zero-initialize %r28 in case qemu can't emulate mfdiag call */ #ifdef CONFIG_64BIT .word 0x144008bc /* PCXU,PCXU+,PCXW,PCXW+,PCXW2: mfdiag %dr2, %r28 */ - depdi 1,54,1, %r26 /* set DIAG_SPHASH_ENAB (bit 54) of %dr2 */ + depdi 1,54,1, %r26 /* set DIAG_SPHASH_ENABLE (bit 54) of %dr2 */ #else .word 0x141c0600 /* PCXL: mfdiag %dr0, %r28 */ depwi 3,28,2, %r26 /* Set DHASH_EN & IHASH_EN of %dr0 */ diff --git a/src/parisc/hppa_hardware.h b/src/parisc/hppa_hardware.h index acafda4..31976e8 100644 --- a/src/parisc/hppa_hardware.h +++ b/src/parisc/hppa_hardware.h @@ -79,4 +79,8 @@ #define LMMIO_DIRECT0_MASK 0x308 #define LMMIO_DIRECT0_ROUTE 0x310 +/* space register hashing */ +#define HPPA64_DIAG_SPHASH_ENABLE 0x200 /* DIAG_SPHASH_ENAB (bit 54) */ +#define HPPA64_PDC_CACHE_RET_SPID_VAL 0xfe0 /* PDC return value on 64-bit CPU */ + #endif diff --git a/src/parisc/parisc.c b/src/parisc/parisc.c index c5afbf4..f41c3a7 100644 --- a/src/parisc/parisc.c +++ b/src/parisc/parisc.c @@ -165,6 +165,7 @@ extern char pdc_entry_table_end; extern char iodc_entry[512]; extern char iodc_entry_table; extern char iodc_entry_table_one_entry; +extern long sr_hashing_enabled(void); /* args as handed over for firmware calls */ #define ARG0 arg[7-0] @@ -1664,11 +1665,10 @@ static int pdc_cache(unsigned long *arg) * and read some analysis here: * https://patchwork.ozlabs.org/project/qemu-devel/patch/20240324080945.991100-3-svens@stackframe.org/#3289160 */ - extern long sr_hashing_enabled(void); if (sr_hashing_enabled() == 0) result[0] = 0; - else - result[0] = 0xfe0; + else /* when HPPA64_DIAG_SPHASH_ENABLE bit is set: */ + result[0] = HPPA64_PDC_CACHE_RET_SPID_VAL; return PDC_OK; } dprintf(0, "\n\nSeaBIOS: Unimplemented PDC_CACHE function %ld %lx %lx %lx %lx\n", ARG1, ARG2, ARG3, ARG4, ARG5); |