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| author | Helge Deller <deller@gmx.de> | 2024-05-15 23:33:02 +0200 |
|---|---|---|
| committer | Helge Deller <deller@gmx.de> | 2024-05-15 23:33:02 +0200 |
| commit | 1218f18ec817631603cfb33aa3a9117b7375d345 (patch) | |
| tree | 7be85f041f8253857205e37f962c7df40b47c03a | |
| parent | c291c2fceaa1620f57177766b5fb5a91f475f29a (diff) | |
| download | seabios-hppa-1218f18ec817631603cfb33aa3a9117b7375d345.zip seabios-hppa-1218f18ec817631603cfb33aa3a9117b7375d345.tar.gz seabios-hppa-1218f18ec817631603cfb33aa3a9117b7375d345.tar.bz2 | |
parisc: Fix return value of PDC_CACHE/PDC_CACHE_RET_SPID for space id hashing
HP-UX 11 64-bit uses space ID hashing.
If qemu implements the diagnose registers and mfdiag/mtdiag instructions
(qemu > v9.0 required), allow PDC to ask the CPU and return the correct
value of space id hashing bits.
Signed-off-by: Helge Deller <deller@gmx.de>
Suggested-by: Sven Schnelle <svens@stackframe.org>
| -rw-r--r-- | src/parisc/head.S | 20 | ||||
| -rw-r--r-- | src/parisc/parisc.c | 16 |
2 files changed, 33 insertions, 3 deletions
diff --git a/src/parisc/head.S b/src/parisc/head.S index c4df7f0..7b448e7 100644 --- a/src/parisc/head.S +++ b/src/parisc/head.S @@ -481,6 +481,26 @@ ENTRY(firmware_default_ivt) /* to detect crashes */ .endr END(smp_ivt) +/******************************************************* + Check if space register hashing is enabled. + Returns non-zero if sr-hashing in CPU is enabled. + Needs adjustment when we emulate PCX-T later. + Requires at least qemu v9.x + *******************************************************/ +ENTRY(sr_hashing_enabled) + copy %r0,%r26 + copy %r0,%r28 /* zero-initialize %r28 in case qemu can't emulate mfdiag call */ +#ifdef CONFIG_64BIT + .word 0x144008bc /* PCXU,PCXU+,PCXW,PCXW+,PCXW2: mfdiag %dr2, %r28 */ + depdi 1,54,1, %r26 /* set DIAG_SPHASH_ENAB (bit 54) of %dr2 */ +#else + .word 0x141c0600 /* PCXL: mfdiag %dr0, %r28 */ + depwi 3,28,2, %r26 /* Set DHASH_EN & IHASH_EN of %dr0 */ +#endif + bv %r0(%rp) + and %r28, %r26, %r28 /* mask hash enable bits */ +END(sr_hashing_enabled) + /******************************************************* PDC and IODC entry diff --git a/src/parisc/parisc.c b/src/parisc/parisc.c index 8aec3bc..c5afbf4 100644 --- a/src/parisc/parisc.c +++ b/src/parisc/parisc.c @@ -1656,9 +1656,19 @@ static int pdc_cache(unsigned long *arg) memcpy(result, machine_cache_info, sizeof(*machine_cache_info)); return PDC_OK; - case PDC_CACHE_RET_SPID: /* returns space-ID bits when sr-hasing is enabled */ - memset(result, 0, 32 * sizeof(unsigned long)); - result[0] = 0; + case PDC_CACHE_RET_SPID: + /* + * Return space-ID bits when space register hashing is enabled. + * The Linux kernel disables sr-hashing, while HP-UX 11 (64-bit) uses hashing. + * For details check the assembly in arch/parisc/kernel/pacache.S in the Linux kernel + * and read some analysis here: + * https://patchwork.ozlabs.org/project/qemu-devel/patch/20240324080945.991100-3-svens@stackframe.org/#3289160 + */ + extern long sr_hashing_enabled(void); + if (sr_hashing_enabled() == 0) + result[0] = 0; + else + result[0] = 0xfe0; return PDC_OK; } dprintf(0, "\n\nSeaBIOS: Unimplemented PDC_CACHE function %ld %lx %lx %lx %lx\n", ARG1, ARG2, ARG3, ARG4, ARG5); |