imported slof-JX-1.6.0-0 releaseslof-JX-1.6.0-0

102 files changed, 19985 insertions, 780 deletions

diff --git a/INSTALL b/INSTALL
index 8adb27a..c165e76 100644
--- a/INSTALL
+++ b/INSTALL
@@ -10,6 +10,7 @@ BUILD
   - Recent GNU tools, configured for powerpc64-linux
     - GCC: 3.3.3 and newer are known to work
     - Binutils: use a version as new as possible
+    - Subversion
 
   - set the CROSS variable
     - something like export CROSS="powerpc64-unknown-linux-gnu-"
@@ -26,6 +27,14 @@ BUILD
     these files are also provided through developerworks and have to be
     also downloaded just like the SLOF source code
 
+  - starting with the SLOF release JX-1.6.0-0 it is necessary to
+    download a x86 emulator which is used to execute the BIOS
+    of VGA card; to download the x86 emulator following steps are
+    required:
+    - cd other-licence/x86emu/
+    - ./x86emu_download.sh # this downloads the x86 emulator sources
+    - cd -
+
   - make js2x
 
 INSTALL
diff --git a/Makefile b/Makefile
index fee1108..8595734 100644
--- a/Makefile
+++ b/Makefile
@@ -75,8 +75,17 @@ test_all:
 	@for i in $(STD_BOARDS); do make distclean $$i; done
 
 driver:
-		DRIVER=1 make -C board-$(BOARD) driver
-		@$(RM) -f .crc_flash .boot_xdr.ffs
+	@echo "******** Building $(BOARD) system ********"
+	@b=`echo $(BOARD) | grep "-"`; \
+	if [ -n "$$b" ]; then \
+		subboard=$${b##*-}; \
+		board=$${b%%-*}; \
+		DRIVER=1 make -C board-$$board SUBBOARD=$$subboard driver; \
+	else \
+		DRIVER=1 make -C board-$(BOARD) driver; \
+	fi
+	@$(RM) -f .crc_flash .boot_xdr.ffs
+
 cli:
 		make -C clients
 
diff --git a/Makefile.gen b/Makefile.gen
index ba6edc3..27237b5 100644
--- a/Makefile.gen
+++ b/Makefile.gen
@@ -106,13 +106,10 @@ copy_disassemblies:	llfw_disassembly
 			../driver-$(RELEASE)/disassemblies/$(RELEASE)-stage2.dis
 		cp $(LLFWBRDDIR)/stageS.dis  \
 			../driver-$(RELEASE)/disassemblies/$(RELEASE)-stageS.dis
-		cp ../llfw/meminit.dis  \
+		cp $(LLFWBRDDIR)/meminit.dis  \
 			../driver-$(RELEASE)/disassemblies/$(RELEASE)-meminit.dis
 		@if [ -e ../clients/snk/client.dis ]; then cp ../clients/snk/client.dis \
 			../driver-$(RELEASE)/disassemblies/$(RELEASE)-client.dis; fi
-		@if [ -e ../llfw/meminit_l2b.dis ]; then cp ../llfw/meminit_l2b.dis \
-			../driver-$(RELEASE)/disassemblies/$(RELEASE)-meminit_l2b.dis; \
-		fi
 
 copy_driver:	copy_disassemblies external_flasher
 		mv ../boot_rom-$(FLASH_SIZE_MB)MB-BigEndian.bin \
diff --git a/board-js2x/Makefile b/board-js2x/Makefile
index 27ce533..1ccaf59 100644
--- a/board-js2x/Makefile
+++ b/board-js2x/Makefile
@@ -13,7 +13,7 @@
 JS2X_TARGETS = tools_build romfs_build stage1
 
 SUBDIRS = slof rtas 
-COMMON_LIBS = libc libipmi libbootmsg libbases
+COMMON_LIBS = libc libipmi libbootmsg libbases libelf
 
 all:		$(JS2X_TARGETS) subdirs clients_build bcm57xx boot_rom_js2x.bin boot_rom_bimini.bin
 
diff --git a/board-js2x/config b/board-js2x/config
index c9f76bc..28cc3c6 100644
--- a/board-js2x/config
+++ b/board-js2x/config
@@ -1,5 +1,5 @@
-PLATFORM=-DPLATFORM_ID=PPC970_PLATFORM
 BOARD=js2x
 TARG=ppc64
 export CPUARCH=ppc970
 export CPUARCHDEF=-DCPU_PPC970
+export SNK_BIOSEMU_APPS=1
diff --git a/board-js2x/llfw/Makefile b/board-js2x/llfw/Makefile
index fcb7eb4..f8aa8eb 100644
--- a/board-js2x/llfw/Makefile
+++ b/board-js2x/llfw/Makefile
@@ -17,22 +17,20 @@ CPPFLAGS	= -I$(INCLBRDDIR) -I$(INCLCMNDIR) -I$(INCLCMNDIR)/$(CPUARCH) \
 CFLAGS		+= -fno-builtin $(CPPFLAGS) -O2  -msoft-float $(MAMBO) $(PLATFORM)
 CFLAGS		+= $(BOOT) $(IOCONF) -Wa,-mregnames $(RELEASE) $(CPUARCHDEF) -Wall
 ASFLAGS         = $(PLATFORM) $(BOOT) $(IOCONF) $(RELEASE)$(CPUARCHDEF)  -Wa,-mregnames
-LDFLAGS1	 = -nostdlib -e__start -Tstage2.lds -N -Ttext=0x100
+LDFLAGS1	= -nostdlib -e__start -Tstage2.lds -N -Ttext=0x100
 
 
 STG1OBJ		 = startup.o boot_abort.o romfs.o hw.o io_generic.o board_io.o 
-#STG1OBJ	 +=  monitor.o ipmi_kcs.o mmu.o
-STG1OBJ		 += stage2_head.o stage2.o comlib.o  \
-		    romfs_wrap.o nvramlog.o
+STG1OBJ		 += stage2_head.o stage2.o comlib.o romfs_wrap.o nvramlog.o
 
-all	: stage1.js2x stage1.bimini stageS.bin
+all: stage1.js2x stage1.bimini stageS.bin Cboot.o
 
-stage1.js2x:	$(STG1OBJ) Cboot.o u4maui.o $(LIBCMNDIR)/libc.a
-		$(LD) $(LDFLAGS1) -o stage1.elf  $(STG1OBJ) u4maui.o  $(LIBCMNDIR)/libc.a
+stage1.js2x:	$(STG1OBJ) u4maui.o $(LIBCMNDIR)/libelf.a $(LIBCMNDIR)/libc.a
+		$(LD) $(LDFLAGS1) -o stage1.elf $^
 		$(OBJCOPY) -O binary stage1.elf stage1.js2x
 
-stage1.bimini:	$(STG1OBJ) Cboot.o u4bimini.o $(LIBCMNDIR)/libc.a
-		$(LD) $(LDFLAGS1) -o stage1.elf  $(STG1OBJ) u4bimini.o  $(LIBCMNDIR)/libc.a
+stage1.bimini:	$(STG1OBJ) u4bimini.o $(LIBCMNDIR)/libelf.a $(LIBCMNDIR)/libc.a
+		$(LD) $(LDFLAGS1) -o stage1.elf $?
 		$(OBJCOPY) -O binary stage1.elf stage1.bimini
 
 stageS.bin:	stage_s.o
@@ -63,6 +61,7 @@ include $(LLFWCMNDIR)/io_generic/Makefile.inc
 
 romfs_wrap.o:	../../llfw/romfs_wrap.c
 		$(CC) $(CFLAGS) -c ../../llfw/romfs_wrap.c
+
 Cboot.o: Cboot.S
 		$(CC) $(CFLAGS) -c $^
 		$(OBJCOPY) -O binary Cboot.o Cboot.bin
@@ -70,6 +69,9 @@ Cboot.o: Cboot.S
 $(LIBCMNDIR)/libc.a:
 	$(MAKE) -C $(LIBCMNDIR) libc
 
+$(LIBCMNDIR)/libelf.a:
+	$(MAKE) -C $(LIBCMNDIR) libelf
+
 %.o: %.S
 		$(CC) $(CFLAGS) -c $^
 
diff --git a/board-js2x/llfw/hw.c b/board-js2x/llfw/hw.c
index 95888dc..a656f18 100644
--- a/board-js2x/llfw/hw.c
+++ b/board-js2x/llfw/hw.c
@@ -11,7 +11,7 @@
  *****************************************************************************/
 
 #include <cpu.h>
-#include <types.h>
+#include <stdint.h>
 #include <hw.h>
 
 uint16_t
diff --git a/board-js2x/llfw/stage2.c b/board-js2x/llfw/stage2.c
index b529230..6485d32 100644
--- a/board-js2x/llfw/stage2.c
+++ b/board-js2x/llfw/stage2.c
@@ -10,7 +10,7 @@
  *     IBM Corporation - initial implementation
  *****************************************************************************/
 
-#include <types.h>
+#include <stdint.h>
 #include <xvect.h>
 #include <hw.h>
 #include <stdio.h>
@@ -21,6 +21,7 @@
 #include "product.h"
 #include "calculatecrc.h"
 #include <cpu.h>
+#include <libelf.h>
 #include <string.h>
 
 uint64_t uart;
@@ -184,9 +185,8 @@ early_c_entry(uint64_t start_addr)
 {
 	struct romfs_lookup_t fileInfo;
 	uint32_t crc;
-	void (*pofwStart) (uint64_t rombase);
+	void (*ofw_start) (uint64_t, uint64_t, uint64_t, uint64_t, uint64_t);
 	uint64_t *boot_info;
-	uint64_t ofw_start = 0x80000;
 	exception_stack_frame = 0;
 	/* destination for the flash image; we copy it to RAM
 	 * because from flash it is much too slow
@@ -200,6 +200,7 @@ early_c_entry(uint64_t start_addr)
 	uint64_t magic_val = 0;
 	uint64_t startVal = 0;
 	uint64_t flashlen = 0;
+	unsigned long ofw_addr;
 
 	io_init();
 
@@ -209,11 +210,11 @@ early_c_entry(uint64_t start_addr)
 	magic_val = load64_ci((uint64_t) (header->magic));
 
 	printf(" Check ROM  = ");
-	if (strncmp((char *)&magic_val, FLASHFS_MAGIC, 8) == 0) {
+	if (strncmp((char *) &magic_val, FLASHFS_MAGIC, 8) == 0) {
 		// somehow, the first 8 bytes in flashfs are overwritten, if booting from drone...
 		// so if we find "IMG1" in the first 4 bytes, we skip the CRC check...
 		startVal = load64_ci((uint64_t) start_addr);
-		if (strncmp((char *)&startVal, "IMG1", 4) == 0) {
+		if (strncmp((char *) &startVal, "IMG1", 4) == 0) {
 			printf
 			    ("start from RAM detected, skipping CRC check!\r\n");
 			// for romfs accesses (c_romfs_lookup) to work, we must fix the first uint64_t to the value we expect...
@@ -236,7 +237,7 @@ early_c_entry(uint64_t start_addr)
 	} else {
 		printf
 		    ("failed (magic string is \"%.8s\" should be \"%.8s\")\r\n",
-		     (char *)&magic_val, FLASHFS_MAGIC);
+		     (char *) &magic_val, FLASHFS_MAGIC);
 		while (1);
 	}
 
@@ -262,10 +263,22 @@ early_c_entry(uint64_t start_addr)
 	boot_info[1] = start_addr;
 	load_file(0x100, "xvect", 0x100, romfs_base);
 	load_file(SLAVELOOP_LOADBASE, "stageS", 0, romfs_base);
-	load_file(ofw_start, "ofw_main", 0, romfs_base);
-	pofwStart = (void (*)(uint64_t)) &ofw_start;
+	c_romfs_lookup("ofw_main", romfs_base, &fileInfo);
+	load_elf_file((void *) fileInfo.addr_data, &ofw_addr);
+	ofw_start =
+	    (void (*)(uint64_t, uint64_t, uint64_t, uint64_t, uint64_t))
+	    &ofw_addr;
 	// re-enable the cursor
 	printf("%s%s", TERM_CTRL_RESET, TERM_CTRL_CRSON);
+	/* ePAPR 0.5
+	 * r3 = R3 Effective address of the device tree image. Note: this
+	 *      address must be 8-byte aligned in memory.
+	 * r4 = implementation dependent
+	 * r5 = 0
+	 * r6 = 0x65504150 -- ePAPR magic value-to distinguish from
+	 *      non-ePAPR-compliant firmware
+	 * r7 = implementation dependent
+	 */
+	ofw_start(0, romfs_base, 0, 0, 0);
 	// never return
-	pofwStart(romfs_base);
 }
diff --git a/board-js2x/llfw/u4mem.c b/board-js2x/llfw/u4mem.c
index d0fc4cd..e7a159a 100644
--- a/board-js2x/llfw/u4mem.c
+++ b/board-js2x/llfw/u4mem.c
@@ -9,7 +9,7 @@
  * Contributors:
  *     IBM Corporation - initial implementation
  *****************************************************************************/
-#include <types.h>
+#include <stdint.h>
 #include <hw.h>
 #include <stdio.h>
 #include "stage2.h"
diff --git a/board-js2x/romfs/boot_rom.ffs b/board-js2x/romfs/boot_rom.ffs
index ada0b62..32ddefa 100644
--- a/board-js2x/romfs/boot_rom.ffs
+++ b/board-js2x/romfs/boot_rom.ffs
@@ -15,7 +15,7 @@
 header		romfs/header.img	0			0
 stage1          board-js2x/llfw/stage1.js2x         1             0x100
 xvect		slof/xvect.bin		0			0
-ofw_main	board-js2x/slof/slof.bin		0			0
+ofw_main	board-js2x/slof/paflof		0			0
 stageS		board-js2x/llfw/stageS.bin	0			0
 bootinfo	board-js2x/llfw/Cboot.bin	0			0
 rtas		board-js2x/rtas/rtas.bin	0			0
diff --git a/board-js2x/romfs/boot_rom_bimini.ffs b/board-js2x/romfs/boot_rom_bimini.ffs
index f89ddb8..befba11 100644
--- a/board-js2x/romfs/boot_rom_bimini.ffs
+++ b/board-js2x/romfs/boot_rom_bimini.ffs
@@ -15,7 +15,7 @@
 header		romfs/header.img	0			0
 stage1          board-js2x/llfw/stage1.bimini         1             0x100
 xvect		slof/xvect.bin		0			0
-ofw_main	board-js2x/slof/slof.bin		0			0
+ofw_main	board-js2x/slof/paflof		0			0
 stageS		board-js2x/llfw/stageS.bin	0			0
 bootinfo	board-js2x/llfw/Cboot.bin	0			0
 rtas		board-js2x/rtas/rtas.bin	0			0
diff --git a/board-js2x/rtas/rtas_flash.c b/board-js2x/rtas/rtas_flash.c
index 2a21984..0673e5b 100644
--- a/board-js2x/rtas/rtas_flash.c
+++ b/board-js2x/rtas/rtas_flash.c
@@ -13,7 +13,7 @@
 #include <cpu.h>
 #include <string.h>
 #include <stdio.h>
-#include <types.h>
+#include <stdint.h>
 #include <hw.h>
 #include <rtas.h>
 #include "rtas_board.h"
diff --git a/board-js2x/rtas/rtas_out.c b/board-js2x/rtas/rtas_out.c
index fa704f4..46dad96 100644
--- a/board-js2x/rtas/rtas_out.c
+++ b/board-js2x/rtas/rtas_out.c
@@ -14,7 +14,7 @@
 #include <string.h>
 #include <stdio.h>
 #include <stdlib.h>
-#include <types.h>
+#include <stdint.h>
 #include <rtas.h>
 #include <hw.h>
 
diff --git a/board-js2x/rtas/rtas_pci.c b/board-js2x/rtas/rtas_pci.c
index 087b686..cac384c 100644
--- a/board-js2x/rtas/rtas_pci.c
+++ b/board-js2x/rtas/rtas_pci.c
@@ -9,7 +9,7 @@
  * Contributors:
  *     IBM Corporation - initial implementation
  *****************************************************************************/
-#include <types.h>
+#include <stdint.h>
 #include <rtas.h>
 #include <hw.h>
 
diff --git a/board-js2x/rtas/rtas_table.c b/board-js2x/rtas/rtas_table.c
index f45830b..53f813e 100644
--- a/board-js2x/rtas/rtas_table.c
+++ b/board-js2x/rtas/rtas_table.c
@@ -10,7 +10,7 @@
  *     IBM Corporation - initial implementation
  *****************************************************************************/
 
-#include <types.h>
+#include <stdint.h>
 #include <rtas.h>
 #include "rtas_table.h"
 #include "rtas_board.h"
diff --git a/board-js2x/slof/Makefile b/board-js2x/slof/Makefile
index 911ad75..621539b 100644
--- a/board-js2x/slof/Makefile
+++ b/board-js2x/slof/Makefile
@@ -17,7 +17,7 @@ include $(TOPBRDDIR)/config
 include $(TOPCMNDIR)/make.rules
 
 
-all: Makefile.dep OF.ffs slof.bin $(SLOFCMNDIR)/xvect.bin
+all: Makefile.dep OF.ffs paflof $(SLOFCMNDIR)/xvect.bin
 
 CPPFLAGS = -I$(LIBCMNDIR)/libbootmsg
 SLOF_LIBS = $(LIBCMNDIR)/libbootmsg.a
diff --git a/board-js2x/slof/OF.fs b/board-js2x/slof/OF.fs
index e99fa20..f70581f 100644
--- a/board-js2x/slof/OF.fs
+++ b/board-js2x/slof/OF.fs
@@ -14,6 +14,15 @@
 
 hex
 
+: .slof-logo
+   cr ."         ..`. ..     .......  ..           ......      ......."
+   cr ."     ..`...`''.`'. .''``````..''.       .`''```''`.  `''``````"
+   cr ."        .`` .:' ': `''.....  .''.       ''`     .''..''......."
+   cr ."          ``.':.';. ``````''`.''.      .''.      ''``''`````'`"
+   cr ."          ``.':':`   .....`''.`'`...... `'`.....`''.`'`       "
+   cr ."         .`.`'``   .'`'`````.  ``''''''  ``''`'''`. `'`       "
+;
+
 \ as early as possible we want to know if it is js20, js21 or bimini
 \ u3 = js20; u4 = js21/bimini
 \ the difference if bimini or js21 will be done later depending if
@@ -171,6 +180,8 @@ THEN
 
 #include <banner.fs>
 
+: .banner .slof-logo .banner ;
+
 \ Get the secondary CPUs into our own spinloop.
 f8000050 rl@ CONSTANT master-cpu
 \ cr .( The master cpu is #) master-cpu .
@@ -200,8 +211,6 @@ d# 14318378 VALUE tb-frequency   \ default value - needed for "ms" to work
 #include "helper.fs"
 260 cp
 
-\ #include <timebase.fs>
-
 : tb@  BEGIN tbu@ tbl@ tbu@ rot over <> WHILE 2drop REPEAT
        20 lshift swap ffffffff and or ;
 : milliseconds  tb@ d# 1000 * tb-frequency / ;
@@ -300,7 +309,7 @@ takeover? not u4? and  IF
    \ the partition with the type 51 should have been added
    \ by LLFW... if it does not exist then something went
    \ wrong and we just destroy the whole thing
-   51 get-header  IF  0 nvram-base rb!  ELSE  2drop  THEN
+   51 get-header  IF  0 0 nvram-base rb!  ELSE  2drop  THEN
 THEN
 
 880 cp
@@ -320,24 +329,21 @@ check-for-nvramrc
 #include <loaders.fs>
 
 : bios-exec ( arg len -- rc )
-   s" bios-snk" romfs-lookup 0<> IF load-elf-file drop start-elf64
+   s" snk" romfs-lookup 0<> IF load-elf-file drop start-elf64
    ELSE 2drop false THEN
 ;
 
-\ check wether a VGA device was found during pci scan, if it was, and bios-snk is available
+\ check wether a VGA device was found during pci scan, if it was
 \ try to initialize it and create the needed device-nodes
-s" bios-snk" romfs-lookup 0<> dup value biosemu-available? IF drop THEN
 0 value biosemu-vmem
 0 value screen-info
 
-vga-device-node? biosemu-available? AND 0<> IF
+vga-device-node? 0<> IF
    s" VGA Device found: " type vga-device-node? node>path type s"  initializing..." type cr
    \ claim virtual memory for biosemu of 1MB
    100000 4 claim to biosemu-vmem
-
    \ claim memory for screen-info struct (140 bytes)
    d# 140 4 claim to screen-info
-
    \ remember current-node (it might be node 0 so we cannot use get-node)
    current-node @
    \ change into vga device node
@@ -392,20 +398,20 @@ vga-device-node? biosemu-available? AND 0<> IF
    biosemu-vmem 100000 release
 
    s" VGA initialization done." type cr
-THEN \ vga-device-node? AND biosemu-available?
+THEN \ vga-device-node?
 
 \ enable output on framebuffer
-s" screen" find-alias ?dup IF 
+s" screen" find-alias ?dup IF
    \ we need to open/close the screen device once before "ticking" display-emit to emit
    open-dev close-node
-   s" display-emit" $find IF to emit ELSE 2drop THEN 
+   s" display-emit" $find IF to emit ELSE 2drop THEN
 THEN
 8b0 cp
 
 \ do not let the usb scan overwrite the atapi cdrom alias
 pci-cdrom-num TO cdrom-alias-num
 
-s"  Scanning USB..." type usb-scan s"  done." type cr
+usb-scan
 
 s" net" s" net1" find-alias ?dup IF set-alias ELSE 2drop THEN
 s" disk" s" disk0" find-alias ?dup IF set-alias ELSE 2drop THEN
@@ -425,12 +431,21 @@ THEN
 directserial
 
 \ enable USB keyboard
-\ s" keyboard" input
+s" keyboard" find-alias  IF  drop
+   \ s" keyboard" input
+   \ at this point serial input is disabled
+THEN
+
+\ this enables the framebuffer as primary output device
+s" screen" find-alias  IF  drop
+   \ s" screen" output
+   \ at this point serial output is theoretically disabled
+THEN
 
 : .flashside
-  cr ." The currently active flashside is: "
-  rtas-get-flashside 0= IF ." 0 (permanent)" ELSE
-  ." 1 (temporary)" THEN
+   cr ." The currently active flashside is: "
+   rtas-get-flashside 0= IF ." 0 (permanent)" ELSE
+   ." 1 (temporary)" THEN
 ;
 
 bmc? IF  disable-watchdog  THEN
diff --git a/clients/net-snk/app/Makefile b/clients/net-snk/app/Makefile
index aa768fc..d65216c 100644
--- a/clients/net-snk/app/Makefile
+++ b/clients/net-snk/app/Makefile
@@ -23,6 +23,10 @@ OBJDIRS = netlib/netlib.o netapps/netboot.o
 OBJDIRS += netapps/netflash.o
 OBJDIRS += netapps/ping.o
 OBJDIRS += netapps/args.o
+ifeq ($(SNK_BIOSEMU_APPS), 1)
+OBJDIRS += biosemu/biosemu_app.o
+CFLAGS += -DSNK_BIOSEMU_APPS
+endif
 
 all: app.o
 
diff --git a/clients/net-snk/app/biosemu/Makefile b/clients/net-snk/app/biosemu/Makefile
new file mode 100644
index 0000000..8fe149d
--- /dev/null
+++ b/clients/net-snk/app/biosemu/Makefile
@@ -0,0 +1,38 @@
+# *****************************************************************************
+# * Copyright (c) 2004, 2007 IBM Corporation
+# * All rights reserved.
+# * This program and the accompanying materials
+# * are made available under the terms of the BSD License
+# * which accompanies this distribution, and is available at
+# * http://www.opensource.org/licenses/bsd-license.php
+# *
+# * Contributors:
+# *     IBM Corporation - initial implementation
+# ****************************************************************************/
+
+ifndef TOP
+  TOP = $(shell while ! test -e make.rules; do cd ..  ; done; pwd)
+  export TOP
+endif
+include $(TOP)/make.rules
+
+CFLAGS += -I$(ROOTDIR)/other-licence/x86emu -I$(ROOTDIR)/other-licence/x86emu/include -save-temps
+
+OBJS    = biosemu.o debug.o device.o mem.o io.o interrupt.o vbe.o
+LIBX86EMU = $(ROOTDIR)/other-licence/x86emu/libx86emu.a 
+
+.PHONY: $(LIBX86EMU)
+
+all: biosemu_app.o
+
+# special rule for libx86emu.a
+$(LIBX86EMU):
+	$(MAKE) -C $(dir $@)
+
+biosemu_app.o: $(OBJS) $(LIBX86EMU)
+	$(LD) $(LDFLAGS) $^ -o $@ -r
+	
+clean:	
+		$(RM) -f *.o *.a *.i *.s
+
+include $(TOP)/make.depend
diff --git a/clients/net-snk/app/biosemu/biosemu.c b/clients/net-snk/app/biosemu/biosemu.c
new file mode 100644
index 0000000..1d9b3da
--- /dev/null
+++ b/clients/net-snk/app/biosemu/biosemu.c
@@ -0,0 +1,211 @@
+/******************************************************************************
+ * Copyright (c) 2004, 2007 IBM Corporation
+ * All rights reserved.
+ * This program and the accompanying materials
+ * are made available under the terms of the BSD License
+ * which accompanies this distribution, and is available at
+ * http://www.opensource.org/licenses/bsd-license.php
+ *
+ * Contributors:
+ *     IBM Corporation - initial implementation
+ *****************************************************************************/
+
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include <types.h>
+#include <cpu.h>
+
+#include "debug.h"
+
+#include <x86emu/x86emu.h>
+#include <x86emu/regs.h>
+#include <x86emu/prim_ops.h>	// for push_word
+
+#include "io.h"
+#include "mem.h"
+#include "interrupt.h"
+
+#include <rtas.h>
+
+#include "device.h"
+
+static X86EMU_memFuncs my_mem_funcs = {
+	my_rdb, my_rdw, my_rdl,
+	my_wrb, my_wrw, my_wrl
+};
+
+static X86EMU_pioFuncs my_pio_funcs = {
+	my_inb, my_inw, my_inl,
+	my_outb, my_outw, my_outl
+};
+
+void dump(uint8_t * addr, uint32_t len);
+
+uint32_t
+biosemu(char argc, char **argv)
+{
+	uint8_t *rom_image;
+	int i = 0;
+	int32_t len;
+	uint8_t *biosmem;
+	uint32_t biosmem_size;
+	if (argc < 3) {
+		printf("Usage %s <vmem_base> <device_path>\n", argv[0]);
+		for (i = 0; i < argc; i++) {
+			printf("argv[%d]: %s\n", i, argv[i]);
+		}
+		return -1;
+	}
+	// argv[1] is address of virtual BIOS mem... it should be 1MB large...
+	biosmem = (uint8_t *) strtoul(argv[1], 0, 16);
+	biosmem_size = 0x100000;
+	// argv[2] is the device to open and use...
+	if (dev_init(argv[2]) != 0) {
+		printf("Error initializing device!\n");
+		return -1;
+	}
+	// get expROM address using rtas_pci_config_read
+	uint64_t rom_base_addr =
+	    rtas_pci_config_read(bios_device.puid, 4, bios_device.bus,
+				 bios_device.devfn, 0x30);
+	if ((rom_base_addr & 0x1) != 1) {
+		printf("Error: invalid Expansion ROM address: 0x%llx!\n",
+		       rom_base_addr);
+		return -1;
+	}
+	// unset lowest bit...
+	rom_base_addr = rom_base_addr & 0xFFFFFFFE;
+	DEBUG_PRINTF("rom_base: %llx\n", rom_base_addr);
+
+	dev_translate_address(&rom_base_addr);
+	DEBUG_PRINTF("translated rom_base: %llx\n", rom_base_addr);
+
+	rom_image = (uint8_t *) rom_base_addr;
+	DEBUG_PRINTF("executing rom_image from %p\n", rom_image);
+	DEBUG_PRINTF("biosmem at %p\n", biosmem);
+
+	// first of all, we need the size (3rd byte)
+	set_ci();
+	len = *(rom_image + 2);
+	clr_ci();
+	// size is in 512 byte blocks
+	len = len * 512;
+	DEBUG_PRINTF("Length: %d\n", len);
+
+	// in case we jump somewhere unexpected, or execution is finished,
+	// fill the biosmem with hlt instructions (0xf4)
+	memset(biosmem, 0xf4, sizeof(biosmem));
+
+	M.mem_base = (long) biosmem;
+	M.mem_size = biosmem_size;
+	DEBUG_PRINTF("membase set: %08x, size: %08x\n", (int) M.mem_base,
+		     (int) M.mem_size);
+
+	// copy expansion ROM image to segment C000
+	// NOTE: this sometimes fails, some bytes are 0x00... so we compare
+	// after copying and do some retries...
+	uint8_t *vga_img = biosmem + 0xc0000;
+	uint8_t copy_count = 0;
+	uint8_t cmp_result = 0;
+	do {
+#if 0
+		set_ci();
+		memcpy(vga_img, rom_image, len);
+		clr_ci();
+#else
+		// memcpy fails... try copy byte-by-byte with set/clr_ci
+		uint8_t c;
+		for (i = 0; i < len; i++) {
+			set_ci();
+			c = *(rom_image + i);
+			if (c != *(rom_image + i)) {
+				clr_ci();
+				printf("Copy failed at: %x/%x\n", i, len);
+				printf("rom_image(%x): %x, vga_img(%x): %x\n",
+				       i, *(rom_image + i), i, *(vga_img + i));
+				break;
+			}
+			clr_ci();
+			*(vga_img + i) = c;
+		}
+#endif
+		copy_count++;
+		set_ci();
+		cmp_result = memcmp(vga_img, rom_image, len);
+		clr_ci();
+	}
+	while ((copy_count < 5) && (cmp_result != 0));
+	if (cmp_result != 0) {
+		printf
+		    ("\nCopying Expansion ROM Image to Memory failed after %d retries! (%x)\n",
+		     copy_count, cmp_result);
+		dump(rom_image, 0x20);
+		dump(vga_img, 0x20);
+		return 0;
+	}
+	// setup BIOS area
+	char *date = "06/11/99";
+	for (i = 0; date[i]; i++)
+		my_wrb(0xffff5 + i, date[i]);
+	/* set up eisa ident string */
+	strcpy((char *) (biosmem + 0x0FFD9), "PCI_ISA");
+
+	/* write system model id for IBM-AT */
+	*((unsigned char *) (biosmem + 0x0FFFE)) = 0xfc;
+
+	//setup interrupt handler
+	X86EMU_intrFuncs intrFuncs[256];
+	for (i = 0; i < 256; i++)
+		intrFuncs[i] = handleInterrupt;
+	X86EMU_setupIntrFuncs(intrFuncs);
+	X86EMU_setupPioFuncs(&my_pio_funcs);
+	X86EMU_setupMemFuncs(&my_mem_funcs);
+
+	// setup the CPU
+	M.x86.R_AH = bios_device.bus;
+	M.x86.R_AL = bios_device.devfn;
+	M.x86.R_DX = 0x80;
+	M.x86.R_EIP = 3;
+	M.x86.R_CS = 0xc000;
+
+	// Initialize stack and data segment
+	M.x86.R_SS = 0x0030;
+	M.x86.R_DS = 0x0040;
+	M.x86.R_SP = 0xfffe;
+
+	// push a HLT instruction and a pointer to it onto the stack
+	// any return will pop the pointer and jump to the HLT, thus
+	// exiting (more or less) cleanly
+	push_word(0xf4f4);	//F4=HLT
+	push_word(M.x86.R_SS);
+	push_word(M.x86.R_SP + 2);
+
+	M.x86.R_ES = 0x0000;
+#ifdef DEBUG_TRACE_X86EMU
+	X86EMU_trace_on();
+	//since we have our own mem and io functions and dont use the x86emu functions,
+	// we dont need to enabled the debug...
+	//M.x86.debug |= DEBUG_MEM_TRACE_F;
+	//M.x86.debug |= DEBUG_IO_TRACE_F;
+#endif
+#ifdef DEBUG_JMP
+	M.x86.debug |= DEBUG_TRACEJMP_F;
+	M.x86.debug |= DEBUG_TRACEJMP_REGS_F;
+	M.x86.debug |= DEBUG_TRACECALL_F;
+	M.x86.debug |= DEBUG_TRACECALL_REGS_F;
+#endif
+#ifdef DEBUG
+	M.x86.debug |= DEBUG_SAVE_IP_CS_F;
+	M.x86.debug |= DEBUG_DECODE_F;
+	M.x86.debug |= DEBUG_DECODE_NOPRINT_F;
+#endif
+
+	DEBUG_PRINTF("Los gehts...\n");
+	X86EMU_exec();
+	DEBUG_PRINTF("Fertig\n");
+
+	return 0;
+}
diff --git a/clients/net-snk/app/biosemu/debug.c b/clients/net-snk/app/biosemu/debug.c
new file mode 100644
index 0000000..4346dda
--- /dev/null
+++ b/clients/net-snk/app/biosemu/debug.c
@@ -0,0 +1,53 @@
+/******************************************************************************
+ * Copyright (c) 2004, 2007 IBM Corporation
+ * All rights reserved.
+ * This program and the accompanying materials
+ * are made available under the terms of the BSD License
+ * which accompanies this distribution, and is available at
+ * http://www.opensource.org/licenses/bsd-license.php
+ *
+ * Contributors:
+ *     IBM Corporation - initial implementation
+ *****************************************************************************/
+
+#include <cpu.h>
+
+#include "debug.h"
+
+void
+dump(uint8_t * addr, uint32_t len)
+{
+	printf("\n\r%s(%p, %x):\n", __FUNCTION__, addr, len);
+	while (len) {
+		unsigned int tmpCnt = len;
+		unsigned char x;
+		if (tmpCnt > 8)
+			tmpCnt = 8;
+		printf("\n\r%p: ", addr);
+		// print hex
+		while (tmpCnt--) {
+			set_ci();
+			x = *addr++;
+			clr_ci();
+			printf("%02x ", x);
+		}
+		tmpCnt = len;
+		if (tmpCnt > 8)
+			tmpCnt = 8;
+		len -= tmpCnt;
+		//reset addr ptr to print ascii
+		addr = addr - tmpCnt;
+		// print ascii
+		while (tmpCnt--) {
+			set_ci();
+			x = *addr++;
+			clr_ci();
+			if ((x < 32) || (x >= 127)) {
+				//non-printable char
+				x = '.';
+			}
+			printf("%c", x);
+		}
+	}
+	printf("\n");
+}
diff --git a/clients/net-snk/app/biosemu/debug.h b/clients/net-snk/app/biosemu/debug.h
new file mode 100644
index 0000000..71e69fe
--- /dev/null
+++ b/clients/net-snk/app/biosemu/debug.h
@@ -0,0 +1,63 @@
+/******************************************************************************
+ * Copyright (c) 2004, 2007 IBM Corporation
+ * All rights reserved.
+ * This program and the accompanying materials
+ * are made available under the terms of the BSD License
+ * which accompanies this distribution, and is available at
+ * http://www.opensource.org/licenses/bsd-license.php
+ *
+ * Contributors:
+ *     IBM Corporation - initial implementation
+ *****************************************************************************/
+#ifndef _BIOSEMU_DEBUG_H_
+#define _BIOSEMU_DEBUG_H_
+
+#include <stdio.h>
+#include <types.h>
+
+//#define DEBUG_TRACE_X86EMU
+//#undef DEBUG_TRACE_X86EMU
+
+//#define DEBUG
+#ifdef DEBUG
+
+//#define DEBUG_IO
+//#define DEBUG_MEM
+//#define DEBUG_INTR
+//#define DEBUG_VBE
+// define to enable tracing of JMPs in x86emu
+//#define DEBUG_JMP
+
+#define DEBUG_PRINTF(_x...) printf(_x)
+#else
+#define DEBUG_PRINTF(_x...)
+
+#endif				//DEBUG
+
+#ifdef DEBUG_IO
+#define DEBUG_PRINTF_IO(_x...) DEBUG_PRINTF("%x:%x ", M.x86.R_CS, M.x86.R_IP); DEBUG_PRINTF(_x)
+#else
+#define DEBUG_PRINTF_IO(_x...)
+#endif
+
+#ifdef DEBUG_MEM
+#define DEBUG_PRINTF_MEM(_x...) DEBUG_PRINTF("%x:%x ", M.x86.R_CS, M.x86.R_IP); DEBUG_PRINTF(_x)
+#else
+#define DEBUG_PRINTF_MEM(_x...)
+#endif
+
+#ifdef DEBUG_INTR
+#define DEBUG_PRINTF_INTR(_x...) DEBUG_PRINTF("%x:%x ", M.x86.R_CS, M.x86.R_IP); DEBUG_PRINTF(_x)
+#else
+#define DEBUG_PRINTF_INTR(_x...)
+#endif
+
+#ifdef DEBUG_VBE
+#define DEBUG_PRINTF_VBE(_x...) DEBUG_PRINTF("%x:%x ", M.x86.R_CS, M.x86.R_IP); DEBUG_PRINTF(_x)
+#else
+#define DEBUG_PRINTF_VBE(_x...)
+#endif
+
+void dump(uint8_t * addr, uint32_t len);
+
+#endif
diff --git a/clients/net-snk/app/biosemu/device.c b/clients/net-snk/app/biosemu/device.c
new file mode 100644
index 0000000..3a60818
--- /dev/null
+++ b/clients/net-snk/app/biosemu/device.c
@@ -0,0 +1,230 @@
+/******************************************************************************
+ * Copyright (c) 2004, 2007 IBM Corporation
+ * All rights reserved.
+ * This program and the accompanying materials
+ * are made available under the terms of the BSD License
+ * which accompanies this distribution, and is available at
+ * http://www.opensource.org/licenses/bsd-license.php
+ *
+ * Contributors:
+ *     IBM Corporation - initial implementation
+ *****************************************************************************/
+
+
+#include "device.h"
+#include "rtas.h"
+#include <stdio.h>
+#include <string.h>
+#include "debug.h"
+
+typedef struct {
+	uint8_t info;
+	uint8_t bus;
+	uint8_t devfn;
+	uint8_t cfg_space_offset;
+	uint64_t address;
+	uint64_t size;
+} __attribute__ ((__packed__)) assigned_address_t;
+
+// use translate_address_dev and get_puid from net-snk's net_support.c
+void translate_address_dev(uint64_t *, phandle_t);
+uint64_t get_puid(phandle_t node);
+
+
+// scan all adresses assigned to the device ("assigned-addresses" and "reg")
+// store in translate_address_array for faster translation using dev_translate_address
+void
+dev_get_addr_info()
+{
+	// get bus/dev/fn from assigned-addresses
+	int32_t len;
+	//max. 6 BARs and 1 Exp.ROM plus CfgSpace and 3 legacy ranges
+	assigned_address_t buf[11];
+	len =
+	    of_getprop(bios_device.phandle, "assigned-addresses", buf,
+		       sizeof(buf));
+	bios_device.bus = buf[0].bus;
+	bios_device.devfn = buf[0].devfn;
+	DEBUG_PRINTF("bus: %x, devfn: %x\n", bios_device.bus,
+		     bios_device.devfn);
+	//store address translations for all assigned-addresses and regs in
+	//translate_address_array for faster translation later on...
+	int i = 0;
+	// index to insert data into translate_address_array
+	int taa_index = 0;
+	uint64_t address_offset;
+	for (i = 0; i < (len / sizeof(assigned_address_t)); i++, taa_index++) {
+		//copy all info stored in assigned-addresses
+		translate_address_array[taa_index].info = buf[i].info;
+		translate_address_array[taa_index].bus = buf[i].bus;
+		translate_address_array[taa_index].devfn = buf[i].devfn;
+		translate_address_array[taa_index].cfg_space_offset =
+		    buf[i].cfg_space_offset;
+		translate_address_array[taa_index].address = buf[i].address;
+		translate_address_array[taa_index].size = buf[i].size;
+		// translate first address and store it as address_offset
+		address_offset = buf[i].address;
+		translate_address_dev(&address_offset, bios_device.phandle);
+		translate_address_array[taa_index].address_offset =
+		    address_offset - buf[i].address;
+	}
+	//get "reg" property
+	len = of_getprop(bios_device.phandle, "reg", buf, sizeof(buf));
+	for (i = 0; i < (len / sizeof(assigned_address_t)); i++) {
+		if ((buf[i].size == 0) || (buf[i].cfg_space_offset != 0)) {
+			// we dont care for ranges with size 0 and
+			// BARs and Expansion ROM must be in assigned-addresses... so in reg
+			// we only look for those without config space offset set...
+			// i.e. the legacy ranges
+			continue;
+		}
+		//copy all info stored in assigned-addresses
+		translate_address_array[taa_index].info = buf[i].info;
+		translate_address_array[taa_index].bus = buf[i].bus;
+		translate_address_array[taa_index].devfn = buf[i].devfn;
+		translate_address_array[taa_index].cfg_space_offset =
+		    buf[i].cfg_space_offset;
+		translate_address_array[taa_index].address = buf[i].address;
+		translate_address_array[taa_index].size = buf[i].size;
+		// translate first address and store it as address_offset
+		address_offset = buf[i].address;
+		translate_address_dev(&address_offset, bios_device.phandle);
+		translate_address_array[taa_index].address_offset =
+		    address_offset - buf[i].address;
+		taa_index++;
+	}
+	// store last entry index of translate_address_array
+	taa_last_entry = taa_index - 1;
+#ifdef DEBUG
+	//dump translate_address_array
+	printf("translate_address_array: \n");
+	translate_address_t ta;
+	for (i = 0; i <= taa_last_entry; i++) {
+		ta = translate_address_array[i];
+		printf
+		    ("%d: %02x%02x%02x%02x\n\taddr: %016llx\n\toffs: %016llx\n\tsize: %016llx\n",
+		     i, ta.info, ta.bus, ta.devfn, ta.cfg_space_offset,
+		     ta.address, ta.address_offset, ta.size);
+	}
+#endif
+}
+
+// to simulate accesses to legacy VGA Memory (0xA0000-0xBFFFF)
+// we look for the first prefetchable memory BAR, if no prefetchable BAR found,
+// we use the first memory BAR
+// dev_translate_addr will translate accesses to the legacy VGA Memory into the found vmem BAR
+void
+dev_find_vmem_addr()
+{
+	int i = 0;
+	translate_address_t ta;
+	int8_t tai_np = -1, tai_p = -1;	// translate_address_array index for non-prefetchable and prefetchable memory
+	//search backwards to find first entry
+	for (i = taa_last_entry; i >= 0; i--) {
+		ta = translate_address_array[i];
+		if ((ta.cfg_space_offset >= 0x10)
+		    && (ta.cfg_space_offset <= 0x24)) {
+			//only BARs
+			if ((ta.info & 0x03) >= 0x02) {
+				//32/64bit memory
+				tai_np = i;
+				if ((ta.info & 0x40) != 0) {
+					// prefetchable
+					tai_p = i;
+				}
+			}
+		}
+	}
+	if (tai_p != -1) {
+		ta = translate_address_array[tai_p];
+		bios_device.vmem_addr = ta.address;
+		bios_device.vmem_size = ta.size;
+		DEBUG_PRINTF
+		    ("%s: Found prefetchable Virtual Legacy Memory BAR: %llx, size: %llx\n",
+		     __FUNCTION__, bios_device.vmem_addr,
+		     bios_device.vmem_size);
+	} else if (tai_np != -1) {
+		ta = translate_address_array[tai_np];
+		bios_device.vmem_addr = ta.address;
+		bios_device.vmem_size = ta.size;
+		DEBUG_PRINTF
+		    ("%s: Found non-prefetchable Virtual Legacy Memory BAR: %llx, size: %llx",
+		     __FUNCTION__, bios_device.vmem_addr,
+		     bios_device.vmem_size);
+	}
+	// disable vmem
+	//bios_device.vmem_size = 0;
+}
+
+void
+dev_get_puid()
+{
+	// get puid
+	bios_device.puid = get_puid(bios_device.phandle);
+	DEBUG_PRINTF("puid: 0x%llx\n", bios_device.puid);
+}
+
+void
+dev_get_device_vendor_id()
+{
+	uint32_t pci_config_0 =
+	    rtas_pci_config_read(bios_device.puid, 4, bios_device.bus,
+				 bios_device.devfn, 0x0);
+	bios_device.pci_device_id =
+	    (uint16_t) ((pci_config_0 & 0xFFFF0000) >> 16);
+	bios_device.pci_vendor_id = (uint16_t) (pci_config_0 & 0x0000FFFF);
+	DEBUG_PRINTF("PCI Device ID: %04x, PCI Vendor ID: %x\n",
+		     bios_device.pci_device_id, bios_device.pci_vendor_id);
+}
+
+uint8_t
+dev_init(char *device_name)
+{
+	//init bios_device struct
+	memset(&bios_device, 0, sizeof(bios_device));
+	bios_device.ihandle = of_open(device_name);
+	if (bios_device.ihandle == 0) {
+		DEBUG_PRINTF("%s is no valid device!\n", device_name);
+		return -1;
+	}
+	bios_device.phandle = of_finddevice(device_name);
+	dev_get_addr_info();
+	dev_find_vmem_addr();
+	dev_get_puid();
+	dev_get_device_vendor_id();
+	return 0;
+}
+
+// translate address function using translate_address_array assembled
+// by dev_get_addr_info... MUCH faster than calling translate_address_dev
+// and accessing client interface for every translation...
+// returns: 0 if addr not found in translate_address_array, 1 if found.
+uint8_t
+dev_translate_address(uint64_t * addr)
+{
+	int i = 0;
+	translate_address_t ta;
+	//check if it is an access to legacy VGA Mem... if it is, map the address
+	//to the vmem BAR and then translate it...
+	// (translation info provided by Ben Herrenschmidt)
+	// NOTE: the translation seems to only work for NVIDIA cards... but it is needed
+	// to make some NVIDIA cards work at all...
+	if ((bios_device.vmem_size > 0)
+	    && ((*addr >= 0xA0000) && (*addr < 0xB8000))) {
+		*addr = (*addr - 0xA0000) * 4 + 2 + bios_device.vmem_addr;
+	}
+	if ((bios_device.vmem_size > 0)
+	    && ((*addr >= 0xB8000) && (*addr < 0xC0000))) {
+		uint8_t shift = *addr & 1;
+		*addr &= 0xfffffffe;
+		*addr = (*addr - 0xB8000) * 4 + shift + bios_device.vmem_addr;
+	}
+	for (i = 0; i <= taa_last_entry; i++) {
+		ta = translate_address_array[i];
+		if ((*addr >= ta.address) && (*addr <= (ta.address + ta.size))) {
+			*addr += ta.address_offset;
+			return 1;
+		}
+	}
+	return 0;
+}
diff --git a/clients/net-snk/app/biosemu/device.h b/clients/net-snk/app/biosemu/device.h
new file mode 100644
index 0000000..04bd34e
--- /dev/null
+++ b/clients/net-snk/app/biosemu/device.h
@@ -0,0 +1,111 @@
+/******************************************************************************
+ * Copyright (c) 2004, 2007 IBM Corporation
+ * All rights reserved.
+ * This program and the accompanying materials
+ * are made available under the terms of the BSD License
+ * which accompanies this distribution, and is available at
+ * http://www.opensource.org/licenses/bsd-license.php
+ *
+ * Contributors:
+ *     IBM Corporation - initial implementation
+ *****************************************************************************/
+
+#ifndef DEVICE_LIB_H
+#define DEVICE_LIB_H
+
+#include "types.h"
+#include <cpu.h>
+#include "of.h"
+#include <stdio.h>
+
+typedef struct {
+	uint8_t bus;
+	uint8_t devfn;
+	uint64_t puid;
+	phandle_t phandle;
+	ihandle_t ihandle;
+	// store the address of the BAR that is used to simulate
+	// legacy memory accesses
+	uint64_t vmem_addr;
+	uint64_t vmem_size;
+	// used to buffer I/O Accesses, that do not access the I/O Range of the device...
+	// 64k might be overkill, but we can buffer all I/O accesses...
+	uint8_t io_buffer[64 * 1024];
+	uint16_t pci_vendor_id;
+	uint16_t pci_device_id;
+} device_t;
+
+typedef struct {
+	uint8_t info;
+	uint8_t bus;
+	uint8_t devfn;
+	uint8_t cfg_space_offset;
+	uint64_t address;
+	uint64_t address_offset;
+	uint64_t size;
+} __attribute__ ((__packed__)) translate_address_t;
+
+// array to store address translations for this
+// device. Needed for faster address translation, so
+// not every I/O or Memory Access needs to call translate_address_dev
+// and access the device tree
+// 6 BARs, 1 Exp. ROM, 1 Cfg.Space, and 3 Legacy
+// translations are supported... this should be enough for
+// most devices... for VGA it is enough anyways...
+translate_address_t translate_address_array[11];
+
+// index of last translate_address_array entry
+// set by get_dev_addr_info function
+uint8_t taa_last_entry;
+
+device_t bios_device;
+
+uint8_t dev_init(char *device_name);
+
+uint8_t dev_translate_address(uint64_t * addr);
+
+/* endianness swap functions for 16 and 32 bit words
+ * copied from axon_pciconfig.c
+ */
+static inline void
+out32le(void *addr, uint32_t val)
+{
+	asm volatile ("stwbrx  %0, 0, %1"::"r" (val), "r"(addr));
+}
+
+static inline uint32_t
+in32le(void *addr)
+{
+	uint32_t val;
+	asm volatile ("lwbrx  %0, 0, %1":"=r" (val):"r"(addr));
+	return val;
+}
+
+static inline void
+out16le(void *addr, uint16_t val)
+{
+	asm volatile ("sthbrx  %0, 0, %1"::"r" (val), "r"(addr));
+}
+
+static inline uint16_t
+in16le(void *addr)
+{
+	uint16_t val;
+	asm volatile ("lhbrx %0, 0, %1":"=r" (val):"r"(addr));
+	return val;
+}
+
+/* debug function, dumps HID1 and HID4 to detect wether caches are on/off */
+static inline void
+dumpHID()
+{
+	uint64_t hid;
+	//HID1 = 1009
+	__asm__ __volatile__("mfspr %0, 1009":"=r"(hid));
+	printf("HID1: %016llx\n", hid);
+	//HID4 = 1012
+	__asm__ __volatile__("mfspr %0, 1012":"=r"(hid));
+	printf("HID4: %016llx\n", hid);
+}
+
+#endif
diff --git a/clients/net-snk/app/biosemu/interrupt.c b/clients/net-snk/app/biosemu/interrupt.c
new file mode 100644
index 0000000..b0ad12f
--- /dev/null
+++ b/clients/net-snk/app/biosemu/interrupt.c
@@ -0,0 +1,282 @@
+/******************************************************************************
+ * Copyright (c) 2004, 2007 IBM Corporation
+ * All rights reserved.
+ * This program and the accompanying materials
+ * are made available under the terms of the BSD License
+ * which accompanies this distribution, and is available at
+ * http://www.opensource.org/licenses/bsd-license.php
+ *
+ * Contributors:
+ *     IBM Corporation - initial implementation
+ *****************************************************************************/
+
+#include <stdio.h>
+
+#include <rtas.h>
+
+#include "mem.h"
+#include "device.h"
+#include "debug.h"
+
+#include <x86emu/x86emu.h>
+#include <x86emu/prim_ops.h>
+
+
+
+//setup to run the code at the address, that the Interrupt Vector points to...
+void
+setupInt(int intNum)
+{
+	DEBUG_PRINTF_INTR("%s(%x): executing interrupt handler @%08x\n",
+			  __FUNCTION__, intNum, my_rdl(intNum * 4));
+	// push current R_FLG... will be popped by IRET
+	push_word((u16) M.x86.R_FLG);
+	CLEAR_FLAG(F_IF);
+	CLEAR_FLAG(F_TF);
+	// push current CS:IP to the stack, will be popped by IRET
+	push_word(M.x86.R_CS);
+	push_word(M.x86.R_IP);
+	// set CS:IP to the interrupt handler address... so the next executed instruction will
+	// be the interrupt handler
+	M.x86.R_CS = my_rdw(intNum * 4 + 2);
+	M.x86.R_IP = my_rdw(intNum * 4);
+}
+
+// handle int1a (PCI BIOS Interrupt)
+void
+handleInt1a()
+{
+	// function number in AX
+	uint8_t bus, devfn, offs;
+	switch (M.x86.R_AX) {
+	case 0xb101:
+		// Installation check
+		CLEAR_FLAG(F_CF);	// clear CF
+		M.x86.R_EDX = 0x20494350;	// " ICP" endian swapped "PCI "
+		M.x86.R_AL = 0x1;	// Config Space Mechanism 1 supported
+		M.x86.R_BX = 0x0210;	// PCI Interface Level Version 2.10
+		M.x86.R_CL = 0xff;	// number of last PCI Bus in system TODO: check!
+		break;
+	case 0xb102:
+		// Find PCI Device
+		// NOTE: we currently only allow the device to find itself...
+		// it SHOULD be all we ever need...
+		// device_id in CX, vendor_id in DX
+		DEBUG_PRINTF_INTR("%s(): function: %x: PCI Find Device\n",
+				  __FUNCTION__, M.x86.R_AX);
+		if ((M.x86.R_CX == bios_device.pci_device_id)
+		    && (M.x86.R_DX == bios_device.pci_vendor_id)) {
+			CLEAR_FLAG(F_CF);
+			M.x86.R_AH = 0x00;	// return code: success
+			M.x86.R_BH = bios_device.bus;
+			M.x86.R_BL = bios_device.devfn;
+			DEBUG_PRINTF_INTR
+			    ("%s(): function %x: PCI Find Device --> 0x%04x\n",
+			     __FUNCTION__, M.x86.R_AX, M.x86.R_BX);
+		} else {
+			DEBUG_PRINTF_INTR
+			    ("%s(): function %x: invalid device/vendor! (%04x/%04x expected: %04x/%04x) \n",
+			     __FUNCTION__, M.x86.R_AX, M.x86.R_CX, M.x86.R_DX,
+			     bios_device.pci_device_id,
+			     bios_device.pci_vendor_id);
+			SET_FLAG(F_CF);
+			M.x86.R_AH = 0x86;	// return code: device not found
+		}
+		break;
+	case 0xb108:		//read configuration byte
+	case 0xb109:		//read configuration word
+	case 0xb10a:		//read configuration dword
+		bus = M.x86.R_BH;
+		devfn = M.x86.R_BL;
+		offs = M.x86.R_DI;
+		if ((bus != bios_device.bus)
+		    || (devfn != bios_device.devfn)) {
+			// fail accesses to any device but ours...
+			printf
+			    ("%s(): Config read access invalid! bus: %x (%x), devfn: %x (%x), offs: %x\n",
+			     __FUNCTION__, bus, bios_device.bus, devfn,
+			     bios_device.devfn, offs);
+			SET_FLAG(F_CF);
+			M.x86.R_AH = 0x87;	//return code: bad pci register
+			HALT_SYS();
+			return;
+		} else {
+			switch (M.x86.R_AX) {
+			case 0xb108:
+				M.x86.R_CL =
+				    (uint8_t) rtas_pci_config_read(bios_device.
+								   puid, 1,
+								   bus, devfn,
+								   offs);
+				DEBUG_PRINTF_INTR
+				    ("%s(): function %x: PCI Config Read @%02x --> 0x%02x\n",
+				     __FUNCTION__, M.x86.R_AX, offs,
+				     M.x86.R_CL);
+				break;
+			case 0xb109:
+				M.x86.R_CX =
+				    (uint16_t) rtas_pci_config_read(bios_device.
+								    puid, 2,
+								    bus, devfn,
+								    offs);
+				DEBUG_PRINTF_INTR
+				    ("%s(): function %x: PCI Config Read @%02x --> 0x%04x\n",
+				     __FUNCTION__, M.x86.R_AX, offs,
+				     M.x86.R_CX);
+				break;
+			case 0xb10a:
+				M.x86.R_ECX =
+				    (uint32_t) rtas_pci_config_read(bios_device.
+								    puid, 4,
+								    bus, devfn,
+								    offs);
+				DEBUG_PRINTF_INTR
+				    ("%s(): function %x: PCI Config Read @%02x --> 0x%08x\n",
+				     __FUNCTION__, M.x86.R_AX, offs,
+				     M.x86.R_ECX);
+				break;
+			}
+			CLEAR_FLAG(F_CF);
+			M.x86.R_AH = 0x0;	// return code: success
+		}
+		break;
+	case 0xb10b:		//write configuration byte
+	case 0xb10c:		//write configuration word
+	case 0xb10d:		//write configuration dword
+		bus = M.x86.R_BH;
+		devfn = M.x86.R_BL;
+		offs = M.x86.R_DI;
+		if ((bus != bios_device.bus)
+		    || (devfn != bios_device.devfn)) {
+			// fail accesses to any device but ours...
+			printf
+			    ("%s(): Config read access invalid! bus: %x (%x), devfn: %x (%x), offs: %x\n",
+			     __FUNCTION__, bus, bios_device.bus, devfn,
+			     bios_device.devfn, offs);
+			SET_FLAG(F_CF);
+			M.x86.R_AH = 0x87;	//return code: bad pci register
+			HALT_SYS();
+			return;
+		} else {
+			switch (M.x86.R_AX) {
+			case 0xb10b:
+				rtas_pci_config_write(bios_device.puid, 1, bus,
+						      devfn, offs, M.x86.R_CL);
+				DEBUG_PRINTF_INTR
+				    ("%s(): function %x: PCI Config Write @%02x <-- 0x%02x\n",
+				     __FUNCTION__, M.x86.R_AX, offs,
+				     M.x86.R_CL);
+				break;
+			case 0xb10c:
+				rtas_pci_config_write(bios_device.puid, 2, bus,
+						      devfn, offs, M.x86.R_CX);
+				DEBUG_PRINTF_INTR
+				    ("%s(): function %x: PCI Config Write @%02x <-- 0x%04x\n",
+				     __FUNCTION__, M.x86.R_AX, offs,
+				     M.x86.R_CX);
+				break;
+			case 0xb10d:
+				rtas_pci_config_write(bios_device.puid, 4, bus,
+						      devfn, offs, M.x86.R_ECX);
+				DEBUG_PRINTF_INTR
+				    ("%s(): function %x: PCI Config Write @%02x <-- 0x%08x\n",
+				     __FUNCTION__, M.x86.R_AX, offs,
+				     M.x86.R_ECX);
+				break;
+			}
+			CLEAR_FLAG(F_CF);
+			M.x86.R_AH = 0x0;	// return code: success
+		}
+		break;
+	default:
+		DEBUG_PRINTF_INTR
+		    ("%s(): unknown function (%x) for int1a handler.\n",
+		     __FUNCTION__, M.x86.R_AX);
+		DEBUG_PRINTF_INTR("AX=%04x BX=%04x CX=%04x DX=%04x\n",
+				  M.x86.R_AX, M.x86.R_BX, M.x86.R_CX,
+				  M.x86.R_DX);
+		HALT_SYS();
+		break;
+	}
+
+}
+
+// main Interrupt Handler routine, should be registered as x86emu interrupt handler
+void
+handleInterrupt(int intNum)
+{
+	uint8_t int_handled = 0;
+	DEBUG_PRINTF_INTR("%s(%x)\n", __FUNCTION__, intNum);
+	switch (intNum) {
+	case 0x10:		//BIOS video interrupt
+	case 0x42:		// INT 10h relocated by EGA/VGA BIOS
+	case 0x6d:		// INT 10h relocated by VGA BIOS
+		// get interrupt vector from IDT (4 bytes per Interrupt starting at address 0
+		if (my_rdl(intNum * 4) == 0xF000F065)	//F000:F065 is default BIOS interrupt handler address
+		{
+			// default handler called, ignore interrupt...
+			DEBUG_PRINTF_INTR
+			    ("%s(%x): default interrupt Vector (%08x) found, interrupt ignored...\n",
+			     __FUNCTION__, intNum, my_rdl(intNum * 4));
+			DEBUG_PRINTF_INTR("AX=%04x BX=%04x CX=%04x DX=%04x\n",
+					  M.x86.R_AX, M.x86.R_BX, M.x86.R_CX,
+					  M.x86.R_DX);
+			//HALT_SYS();
+			int_handled = 1;
+		}
+		break;
+	case 0x1a:
+		// PCI BIOS Interrupt
+		handleInt1a();
+		int_handled = 1;
+		break;
+	default:
+		DEBUG_PRINTF_INTR("Interrupt %#x (Vector: %x) not implemented\n", intNum, my_rdl(intNum * 4));	// 4bytes per interrupt vector...
+		int_handled = 1;
+		HALT_SYS();
+		break;
+	}
+	// if we did not handle the interrupt, jump to the interrupt vector...
+	if (!int_handled) {
+		setupInt(intNum);
+	}
+}
+
+// prepare and execute Interrupt 10 (VGA Interrupt)
+void
+runInt10()
+{
+	// Initialize stack and data segment
+	M.x86.R_SS = 0x0030;
+	M.x86.R_DS = 0x0040;
+	M.x86.R_SP = 0xfffe;
+
+	// push a HLT instruction and a pointer to it onto the stack
+	// any return will pop the pointer and jump to the HLT, thus
+	// exiting (more or less) cleanly
+	push_word(0xf4f4);	//F4=HLT
+	//push_word(M.x86.R_SS);
+	//push_word(M.x86.R_SP + 2);
+
+	// setupInt will push the current CS and IP to the stack to return to it,
+	// but we want to halt, so set CS:IP to the HLT instruction we just pushed
+	// to the stack
+	M.x86.R_CS = M.x86.R_SS;
+	M.x86.R_IP = M.x86.R_SP;	// + 4;
+
+#ifdef DEBUG_TRACE_X86EMU
+	X86EMU_trace_on();
+#endif
+#ifdef DEBUG_JMP
+	M.x86.debug |= DEBUG_TRACEJMP_REGS_F;
+	M.x86.debug |= DEBUG_TRACEJMP_REGS_F;
+	M.x86.debug |= DEBUG_TRACECALL_F;
+	M.x86.debug |= DEBUG_TRACECALL_REGS_F;
+#endif
+
+	setupInt(0x10);
+	DEBUG_PRINTF_INTR("%s(): starting execution of INT10...\n",
+			  __FUNCTION__);
+	X86EMU_exec();
+	DEBUG_PRINTF_INTR("%s(): execution finished\n", __FUNCTION__);
+}
diff --git a/clients/net-snk/app/biosemu/interrupt.h b/clients/net-snk/app/biosemu/interrupt.h
new file mode 100644
index 0000000..2d3f979
--- /dev/null
+++ b/clients/net-snk/app/biosemu/interrupt.h
@@ -0,0 +1,19 @@
+/******************************************************************************
+ * Copyright (c) 2004, 2007 IBM Corporation
+ * All rights reserved.
+ * This program and the accompanying materials
+ * are made available under the terms of the BSD License
+ * which accompanies this distribution, and is available at
+ * http://www.opensource.org/licenses/bsd-license.php
+ *
+ * Contributors:
+ *     IBM Corporation - initial implementation
+ *****************************************************************************/
+#ifndef _BIOSEMU_INTERRUPT_H_
+#define _BIOSEMU_INTERRUPT_H_
+
+void handleInterrupt(int intNum);
+
+void runInt10();
+
+#endif
diff --git a/clients/net-snk/app/biosemu/io.c b/clients/net-snk/app/biosemu/io.c
new file mode 100644
index 0000000..9329eca
--- /dev/null
+++ b/clients/net-snk/app/biosemu/io.c
@@ -0,0 +1,292 @@
+/******************************************************************************
+ * Copyright (c) 2004, 2007 IBM Corporation
+ * All rights reserved.
+ * This program and the accompanying materials
+ * are made available under the terms of the BSD License
+ * which accompanies this distribution, and is available at
+ * http://www.opensource.org/licenses/bsd-license.php
+ *
+ * Contributors:
+ *     IBM Corporation - initial implementation
+ *****************************************************************************/
+
+#include <stdio.h>
+#include <cpu.h>
+#include "device.h"
+#include "rtas.h"
+#include "debug.h"
+#include "device.h"
+#include <types.h>
+#include <x86emu/x86emu.h>
+
+// those are defined in net-snk/oflib/pci.c
+// currently not used...
+//extern unsigned int read_io(void *, size_t);
+//extern int write_io(void *, unsigned int, size_t);
+
+// these are not used, only needed for linking,  must be overridden using X86emu_setupPioFuncs
+// with the functions and struct below
+void
+outb(uint8_t val, uint16_t port)
+{
+	printf("WARNING: outb not implemented!\n");
+	HALT_SYS();
+}
+
+void
+outw(uint16_t val, uint16_t port)
+{
+	printf("WARNING: outw not implemented!\n");
+	HALT_SYS();
+}
+
+void
+outl(uint32_t val, uint16_t port)
+{
+	printf("WARNING: outl not implemented!\n");
+	HALT_SYS();
+}
+
+uint8_t
+inb(uint16_t port)
+{
+	printf("WARNING: inb not implemented!\n");
+	HALT_SYS();
+	return 0;
+}
+
+uint16_t
+inw(uint16_t port)
+{
+	printf("WARNING: inw not implemented!\n");
+	HALT_SYS();
+	return 0;
+}
+
+uint32_t
+inl(uint16_t port)
+{
+	printf("WARNING: inl not implemented!\n");
+	HALT_SYS();
+	return 0;
+}
+
+uint8_t
+my_inb(X86EMU_pioAddr addr)
+{
+	uint64_t translated_addr = addr;
+	uint8_t translated = dev_translate_address(&translated_addr);
+	if (translated != 0) {
+		//translation successfull, access VGA I/O (BAR or Legacy...)
+		DEBUG_PRINTF_IO("%s(%x): access to VGA I/O\n", __FUNCTION__,
+				addr);
+		//DEBUG_PRINTF_IO("%s(%04x): translated_addr: %llx\n", __FUNCTION__, addr, translated_addr);
+		set_ci();
+		uint8_t rval = *((uint8_t *) translated_addr);
+		DEBUG_PRINTF_IO("%s(%04x) VGA I/O --> %02x\n", __FUNCTION__,
+				addr, rval);
+		clr_ci();
+		return rval;
+	} else {
+		DEBUG_PRINTF_IO("%s(%04x) reading from bios_device.io_buffer\n",
+				__FUNCTION__, addr);
+		uint8_t rval = *((uint8_t *) (bios_device.io_buffer + addr));
+		DEBUG_PRINTF_IO("%s(%04x) I/O Buffer --> %02x\n", __FUNCTION__,
+				addr, rval);
+		return rval;
+	}
+}
+
+uint16_t
+my_inw(X86EMU_pioAddr addr)
+{
+	uint64_t translated_addr = addr;
+	uint8_t translated = dev_translate_address(&translated_addr);
+	if (translated != 0) {
+		//translation successfull, access VGA I/O (BAR or Legacy...)
+		DEBUG_PRINTF_IO("%s(%x): access to VGA I/O\n", __FUNCTION__,
+				addr);
+		//DEBUG_PRINTF_IO("%s(%04x): translated_addr: %llx\n", __FUNCTION__, addr, translated_addr);
+		uint16_t rval;
+		if ((translated_addr & (uint64_t) 0x1) == 0) {
+			// 16 bit aligned access...
+			set_ci();
+			rval = in16le((void *) translated_addr);
+			clr_ci();
+		} else {
+			// unaligned access, read single bytes
+			set_ci();
+			rval = (*((uint8_t *) translated_addr)) |
+			    (*((uint8_t *) translated_addr + 1) << 8);
+			clr_ci();
+		}
+		DEBUG_PRINTF_IO("%s(%04x) VGA I/O --> %04x\n", __FUNCTION__,
+				addr, rval);
+		return rval;
+	} else {
+		DEBUG_PRINTF_IO("%s(%04x) reading from bios_device.io_buffer\n",
+				__FUNCTION__, addr);
+		uint16_t rval = in16le((void *) bios_device.io_buffer + addr);
+		DEBUG_PRINTF_IO("%s(%04x) I/O Buffer --> %04x\n", __FUNCTION__,
+				addr, rval);
+		return rval;
+	}
+}
+
+uint32_t
+my_inl(X86EMU_pioAddr addr)
+{
+	uint64_t translated_addr = addr;
+	uint8_t translated = dev_translate_address(&translated_addr);
+	if (translated != 0) {
+		//translation successfull, access VGA I/O (BAR or Legacy...)
+		DEBUG_PRINTF_IO("%s(%x): access to VGA I/O\n", __FUNCTION__,
+				addr);
+		//DEBUG_PRINTF_IO("%s(%04x): translated_addr: %llx\n", __FUNCTION__, addr, translated_addr);
+		uint32_t rval;
+		if ((translated_addr & (uint64_t) 0x2) == 0) {
+			// 32 bit aligned access...
+			set_ci();
+			rval = in32le((void *) translated_addr);
+			clr_ci();
+		} else {
+			// unaligned access, read single bytes
+			set_ci();
+			rval = (*((uint8_t *) translated_addr)) |
+			    (*((uint8_t *) translated_addr + 1) << 8) |
+			    (*((uint8_t *) translated_addr + 2) << 16) |
+			    (*((uint8_t *) translated_addr + 3) << 24);
+			clr_ci();
+		}
+		DEBUG_PRINTF_IO("%s(%04x) VGA I/O --> %08x\n", __FUNCTION__,
+				addr, rval);
+		return rval;
+	} else if (addr == 0xcfc) {
+		// PCI Configuration Mechanism 1 step 1
+		// write to 0xCF8, sets bus, device, function and Config Space offset
+		// later read from 0xCFC returns the value...
+		uint8_t bus, devfn, offs;
+		uint32_t port_cf8_val = my_inl(0xcf8);
+		if ((port_cf8_val & 0x80000000) != 0) {
+			//highest bit enables config space mapping
+			bus = (port_cf8_val & 0x00FF0000) >> 16;
+			devfn = (port_cf8_val & 0x0000FF00) >> 8;
+			offs = (port_cf8_val & 0x000000FF);
+			if ((bus != bios_device.bus)
+			    || (devfn != bios_device.devfn)) {
+				// fail accesses to any device but ours...
+				printf
+				    ("Config access invalid! bus: %x, devfn: %x, offs: %x\n",
+				     bus, devfn, offs);
+				HALT_SYS();
+				return 0xFFFFFFFF;
+			} else {
+				DEBUG_PRINTF_IO("%s(%04x) PCI Config Access\n",
+						__FUNCTION__, addr);
+				uint32_t rval =
+				    (uint32_t) rtas_pci_config_read(bios_device.
+								    puid, 4,
+								    bus, devfn,
+								    offs);
+				DEBUG_PRINTF_IO
+				    ("%s(%04x) PCI Config Access --> 0x%08x\n",
+				     __FUNCTION__, addr, rval);
+				return rval;
+			}
+		} else {
+			return 0xFFFFFFFF;
+		}
+	} else {
+		DEBUG_PRINTF_IO("%s(%04x) reading from bios_device.io_buffer\n",
+				__FUNCTION__, addr);
+		uint32_t rval = in32le((void *) bios_device.io_buffer + addr);
+		DEBUG_PRINTF_IO("%s(%04x) I/O Buffer --> %08x\n", __FUNCTION__,
+				addr, rval);
+		return rval;
+	}
+}
+
+void
+my_outb(X86EMU_pioAddr addr, uint8_t val)
+{
+	uint64_t translated_addr = addr;
+	uint8_t translated = dev_translate_address(&translated_addr);
+	if (translated != 0) {
+		//translation successfull, access VGA I/O (BAR or Legacy...)
+		DEBUG_PRINTF_IO("%s(%x, %x): access to VGA I/O\n",
+				__FUNCTION__, addr, val);
+		//DEBUG_PRINTF_IO("%s(%04x): translated_addr: %llx\n", __FUNCTION__, addr, translated_addr);
+		set_ci();
+		*((uint8_t *) translated_addr) = val;
+		clr_ci();
+	} else {
+		DEBUG_PRINTF_IO
+		    ("%s(%04x,%02x) writing to bios_device.io_buffer\n",
+		     __FUNCTION__, addr, val);
+		*((uint8_t *) (bios_device.io_buffer + addr)) = val;
+	}
+}
+
+void
+my_outw(X86EMU_pioAddr addr, uint16_t val)
+{
+	uint64_t translated_addr = addr;
+	uint8_t translated = dev_translate_address(&translated_addr);
+	if (translated != 0) {
+		//translation successfull, access VGA I/O (BAR or Legacy...)
+		//DEBUG_PRINTF_IO("%s(%04x): translated_addr: %llx\n", __FUNCTION__, addr, translated_addr);
+		if ((translated_addr & (uint64_t) 0x1) == 0) {
+			// 16 bit aligned access...
+			set_ci();
+			out16le((void *) translated_addr, val);
+			clr_ci();
+		} else {
+			// unaligned access, write single bytes
+			set_ci();
+			*((uint8_t *) translated_addr) =
+			    (uint8_t) (val & 0x00FF);
+			*((uint8_t *) translated_addr + 1) =
+			    (uint8_t) ((val & 0xFF00) >> 8);
+			clr_ci();
+		}
+	} else {
+		DEBUG_PRINTF_IO
+		    ("%s(%04x,%04x) writing to bios_device.io_buffer\n",
+		     __FUNCTION__, addr, val);
+		out16le((void *) bios_device.io_buffer + addr, val);
+	}
+}
+
+void
+my_outl(X86EMU_pioAddr addr, uint32_t val)
+{
+	uint64_t translated_addr = addr;
+	uint8_t translated = dev_translate_address(&translated_addr);
+	if (translated != 0) {
+		//translation successfull, access VGA I/O (BAR or Legacy...)
+		//DEBUG_PRINTF_IO("%s(%04x): translated_addr: %llx\n", __FUNCTION__, addr, translated_addr);
+		if ((translated_addr & (uint64_t) 0x3) == 0) {
+			// 32 bit aligned access...
+			set_ci();
+			out32le((void *) translated_addr, val);
+			clr_ci();
+		} else {
+			// unaligned access, write single bytes
+			set_ci();
+			*((uint8_t *) translated_addr) =
+			    (uint8_t) (val & 0x000000FF);
+			*((uint8_t *) translated_addr + 1) =
+			    (uint8_t) ((val & 0x0000FF00) >> 8);
+			*((uint8_t *) translated_addr + 2) =
+			    (uint8_t) ((val & 0x00FF0000) >> 16);
+			*((uint8_t *) translated_addr + 3) =
+			    (uint8_t) ((val & 0xFF000000) >> 24);
+			clr_ci();
+		}
+	} else {
+		DEBUG_PRINTF_IO
+		    ("%s(%04x,%08x) writing to bios_device.io_buffer\n",
+		     __FUNCTION__, addr, val);
+		out32le((void *) bios_device.io_buffer + addr, val);
+	}
+}
diff --git a/clients/net-snk/app/biosemu/io.h b/clients/net-snk/app/biosemu/io.h
new file mode 100644
index 0000000..d01f82b
--- /dev/null
+++ b/clients/net-snk/app/biosemu/io.h
@@ -0,0 +1,30 @@
+/******************************************************************************
+ * Copyright (c) 2004, 2007 IBM Corporation
+ * All rights reserved.
+ * This program and the accompanying materials
+ * are made available under the terms of the BSD License
+ * which accompanies this distribution, and is available at
+ * http://www.opensource.org/licenses/bsd-license.php
+ *
+ * Contributors:
+ *     IBM Corporation - initial implementation
+ *****************************************************************************/
+
+#ifndef _BIOSEMU_IO_H_
+#define _BIOSEMU_IO_H_
+#include <x86emu/x86emu.h>
+#include <types.h>
+
+uint8_t my_inb(X86EMU_pioAddr addr);
+
+uint16_t my_inw(X86EMU_pioAddr addr);
+
+uint32_t my_inl(X86EMU_pioAddr addr);
+
+void my_outb(X86EMU_pioAddr addr, uint8_t val);
+
+void my_outw(X86EMU_pioAddr addr, uint16_t val);
+
+void my_outl(X86EMU_pioAddr addr, uint32_t val);
+
+#endif
diff --git a/clients/net-snk/app/biosemu/mem.c b/clients/net-snk/app/biosemu/mem.c
new file mode 100644
index 0000000..3e29b38
--- /dev/null
+++ b/clients/net-snk/app/biosemu/mem.c
@@ -0,0 +1,273 @@
+/******************************************************************************
+ * Copyright (c) 2004, 2007 IBM Corporation
+ * All rights reserved.
+ * This program and the accompanying materials
+ * are made available under the terms of the BSD License
+ * which accompanies this distribution, and is available at
+ * http://www.opensource.org/licenses/bsd-license.php
+ *
+ * Contributors:
+ *     IBM Corporation - initial implementation
+ *****************************************************************************/
+
+#include <stdio.h>
+#include <types.h>
+#include <cpu.h>
+#include "debug.h"
+#include "device.h"
+#include "x86emu/x86emu.h"
+
+// read byte from memory
+uint8_t
+my_rdb(uint32_t addr)
+{
+	uint64_t translated_addr = addr;
+	uint8_t translated = dev_translate_address(&translated_addr);
+	if (translated != 0) {
+		//translation successfull, access VGA Memory (BAR or Legacy...)
+		DEBUG_PRINTF_MEM("%s(%08x): access to VGA Memory\n",
+				 __FUNCTION__, addr);
+		//DEBUG_PRINTF_MEM("%s(%08x): translated_addr: %llx\n", __FUNCTION__, addr, translated_addr);
+		set_ci();
+		uint8_t rval = *((uint8_t *) translated_addr);
+		clr_ci();
+		DEBUG_PRINTF_MEM("%s(%08x) VGA --> %02x\n", __FUNCTION__, addr,
+				 rval);
+		return rval;
+	} else if (addr > M.mem_size) {
+		DEBUG_PRINTF("%s(%08x): Memory Access out of range!\n",
+			     __FUNCTION__, addr);
+		//disassemble_forward(M.x86.saved_cs, M.x86.saved_ip, 1);
+		HALT_SYS();
+	} else {
+		/* read from virtual memory */
+		return *((uint8_t *) (M.mem_base + addr));
+	}
+	// never reached
+	return -1;
+}
+
+//read word from memory
+uint16_t
+my_rdw(uint32_t addr)
+{
+	uint64_t translated_addr = addr;
+	uint8_t translated = dev_translate_address(&translated_addr);
+	if (translated != 0) {
+		//translation successfull, access VGA Memory (BAR or Legacy...)
+		DEBUG_PRINTF_MEM("%s(%08x): access to VGA Memory\n",
+				 __FUNCTION__, addr);
+		//DEBUG_PRINTF_MEM("%s(%08x): translated_addr: %llx\n", __FUNCTION__, addr, translated_addr);
+		uint16_t rval;
+		// check for legacy memory, because of the remapping to BARs, the reads must
+		// be byte reads...
+		if ((addr >= 0xa0000) && (addr < 0xc0000)) {
+			//read bytes a using my_rdb, because of the remapping to BARs
+			//words may not be contiguous in memory, so we need to translate
+			//every address...
+			rval = ((uint8_t) my_rdb(addr)) |
+			    (((uint8_t) my_rdb(addr + 1)) << 8);
+		} else {
+			if ((translated_addr & (uint64_t) 0x1) == 0) {
+				// 16 bit aligned access...
+				set_ci();
+				rval = in16le((void *) translated_addr);
+				clr_ci();
+			} else {
+				// unaligned access, read single bytes
+				set_ci();
+				rval = (*((uint8_t *) translated_addr)) |
+				    (*((uint8_t *) translated_addr + 1) << 8);
+				clr_ci();
+			}
+		}
+		DEBUG_PRINTF_MEM("%s(%08x) VGA --> %04x\n", __FUNCTION__, addr,
+				 rval);
+		return rval;
+	} else if (addr > M.mem_size) {
+		DEBUG_PRINTF("%s(%08x): Memory Access out of range!\n",
+			     __FUNCTION__, addr);
+		//disassemble_forward(M.x86.saved_cs, M.x86.saved_ip, 1);
+		HALT_SYS();
+	} else {
+		/* read from virtual memory */
+		return in16le((void *) (M.mem_base + addr));
+	}
+	// never reached
+	return -1;
+}
+
+//read long from memory
+uint32_t
+my_rdl(uint32_t addr)
+{
+	uint64_t translated_addr = addr;
+	uint8_t translated = dev_translate_address(&translated_addr);
+	if (translated != 0) {
+		//translation successfull, access VGA Memory (BAR or Legacy...)
+		DEBUG_PRINTF_MEM("%s(%x): access to VGA Memory\n",
+				 __FUNCTION__, addr);
+		//DEBUG_PRINTF_MEM("%s(%08x): translated_addr: %llx\n", __FUNCTION__, addr, translated_addr);
+		uint32_t rval;
+		// check for legacy memory, because of the remapping to BARs, the reads must
+		// be byte reads...
+		if ((addr >= 0xa0000) && (addr < 0xc0000)) {
+			//read bytes a using my_rdb, because of the remapping to BARs
+			//dwords may not be contiguous in memory, so we need to translate
+			//every address...
+			rval = ((uint8_t) my_rdb(addr)) |
+			    (((uint8_t) my_rdb(addr + 1)) << 8) |
+			    (((uint8_t) my_rdb(addr + 2)) << 16) |
+			    (((uint8_t) my_rdb(addr + 3)) << 24);
+		} else {
+			if ((translated_addr & (uint64_t) 0x2) == 0) {
+				// 32 bit aligned access...
+				set_ci();
+				rval = in32le((void *) translated_addr);
+				clr_ci();
+			} else {
+				// unaligned access, read single bytes
+				set_ci();
+				rval = (*((uint8_t *) translated_addr)) |
+				    (*((uint8_t *) translated_addr + 1) << 8) |
+				    (*((uint8_t *) translated_addr + 2) << 16) |
+				    (*((uint8_t *) translated_addr + 3) << 24);
+				clr_ci();
+			}
+		}
+		DEBUG_PRINTF_MEM("%s(%08x) VGA --> %08x\n", __FUNCTION__, addr,
+				 rval);
+		//HALT_SYS();
+		return rval;
+	} else if (addr > M.mem_size) {
+		DEBUG_PRINTF("%s(%08x): Memory Access out of range!\n",
+			     __FUNCTION__, addr);
+		//disassemble_forward(M.x86.saved_cs, M.x86.saved_ip, 1);
+		HALT_SYS();
+	} else {
+		/* read from virtual memory */
+		return in32le((void *) (M.mem_base + addr));
+	}
+	// never reached
+	return -1;
+}
+
+//write byte to memory
+void
+my_wrb(uint32_t addr, uint8_t val)
+{
+	uint64_t translated_addr = addr;
+	uint8_t translated = dev_translate_address(&translated_addr);
+	if (translated != 0) {
+		//translation successfull, access VGA Memory (BAR or Legacy...)
+		DEBUG_PRINTF_MEM("%s(%x, %x): access to VGA Memory\n",
+				 __FUNCTION__, addr, val);
+		//DEBUG_PRINTF_MEM("%s(%08x): translated_addr: %llx\n", __FUNCTION__, addr, translated_addr);
+		set_ci();
+		*((uint8_t *) translated_addr) = val;
+		clr_ci();
+	} else if (addr > M.mem_size) {
+		DEBUG_PRINTF("%s(%08x): Memory Access out of range!\n",
+			     __FUNCTION__, addr);
+		//disassemble_forward(M.x86.saved_cs, M.x86.saved_ip, 1);
+		HALT_SYS();
+	} else {
+		/* write to virtual memory */
+		*((uint8_t *) (M.mem_base + addr)) = val;
+	}
+}
+
+void
+my_wrw(uint32_t addr, uint16_t val)
+{
+	uint64_t translated_addr = addr;
+	uint8_t translated = dev_translate_address(&translated_addr);
+	if (translated != 0) {
+		//translation successfull, access VGA Memory (BAR or Legacy...)
+		DEBUG_PRINTF_MEM("%s(%x, %x): access to VGA Memory\n",
+				 __FUNCTION__, addr, val);
+		//DEBUG_PRINTF_MEM("%s(%08x): translated_addr: %llx\n", __FUNCTION__, addr, translated_addr);
+		// check for legacy memory, because of the remapping to BARs, the reads must
+		// be byte reads...
+		if ((addr >= 0xa0000) && (addr < 0xc0000)) {
+			//read bytes a using my_rdb, because of the remapping to BARs
+			//words may not be contiguous in memory, so we need to translate
+			//every address...
+			my_wrb(addr, (uint8_t) (val & 0x00FF));
+			my_wrb(addr + 1, (uint8_t) ((val & 0xFF00) >> 8));
+		} else {
+			if ((translated_addr & (uint64_t) 0x1) == 0) {
+				// 16 bit aligned access...
+				set_ci();
+				out16le((void *) translated_addr, val);
+				clr_ci();
+			} else {
+				// unaligned access, write single bytes
+				set_ci();
+				*((uint8_t *) translated_addr) =
+				    (uint8_t) (val & 0x00FF);
+				*((uint8_t *) translated_addr + 1) =
+				    (uint8_t) ((val & 0xFF00) >> 8);
+				clr_ci();
+			}
+		}
+	} else if (addr > M.mem_size) {
+		DEBUG_PRINTF("%s(%08x): Memory Access out of range!\n",
+			     __FUNCTION__, addr);
+		//disassemble_forward(M.x86.saved_cs, M.x86.saved_ip, 1);
+		HALT_SYS();
+	} else {
+		/* write to virtual memory */
+		out16le((void *) (M.mem_base + addr), val);
+	}
+}
+void
+my_wrl(uint32_t addr, uint32_t val)
+{
+	uint64_t translated_addr = addr;
+	uint8_t translated = dev_translate_address(&translated_addr);
+	if (translated != 0) {
+		//translation successfull, access VGA Memory (BAR or Legacy...)
+		DEBUG_PRINTF_MEM("%s(%x, %x): access to VGA Memory\n",
+				 __FUNCTION__, addr, val);
+		//DEBUG_PRINTF_MEM("%s(%08x): translated_addr: %llx\n",  __FUNCTION__, addr, translated_addr);
+		// check for legacy memory, because of the remapping to BARs, the reads must
+		// be byte reads...
+		if ((addr >= 0xa0000) && (addr < 0xc0000)) {
+			//read bytes a using my_rdb, because of the remapping to BARs
+			//words may not be contiguous in memory, so we need to translate
+			//every address...
+			my_wrb(addr, (uint8_t) (val & 0x000000FF));
+			my_wrb(addr + 1, (uint8_t) ((val & 0x0000FF00) >> 8));
+			my_wrb(addr + 2, (uint8_t) ((val & 0x00FF0000) >> 16));
+			my_wrb(addr + 3, (uint8_t) ((val & 0xFF000000) >> 24));
+		} else {
+			if ((translated_addr & (uint64_t) 0x3) == 0) {
+				// 32 bit aligned access...
+				set_ci();
+				out32le((void *) translated_addr, val);
+				clr_ci();
+			} else {
+				// unaligned access, write single bytes
+				set_ci();
+				*((uint8_t *) translated_addr) =
+				    (uint8_t) (val & 0x000000FF);
+				*((uint8_t *) translated_addr + 1) =
+				    (uint8_t) ((val & 0x0000FF00) >> 8);
+				*((uint8_t *) translated_addr + 2) =
+				    (uint8_t) ((val & 0x00FF0000) >> 16);
+				*((uint8_t *) translated_addr + 3) =
+				    (uint8_t) ((val & 0xFF000000) >> 24);
+				clr_ci();
+			}
+		}
+	} else if (addr > M.mem_size) {
+		DEBUG_PRINTF("%s(%08x): Memory Access out of range!\n",
+			     __FUNCTION__, addr);
+		//disassemble_forward(M.x86.saved_cs, M.x86.saved_ip, 1);
+		HALT_SYS();
+	} else {
+		/* write to virtual memory */
+		out32le((void *) (M.mem_base + addr), val);
+	}
+}
diff --git a/clients/net-snk/app/biosemu/mem.h b/clients/net-snk/app/biosemu/mem.h
new file mode 100644
index 0000000..efce891
--- /dev/null
+++ b/clients/net-snk/app/biosemu/mem.h
@@ -0,0 +1,36 @@
+/******************************************************************************
+ * Copyright (c) 2004, 2007 IBM Corporation
+ * All rights reserved.
+ * This program and the accompanying materials
+ * are made available under the terms of the BSD License
+ * which accompanies this distribution, and is available at
+ * http://www.opensource.org/licenses/bsd-license.php
+ *
+ * Contributors:
+ *     IBM Corporation - initial implementation
+ *****************************************************************************/
+
+#ifndef _BIOSEMU_MEM_H_
+#define _BIOSEMU_MEM_H_
+#include <x86emu/x86emu.h>
+#include <types.h>
+
+// read byte from memory
+uint8_t my_rdb(uint32_t addr);
+
+//read word from memory
+uint16_t my_rdw(uint32_t addr);
+
+//read long from memory
+uint32_t my_rdl(uint32_t addr);
+
+//write byte to memory
+void my_wrb(uint32_t addr, uint8_t val);
+
+//write word to memory
+void my_wrw(uint32_t addr, uint16_t val);
+
+//write long to memory
+void my_wrl(uint32_t addr, uint32_t val);
+
+#endif
diff --git a/clients/net-snk/app/biosemu/vbe.c b/clients/net-snk/app/biosemu/vbe.c
new file mode 100644
index 0000000..7f9ebe7
--- /dev/null
+++ b/clients/net-snk/app/biosemu/vbe.c
@@ -0,0 +1,789 @@
+/******************************************************************************
+ * Copyright (c) 2004, 2007 IBM Corporation
+ * All rights reserved.
+ * This program and the accompanying materials
+ * are made available under the terms of the BSD License
+ * which accompanies this distribution, and is available at
+ * http://www.opensource.org/licenses/bsd-license.php
+ *
+ * Contributors:
+ *     IBM Corporation - initial implementation
+ *****************************************************************************/
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include <types.h>
+#include <cpu.h>
+
+#include "debug.h"
+
+#include <x86emu/x86emu.h>
+#include <x86emu/regs.h>
+#include <x86emu/prim_ops.h>	// for push_word
+
+#include "io.h"
+#include "mem.h"
+#include "interrupt.h"
+
+#include "device.h"
+
+static X86EMU_memFuncs my_mem_funcs = {
+	my_rdb, my_rdw, my_rdl,
+	my_wrb, my_wrw, my_wrl
+};
+
+static X86EMU_pioFuncs my_pio_funcs = {
+	my_inb, my_inw, my_inl,
+	my_outb, my_outw, my_outl
+};
+
+// pointer to VBEInfoBuffer, set by vbe_prepare
+uint8_t *vbe_info_buffer = 0;
+// virtual BIOS Memory
+uint8_t *biosmem;
+uint32_t biosmem_size;
+
+// these structs are for input from and output to OF
+typedef struct {
+	uint8_t display_type;	// 0=NONE, 1= analog, 2=digital
+	uint16_t screen_width;
+	uint16_t screen_height;
+	uint16_t screen_linebytes;	// bytes per line in framebuffer, may be more than screen_width
+	uint8_t color_depth;	// color depth in bpp
+	uint32_t framebuffer_address;
+	uint8_t edid_block_zero[128];
+} __attribute__ ((__packed__)) screen_info_t;
+
+typedef struct {
+	uint8_t signature[4];
+	uint16_t size_reserved;
+	uint8_t monitor_number;
+	uint16_t max_screen_width;
+	uint8_t color_depth;
+} __attribute__ ((__packed__)) screen_info_input_t;
+
+// these structs only store a subset of the VBE defined fields
+// only those needed.
+typedef struct {
+	char signature[4];
+	uint16_t version;
+	uint8_t *oem_string_ptr;
+	uint32_t capabilities;
+	uint16_t video_mode_list[256];	// lets hope we never have more than 256 video modes...
+	uint16_t total_memory;
+} vbe_info_t;
+
+typedef struct {
+	uint16_t video_mode;
+	uint8_t mode_info_block[256];
+	uint16_t attributes;
+	uint16_t linebytes;
+	uint16_t x_resolution;
+	uint16_t y_resolution;
+	uint8_t x_charsize;
+	uint8_t y_charsize;
+	uint8_t bits_per_pixel;
+	uint8_t memory_model;
+	uint32_t framebuffer_address;
+} vbe_mode_info_t;
+
+typedef struct {
+	uint8_t port_number;	// i.e. monitor number
+	uint8_t edid_transfer_time;
+	uint8_t ddc_level;
+	uint8_t edid_block_zero[128];
+} vbe_ddc_info_t;
+
+static inline uint8_t
+vbe_prepare()
+{
+	vbe_info_buffer = biosmem + 0x10000;	// segment:offset 1000:0000
+	//clear buffer
+	memset(vbe_info_buffer, 0, 512);
+	//set VbeSignature to "VBE2" to indicate VBE 2.0+ request
+	vbe_info_buffer[0] = 'V';
+	vbe_info_buffer[0] = 'B';
+	vbe_info_buffer[0] = 'E';
+	vbe_info_buffer[0] = '2';
+	// ES:DI store pointer to buffer in virtual mem (@ 0x10000) see vbe_info_buffer above...
+	M.x86.R_EDI = 0x0;
+	M.x86.R_ES = 0x1000;
+
+	return 0;		// successfull init
+}
+
+// VBE Function 00h
+uint8_t
+vbe_info(vbe_info_t * info)
+{
+	vbe_prepare();
+	// call VBE function 00h (Info Function)
+	M.x86.R_EAX = 0x4f00;
+
+	// enable trace
+#ifdef DEBUG_TRACE_X86EMU
+	X86EMU_trace_on();
+#endif
+
+	// run VESA Interrupt
+	runInt10();
+
+	if (M.x86.R_AL != 0x4f) {
+		DEBUG_PRINTF_VBE("%s: VBE Info Function NOT supported! AL=%x\n",
+				 __FUNCTION__, M.x86.R_AL);
+		return -1;
+	}
+
+	if (M.x86.R_AH != 0x0) {
+		DEBUG_PRINTF_VBE
+		    ("%s: VBE Info Function Return Code NOT OK! AH=%x\n",
+		     __FUNCTION__, M.x86.R_AH);
+		return M.x86.R_AH;
+	}
+	//printf("VBE Info Dump:");
+	//dump(vbe_info_buffer, 64);
+
+	//offset 0: signature
+	info->signature[0] = vbe_info_buffer[0];
+	info->signature[1] = vbe_info_buffer[1];
+	info->signature[2] = vbe_info_buffer[2];
+	info->signature[3] = vbe_info_buffer[3];
+
+	// offset 4: 16bit le containing VbeVersion
+	info->version = in16le(vbe_info_buffer + 4);
+
+	// offset 6: 32bit le containg segment:offset of OEM String in virtual Mem.
+	info->oem_string_ptr =
+	    biosmem + ((in16le(vbe_info_buffer + 8) << 4) +
+		       in16le(vbe_info_buffer + 6));
+
+	// offset 10: 32bit le capabilities
+	info->capabilities = in32le(vbe_info_buffer + 10);
+
+	// offset 14: 32 bit le containing segment:offset of supported video mode table
+	uint16_t *video_mode_ptr;
+	video_mode_ptr =
+	    (uint16_t *) (biosmem +
+			  ((in16le(vbe_info_buffer + 16) << 4) +
+			   in16le(vbe_info_buffer + 14)));
+	uint32_t i = 0;
+	do {
+		info->video_mode_list[i] = in16le(video_mode_ptr + i);
+		i++;
+	}
+	while ((i <
+		(sizeof(info->video_mode_list) /
+		 sizeof(info->video_mode_list[0])))
+	       && (info->video_mode_list[i - 1] != 0xFFFF));
+
+	//offset 18: 16bit le total memory in 64KB blocks
+	info->total_memory = in16le(vbe_info_buffer + 18);
+
+	return 0;
+}
+
+// VBE Function 01h
+uint8_t
+vbe_get_mode_info(vbe_mode_info_t * mode_info)
+{
+	vbe_prepare();
+	// call VBE function 01h (Return VBE Mode Info Function)
+	M.x86.R_EAX = 0x4f01;
+	M.x86.R_CX = mode_info->video_mode;
+
+	// enable trace
+#ifdef DEBUG_TRACE_X86EMU
+	X86EMU_trace_on();
+#endif
+
+	// run VESA Interrupt
+	runInt10();
+
+	if (M.x86.R_AL != 0x4f) {
+		DEBUG_PRINTF_VBE
+		    ("%s: VBE Return Mode Info Function NOT supported! AL=%x\n",
+		     __FUNCTION__, M.x86.R_AL);
+		return -1;
+	}
+
+	if (M.x86.R_AH != 0x0) {
+		DEBUG_PRINTF_VBE
+		    ("%s: VBE Return Mode Info (mode: %04x) Function Return Code NOT OK! AH=%02x\n",
+		     __FUNCTION__, mode_info->video_mode, M.x86.R_AH);
+		return M.x86.R_AH;
+	}
+	//pointer to mode_info_block is in ES:DI
+	memcpy(mode_info->mode_info_block,
+	       biosmem + ((M.x86.R_ES << 4) + M.x86.R_DI),
+	       sizeof(mode_info->mode_info_block));
+
+	//printf("Mode Info Dump:");
+	//dump(mode_info_block, 64);
+
+	// offset 0: 16bit le mode attributes
+	mode_info->attributes = in16le(mode_info->mode_info_block);
+
+	// offset 16: 16bit le bytes per scan line
+	mode_info->linebytes = in16le(mode_info->mode_info_block + 16);
+
+	// offset 18: 16bit le x resolution
+	mode_info->x_resolution = in16le(mode_info->mode_info_block + 18);
+
+	// offset 20: 16bit le y resolution
+	mode_info->y_resolution = in16le(mode_info->mode_info_block + 20);
+
+	// offset 22: 8bit le x charsize
+	mode_info->x_charsize = *(mode_info->mode_info_block + 22);
+
+	// offset 23: 8bit le y charsize
+	mode_info->y_charsize = *(mode_info->mode_info_block + 23);
+
+	// offset 25: 8bit le bits per pixel
+	mode_info->bits_per_pixel = *(mode_info->mode_info_block + 25);
+
+	// offset 27: 8bit le memory model
+	mode_info->memory_model = *(mode_info->mode_info_block + 27);
+
+	// offset 40: 32bit le containg offset of frame buffer memory ptr
+	mode_info->framebuffer_address =
+	    in32le(mode_info->mode_info_block + 40);
+
+	return 0;
+}
+
+// VBE Function 02h
+uint8_t
+vbe_set_mode(vbe_mode_info_t * mode_info)
+{
+	vbe_prepare();
+	// call VBE function 02h (Set VBE Mode Function)
+	M.x86.R_EAX = 0x4f02;
+	M.x86.R_BX = mode_info->video_mode;
+	M.x86.R_BX |= 0x4000;	// set bit 14 to request linear framebuffer mode
+	M.x86.R_BX &= 0x7FFF;	// clear bit 15 to request clearing of framebuffer
+
+	DEBUG_PRINTF_VBE("%s: setting mode: 0x%04x\n", __FUNCTION__,
+			 M.x86.R_BX);
+
+	// enable trace
+#ifdef DEBUG_TRACE_X86EMU
+	X86EMU_trace_on();
+#endif
+
+	// run VESA Interrupt
+	runInt10();
+
+	if (M.x86.R_AL != 0x4f) {
+		DEBUG_PRINTF_VBE
+		    ("%s: VBE Set Mode Function NOT supported! AL=%x\n",
+		     __FUNCTION__, M.x86.R_AL);
+		return -1;
+	}
+
+	if (M.x86.R_AH != 0x0) {
+		DEBUG_PRINTF_VBE
+		    ("%s: mode: %x VBE Set Mode Function Return Code NOT OK! AH=%x\n",
+		     __FUNCTION__, mode_info->video_mode, M.x86.R_AH);
+		return M.x86.R_AH;
+	}
+	return 0;
+}
+
+//VBE Function 08h
+uint8_t
+vbe_set_palette_format(uint8_t format)
+{
+	vbe_prepare();
+	// call VBE function 09h (Set/Get Palette Data Function)
+	M.x86.R_EAX = 0x4f08;
+	M.x86.R_BL = 0x00;	// set format
+	M.x86.R_BH = format;
+
+	DEBUG_PRINTF_VBE("%s: setting palette format: %d\n", __FUNCTION__,
+			 format);
+
+	// enable trace
+#ifdef DEBUG_TRACE_X86EMU
+	X86EMU_trace_on();
+#endif
+
+	// run VESA Interrupt
+	runInt10();
+
+	if (M.x86.R_AL != 0x4f) {
+		DEBUG_PRINTF_VBE
+		    ("%s: VBE Set Palette Format Function NOT supported! AL=%x\n",
+		     __FUNCTION__, M.x86.R_AL);
+		return -1;
+	}
+
+	if (M.x86.R_AH != 0x0) {
+		DEBUG_PRINTF_VBE
+		    ("%s: VBE Set Palette Format Function Return Code NOT OK! AH=%x\n",
+		     __FUNCTION__, M.x86.R_AH);
+		return M.x86.R_AH;
+	}
+	return 0;
+}
+
+// VBE Function 09h
+uint8_t
+vbe_set_color(uint16_t color_number, uint32_t color_value)
+{
+	vbe_prepare();
+	// call VBE function 09h (Set/Get Palette Data Function)
+	M.x86.R_EAX = 0x4f09;
+	M.x86.R_BL = 0x00;	// set color
+	M.x86.R_CX = 0x01;	// set only one entry
+	M.x86.R_DX = color_number;
+	// ES:DI is address where color_value is stored, we store it at 2000:0000
+	M.x86.R_ES = 0x2000;
+	M.x86.R_DI = 0x0;
+
+	// store color value at ES:DI
+	out32le(biosmem + (M.x86.R_ES << 4) + M.x86.R_DI, color_value);
+
+	DEBUG_PRINTF_VBE("%s: setting color #%x: 0x%04x\n", __FUNCTION__,
+			 color_number, color_value);
+
+	// enable trace
+#ifdef DEBUG_TRACE_X86EMU
+	X86EMU_trace_on();
+#endif
+
+	// run VESA Interrupt
+	runInt10();
+
+	if (M.x86.R_AL != 0x4f) {
+		DEBUG_PRINTF_VBE
+		    ("%s: VBE Set Palette Function NOT supported! AL=%x\n",
+		     __FUNCTION__, M.x86.R_AL);
+		return -1;
+	}
+
+	if (M.x86.R_AH != 0x0) {
+		DEBUG_PRINTF_VBE
+		    ("%s: VBE Set Palette Function Return Code NOT OK! AH=%x\n",
+		     __FUNCTION__, M.x86.R_AH);
+		return M.x86.R_AH;
+	}
+	return 0;
+}
+
+uint8_t
+vbe_get_color(uint16_t color_number, uint32_t * color_value)
+{
+	vbe_prepare();
+	// call VBE function 09h (Set/Get Palette Data Function)
+	M.x86.R_EAX = 0x4f09;
+	M.x86.R_BL = 0x00;	// get color
+	M.x86.R_CX = 0x01;	// get only one entry
+	M.x86.R_DX = color_number;
+	// ES:DI is address where color_value is stored, we store it at 2000:0000
+	M.x86.R_ES = 0x2000;
+	M.x86.R_DI = 0x0;
+
+	// enable trace
+#ifdef DEBUG_TRACE_X86EMU
+	X86EMU_trace_on();
+#endif
+
+	// run VESA Interrupt
+	runInt10();
+
+	if (M.x86.R_AL != 0x4f) {
+		DEBUG_PRINTF_VBE
+		    ("%s: VBE Set Palette Function NOT supported! AL=%x\n",
+		     __FUNCTION__, M.x86.R_AL);
+		return -1;
+	}
+
+	if (M.x86.R_AH != 0x0) {
+		DEBUG_PRINTF_VBE
+		    ("%s: VBE Set Palette Function Return Code NOT OK! AH=%x\n",
+		     __FUNCTION__, M.x86.R_AH);
+		return M.x86.R_AH;
+	}
+	// read color value from ES:DI
+	*color_value = in32le(biosmem + (M.x86.R_ES << 4) + M.x86.R_DI);
+
+	DEBUG_PRINTF_VBE("%s: getting color #%x --> 0x%04x\n", __FUNCTION__,
+			 color_number, *color_value);
+
+	return 0;
+}
+
+// VBE Function 15h
+uint8_t
+vbe_get_ddc_info(vbe_ddc_info_t * ddc_info)
+{
+	vbe_prepare();
+	// call VBE function 15h (DDC Info Function)
+	M.x86.R_EAX = 0x4f15;
+	M.x86.R_BL = 0x00;	// get DDC Info
+	M.x86.R_CX = ddc_info->port_number;
+	M.x86.R_ES = 0x0;
+	M.x86.R_DI = 0x0;
+
+	// enable trace
+#ifdef DEBUG_TRACE_X86EMU
+	X86EMU_trace_on();
+#endif
+
+	// run VESA Interrupt
+	runInt10();
+
+	if (M.x86.R_AL != 0x4f) {
+		DEBUG_PRINTF_VBE
+		    ("%s: VBE Get DDC Info Function NOT supported! AL=%x\n",
+		     __FUNCTION__, M.x86.R_AL);
+		return -1;
+	}
+
+	if (M.x86.R_AH != 0x0) {
+		DEBUG_PRINTF_VBE
+		    ("%s: port: %x VBE Get DDC Info Function Return Code NOT OK! AH=%x\n",
+		     __FUNCTION__, ddc_info->port_number, M.x86.R_AH);
+		return M.x86.R_AH;
+	}
+	// BH = approx. time in seconds to transfer one EDID block
+	ddc_info->edid_transfer_time = M.x86.R_BH;
+	// BL = DDC Level
+	ddc_info->ddc_level = M.x86.R_BL;
+
+	vbe_prepare();
+	// call VBE function 15h (DDC Info Function)
+	M.x86.R_EAX = 0x4f15;
+	M.x86.R_BL = 0x01;	// read EDID
+	M.x86.R_CX = ddc_info->port_number;
+	M.x86.R_DX = 0x0;	// block number
+	// ES:DI is address where EDID is stored, we store it at 2000:0000
+	M.x86.R_ES = 0x2000;
+	M.x86.R_DI = 0x0;
+
+	// enable trace
+#ifdef DEBUG_TRACE_X86EMU
+	X86EMU_trace_on();
+#endif
+
+	// run VESA Interrupt
+	runInt10();
+
+	if (M.x86.R_AL != 0x4f) {
+		DEBUG_PRINTF_VBE
+		    ("%s: VBE Read EDID Function NOT supported! AL=%x\n",
+		     __FUNCTION__, M.x86.R_AL);
+		return -1;
+	}
+
+	if (M.x86.R_AH != 0x0) {
+		DEBUG_PRINTF_VBE
+		    ("%s: port: %x VBE Read EDID Function Return Code NOT OK! AH=%x\n",
+		     __FUNCTION__, ddc_info->port_number, M.x86.R_AH);
+		return M.x86.R_AH;
+	}
+
+	memcpy(ddc_info->edid_block_zero,
+	       biosmem + (M.x86.R_ES << 4) + M.x86.R_DI,
+	       sizeof(ddc_info->edid_block_zero));
+
+	return 0;
+}
+
+uint32_t
+vbe_get_info(uint8_t argc, uint8_t ** argv)
+{
+	uint8_t rval;
+	uint32_t i;
+	if (argc < 3) {
+		printf
+		    ("Usage %s <vmem_base> <device_path> <address of screen_info_t>\n",
+		     argv[0]);
+		int i = 0;
+		for (i = 0; i < argc; i++) {
+			printf("argv[%d]: %s\n", i, argv[i]);
+		}
+		return -1;
+	}
+	// argv[1] is address of virtual BIOS mem... it should be 1MB large...
+	biosmem = (uint8_t *) strtoul((char *) argv[1], 0, 16);
+	biosmem_size = 0x100000;
+	// argv[2] is the device to open and use...
+	if (dev_init((char *) argv[2]) != 0) {
+		printf("Error initializing device!\n");
+		return -1;
+	}
+	// get a copy of input struct...
+	screen_info_input_t input =
+	    *((screen_info_input_t *) strtoul((char *) argv[3], 0, 16));
+	// output is pointer to the address passed as argv[3]
+	screen_info_t *output =
+	    (screen_info_t *) strtoul((char *) argv[3], 0, 16);
+	// zero output
+	memset(output, 0, sizeof(screen_info_t));
+
+	//setup interrupt handler
+	X86EMU_intrFuncs intrFuncs[256];
+	for (i = 0; i < 256; i++)
+		intrFuncs[i] = handleInterrupt;
+	X86EMU_setupIntrFuncs(intrFuncs);
+	X86EMU_setupPioFuncs(&my_pio_funcs);
+	X86EMU_setupMemFuncs(&my_mem_funcs);
+
+	// set mem_base
+	M.mem_base = (long) biosmem;
+	M.mem_size = biosmem_size;
+	DEBUG_PRINTF_VBE("membase set: %08x, size: %08x\n", (int) M.mem_base,
+			 (int) M.mem_size);
+
+	vbe_info_t info;
+	rval = vbe_info(&info);
+	if (rval != 0)
+		return rval;
+
+	DEBUG_PRINTF_VBE("VbeSignature: %s\n", info.signature);
+	DEBUG_PRINTF_VBE("VbeVersion: 0x%04x\n", info.version);
+	DEBUG_PRINTF_VBE("OemString: %s\n", info.oem_string_ptr);
+	DEBUG_PRINTF_VBE("Capabilities:\n");
+	DEBUG_PRINTF_VBE("\tDAC: %s\n",
+			 (info.capabilities & 0x1) ==
+			 0 ? "fixed 6bit" : "switchable 6/8bit");
+	DEBUG_PRINTF_VBE("\tVGA: %s\n",
+			 (info.capabilities & 0x2) ==
+			 0 ? "compatible" : "not compatible");
+	DEBUG_PRINTF_VBE("\tRAMDAC: %s\n",
+			 (info.capabilities & 0x4) ==
+			 0 ? "normal" : "use blank bit in Function 09h");
+
+	// argv[3] may be a pointer with enough space to return screen_info_t
+	// as input, it must contain a screen_info_input_t with the following content:
+	// byte[0:3] = "DDC\0" (zero-terminated signature header)
+	// byte[4:5] = reserved space for the return struct... just in case we ever change
+	//             the struct and dont have reserved enough memory (and let's hope the struct
+	//             never gets larger than 64KB)
+	// byte[6] = monitor port number for DDC requests ("only" one byte... so lets hope we never have more than 255 monitors...
+	// byte[7:8] = max. screen width (OF may want to limit this)
+	// byte[9] = required color depth in bpp
+	if (argc >= 4) {
+		if (strncmp((char *) input.signature, "DDC", 4) != 0) {
+			printf
+			    ("%s: Invalid input signature! expected: %s, is: %s\n",
+			     __FUNCTION__, "DDC", input.signature);
+			return -1;
+		}
+		if (input.size_reserved != sizeof(screen_info_t)) {
+			printf
+			    ("%s: Size of return struct is wrong, required: %d, available: %d\n",
+			     __FUNCTION__, (int) sizeof(screen_info_t),
+			     input.size_reserved);
+			return -1;
+		}
+
+		vbe_ddc_info_t ddc_info;
+		ddc_info.port_number = input.monitor_number;
+		vbe_get_ddc_info(&ddc_info);
+
+#if 0
+		DEBUG_PRINTF_VBE("DDC: edid_tranfer_time: %d\n",
+				 ddc_info.edid_transfer_time);
+		DEBUG_PRINTF_VBE("DDC: ddc_level: %x\n", ddc_info.ddc_level);
+		DEBUG_PRINTF_VBE("DDC: EDID: \n");
+#ifdef DEBUG_VBE
+		dump(ddc_info.edid_block_zero,
+		     sizeof(ddc_info.edid_block_zero));
+#endif
+#endif
+		if (*((uint64_t *) ddc_info.edid_block_zero) !=
+		    (uint64_t) 0x00FFFFFFFFFFFF00) {
+			// invalid EDID signature... probably no monitor
+
+			output->display_type = 0x0;
+			return 0;
+		} else if ((ddc_info.edid_block_zero[20] & 0x80) != 0) {
+			// digital display
+			output->display_type = 2;
+		} else {
+			// analog
+			output->display_type = 1;
+		}
+		DEBUG_PRINTF_VBE("DDC: found display type %d\n",
+				 output->display_type);
+		memcpy(output->edid_block_zero, ddc_info.edid_block_zero,
+		       sizeof(ddc_info.edid_block_zero));
+		i = 0;
+		vbe_mode_info_t mode_info;
+		vbe_mode_info_t best_mode_info;
+		// initialize best_mode to 0
+		memset(&best_mode_info, 0, sizeof(best_mode_info));
+		while ((mode_info.video_mode =
+			info.video_mode_list[i]) != 0xFFFF) {
+			//DEBUG_PRINTF_VBE("%x: Mode: %04x\n", i, mode_info.video_mode);
+			vbe_get_mode_info(&mode_info);
+#if 0
+			DEBUG_PRINTF_VBE("Video Mode 0x%04x available, %s\n",
+					 mode_info.video_mode,
+					 (mode_info.attributes & 0x1) ==
+					 0 ? "not supported" : "supported");
+			DEBUG_PRINTF_VBE("\tTTY: %s\n",
+					 (mode_info.attributes & 0x4) ==
+					 0 ? "no" : "yes");
+			DEBUG_PRINTF_VBE("\tMode: %s %s\n",
+					 (mode_info.attributes & 0x8) ==
+					 0 ? "monochrome" : "color",
+					 (mode_info.attributes & 0x10) ==
+					 0 ? "text" : "graphics");
+			DEBUG_PRINTF_VBE("\tVGA: %s\n",
+					 (mode_info.attributes & 0x20) ==
+					 0 ? "compatible" : "not compatible");
+			DEBUG_PRINTF_VBE("\tWindowed Mode: %s\n",
+					 (mode_info.attributes & 0x40) ==
+					 0 ? "yes" : "no");
+			DEBUG_PRINTF_VBE("\tFramebuffer: %s\n",
+					 (mode_info.attributes & 0x80) ==
+					 0 ? "no" : "yes");
+			DEBUG_PRINTF_VBE("\tResolution: %dx%d\n",
+					 mode_info.x_resolution,
+					 mode_info.y_resolution);
+			DEBUG_PRINTF_VBE("\tChar Size: %dx%d\n",
+					 mode_info.x_charsize,
+					 mode_info.y_charsize);
+			DEBUG_PRINTF_VBE("\tColor Depth: %dbpp\n",
+					 mode_info.bits_per_pixel);
+			DEBUG_PRINTF_VBE("\tMemory Model: 0x%x\n",
+					 mode_info.memory_model);
+			DEBUG_PRINTF_VBE("\tFramebuffer Offset: %08x\n",
+					 mode_info.framebuffer_address);
+#endif
+			if ((mode_info.bits_per_pixel == input.color_depth)
+			    && (mode_info.x_resolution <=
+				input.max_screen_width)
+			    && ((mode_info.attributes & 0x80) != 0)	// framebuffer mode
+			    && ((mode_info.attributes & 0x10) != 0)	// graphics
+			    && ((mode_info.attributes & 0x8) != 0)	// color
+			    && (mode_info.x_resolution > best_mode_info.x_resolution))	// better than previous best_mode
+			{
+				// yiiiihaah... we found a new best mode
+				memcpy(&best_mode_info, &mode_info,
+				       sizeof(mode_info));
+			}
+			i++;
+		}
+
+		if (best_mode_info.video_mode != 0) {
+			DEBUG_PRINTF_VBE
+			    ("Best Video Mode found: 0x%x, %dx%d, %dbpp, framebuffer_address: 0x%x\n",
+			     best_mode_info.video_mode,
+			     best_mode_info.x_resolution,
+			     best_mode_info.y_resolution,
+			     best_mode_info.bits_per_pixel,
+			     best_mode_info.framebuffer_address);
+
+			//printf("Mode Info Dump:");
+			//dump(best_mode_info.mode_info_block, 64);
+
+			// set the video mode
+			vbe_set_mode(&best_mode_info);
+
+			if ((info.capabilities & 0x1) != 0) {
+				// switch to 8 bit palette format
+				vbe_set_palette_format(8);
+			}
+			// setup a palette:
+			// - first 216 colors are mixed colors for each component in 6 steps
+			//   (6*6*6=216)
+			// - then 10 shades of the three primary colors
+			// - then 10 shades of grey
+			// -------
+			// = 256 colors
+			//
+			// - finally black is color 0 and white color FF (because SLOF expects it
+			//   this way...)
+			// this resembles the palette that the kernel/X Server seems to expect...
+
+			uint8_t mixed_color_values[6] =
+			    { 0xFF, 0xDA, 0xB3, 0x87, 0x54, 0x00 };
+			uint8_t primary_color_values[10] =
+			    { 0xF3, 0xE7, 0xCD, 0xC0, 0xA5, 0x96, 0x77, 0x66,
+     0x3F, 0x27 };
+			uint8_t mc_size = sizeof(mixed_color_values);
+			uint8_t prim_size = sizeof(primary_color_values);
+
+			uint8_t curr_color_index;
+			uint32_t curr_color;
+
+			uint8_t r, g, b;
+			// 216 mixed colors
+			for (r = 0; r < mc_size; r++) {
+				for (g = 0; g < mc_size; g++) {
+					for (b = 0; b < mc_size; b++) {
+						curr_color_index =
+						    (r * mc_size * mc_size) +
+						    (g * mc_size) + b;
+						curr_color = 0;
+						curr_color |= ((uint32_t) mixed_color_values[r]) << 16;	//red value
+						curr_color |= ((uint32_t) mixed_color_values[g]) << 8;	//green value
+						curr_color |= (uint32_t) mixed_color_values[b];	//blue value
+						vbe_set_color(curr_color_index,
+							      curr_color);
+					}
+				}
+			}
+
+			// 10 shades of each primary color
+			// red
+			for (r = 0; r < prim_size; r++) {
+				curr_color_index =
+				    mc_size * mc_size * mc_size + r;
+				curr_color =
+				    ((uint32_t) primary_color_values[r]) << 16;
+				vbe_set_color(curr_color_index, curr_color);
+			}
+			//green
+			for (g = 0; g < prim_size; g++) {
+				curr_color_index =
+				    mc_size * mc_size * mc_size + prim_size + g;
+				curr_color =
+				    ((uint32_t) primary_color_values[g]) << 8;
+				vbe_set_color(curr_color_index, curr_color);
+			}
+			//blue
+			for (b = 0; b < prim_size; b++) {
+				curr_color_index =
+				    mc_size * mc_size * mc_size +
+				    prim_size * 2 + b;
+				curr_color = (uint32_t) primary_color_values[b];
+				vbe_set_color(curr_color_index, curr_color);
+			}
+			// 10 shades of grey
+			for (i = 0; i < prim_size; i++) {
+				curr_color_index =
+				    mc_size * mc_size * mc_size +
+				    prim_size * 3 + i;
+				curr_color = 0;
+				curr_color |= ((uint32_t) primary_color_values[i]) << 16;	//red
+				curr_color |= ((uint32_t) primary_color_values[i]) << 8;	//green
+				curr_color |= ((uint32_t) primary_color_values[i]);	//blue
+				vbe_set_color(curr_color_index, curr_color);
+			}
+
+			// SLOF is using color 0x0 (black) and 0xFF (white) to draw to the screen...
+			vbe_set_color(0x00, 0x00000000);
+			vbe_set_color(0xFF, 0x00FFFFFF);
+
+			output->screen_width = best_mode_info.x_resolution;
+			output->screen_height = best_mode_info.y_resolution;
+			output->screen_linebytes = best_mode_info.linebytes;
+			output->color_depth = best_mode_info.bits_per_pixel;
+			output->framebuffer_address =
+			    best_mode_info.framebuffer_address;
+		} else {
+			printf("%s: No suitable video mode found!\n",
+			       __FUNCTION__);
+			//unset display_type...
+			output->display_type = 0;
+		}
+	}
+	return 0;
+}
diff --git a/clients/net-snk/app/biosemu/vbe.h b/clients/net-snk/app/biosemu/vbe.h
new file mode 100644
index 0000000..3fe3c8a
--- /dev/null
+++ b/clients/net-snk/app/biosemu/vbe.h
@@ -0,0 +1,16 @@
+/******************************************************************************
+ * Copyright (c) 2004, 2007 IBM Corporation
+ * All rights reserved.
+ * This program and the accompanying materials
+ * are made available under the terms of the BSD License
+ * which accompanies this distribution, and is available at
+ * http://www.opensource.org/licenses/bsd-license.php
+ *
+ * Contributors:
+ *     IBM Corporation - initial implementation
+ *****************************************************************************/
+
+#ifndef _BIOSEMU_VBE_H_
+#define _BIOSEMU_VBE_H_
+
+#endif
diff --git a/clients/net-snk/app/main.c b/clients/net-snk/app/main.c
index a9dc0f9..2910901 100644
--- a/clients/net-snk/app/main.c
+++ b/clients/net-snk/app/main.c
@@ -16,6 +16,11 @@
 #include <netapps/netapps.h>
 #include <libbootmsg.h>
 
+#ifdef SNK_BIOSEMU_APPS
+extern int biosemu(char argc, char**argv);
+extern int vbe_get_info(char argc, char**argv);
+#endif
+
 extern void _callback_entry(void);
 
 int
@@ -24,12 +29,19 @@ main(int argc, char *argv[])
 	int i;
 	of_set_callback((void *) &_callback_entry);
 
-	if (strcmp(argv[0], "netboot") == 0 && argc >= 3)
+	if (strcmp(argv[0], "netboot") == 0 && argc >= 4)
 		return netboot(argc, argv);
 	if (strcmp(argv[0], "netflash") == 0)
 		return netflash(argc, argv);
 	if (strcmp(argv[0], "ping") == 0)
 		return ping(argc, argv);
+#ifdef SNK_BIOSEMU_APPS
+	// BIOS Emulator applications
+	if (strcmp(argv[0], "biosemu") == 0)
+		return biosemu(argc, argv);
+	if (strcmp(argv[0], "get_vbe_info") == 0)
+		return vbe_get_info(argc, argv);
+#endif
 
 	printf("Unknown client application called\n");
 	for (i = 0; i < argc; i++)
diff --git a/clients/net-snk/app/netapps/netboot.c b/clients/net-snk/app/netapps/netboot.c
index 07a1392..b0f8c87 100644
--- a/clients/net-snk/app/netapps/netboot.c
+++ b/clients/net-snk/app/netapps/netboot.c
@@ -184,11 +184,13 @@ netboot(int argc, char *argv[])
 	int rc;
 	int len = strtol(argv[2], 0, 16);
 	char *buffer = (char *) strtol(argv[1], 0, 16);
+	char *ret_buffer = (char *) strtol(argv[3], 0, 16);
 	filename_ip_t fn_ip;
 	int fd_device;
 	tftp_err_t tftp_err;
 	obp_tftp_args_t obp_tftp_args;
 	char null_ip[4] = { 0x00, 0x00, 0x00, 0x00 };
+	int huge_load = strtol(argv[4], 0, 10);
 
 	printf("\n");
 	printf(" Bootloader 1.5 \n");
@@ -235,8 +237,8 @@ netboot(int argc, char *argv[])
 	       fn_ip.own_mac[0], fn_ip.own_mac[1], fn_ip.own_mac[2],
 	       fn_ip.own_mac[3], fn_ip.own_mac[4], fn_ip.own_mac[5]);
 
-	if (argc >= 4) {
-		parse_args(argv[3], &obp_tftp_args);
+	if (argc >= 5) {
+		parse_args(argv[5], &obp_tftp_args);
 		if(obp_tftp_args.bootp_retries - rc < DEFAULT_BOOT_RETRIES)
 			obp_tftp_args.bootp_retries = DEFAULT_BOOT_RETRIES;
 		else
@@ -301,11 +303,11 @@ netboot(int argc, char *argv[])
 			memcpy(&fn_ip.server_ip, obp_tftp_args.giaddr, 4);
 			memset(fn_ip.server_mac, 0xff, 6);
 		}
-		rc = bootp(fd_device, &fn_ip, obp_tftp_args.bootp_retries);
+		rc = bootp(fd_device, ret_buffer, &fn_ip, obp_tftp_args.bootp_retries);
 		break;
 	case IP_INIT_DHCP:
 		printf("  Requesting IP address via DHCP: ");
-		rc = dhcp(fd_device, &fn_ip, obp_tftp_args.bootp_retries);
+		rc = dhcp(fd_device, ret_buffer, &fn_ip, obp_tftp_args.bootp_retries);
 		break;
 	case IP_INIT_NONE:
 	default:
@@ -375,11 +377,16 @@ netboot(int argc, char *argv[])
 		fn_ip.filename[sizeof(fn_ip.filename)-1] = 0;
 	}
 
-	printf("  Requesting file \"%s\" via TFTP\n", fn_ip.filename);
+	printf("  Requesting file \"%s\" via TFTP from %d.%d.%d.%d\n",
+		fn_ip.filename,
+		((fn_ip.server_ip >> 24) & 0xFF),
+		((fn_ip.server_ip >> 16) & 0xFF),
+		((fn_ip.server_ip >>  8) & 0xFF),
+		( fn_ip.server_ip        & 0xFF));
 
 	// accept at most 20 bad packets
 	// wait at most for 40 packets
-	rc = tftp(fd_device, &fn_ip, (unsigned char *) buffer, len, obp_tftp_args.tftp_retries, &tftp_err);
+	rc = tftp(fd_device, &fn_ip, (unsigned char *) buffer, len, obp_tftp_args.tftp_retries, &tftp_err, huge_load);
 
 	if(obp_tftp_args.ip_init == IP_INIT_DHCP)
 		dhcp_send_release();
diff --git a/clients/net-snk/app/netapps/netflash.c b/clients/net-snk/app/netapps/netflash.c
index 351fdda..8cdcdad 100644
--- a/clients/net-snk/app/netapps/netflash.c
+++ b/clients/net-snk/app/netapps/netflash.c
@@ -94,7 +94,7 @@ int netflash(int argc, char * argv[])
 
 	/* Get ip address for our mac address */
 	printf("  Requesting IP address via DHCP: ");
-	arp_failed = dhcp(fd_device, &fn_ip, 30);
+	arp_failed = dhcp(fd_device, 0, &fn_ip, 30);
 
 	if(arp_failed >= 0) {
 		// reinit network stack
@@ -133,7 +133,7 @@ int netflash(int argc, char * argv[])
 
 	strcpy((char *) fn_ip.filename,argv[3]);
 
-	rc = tftp (fd_device, &fn_ip, (unsigned char *) buffer, len, 20, &tftp_err);
+	rc = tftp (fd_device, &fn_ip, (unsigned char *) buffer, len, 20, &tftp_err, 0);
 
 	dhcp_send_release();
 
diff --git a/clients/net-snk/app/netapps/ping.c b/clients/net-snk/app/netapps/ping.c
index 2194768..9d98b24 100644
--- a/clients/net-snk/app/netapps/ping.c
+++ b/clients/net-snk/app/netapps/ping.c
@@ -150,7 +150,7 @@ ping(int argc, char *argv[])
 	if (!ping_args.client_ip.integer) {
 		/* Get ip address for our mac address */
 		printf("  Requesting IP address via DHCP: ");
-		arp_failed = dhcp(fd_device, &fn_ip, 30);
+		arp_failed = dhcp(fd_device, 0, &fn_ip, 30);
 
 		if (arp_failed == -1) {
 			printf("\n  DHCP: Could not get ip address\n");
diff --git a/clients/net-snk/app/netlib/bootp.c b/clients/net-snk/app/netlib/bootp.c
index ce2ae5f..b89f0bf 100644
--- a/clients/net-snk/app/netlib/bootp.c
+++ b/clients/net-snk/app/netlib/bootp.c
@@ -20,6 +20,8 @@
 
 #define DEBUG 0
 
+static char * response_buffer;
+
 void
 print_ip(char *ip)
 {
@@ -164,6 +166,9 @@ receive_bootp(int boot_device, filename_ip_t * fn_ip)
 		if (memcmp(fn_ip->own_mac, btph->chaddr, ETH_ALEN))
 			continue;
 
+		if(response_buffer)
+			memcpy(response_buffer, btph, 1720);
+
 		fn_ip->own_ip = btph->yiaddr;
 		fn_ip->server_ip = btph->siaddr;
 		memcpy(fn_ip->server_mac, &ethh->src_mac, 6);
@@ -229,13 +234,15 @@ receive_bootp(int boot_device, filename_ip_t * fn_ip)
 
 
 int
-bootp(int boot_device, filename_ip_t * fn_ip, unsigned int retries)
+bootp(int boot_device, char *ret_buffer, filename_ip_t * fn_ip, unsigned int retries)
 {
 	int i = (int) retries+1;
 	fn_ip->own_ip = 0;
 
 	printf("   ");
 
+	response_buffer = ret_buffer;
+
 	do {
 		printf("\b\b%02d", i);
 		if (!i--) {
diff --git a/clients/net-snk/app/netlib/dhcp.c b/clients/net-snk/app/netlib/dhcp.c
index 8aa995e..8f27cf6 100644
--- a/clients/net-snk/app/netlib/dhcp.c
+++ b/clients/net-snk/app/netlib/dhcp.c
@@ -171,6 +171,7 @@ static uint32_t dhcp_siaddr_ip     = 0;
 static int8_t   dhcp_filename[256];
 static int8_t   dhcp_tftp_name[256];
 
+static char   * response_buffer;
 
 /*>>>>>>>>>>>>>>>>>>>>>>>>>>>> IMPLEMENTATION <<<<<<<<<<<<<<<<<<<<<<<<<<<*/
 
@@ -186,7 +187,7 @@ static int8_t   dhcp_tftp_name[256];
  *                       NON ZERO - error condition occurs.
  */
 int32_t
-dhcp(int32_t boot_device, filename_ip_t * fn_ip, unsigned int retries) {
+dhcp(int32_t boot_device, char *ret_buffer, filename_ip_t * fn_ip, unsigned int retries) {
 	int i = (int) retries+1;
 
 	uint8_t  dhcp_tftp_mac[]  = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
@@ -194,6 +195,7 @@ dhcp(int32_t boot_device, filename_ip_t * fn_ip, unsigned int retries) {
 	strcpy((char *) dhcp_filename, "");
 	strcpy((char *) dhcp_tftp_name, "");
 
+	response_buffer = ret_buffer;
 	dhcp_device_socket = boot_device;
 	memcpy(dhcp_own_mac, fn_ip -> own_mac, 6);
 
@@ -802,6 +804,13 @@ handle_dhcp(uint8_t * packet, int32_t packetsize) {
 	if (btph -> op != 2)
 		return -1; // it is not Boot Reply
 
+	if(response_buffer) {
+		if(packetsize <= 1720)
+			memcpy(response_buffer, packet, packetsize);
+		else
+			memcpy(response_buffer, packet, 1720);
+	}
+
 	if (memcmp(btph -> vend, dhcp_magic, 4)) {
 		// It is BootP - RFC 951
 		NET_DEBUG_PRINTF("WARNING:\t\tBooting via BootP 951\n");
diff --git a/clients/net-snk/app/netlib/netlib.h b/clients/net-snk/app/netlib/netlib.h
index 752df1f..314e84b 100644
--- a/clients/net-snk/app/netlib/netlib.h
+++ b/clients/net-snk/app/netlib/netlib.h
@@ -127,10 +127,10 @@ typedef struct {
 	int8_t filename[256];
 } filename_ip_t;
 
-int dhcp(int32_t, filename_ip_t *, unsigned int);
+int dhcp(int32_t, char *ret_buffer, filename_ip_t *, unsigned int);
 void dhcp_send_release(void);
 
-int bootp(int32_t, filename_ip_t *, unsigned int);
+int bootp(int32_t, char *ret_buffer, filename_ip_t *, unsigned int);
 
 typedef struct {
 	uint32_t bad_tftp_packets;
@@ -139,7 +139,7 @@ typedef struct {
 	uint32_t blocks_received;
 } tftp_err_t;
 
-int tftp(int, filename_ip_t *, unsigned char  *, int, unsigned int, tftp_err_t *);
+int tftp(int, filename_ip_t *, unsigned char  *, int, unsigned int, tftp_err_t *, int huge_load);
 int tftp_netsave(int32_t, filename_ip_t *, uint8_t * buffer, int32_t len, 
 		int use_ci, unsigned int retries, tftp_err_t * tftp_err);
 
diff --git a/clients/net-snk/app/netlib/tftp.c b/clients/net-snk/app/netlib/tftp.c
index 7536770..017558e 100644
--- a/clients/net-snk/app/netlib/tftp.c
+++ b/clients/net-snk/app/netlib/tftp.c
@@ -432,7 +432,7 @@ get_blksize(unsigned char *buffer, unsigned int len)
  */
 static int
 the_real_tftp(int boot_device, filename_ip_t * fn_ip, unsigned char *buffer,
-	      int len, unsigned int retries, tftp_err_t * tftp_err)
+	      int len, unsigned int retries, tftp_err_t * tftp_err, int huge_load)
 {
 	int i, j = 0;
 	int received_len = 0;
@@ -582,8 +582,13 @@ the_real_tftp(int boot_device, filename_ip_t * fn_ip, unsigned char *buffer,
 			return -1;	// ERROR: unknown error
 		} else if (tftp->th_opcode == DATA) {
 			/* DATA PACKAGE */
-			if (tftp->th_data == block + 1)
-				block++;
+			if (block + 1 == tftp->th_data) {
+				++block;
+			}
+			else if( block == 0xffff && huge_load != 0
+			     &&  (tftp->th_data == 0 || tftp->th_data == 1) ) {
+				block = tftp->th_data;
+			}
 			else if (tftp->th_data == block) {
 #ifdef __DEBUG__
 				printf
@@ -631,8 +636,10 @@ the_real_tftp(int boot_device, filename_ip_t * fn_ip, unsigned char *buffer,
 				break;
 			/* 0xffff is the highest block number possible
 			 * see the TFTP RFCs */
-			if (block >= 0xffff)
+			
+			if (block >= 0xffff && huge_load == 0) {
 				return -9;
+			}
 		} else {
 #ifdef __DEBUG__
 			printf("Unknown packet %x\n", tftp->th_opcode);
@@ -651,8 +658,8 @@ the_real_tftp(int boot_device, filename_ip_t * fn_ip, unsigned char *buffer,
 
 int
 tftp(int boot_device, filename_ip_t * fn_ip, unsigned char *buffer, int len,
-     unsigned int retries, tftp_err_t * tftp_err)
+     unsigned int retries, tftp_err_t * tftp_err, int huge_load)
 {
 	return the_real_tftp(boot_device, fn_ip, buffer, len, retries,
-			     tftp_err);
+			     tftp_err, huge_load);
 }
diff --git a/clients/net-snk/make.rules b/clients/net-snk/make.rules
index 1343d82..0bc0e2a 100644
--- a/clients/net-snk/make.rules
+++ b/clients/net-snk/make.rules
@@ -15,8 +15,9 @@ CROSS		?= powerpc64-linux-
 HOSTCC		?= gcc
 HOSTCFLAGS	= -g -Wall -W -O2 -I. -I../include
 
-INCLCMNDIR	?= $(TOP)/../../include
-LIBCMNDIR	?= $(TOP)/../../lib
+ROOTDIR		?= $(TOP)/../..
+INCLCMNDIR	?= $(ROOTDIR)/include
+LIBCMNDIR	?= $(ROOTDIR)/lib
 CFLAGS		= -g -I. -I$(TOP)/include -I$(LIBCMNDIR)/libc/include \
 		  -I$(LIBCMNDIR)/libbootmsg -I$(INCLCMNDIR)/$(CPUARCH) \
 		  -O2 -fno-builtin -ffreestanding -msoft-float -mno-altivec \
@@ -41,3 +42,5 @@ endif
 OBJCOPY 	= $(CROSS)objcopy
 OBJDUMP		= $(CROSS)objdump
 STRIP		= $(CROSS)strip
+AR              = $(CROSS)ar
+RANLIB          = $(CROSS)ranlib
diff --git a/clients/takeover/Makefile b/clients/takeover/Makefile
index acd6c48..c11b5db 100644
--- a/clients/takeover/Makefile
+++ b/clients/takeover/Makefile
@@ -16,9 +16,8 @@ SNKDIR = $(TOPCMNDIR)/clients/net-snk
 
 CFLAGS += -fno-builtin -I$(LIBCMNDIR)/libc/include
 CFLAGS += -I$(SNKDIR)/include -I. $(CPUARCHDEF)
-CFLAGS += -I$(INCLBRDDIR) -I.. -O2  -msoft-float
-CFLAGS += $(PLATFORM) -I$(INCLCMNDIR)/$(CPUARCH)
-CFLAGS += $(BOOT) -Wa,-mregnames $(RELEASE)
+CFLAGS += -I$(INCLBRDDIR) -I.. -I$(INCLCMNDIR)/$(CPUARCH)
+CFLAGS += -O2 -msoft-float -Wa,-mregnames $(RELEASE)
 
 OBJS = $(SNKDIR)/kernel/kernel.o
 OBJS += $(SNKDIR)/oflib/oflib.o
diff --git a/include/libelf.h b/include/libelf.h
new file mode 100644
index 0000000..229e86b
--- /dev/null
+++ b/include/libelf.h
@@ -0,0 +1,18 @@
+/******************************************************************************
+ * Copyright (c) 2004, 2007 IBM Corporation
+ * All rights reserved.
+ * This program and the accompanying materials
+ * are made available under the terms of the BSD License
+ * which accompanies this distribution, and is available at
+ * http://www.opensource.org/licenses/bsd-license.php
+ *
+ * Contributors:
+ *     IBM Corporation - initial implementation
+ *****************************************************************************/
+
+#ifndef __LIBELF_H
+#define __LIBELF_H
+
+int load_elf_file(unsigned long *, unsigned long *);
+
+#endif				/* __LIBELF_H */
diff --git a/include/types.h b/include/types.h
index 8e04a94..d41f23e 100644
--- a/include/types.h
+++ b/include/types.h
@@ -13,6 +13,8 @@
 #ifndef _TYPES_H
 #define _TYPES_H
 
+#warning "This file is obsolete. Please use #include <stdint.h> instead."
+
 typedef unsigned char uint8_t;
 typedef unsigned short uint16_t;
 typedef unsigned int uint32_t;
diff --git a/lib/Makefile b/lib/Makefile
index 4b3f299..4f3b4d8 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -10,7 +10,7 @@
 # *     IBM Corporation - initial implementation
 # ****************************************************************************/
 
-SUBDIRS = libc libipmi  libbootmsg libbases 
+SUBDIRS = libc libipmi  libbootmsg libbases   libelf
 
 all:  subdirs
 
diff --git a/lib/libbases/Makefile b/lib/libbases/Makefile
index 0ffa0c7..fe1845c 100644
--- a/lib/libbases/Makefile
+++ b/lib/libbases/Makefile
@@ -14,7 +14,7 @@ TOPCMNDIR ?= ../..
 
 include $(TOPCMNDIR)/make.rules
 
-ASFLAGS = $(PLATFORM) $(BOOT) $(FLAG) $(RELEASE) $(CPUARCHDEF) -Wa,-mregnames
+ASFLAGS = $(FLAG) $(RELEASE) $(CPUARCHDEF) -Wa,-mregnames
 CFLAGS = -g -O2 -fno-builtin -ffreestanding -nostdinc -msoft-float \
 	 -mno-altivec -mabi=no-altivec -Wall
 CPPFLAGS = -I../libc/include $(CPUARCHDEF) -I$(INCLBRDDIR) -I. -I../../include
diff --git a/lib/libbootmsg/Makefile b/lib/libbootmsg/Makefile
index e1b4d30..285a171 100644
--- a/lib/libbootmsg/Makefile
+++ b/lib/libbootmsg/Makefile
@@ -14,7 +14,7 @@ TOPCMNDIR ?= ../..
 
 include $(TOPCMNDIR)/make.rules
 
-ASFLAGS = $(PLATFORM) $(BOOT) $(FLAG) $(RELEASE) $(CPUARCHDEF) -Wa,-mregnames
+ASFLAGS = $(FLAG) $(RELEASE) $(CPUARCHDEF) -Wa,-mregnames
 CFLAGS = -g -O2 -fno-builtin -ffreestanding -nostdinc -msoft-float \
 	 -mno-altivec -mabi=no-altivec -Wall
 CPPFLAGS = -I../libc/include $(CPUARCHDEF) -I$(INCLBRDDIR) -I. -I../../include
diff --git a/lib/libelf/Makefile b/lib/libelf/Makefile
new file mode 100644
index 0000000..3bd56ce
--- /dev/null
+++ b/lib/libelf/Makefile
@@ -0,0 +1,49 @@
+# *****************************************************************************
+# * Copyright (c) 2004, 2007 IBM Corporation
+# * All rights reserved.
+# * This program and the accompanying materials
+# * are made available under the terms of the BSD License
+# * which accompanies this distribution, and is available at
+# * http://www.opensource.org/licenses/bsd-license.php
+# *
+# * Contributors:
+# *     IBM Corporation - initial implementation
+# ****************************************************************************/
+
+TOPCMNDIR ?= ../..
+
+include $(TOPCMNDIR)/make.rules
+
+CFLAGS = -g -O2 -fno-builtin -ffreestanding -nostdinc -msoft-float \
+	 -mno-altivec -mabi=no-altivec -Wall
+CPPFLAGS = -I../libc/include $(CPUARCHDEF) -I$(INCLCMNDIR)/$(CPUARCH)
+LDFLAGS= -nostdlib
+
+TARGET = ../libelf.a
+
+all: $(TARGET)
+
+SRCS = elf.c
+
+OBJS = $(SRCS:%.c=%.o)
+
+$(TARGET): $(OBJS)
+	$(AR) -rc $@ $(OBJS)
+	$(RANLIB) $@
+
+clean:
+	$(RM) $(TARGET) $(OBJS)
+
+distclean: clean
+	$(RM) Makefile.dep
+
+# Rules for creating the dependency file:
+depend:
+	$(RM) Makefile.dep
+	$(MAKE) Makefile.dep
+
+Makefile.dep: Makefile
+	$(CC) -MM $(CPPFLAGS) $(CFLAGS) $(SRCS) > Makefile.dep
+
+# Include dependency file if available:
+-include Makefile.dep
diff --git a/lib/libelf/elf.c b/lib/libelf/elf.c
new file mode 100644
index 0000000..93e5762
--- /dev/null
+++ b/lib/libelf/elf.c
@@ -0,0 +1,233 @@
+/******************************************************************************
+ * Copyright (c) 2004, 2007 IBM Corporation
+ * All rights reserved.
+ * This program and the accompanying materials
+ * are made available under the terms of the BSD License
+ * which accompanies this distribution, and is available at
+ * http://www.opensource.org/licenses/bsd-license.php
+ *
+ * Contributors:
+ *     IBM Corporation - initial implementation
+ *****************************************************************************/
+
+/* this is elf.fs rewritten in C */
+
+#include <string.h>
+#include <cpu.h>
+
+struct ehdr {
+	unsigned int ei_ident;
+	unsigned char ei_class;
+	unsigned char ei_data;
+	unsigned char ei_version;
+	unsigned char ei_pad[9];
+	unsigned short e_type;
+	unsigned short e_machine;
+	unsigned int e_version;
+	unsigned int e_entry;
+	unsigned int e_phoff;
+	unsigned int e_shoff;
+	unsigned int e_flags;
+	unsigned short e_ehsize;
+	unsigned short e_phentsize;
+	unsigned short e_phnum;
+	unsigned short e_shentsize;
+	unsigned short e_shnum;
+	unsigned short e_shstrndx;
+};
+
+struct phdr {
+	unsigned int p_type;
+	unsigned int p_offset;
+	unsigned int p_vaddr;
+	unsigned int p_paddr;
+	unsigned int p_filesz;
+	unsigned int p_memsz;
+	unsigned int p_flags;
+	unsigned int p_align;
+};
+
+struct ehdr64 {
+	unsigned int ei_ident;
+	unsigned char ei_class;
+	unsigned char ei_data;
+	unsigned char ei_version;
+	unsigned char ei_pad[9];
+	unsigned short e_type;
+	unsigned short e_machine;
+	unsigned int e_version;
+	unsigned long e_entry;
+	unsigned long e_phoff;
+	unsigned long e_shoff;
+	unsigned int e_flags;
+	unsigned short e_ehsize;
+	unsigned short e_phentsize;
+	unsigned short e_phnum;
+	unsigned short e_shentsize;
+	unsigned short e_shnum;
+	unsigned short e_shstrndx;
+};
+
+struct phdr64 {
+	unsigned int p_type;
+	unsigned int p_flags;
+	unsigned long p_offset;
+	unsigned long p_vaddr;
+	unsigned long p_paddr;
+	unsigned long p_filesz;
+	unsigned long p_memsz;
+	unsigned long p_align;
+};
+
+#define VOID(x) (void *)((unsigned long)x)
+
+static void
+load_segment(unsigned long *file_addr, struct phdr *phdr)
+{
+	unsigned long src = phdr->p_offset + (unsigned long) file_addr;
+	/* copy into storage */
+	memmove(VOID(phdr->p_vaddr), VOID(src), phdr->p_filesz);
+
+	/* clear bss */
+	memset(VOID(phdr->p_vaddr + phdr->p_filesz), 0,
+	       phdr->p_memsz - phdr->p_filesz);
+
+	if (phdr->p_memsz) {
+		flush_cache(VOID(phdr->p_vaddr), phdr->p_memsz);
+	}
+}
+
+static unsigned int
+load_segments(unsigned long *file_addr)
+{
+	struct ehdr *ehdr = (struct ehdr *) file_addr;
+	/* Calculate program header address */
+	struct phdr *phdr =
+	    (struct phdr *) (((unsigned char *) file_addr) + ehdr->e_phoff);
+	int i;
+	/* loop e_phnum times */
+	for (i = 0; i <= ehdr->e_phnum; i++) {
+		/* PT_LOAD ? */
+		if (phdr->p_type == 1) {
+			/* copy segment */
+			load_segment(file_addr, phdr);
+		}
+		/* step to next header */
+		phdr =
+		    (struct phdr *) (((unsigned char *) phdr) +
+				     ehdr->e_phentsize);
+	}
+	return ehdr->e_entry;
+}
+
+static void
+load_segment64(unsigned long *file_addr, struct phdr64 *phdr64)
+{
+	unsigned long src = phdr64->p_offset + (unsigned long) file_addr;
+	/* copy into storage */
+	memmove(VOID(phdr64->p_vaddr), VOID(src), phdr64->p_filesz);
+
+	/* clear bss */
+	memset(VOID(phdr64->p_vaddr + phdr64->p_filesz), 0,
+	       phdr64->p_memsz - phdr64->p_filesz);
+
+	if (phdr64->p_memsz) {
+		flush_cache(VOID(phdr64->p_vaddr), phdr64->p_memsz);
+	}
+}
+
+static unsigned long
+load_segments64(unsigned long *file_addr)
+{
+	struct ehdr64 *ehdr64 = (struct ehdr64 *) file_addr;
+	/* Calculate program header address */
+	struct phdr64 *phdr64 =
+	    (struct phdr64 *) (((unsigned char *) file_addr) + ehdr64->e_phoff);
+	int i;
+	/* loop e_phnum times */
+	for (i = 0; i <= ehdr64->e_phnum; i++) {
+		/* PT_LOAD ? */
+		if (phdr64->p_type == 1) {
+			/* copy segment */
+			load_segment64(file_addr, phdr64);
+		}
+		/* step to next header */
+		phdr64 =
+		    (struct phdr64 *) (((unsigned char *) phdr64) +
+				       ehdr64->e_phentsize);
+	}
+	return ehdr64->e_entry;
+}
+
+#if __BYTE_ORDER == __BIG_ENDIAN
+#define cpu_to_be32(x)  (x)
+#else
+#define cpu_to_be32(x)  bswap_32(x)
+#endif
+
+/**
+ * elf_check_file tests if the file at file_addr is
+ * a correct endian, ELF PPC executable
+ * @param file_addr  pointer to the start of the ELF file
+ * @return           the class (1 for 32 bit, 2 for 64 bit)
+ *                   -1 if it is not an ELF file
+ *                   -2 if it has the wrong endianess
+ *                   -3 if it is not an ELF executable
+ *                   -4 if it is not for PPC
+ */
+static int
+elf_check_file(unsigned long *file_addr)
+{
+	struct ehdr *ehdr = (struct ehdr *) file_addr;
+	/* check if it is an ELF image at all */
+	if (cpu_to_be32(ehdr->ei_ident) != 0x7f454c46)
+		return -1;
+
+	/* endian check */
+#if __BYTE_ORDER == __BIG_ENDIAN
+	if (ehdr->ei_data != 2)
+		/* not a big endian image */
+#else
+	if (ehdr->ei_data == 2)
+		/* not a little endian image */
+#endif
+		return -2;
+
+	/* check if it is an ELF executable */
+	if (ehdr->e_type != 2)
+		return -3;
+
+	/* check if it is a PPC ELF executable */
+	if (ehdr->e_machine != 0x14 && ehdr->e_machine != 0x15)
+		return -4;
+
+	return ehdr->ei_class;
+}
+
+/**
+ * load_elf_file tries to load the ELF file specified in file_addr
+ *
+ * it first checks if the file is a PPC ELF executable and then loads
+ * the segments depending if it is a 64bit or 32 bit ELF file
+ *
+ * @param file_addr  pointer to the start of the elf file
+ * @param entry      pointer where the ELF loader will store
+ *                   the entry point
+ * @return           1 for a 32 bit file
+ *                   2 for a 64 bit file
+ *                   anything else means an error during load
+ */
+int
+load_elf_file(unsigned long *file_addr, unsigned long *entry)
+{
+	int type = elf_check_file(file_addr);
+	switch (type) {
+	case 1:
+		*entry = load_segments(file_addr);
+		break;
+	case 2:
+		*entry = load_segments64(file_addr);
+		break;
+	}
+	return type;
+}
diff --git a/lib/libelf/libelf.code b/lib/libelf/libelf.code
new file mode 100644
index 0000000..01efdf3
--- /dev/null
+++ b/lib/libelf/libelf.code
@@ -0,0 +1,21 @@
+/******************************************************************************
+ * Copyright (c) 2004, 2007 IBM Corporation
+ * All rights reserved.
+ * This program and the accompanying materials
+ * are made available under the terms of the BSD License
+ * which accompanies this distribution, and is available at
+ * http://www.opensource.org/licenses/bsd-license.php
+ *
+ * Contributors:
+ *     IBM Corporation - initial implementation
+ *****************************************************************************/
+int load_elf_file(unsigned long *file_addr, unsigned long *entry);
+
+PRIM(LOADELF)
+	void *file_addr = TOS.a;
+	int type;
+	unsigned long entry;
+	type = load_elf_file(file_addr, &entry);
+	TOS.u = entry;
+	PUSH; TOS.n = type;
+MIRP
diff --git a/lib/libelf/libelf.in b/lib/libelf/libelf.in
new file mode 100644
index 0000000..1b74d51
--- /dev/null
+++ b/lib/libelf/libelf.in
@@ -0,0 +1,12 @@
+/******************************************************************************
+ * Copyright (c) 2004, 2007 IBM Corporation
+ * All rights reserved.
+ * This program and the accompanying materials
+ * are made available under the terms of the BSD License
+ * which accompanies this distribution, and is available at
+ * http://www.opensource.org/licenses/bsd-license.php
+ *
+ * Contributors:
+ *     IBM Corporation - initial implementation
+ *****************************************************************************/
+cod(LOADELF)
diff --git a/llfw/clib/iolib.c b/llfw/clib/iolib.c
index 9d202f4..3f90baa 100644
--- a/llfw/clib/iolib.c
+++ b/llfw/clib/iolib.c
@@ -10,7 +10,7 @@
  *     IBM Corporation - initial implementation
  *****************************************************************************/
 
-#include "types.h"
+#include <stdint.h>
 #include <stddef.h>
 #include <unistd.h>
 #include "iolib.h"
diff --git a/llfw/clib/iolib.h b/llfw/clib/iolib.h
index fbe161d..9678d94 100644
--- a/llfw/clib/iolib.h
+++ b/llfw/clib/iolib.h
@@ -12,23 +12,16 @@
 
 #ifndef IOLIB_H
 #define IOLIB_H
-#include <types.h>
+
+#include <stdint.h>
 
 #define addr_t  	volatile unsigned int
 #define addr8_t 	volatile unsigned char
 
-extern void     out32 (uint64_t base, uint64_t addr, uint32_t val);
-extern void     out16 (uint64_t base, uint64_t addr, uint16_t val);
-extern void     out8  (uint64_t base, uint64_t addr, uint8_t val);
-extern uint32_t in32  (uint64_t base, uint64_t addr);
-extern uint16_t in16  (uint64_t base, uint64_t addr);
-extern uint8_t  in8   (uint64_t base, uint64_t addr);
-
 extern void     halt_sys (unsigned int);
 
 extern uint32_t get_sb_version (void);
 
-extern void     init_uart (void);
 extern void     uart_send_byte(unsigned char b);
 extern void     io_putchar(unsigned char);
 
diff --git a/llfw/romfs.S b/llfw/romfs.S
index e57823f..2a2e141 100644
--- a/llfw/romfs.S
+++ b/llfw/romfs.S
@@ -35,14 +35,14 @@
  * - if nextpointer is non-zero then just the next file is returned
  *
  * Returns:
- * <Sucess>: 
+ * <Success>: 
  *      R3 = 0
  *	romfs_t is updated
  * <FileNotFound>:
  *      R3 = 1
  * 	romfs_t not touched
  *
- * Potenially modifies the following registers:
+ * Potentially modifies the following registers:
  *
  
  Example usage from C:
@@ -170,10 +170,10 @@ ENTRY(romfs_stat_file)
  * R5 = destination address
  *
  * Returns:
- * <Sucess>: R3 = 0, R6 = size, <FileNotFound>: R3 = 1
+ * <Success>: R3 = 0, R6 = size, <FileNotFound>: R3 = 1
  * R5 is kept
  *  
- * Potenially modifies the following registers:
+ * Potentially modifies the following registers:
  * ctr, r15, r16, r17, r18
  * 
  * Uses the following calls with subsequent register modification:
@@ -225,7 +225,7 @@ ASM_ENTRY(romfs_load)
  * R4 = ROMBASE
  *
  * Returns:
- * <Sucess>: 
+ * <Success>: 
  *      R3 = 0
  *      R4 = address of file header
  *      R5 = address of data (real address)
@@ -234,7 +234,7 @@ ASM_ENTRY(romfs_load)
  * <FileNotFound>:
  *      R3 = 1
  *
- * Potenially modifies the following registers:
+ * Potentially modifies the following registers:
  * R3, R4, R5, R6, R7, R8, R9
  * 
  * Uses the following calls with subsequent register modification:
@@ -296,7 +296,7 @@ ASM_ENTRY(romfs_lookup)
  * Returns:
  * <Match>: R12 = 0 <NoMatch>: R12 = 1
  *
- * Potenially modifies the following registers:
+ * Potentially modifies the following registers:
  * R10, R11, r12, r13, r14 
  *******************************************************************/
 romfs_namematch:
diff --git a/other-licence/Makefile b/other-licence/Makefile
index fde091e..5395f64 100644
--- a/other-licence/Makefile
+++ b/other-licence/Makefile
@@ -17,6 +17,10 @@ endif
 include $(TOP)/make.rules
 
 SUBDIRS=common bcm
+ifeq ($(SNK_BIOSEMU_APPS), 1)
+SUBDIRS += x86emu
+endif
+
 
 all :		
 		for subdir in $(SUBDIRS) ; do $(MAKE) -C $${subdir} || exit 1 ; done
diff --git a/other-licence/x86emu/Makefile b/other-licence/x86emu/Makefile
new file mode 100644
index 0000000..0729a25
--- /dev/null
+++ b/other-licence/x86emu/Makefile
@@ -0,0 +1,45 @@
+# *****************************************************************************
+# * Copyright (c) 2004, 2007 IBM Corporation
+# * All rights reserved.
+# * This program and the accompanying materials
+# * are made available under the terms of the BSD License
+# * which accompanies this distribution, and is available at
+# * http://www.opensource.org/licenses/bsd-license.php
+# *
+# * Contributors:
+# *     IBM Corporation - initial implementation
+# ****************************************************************************/
+ifndef TOP
+  TOP = $(shell while ! test -e make.rules; do cd ..  ; done; pwd)
+  export TOP
+endif
+include $(TOP)/make.rules
+
+ROOTDIR ?= ../..
+
+LDFLAGS		=
+ASFLAGS		= -I./include -Wa,-mregnames
+
+#NOTE: -DDEBUG only needed for debugging/tracing...
+#CFLAGS		= -DDEBUG -I. -I./include -I./include/x86emu -I$(ROOTDIR)/include -I$(ROOTDIR)/lib/libc/include -g -O2 -msoft-float -Wall -save-temps -nostdinc -fno-builtin -ffreestanding 
+CFLAGS		= -UDEBUG -m64 -I. -I./include -I./include/x86emu -I$(ROOTDIR)/include -I$(ROOTDIR)/lib/libc/include -O3 -Wall -save-temps -nostdinc -fno-builtin -ffreestanding 
+
+X86EMU_OBJS	= debug.o decode.o fpu.o ops2.o ops.o prim_ops.o sys.o
+
+%.o: %.S
+		$(CC) $(ASFLAGS) -c -o $@  $^
+
+%.o: %.c
+		$(CC) $(CFLAGS) -c -o $@ $^
+
+all: libx86emu.a
+
+libx86emu.a: $(X86EMU_OBJS)
+	$(AR) -rc $@ $^
+	$(RANLIB) $@
+
+clean:
+	$(RM) *.o *.i *.s libx86emu.a 
+
+distclean: clean
+
diff --git a/other-licence/x86emu/debug.c b/other-licence/x86emu/debug.c
new file mode 100644
index 0000000..53ec99a
--- /dev/null
+++ b/other-licence/x86emu/debug.c
@@ -0,0 +1,429 @@
+/****************************************************************************
+*
+*                       Realmode X86 Emulator Library
+*
+*               Copyright (C) 1991-2004 SciTech Software, Inc.
+*                    Copyright (C) David Mosberger-Tang
+*                      Copyright (C) 1999 Egbert Eich
+*
+*  ========================================================================
+*
+*  Permission to use, copy, modify, distribute, and sell this software and
+*  its documentation for any purpose is hereby granted without fee,
+*  provided that the above copyright notice appear in all copies and that
+*  both that copyright notice and this permission notice appear in
+*  supporting documentation, and that the name of the authors not be used
+*  in advertising or publicity pertaining to distribution of the software
+*  without specific, written prior permission.  The authors makes no
+*  representations about the suitability of this software for any purpose.
+*  It is provided "as is" without express or implied warranty.
+*
+*  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+*  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+*  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+*  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+*  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+*  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+*  PERFORMANCE OF THIS SOFTWARE.
+*
+*  ========================================================================
+*
+* Language:     ANSI C
+* Environment:  Any
+* Developer:    Kendall Bennett
+*
+* Description:  This file contains the code to handle debugging of the
+*               emulator.
+*
+****************************************************************************/
+
+#include "x86emui.h"
+// #include <stdarg.h>
+
+/*----------------------------- Implementation ----------------------------*/
+
+#ifdef DEBUG
+
+static void     print_encoded_bytes (u16 s, u16 o);
+static void     print_decoded_instruction (void);
+static int      parse_line (char *s, int *ps, int *n);
+
+/* should look something like debug's output. */
+void X86EMU_trace_regs (void)
+{
+    if (DEBUG_TRACE()) {
+        x86emu_dump_regs();
+    }
+    if (DEBUG_DECODE() && ! DEBUG_DECODE_NOPRINT()) {
+        printk("%04x:%04x ",M.x86.saved_cs, M.x86.saved_ip);
+        print_encoded_bytes( M.x86.saved_cs, M.x86.saved_ip);
+        print_decoded_instruction();
+    }
+}
+
+void X86EMU_trace_xregs (void)
+{
+    if (DEBUG_TRACE()) {
+        x86emu_dump_xregs();
+    }
+}
+
+void x86emu_just_disassemble (void)
+{
+    /*
+     * This routine called if the flag DEBUG_DISASSEMBLE is set kind
+     * of a hack!
+     */
+    printk("%04x:%04x ",M.x86.saved_cs, M.x86.saved_ip);
+    print_encoded_bytes( M.x86.saved_cs, M.x86.saved_ip);
+    print_decoded_instruction();
+}
+
+static void disassemble_forward (u16 seg, u16 off, int n)
+{
+    X86EMU_sysEnv tregs;
+    int i;
+    u8 op1;
+    /*
+     * hack, hack, hack.  What we do is use the exact machinery set up
+     * for execution, except that now there is an additional state
+     * flag associated with the "execution", and we are using a copy
+     * of the register struct.  All the major opcodes, once fully
+     * decoded, have the following two steps: TRACE_REGS(r,m);
+     * SINGLE_STEP(r,m); which disappear if DEBUG is not defined to
+     * the preprocessor.  The TRACE_REGS macro expands to:
+     *
+     * if (debug&DEBUG_DISASSEMBLE)
+     *     {just_disassemble(); goto EndOfInstruction;}
+     *     if (debug&DEBUG_TRACE) trace_regs(r,m);
+     *
+     * ......  and at the last line of the routine.
+     *
+     * EndOfInstruction: end_instr();
+     *
+     * Up to the point where TRACE_REG is expanded, NO modifications
+     * are done to any register EXCEPT the IP register, for fetch and
+     * decoding purposes.
+     *
+     * This was done for an entirely different reason, but makes a
+     * nice way to get the system to help debug codes.
+     */
+    tregs = M;
+    tregs.x86.R_IP = off;
+    tregs.x86.R_CS = seg;
+
+    /* reset the decoding buffers */
+    tregs.x86.enc_str_pos = 0;
+    tregs.x86.enc_pos = 0;
+
+    /* turn on the "disassemble only, no execute" flag */
+    tregs.x86.debug |= DEBUG_DISASSEMBLE_F;
+
+    /* DUMP NEXT n instructions to screen in straight_line fashion */
+    /*
+     * This looks like the regular instruction fetch stream, except
+     * that when this occurs, each fetched opcode, upon seeing the
+     * DEBUG_DISASSEMBLE flag set, exits immediately after decoding
+     * the instruction.  XXX --- CHECK THAT MEM IS NOT AFFECTED!!!
+     * Note the use of a copy of the register structure...
+     */
+    for (i=0; i<n; i++) {
+        op1 = (*sys_rdb)(((u32)M.x86.R_CS<<4) + (M.x86.R_IP++));
+        (x86emu_optab[op1])(op1);
+    }
+    /* end major hack mode. */
+}
+
+void x86emu_check_ip_access (void)
+{
+    /* NULL as of now */
+}
+
+void x86emu_check_sp_access (void)
+{
+}
+
+void x86emu_check_mem_access (u32 dummy)
+{
+    /*  check bounds, etc */
+}
+
+void x86emu_check_data_access (uint dummy1, uint dummy2)
+{
+    /*  check bounds, etc */
+}
+
+void x86emu_inc_decoded_inst_len (int x)
+{
+    M.x86.enc_pos += x;
+}
+
+void x86emu_decode_printf (char *x)
+{
+    sprintf(M.x86.decoded_buf+M.x86.enc_str_pos,"%s",x);
+    M.x86.enc_str_pos += strlen(x);
+}
+
+void x86emu_decode_printf2 (char *x, int y)
+{
+    char temp[100];
+    sprintf(temp,x,y);
+    sprintf(M.x86.decoded_buf+M.x86.enc_str_pos,"%s",temp);
+    M.x86.enc_str_pos += strlen(temp);
+}
+
+void x86emu_end_instr (void)
+{
+    M.x86.enc_str_pos = 0;
+    M.x86.enc_pos = 0;
+}
+
+static void print_encoded_bytes (u16 s, u16 o)
+{
+    int i;
+    char buf1[64];
+    for (i=0; i< M.x86.enc_pos; i++) {
+        sprintf(buf1+2*i,"%02x", fetch_data_byte_abs(s,o+i));
+    }
+    printk("%-20s ",buf1);
+}
+
+static void print_decoded_instruction (void)
+{
+    printk("%s", M.x86.decoded_buf);
+}
+
+void x86emu_print_int_vect (u16 iv)
+{
+    u16 seg,off;
+
+    if (iv > 256) return;
+    seg   = fetch_data_word_abs(0,iv*4);
+    off   = fetch_data_word_abs(0,iv*4+2);
+    printk("%04x:%04x ", seg, off);
+}
+
+void X86EMU_dump_memory (u16 seg, u16 off, u32 amt)
+{
+    u32 start = off & 0xfffffff0;
+    u32 end  = (off+16) & 0xfffffff0;
+    u32 i;
+    u32 current;
+
+    current = start;
+    while (end <= off + amt) {
+        printk("%04x:%04x ", seg, start);
+        for (i=start; i< off; i++)
+          printk("   ");
+        for (       ; i< end; i++)
+          printk("%02x ", fetch_data_byte_abs(seg,i));
+        printk("\n");
+        start = end;
+        end = start + 16;
+    }
+}
+
+void x86emu_single_step (void)
+{
+#if 0
+    char s[1024];
+    int ps[10];
+    int ntok;
+    int cmd;
+    int done;
+        int segment;
+    int offset;
+    static int breakpoint;
+    static int noDecode = 1;
+
+    char *p;
+
+        if (DEBUG_BREAK()) {
+                if (M.x86.saved_ip != breakpoint) {
+                        return;
+                } else {
+              M.x86.debug &= ~DEBUG_DECODE_NOPRINT_F;
+                        M.x86.debug |= DEBUG_TRACE_F;
+                        M.x86.debug &= ~DEBUG_BREAK_F;
+                        print_decoded_instruction ();
+                        X86EMU_trace_regs();
+                }
+        }
+    done=0;
+    offset = M.x86.saved_ip;
+    while (!done) {
+        printk("-");
+        p = fgets(s, 1023, stdin);
+        cmd = parse_line(s, ps, &ntok);
+        switch(cmd) {
+          case 'u':
+            disassemble_forward(M.x86.saved_cs,(u16)offset,10);
+            break;
+          case 'd':
+                            if (ntok == 2) {
+                                    segment = M.x86.saved_cs;
+                                    offset = ps[1];
+                                    X86EMU_dump_memory(segment,(u16)offset,16);
+                                    offset += 16;
+                            } else if (ntok == 3) {
+                                    segment = ps[1];
+                                    offset = ps[2];
+                                    X86EMU_dump_memory(segment,(u16)offset,16);
+                                    offset += 16;
+                            } else {
+                                    segment = M.x86.saved_cs;
+                                    X86EMU_dump_memory(segment,(u16)offset,16);
+                                    offset += 16;
+                            }
+            break;
+          case 'c':
+            M.x86.debug ^= DEBUG_TRACECALL_F;
+            break;
+          case 's':
+            M.x86.debug ^= DEBUG_SVC_F | DEBUG_SYS_F | DEBUG_SYSINT_F;
+            break;
+          case 'r':
+            X86EMU_trace_regs();
+            break;
+          case 'x':
+            X86EMU_trace_xregs();
+            break;
+          case 'g':
+            if (ntok == 2) {
+                breakpoint = ps[1];
+        if (noDecode) {
+                        M.x86.debug |= DEBUG_DECODE_NOPRINT_F;
+        } else {
+                        M.x86.debug &= ~DEBUG_DECODE_NOPRINT_F;
+        }
+        M.x86.debug &= ~DEBUG_TRACE_F;
+        M.x86.debug |= DEBUG_BREAK_F;
+        done = 1;
+            }
+            break;
+          case 'q':
+          M.x86.debug |= DEBUG_EXIT;
+          return;
+      case 'P':
+          noDecode = (noDecode)?0:1;
+          printk("Toggled decoding to %s\n",(noDecode)?"FALSE":"TRUE");
+          break;
+          case 't':
+      case 0:
+            done = 1;
+            break;
+        }
+    }
+#endif
+}
+
+int X86EMU_trace_on(void)
+{
+    return M.x86.debug |= DEBUG_STEP_F | DEBUG_DECODE_F | DEBUG_TRACE_F;
+}
+
+int X86EMU_trace_off(void)
+{
+    return M.x86.debug &= ~(DEBUG_STEP_F | DEBUG_DECODE_F | DEBUG_TRACE_F);
+}
+
+static int parse_line (char *s, int *ps, int *n)
+{
+#if 0
+    int cmd;
+
+    *n = 0;
+    while(*s == ' ' || *s == '\t') s++;
+    ps[*n] = *s;
+    switch (*s) {
+      case '\n':
+        *n += 1;
+        return 0;
+      default:
+        cmd = *s;
+        *n += 1;
+    }
+
+    while (1) {
+        while (*s != ' ' && *s != '\t' && *s != '\n')  s++;
+
+        if (*s == '\n')
+            return cmd;
+
+        while(*s == ' ' || *s == '\t') s++;
+
+        sscanf(s,"%x",&ps[*n]);
+        *n += 1;
+    }
+#endif
+}
+
+#endif /* DEBUG */
+
+void x86emu_dump_regs (void)
+{
+    printk("\tAX=%04x  ", M.x86.R_AX );
+    printk("BX=%04x  ", M.x86.R_BX );
+    printk("CX=%04x  ", M.x86.R_CX );
+    printk("DX=%04x  ", M.x86.R_DX );
+    printk("SP=%04x  ", M.x86.R_SP );
+    printk("BP=%04x  ", M.x86.R_BP );
+    printk("SI=%04x  ", M.x86.R_SI );
+    printk("DI=%04x\n", M.x86.R_DI );
+    printk("\tDS=%04x  ", M.x86.R_DS );
+    printk("ES=%04x  ", M.x86.R_ES );
+    printk("SS=%04x  ", M.x86.R_SS );
+    printk("CS=%04x  ", M.x86.R_CS );
+    printk("IP=%04x   ", M.x86.R_IP );
+    if (ACCESS_FLAG(F_OF))    printk("OV ");     /* CHECKED... */
+    else                        printk("NV ");
+    if (ACCESS_FLAG(F_DF))    printk("DN ");
+    else                        printk("UP ");
+    if (ACCESS_FLAG(F_IF))    printk("EI ");
+    else                        printk("DI ");
+    if (ACCESS_FLAG(F_SF))    printk("NG ");
+    else                        printk("PL ");
+    if (ACCESS_FLAG(F_ZF))    printk("ZR ");
+    else                        printk("NZ ");
+    if (ACCESS_FLAG(F_AF))    printk("AC ");
+    else                        printk("NA ");
+    if (ACCESS_FLAG(F_PF))    printk("PE ");
+    else                        printk("PO ");
+    if (ACCESS_FLAG(F_CF))    printk("CY ");
+    else                        printk("NC ");
+    printk("\n");
+}
+
+void x86emu_dump_xregs (void)
+{
+    printk("\tEAX=%08x  ", M.x86.R_EAX );
+    printk("EBX=%08x  ", M.x86.R_EBX );
+    printk("ECX=%08x  ", M.x86.R_ECX );
+    printk("EDX=%08x  \n", M.x86.R_EDX );
+    printk("\tESP=%08x  ", M.x86.R_ESP );
+    printk("EBP=%08x  ", M.x86.R_EBP );
+    printk("ESI=%08x  ", M.x86.R_ESI );
+    printk("EDI=%08x\n", M.x86.R_EDI );
+    printk("\tDS=%04x  ", M.x86.R_DS );
+    printk("ES=%04x  ", M.x86.R_ES );
+    printk("SS=%04x  ", M.x86.R_SS );
+    printk("CS=%04x  ", M.x86.R_CS );
+    printk("EIP=%08x\n\t", M.x86.R_EIP );
+    if (ACCESS_FLAG(F_OF))    printk("OV ");     /* CHECKED... */
+    else                        printk("NV ");
+    if (ACCESS_FLAG(F_DF))    printk("DN ");
+    else                        printk("UP ");
+    if (ACCESS_FLAG(F_IF))    printk("EI ");
+    else                        printk("DI ");
+    if (ACCESS_FLAG(F_SF))    printk("NG ");
+    else                        printk("PL ");
+    if (ACCESS_FLAG(F_ZF))    printk("ZR ");
+    else                        printk("NZ ");
+    if (ACCESS_FLAG(F_AF))    printk("AC ");
+    else                        printk("NA ");
+    if (ACCESS_FLAG(F_PF))    printk("PE ");
+    else                        printk("PO ");
+    if (ACCESS_FLAG(F_CF))    printk("CY ");
+    else                        printk("NC ");
+    printk("\n");
+}
diff --git a/other-licence/x86emu/decode.c b/other-licence/x86emu/decode.c
new file mode 100644
index 0000000..e7010fe
--- /dev/null
+++ b/other-licence/x86emu/decode.c
@@ -0,0 +1,1149 @@
+/****************************************************************************
+*
+*                       Realmode X86 Emulator Library
+*
+*               Copyright (C) 1991-2004 SciTech Software, Inc.
+*                    Copyright (C) David Mosberger-Tang
+*                      Copyright (C) 1999 Egbert Eich
+*
+*  ========================================================================
+*
+*  Permission to use, copy, modify, distribute, and sell this software and
+*  its documentation for any purpose is hereby granted without fee,
+*  provided that the above copyright notice appear in all copies and that
+*  both that copyright notice and this permission notice appear in
+*  supporting documentation, and that the name of the authors not be used
+*  in advertising or publicity pertaining to distribution of the software
+*  without specific, written prior permission.  The authors makes no
+*  representations about the suitability of this software for any purpose.
+*  It is provided "as is" without express or implied warranty.
+*
+*  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+*  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+*  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+*  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+*  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+*  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+*  PERFORMANCE OF THIS SOFTWARE.
+*
+*  ========================================================================
+*
+* Language:     ANSI C
+* Environment:  Any
+* Developer:    Kendall Bennett
+*
+* Description:  This file includes subroutines which are related to
+*               instruction decoding and accessess of immediate data via IP.  etc.
+*
+****************************************************************************/
+
+#include "x86emui.h"
+
+/*----------------------------- Implementation ----------------------------*/
+
+/****************************************************************************
+REMARKS:
+Handles any pending asychronous interrupts.
+****************************************************************************/
+static void x86emu_intr_handle(void)
+{
+    u8  intno;
+
+    if (M.x86.intr & INTR_SYNCH) {
+        intno = M.x86.intno;
+        if (_X86EMU_intrTab[intno]) {
+            (*_X86EMU_intrTab[intno])(intno);
+        } else {
+            push_word((u16)M.x86.R_FLG);
+            CLEAR_FLAG(F_IF);
+            CLEAR_FLAG(F_TF);
+            push_word(M.x86.R_CS);
+            M.x86.R_CS = mem_access_word(intno * 4 + 2);
+            push_word(M.x86.R_IP);
+            M.x86.R_IP = mem_access_word(intno * 4);
+            M.x86.intr = 0;
+        }
+    }
+}
+
+/****************************************************************************
+PARAMETERS:
+intrnum - Interrupt number to raise
+
+REMARKS:
+Raise the specified interrupt to be handled before the execution of the
+next instruction.
+****************************************************************************/
+void x86emu_intr_raise(
+    u8 intrnum)
+{
+    printk("%s, rasing execption %x\n", __func__, intrnum);
+    x86emu_dump_regs();
+    M.x86.intno = intrnum;
+    M.x86.intr |= INTR_SYNCH;
+}
+
+/****************************************************************************
+REMARKS:
+Main execution loop for the emulator. We return from here when the system
+halts, which is normally caused by a stack fault when we return from the
+original real mode call.
+****************************************************************************/
+void X86EMU_exec(void)
+{
+    u8 op1;
+
+    M.x86.intr = 0;
+    DB(x86emu_end_instr();)
+
+    for (;;) {
+DB(     if (CHECK_IP_FETCH())
+            x86emu_check_ip_access();)
+        /* If debugging, save the IP and CS values. */
+        SAVE_IP_CS(M.x86.R_CS, M.x86.R_IP);
+        INC_DECODED_INST_LEN(1);
+        if (M.x86.intr) {
+            if (M.x86.intr & INTR_HALTED) {
+DB(             if (M.x86.R_SP != 0) {
+                    printk("halted\n");
+                    X86EMU_trace_regs();
+                    }
+                else {
+                    if (M.x86.debug)
+                        printk("Service completed successfully\n");
+                    })
+                return;
+            }
+            if (((M.x86.intr & INTR_SYNCH) && (M.x86.intno == 0 || M.x86.intno == 2)) ||
+                !ACCESS_FLAG(F_IF)) {
+                x86emu_intr_handle();
+            }
+        }
+        op1 = (*sys_rdb)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP++));
+        (*x86emu_optab[op1])(op1);
+        //if (M.x86.debug & DEBUG_EXIT) {
+        //    M.x86.debug &= ~DEBUG_EXIT;
+        //    return;
+        //}
+    }
+}
+
+/****************************************************************************
+REMARKS:
+Halts the system by setting the halted system flag.
+****************************************************************************/
+void X86EMU_halt_sys(void)
+{
+    M.x86.intr |= INTR_HALTED;
+}
+
+/****************************************************************************
+PARAMETERS:
+mod     - Mod value from decoded byte
+regh    - Reg h value from decoded byte
+regl    - Reg l value from decoded byte
+
+REMARKS:
+Raise the specified interrupt to be handled before the execution of the
+next instruction.
+
+NOTE: Do not inline this function, as (*sys_rdb) is already inline!
+****************************************************************************/
+void fetch_decode_modrm(
+    int *mod,
+    int *regh,
+    int *regl)
+{
+    int fetched;
+
+DB( if (CHECK_IP_FETCH())
+        x86emu_check_ip_access();)
+    fetched = (*sys_rdb)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP++));
+    INC_DECODED_INST_LEN(1);
+    *mod  = (fetched >> 6) & 0x03;
+    *regh = (fetched >> 3) & 0x07;
+    *regl = (fetched >> 0) & 0x07;
+}
+
+/****************************************************************************
+RETURNS:
+Immediate byte value read from instruction queue
+
+REMARKS:
+This function returns the immediate byte from the instruction queue, and
+moves the instruction pointer to the next value.
+
+NOTE: Do not inline this function, as (*sys_rdb) is already inline!
+****************************************************************************/
+u8 fetch_byte_imm(void)
+{
+    u8 fetched;
+
+DB( if (CHECK_IP_FETCH())
+        x86emu_check_ip_access();)
+    fetched = (*sys_rdb)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP++));
+    INC_DECODED_INST_LEN(1);
+    return fetched;
+}
+
+/****************************************************************************
+RETURNS:
+Immediate word value read from instruction queue
+
+REMARKS:
+This function returns the immediate byte from the instruction queue, and
+moves the instruction pointer to the next value.
+
+NOTE: Do not inline this function, as (*sys_rdw) is already inline!
+****************************************************************************/
+u16 fetch_word_imm(void)
+{
+    u16 fetched;
+
+DB( if (CHECK_IP_FETCH())
+        x86emu_check_ip_access();)
+    fetched = (*sys_rdw)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP));
+    M.x86.R_IP += 2;
+    INC_DECODED_INST_LEN(2);
+    return fetched;
+}
+
+/****************************************************************************
+RETURNS:
+Immediate lone value read from instruction queue
+
+REMARKS:
+This function returns the immediate byte from the instruction queue, and
+moves the instruction pointer to the next value.
+
+NOTE: Do not inline this function, as (*sys_rdw) is already inline!
+****************************************************************************/
+u32 fetch_long_imm(void)
+{
+    u32 fetched;
+
+DB( if (CHECK_IP_FETCH())
+        x86emu_check_ip_access();)
+    fetched = (*sys_rdl)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP));
+    M.x86.R_IP += 4;
+    INC_DECODED_INST_LEN(4);
+    return fetched;
+}
+
+/****************************************************************************
+RETURNS:
+Value of the default data segment
+
+REMARKS:
+Inline function that returns the default data segment for the current
+instruction.
+
+On the x86 processor, the default segment is not always DS if there is
+no segment override. Address modes such as -3[BP] or 10[BP+SI] all refer to
+addresses relative to SS (ie: on the stack). So, at the minimum, all
+decodings of addressing modes would have to set/clear a bit describing
+whether the access is relative to DS or SS.  That is the function of the
+cpu-state-varible M.x86.mode. There are several potential states:
+
+    repe prefix seen  (handled elsewhere)
+    repne prefix seen  (ditto)
+
+    cs segment override
+    ds segment override
+    es segment override
+    fs segment override
+    gs segment override
+    ss segment override
+
+    ds/ss select (in absense of override)
+
+Each of the above 7 items are handled with a bit in the mode field.
+****************************************************************************/
+_INLINE u32 get_data_segment(void)
+{
+#define GET_SEGMENT(segment)
+    switch (M.x86.mode & SYSMODE_SEGMASK) {
+      case 0:                   /* default case: use ds register */
+      case SYSMODE_SEGOVR_DS:
+      case SYSMODE_SEGOVR_DS | SYSMODE_SEG_DS_SS:
+        return  M.x86.R_DS;
+      case SYSMODE_SEG_DS_SS:   /* non-overridden, use ss register */
+        return  M.x86.R_SS;
+      case SYSMODE_SEGOVR_CS:
+      case SYSMODE_SEGOVR_CS | SYSMODE_SEG_DS_SS:
+        return  M.x86.R_CS;
+      case SYSMODE_SEGOVR_ES:
+      case SYSMODE_SEGOVR_ES | SYSMODE_SEG_DS_SS:
+        return  M.x86.R_ES;
+      case SYSMODE_SEGOVR_FS:
+      case SYSMODE_SEGOVR_FS | SYSMODE_SEG_DS_SS:
+        return  M.x86.R_FS;
+      case SYSMODE_SEGOVR_GS:
+      case SYSMODE_SEGOVR_GS | SYSMODE_SEG_DS_SS:
+        return  M.x86.R_GS;
+      case SYSMODE_SEGOVR_SS:
+      case SYSMODE_SEGOVR_SS | SYSMODE_SEG_DS_SS:
+        return  M.x86.R_SS;
+      default:
+#ifdef  DEBUG
+        printk("error: should not happen:  multiple overrides.\n");
+#endif
+        HALT_SYS();
+        return 0;
+    }
+}
+
+/****************************************************************************
+PARAMETERS:
+offset  - Offset to load data from
+
+RETURNS:
+Byte value read from the absolute memory location.
+
+NOTE: Do not inline this function as (*sys_rdX) is already inline!
+****************************************************************************/
+u8 fetch_data_byte(
+    uint offset)
+{
+#ifdef DEBUG
+    if (CHECK_DATA_ACCESS())
+        x86emu_check_data_access((u16)get_data_segment(), offset);
+#endif
+    return (*sys_rdb)((get_data_segment() << 4) + offset);
+}
+
+/****************************************************************************
+PARAMETERS:
+offset  - Offset to load data from
+
+RETURNS:
+Word value read from the absolute memory location.
+
+NOTE: Do not inline this function as (*sys_rdX) is already inline!
+****************************************************************************/
+u16 fetch_data_word(
+    uint offset)
+{
+#ifdef DEBUG
+    if (CHECK_DATA_ACCESS())
+        x86emu_check_data_access((u16)get_data_segment(), offset);
+#endif
+    return (*sys_rdw)((get_data_segment() << 4) + offset);
+}
+
+/****************************************************************************
+PARAMETERS:
+offset  - Offset to load data from
+
+RETURNS:
+Long value read from the absolute memory location.
+
+NOTE: Do not inline this function as (*sys_rdX) is already inline!
+****************************************************************************/
+u32 fetch_data_long(
+    uint offset)
+{
+#ifdef DEBUG
+    if (CHECK_DATA_ACCESS())
+        x86emu_check_data_access((u16)get_data_segment(), offset);
+#endif
+    return (*sys_rdl)((get_data_segment() << 4) + offset);
+}
+
+/****************************************************************************
+PARAMETERS:
+segment - Segment to load data from
+offset  - Offset to load data from
+
+RETURNS:
+Byte value read from the absolute memory location.
+
+NOTE: Do not inline this function as (*sys_rdX) is already inline!
+****************************************************************************/
+u8 fetch_data_byte_abs(
+    uint segment,
+    uint offset)
+{
+#ifdef DEBUG
+    if (CHECK_DATA_ACCESS())
+        x86emu_check_data_access(segment, offset);
+#endif
+    return (*sys_rdb)(((u32)segment << 4) + offset);
+}
+
+/****************************************************************************
+PARAMETERS:
+segment - Segment to load data from
+offset  - Offset to load data from
+
+RETURNS:
+Word value read from the absolute memory location.
+
+NOTE: Do not inline this function as (*sys_rdX) is already inline!
+****************************************************************************/
+u16 fetch_data_word_abs(
+    uint segment,
+    uint offset)
+{
+#ifdef DEBUG
+    if (CHECK_DATA_ACCESS())
+        x86emu_check_data_access(segment, offset);
+#endif
+    return (*sys_rdw)(((u32)segment << 4) + offset);
+}
+
+/****************************************************************************
+PARAMETERS:
+segment - Segment to load data from
+offset  - Offset to load data from
+
+RETURNS:
+Long value read from the absolute memory location.
+
+NOTE: Do not inline this function as (*sys_rdX) is already inline!
+****************************************************************************/
+u32 fetch_data_long_abs(
+    uint segment,
+    uint offset)
+{
+#ifdef DEBUG
+    if (CHECK_DATA_ACCESS())
+        x86emu_check_data_access(segment, offset);
+#endif
+    return (*sys_rdl)(((u32)segment << 4) + offset);
+}
+
+/****************************************************************************
+PARAMETERS:
+offset  - Offset to store data at
+val     - Value to store
+
+REMARKS:
+Writes a word value to an segmented memory location. The segment used is
+the current 'default' segment, which may have been overridden.
+
+NOTE: Do not inline this function as (*sys_wrX) is already inline!
+****************************************************************************/
+void store_data_byte(
+    uint offset,
+    u8 val)
+{
+#ifdef DEBUG
+    if (CHECK_DATA_ACCESS())
+        x86emu_check_data_access((u16)get_data_segment(), offset);
+#endif
+    (*sys_wrb)((get_data_segment() << 4) + offset, val);
+}
+
+/****************************************************************************
+PARAMETERS:
+offset  - Offset to store data at
+val     - Value to store
+
+REMARKS:
+Writes a word value to an segmented memory location. The segment used is
+the current 'default' segment, which may have been overridden.
+
+NOTE: Do not inline this function as (*sys_wrX) is already inline!
+****************************************************************************/
+void store_data_word(
+    uint offset,
+    u16 val)
+{
+#ifdef DEBUG
+    if (CHECK_DATA_ACCESS())
+        x86emu_check_data_access((u16)get_data_segment(), offset);
+#endif
+    (*sys_wrw)((get_data_segment() << 4) + offset, val);
+}
+
+/****************************************************************************
+PARAMETERS:
+offset  - Offset to store data at
+val     - Value to store
+
+REMARKS:
+Writes a long value to an segmented memory location. The segment used is
+the current 'default' segment, which may have been overridden.
+
+NOTE: Do not inline this function as (*sys_wrX) is already inline!
+****************************************************************************/
+void store_data_long(
+    uint offset,
+    u32 val)
+{
+#ifdef DEBUG
+    if (CHECK_DATA_ACCESS())
+        x86emu_check_data_access((u16)get_data_segment(), offset);
+#endif
+    (*sys_wrl)((get_data_segment() << 4) + offset, val);
+}
+
+/****************************************************************************
+PARAMETERS:
+segment - Segment to store data at
+offset  - Offset to store data at
+val     - Value to store
+
+REMARKS:
+Writes a byte value to an absolute memory location.
+
+NOTE: Do not inline this function as (*sys_wrX) is already inline!
+****************************************************************************/
+void store_data_byte_abs(
+    uint segment,
+    uint offset,
+    u8 val)
+{
+#ifdef DEBUG
+    if (CHECK_DATA_ACCESS())
+        x86emu_check_data_access(segment, offset);
+#endif
+    (*sys_wrb)(((u32)segment << 4) + offset, val);
+}
+
+/****************************************************************************
+PARAMETERS:
+segment - Segment to store data at
+offset  - Offset to store data at
+val     - Value to store
+
+REMARKS:
+Writes a word value to an absolute memory location.
+
+NOTE: Do not inline this function as (*sys_wrX) is already inline!
+****************************************************************************/
+void store_data_word_abs(
+    uint segment,
+    uint offset,
+    u16 val)
+{
+#ifdef DEBUG
+    if (CHECK_DATA_ACCESS())
+        x86emu_check_data_access(segment, offset);
+#endif
+    (*sys_wrw)(((u32)segment << 4) + offset, val);
+}
+
+/****************************************************************************
+PARAMETERS:
+segment - Segment to store data at
+offset  - Offset to store data at
+val     - Value to store
+
+REMARKS:
+Writes a long value to an absolute memory location.
+
+NOTE: Do not inline this function as (*sys_wrX) is already inline!
+****************************************************************************/
+void store_data_long_abs(
+    uint segment,
+    uint offset,
+    u32 val)
+{
+#ifdef DEBUG
+    if (CHECK_DATA_ACCESS())
+        x86emu_check_data_access(segment, offset);
+#endif
+    (*sys_wrl)(((u32)segment << 4) + offset, val);
+}
+
+/****************************************************************************
+PARAMETERS:
+reg - Register to decode
+
+RETURNS:
+Pointer to the appropriate register
+
+REMARKS:
+Return a pointer to the register given by the R/RM field of the
+modrm byte, for byte operands. Also enables the decoding of instructions.
+****************************************************************************/
+u8* decode_rm_byte_register(
+    int reg)
+{
+    switch (reg) {
+      case 0:
+        DECODE_PRINTF("AL");
+        return &M.x86.R_AL;
+      case 1:
+        DECODE_PRINTF("CL");
+        return &M.x86.R_CL;
+      case 2:
+        DECODE_PRINTF("DL");
+        return &M.x86.R_DL;
+      case 3:
+        DECODE_PRINTF("BL");
+        return &M.x86.R_BL;
+      case 4:
+        DECODE_PRINTF("AH");
+        return &M.x86.R_AH;
+      case 5:
+        DECODE_PRINTF("CH");
+        return &M.x86.R_CH;
+      case 6:
+        DECODE_PRINTF("DH");
+        return &M.x86.R_DH;
+      case 7:
+        DECODE_PRINTF("BH");
+        return &M.x86.R_BH;
+    }
+    HALT_SYS();
+    return NULL;                /* NOT REACHED OR REACHED ON ERROR */
+}
+
+/****************************************************************************
+PARAMETERS:
+reg - Register to decode
+
+RETURNS:
+Pointer to the appropriate register
+
+REMARKS:
+Return a pointer to the register given by the R/RM field of the
+modrm byte, for word operands.  Also enables the decoding of instructions.
+****************************************************************************/
+u16* decode_rm_word_register(
+    int reg)
+{
+    switch (reg) {
+      case 0:
+        DECODE_PRINTF("AX");
+        return &M.x86.R_AX;
+      case 1:
+        DECODE_PRINTF("CX");
+        return &M.x86.R_CX;
+      case 2:
+        DECODE_PRINTF("DX");
+        return &M.x86.R_DX;
+      case 3:
+        DECODE_PRINTF("BX");
+        return &M.x86.R_BX;
+      case 4:
+        DECODE_PRINTF("SP");
+        return &M.x86.R_SP;
+      case 5:
+        DECODE_PRINTF("BP");
+        return &M.x86.R_BP;
+      case 6:
+        DECODE_PRINTF("SI");
+        return &M.x86.R_SI;
+      case 7:
+        DECODE_PRINTF("DI");
+        return &M.x86.R_DI;
+    }
+    HALT_SYS();
+    return NULL;                /* NOTREACHED OR REACHED ON ERROR */
+}
+
+/****************************************************************************
+PARAMETERS:
+reg - Register to decode
+
+RETURNS:
+Pointer to the appropriate register
+
+REMARKS:
+Return a pointer to the register given by the R/RM field of the
+modrm byte, for dword operands.  Also enables the decoding of instructions.
+****************************************************************************/
+u32* decode_rm_long_register(
+    int reg)
+{
+    switch (reg) {
+      case 0:
+        DECODE_PRINTF("EAX");
+        return &M.x86.R_EAX;
+      case 1:
+        DECODE_PRINTF("ECX");
+        return &M.x86.R_ECX;
+      case 2:
+        DECODE_PRINTF("EDX");
+        return &M.x86.R_EDX;
+      case 3:
+        DECODE_PRINTF("EBX");
+        return &M.x86.R_EBX;
+      case 4:
+        DECODE_PRINTF("ESP");
+        return &M.x86.R_ESP;
+      case 5:
+        DECODE_PRINTF("EBP");
+        return &M.x86.R_EBP;
+      case 6:
+        DECODE_PRINTF("ESI");
+        return &M.x86.R_ESI;
+      case 7:
+        DECODE_PRINTF("EDI");
+        return &M.x86.R_EDI;
+    }
+    HALT_SYS();
+    return NULL;                /* NOTREACHED OR REACHED ON ERROR */
+}
+
+/****************************************************************************
+PARAMETERS:
+reg - Register to decode
+
+RETURNS:
+Pointer to the appropriate register
+
+REMARKS:
+Return a pointer to the register given by the R/RM field of the
+modrm byte, for word operands, modified from above for the weirdo
+special case of segreg operands.  Also enables the decoding of instructions.
+****************************************************************************/
+u16* decode_rm_seg_register(
+    int reg)
+{
+    switch (reg) {
+      case 0:
+        DECODE_PRINTF("ES");
+        return &M.x86.R_ES;
+      case 1:
+        DECODE_PRINTF("CS");
+        return &M.x86.R_CS;
+      case 2:
+        DECODE_PRINTF("SS");
+        return &M.x86.R_SS;
+      case 3:
+        DECODE_PRINTF("DS");
+        return &M.x86.R_DS;
+      case 4:
+        DECODE_PRINTF("FS");
+        return &M.x86.R_FS;
+      case 5:
+        DECODE_PRINTF("GS");
+        return &M.x86.R_GS;
+      case 6:
+      case 7:
+        DECODE_PRINTF("ILLEGAL SEGREG");
+        break;
+    }
+    HALT_SYS();
+    return NULL;                /* NOT REACHED OR REACHED ON ERROR */
+}
+
+/****************************************************************************
+PARAMETERS:
+scale - scale value of SIB byte
+index - index value of SIB byte
+
+RETURNS:
+Value of scale * index
+
+REMARKS:
+Decodes scale/index of SIB byte and returns relevant offset part of 
+effective address.
+****************************************************************************/
+unsigned decode_sib_si(
+    int scale,
+    int index)
+{
+    scale = 1 << scale;
+    if (scale > 1) {
+        DECODE_PRINTF2("[%d*", scale);
+    } else {
+        DECODE_PRINTF("[");
+    }
+    switch (index) {
+      case 0:
+        DECODE_PRINTF("EAX]");
+        return M.x86.R_EAX * index;
+      case 1:
+        DECODE_PRINTF("ECX]");
+        return M.x86.R_ECX * index;
+      case 2:
+        DECODE_PRINTF("EDX]");
+        return M.x86.R_EDX * index;
+      case 3:
+        DECODE_PRINTF("EBX]");
+        return M.x86.R_EBX * index;
+      case 4:
+        DECODE_PRINTF("0]");
+        return 0;
+      case 5:
+        DECODE_PRINTF("EBP]");
+        return M.x86.R_EBP * index;
+      case 6:
+        DECODE_PRINTF("ESI]");
+        return M.x86.R_ESI * index;
+      case 7:
+        DECODE_PRINTF("EDI]");
+        return M.x86.R_EDI * index;
+    }
+    HALT_SYS();
+    return 0;                   /* NOT REACHED OR REACHED ON ERROR */
+}
+
+/****************************************************************************
+PARAMETERS:
+mod - MOD value of preceding ModR/M byte
+
+RETURNS:
+Offset in memory for the address decoding
+
+REMARKS:
+Decodes SIB addressing byte and returns calculated effective address.
+****************************************************************************/
+unsigned decode_sib_address(
+    int mod)
+{
+    int sib   = fetch_byte_imm();
+    int ss    = (sib >> 6) & 0x03;
+    int index = (sib >> 3) & 0x07;
+    int base  = sib & 0x07;
+    int offset = 0;
+    int displacement;
+
+    switch (base) {
+      case 0:
+        DECODE_PRINTF("[EAX]");
+        offset = M.x86.R_EAX;
+        break;
+      case 1:
+        DECODE_PRINTF("[ECX]");
+        offset = M.x86.R_ECX;
+        break;
+      case 2:
+        DECODE_PRINTF("[EDX]");
+        offset = M.x86.R_EDX;
+        break;
+      case 3:
+        DECODE_PRINTF("[EBX]");
+        offset = M.x86.R_EBX;
+        break;
+      case 4:
+        DECODE_PRINTF("[ESP]");
+        offset = M.x86.R_ESP;
+        break;
+      case 5:
+        switch (mod) {
+          case 0:
+            displacement = (s32)fetch_long_imm();
+            DECODE_PRINTF2("[%d]", displacement);
+            offset = displacement;
+            break;
+          case 1:
+            displacement = (s8)fetch_byte_imm();
+            DECODE_PRINTF2("[%d][EBP]", displacement);
+            offset = M.x86.R_EBP + displacement;
+            break;
+          case 2:
+            displacement = (s32)fetch_long_imm();
+            DECODE_PRINTF2("[%d][EBP]", displacement);
+            offset = M.x86.R_EBP + displacement;
+            break;
+          default:
+            HALT_SYS();
+        }
+        DECODE_PRINTF("[EAX]");
+        offset = M.x86.R_EAX;
+        break;
+      case 6:
+        DECODE_PRINTF("[ESI]");
+        offset = M.x86.R_ESI;
+        break;
+      case 7:
+        DECODE_PRINTF("[EDI]");
+        offset = M.x86.R_EDI;
+        break;
+      default:
+        HALT_SYS();
+    }
+    offset += decode_sib_si(ss, index);
+    return offset;
+}
+
+/****************************************************************************
+PARAMETERS:
+rm  - RM value to decode
+
+RETURNS:
+Offset in memory for the address decoding
+
+REMARKS:
+Return the offset given by mod=00 addressing.  Also enables the
+decoding of instructions.
+
+NOTE:   The code which specifies the corresponding segment (ds vs ss)
+        below in the case of [BP+..].  The assumption here is that at the
+        point that this subroutine is called, the bit corresponding to
+        SYSMODE_SEG_DS_SS will be zero.  After every instruction
+        except the segment override instructions, this bit (as well
+        as any bits indicating segment overrides) will be clear.  So
+        if a SS access is needed, set this bit.  Otherwise, DS access
+        occurs (unless any of the segment override bits are set).
+****************************************************************************/
+unsigned decode_rm00_address(
+    int rm)
+{
+    unsigned offset;
+
+    if (M.x86.mode & SYSMODE_PREFIX_ADDR) {
+        /* 32-bit addressing */
+        switch (rm) {
+          case 0:
+            DECODE_PRINTF("[EAX]");
+            return M.x86.R_EAX;
+          case 1:
+            DECODE_PRINTF("[ECX]");
+            return M.x86.R_ECX;
+          case 2:
+            DECODE_PRINTF("[EDX]");
+            return M.x86.R_EDX;
+          case 3:
+            DECODE_PRINTF("[EBX]");
+            return M.x86.R_EBX;
+          case 4:
+            return decode_sib_address(0);
+          case 5:
+            offset = fetch_long_imm();
+            DECODE_PRINTF2("[%08x]", offset);
+            return offset;
+          case 6:
+            DECODE_PRINTF("[ESI]");
+            return M.x86.R_ESI;
+          case 7:
+            DECODE_PRINTF("[EDI]");
+            return M.x86.R_EDI;
+        }
+    } else {
+        /* 16-bit addressing */
+        switch (rm) {
+          case 0:
+            DECODE_PRINTF("[BX+SI]");
+            return (M.x86.R_BX + M.x86.R_SI) & 0xffff;
+          case 1:
+            DECODE_PRINTF("[BX+DI]");
+            return (M.x86.R_BX + M.x86.R_DI) & 0xffff;
+          case 2:
+            DECODE_PRINTF("[BP+SI]");
+            M.x86.mode |= SYSMODE_SEG_DS_SS;
+            return (M.x86.R_BP + M.x86.R_SI) & 0xffff;
+          case 3:
+            DECODE_PRINTF("[BP+DI]");
+            M.x86.mode |= SYSMODE_SEG_DS_SS;
+            return (M.x86.R_BP + M.x86.R_DI) & 0xffff;
+          case 4:
+            DECODE_PRINTF("[SI]");
+            return M.x86.R_SI;
+          case 5:
+            DECODE_PRINTF("[DI]");
+            return M.x86.R_DI;
+          case 6:
+            offset = fetch_word_imm();
+            DECODE_PRINTF2("[%04x]", offset);
+            return offset;
+          case 7:
+            DECODE_PRINTF("[BX]");
+            return M.x86.R_BX;
+        }
+    }
+    HALT_SYS();
+    return 0;
+}
+
+/****************************************************************************
+PARAMETERS:
+rm  - RM value to decode
+
+RETURNS:
+Offset in memory for the address decoding
+
+REMARKS:
+Return the offset given by mod=01 addressing.  Also enables the
+decoding of instructions.
+****************************************************************************/
+unsigned decode_rm01_address(
+    int rm)
+{
+    int displacement;
+
+    if (M.x86.mode & SYSMODE_PREFIX_ADDR) {
+        /* 32-bit addressing */
+        if (rm != 4)
+            displacement = (s8)fetch_byte_imm();
+        else
+            displacement = 0;
+
+        switch (rm) {
+          case 0:
+            DECODE_PRINTF2("%d[EAX]", displacement);
+            return M.x86.R_EAX + displacement;
+          case 1:
+            DECODE_PRINTF2("%d[ECX]", displacement);
+            return M.x86.R_ECX + displacement;
+          case 2:
+            DECODE_PRINTF2("%d[EDX]", displacement);
+            return M.x86.R_EDX + displacement;
+          case 3:
+            DECODE_PRINTF2("%d[EBX]", displacement);
+            return M.x86.R_EBX + displacement;
+          case 4: {
+            int offset = decode_sib_address(1);
+            displacement = (s8)fetch_byte_imm();
+            DECODE_PRINTF2("[%d]", displacement);
+            return offset + displacement;
+          }
+          case 5:
+            DECODE_PRINTF2("%d[EBP]", displacement);
+            return M.x86.R_EBP + displacement;
+          case 6:
+            DECODE_PRINTF2("%d[ESI]", displacement);
+            return M.x86.R_ESI + displacement;
+          case 7:
+            DECODE_PRINTF2("%d[EDI]", displacement);
+            return M.x86.R_EDI + displacement;
+        }
+    } else {
+        /* 16-bit addressing */
+        displacement = (s8)fetch_byte_imm();
+        switch (rm) {
+          case 0:
+            DECODE_PRINTF2("%d[BX+SI]", displacement);
+            return (M.x86.R_BX + M.x86.R_SI + displacement) & 0xffff;
+          case 1:
+            DECODE_PRINTF2("%d[BX+DI]", displacement);
+            return (M.x86.R_BX + M.x86.R_DI + displacement) & 0xffff;
+          case 2:
+            DECODE_PRINTF2("%d[BP+SI]", displacement);
+            M.x86.mode |= SYSMODE_SEG_DS_SS;
+            return (M.x86.R_BP + M.x86.R_SI + displacement) & 0xffff;
+          case 3:
+            DECODE_PRINTF2("%d[BP+DI]", displacement);
+            M.x86.mode |= SYSMODE_SEG_DS_SS;
+            return (M.x86.R_BP + M.x86.R_DI + displacement) & 0xffff;
+          case 4:
+            DECODE_PRINTF2("%d[SI]", displacement);
+            return (M.x86.R_SI + displacement) & 0xffff;
+          case 5:
+            DECODE_PRINTF2("%d[DI]", displacement);
+            return (M.x86.R_DI + displacement) & 0xffff;
+          case 6:
+            DECODE_PRINTF2("%d[BP]", displacement);
+            M.x86.mode |= SYSMODE_SEG_DS_SS;
+            return (M.x86.R_BP + displacement) & 0xffff;
+          case 7:
+            DECODE_PRINTF2("%d[BX]", displacement);
+            return (M.x86.R_BX + displacement) & 0xffff;
+        }
+    }
+    HALT_SYS();
+    return 0;                   /* SHOULD NOT HAPPEN */
+}
+
+/****************************************************************************
+PARAMETERS:
+rm  - RM value to decode
+
+RETURNS:
+Offset in memory for the address decoding
+
+REMARKS:
+Return the offset given by mod=10 addressing.  Also enables the
+decoding of instructions.
+****************************************************************************/
+unsigned decode_rm10_address(
+    int rm)
+{
+    if (M.x86.mode & SYSMODE_PREFIX_ADDR) {
+        int displacement;
+
+        /* 32-bit addressing */
+        if (rm != 4)
+            displacement = (s32)fetch_long_imm();
+        else
+            displacement = 0;
+
+        switch (rm) {
+          case 0:
+            DECODE_PRINTF2("%d[EAX]", displacement);
+            return M.x86.R_EAX + displacement;
+          case 1:
+            DECODE_PRINTF2("%d[ECX]", displacement);
+            return M.x86.R_ECX + displacement;
+          case 2:
+            DECODE_PRINTF2("%d[EDX]", displacement);
+            return M.x86.R_EDX + displacement;
+          case 3:
+            DECODE_PRINTF2("%d[EBX]", displacement);
+            return M.x86.R_EBX + displacement;
+          case 4: {
+            int offset = decode_sib_address(2);
+            displacement = (s32)fetch_long_imm();
+            DECODE_PRINTF2("[%d]", displacement);
+            return offset + displacement;
+          }
+          case 5:
+            DECODE_PRINTF2("%d[EBP]", displacement);
+            return M.x86.R_EBP + displacement;
+          case 6:
+            DECODE_PRINTF2("%d[ESI]", displacement);
+            return M.x86.R_ESI + displacement;
+          case 7:
+            DECODE_PRINTF2("%d[EDI]", displacement);
+            return M.x86.R_EDI + displacement;
+        }
+    } else {
+        int displacement = (s16)fetch_word_imm();
+
+        /* 16-bit addressing */
+        switch (rm) {
+          case 0:
+            DECODE_PRINTF2("%d[BX+SI]", displacement);
+            return (M.x86.R_BX + M.x86.R_SI + displacement) & 0xffff;
+          case 1:
+            DECODE_PRINTF2("%d[BX+DI]", displacement);
+            return (M.x86.R_BX + M.x86.R_DI + displacement) & 0xffff;
+          case 2:
+            DECODE_PRINTF2("%d[BP+SI]", displacement);
+            M.x86.mode |= SYSMODE_SEG_DS_SS;
+            return (M.x86.R_BP + M.x86.R_SI + displacement) & 0xffff;
+          case 3:
+            DECODE_PRINTF2("%d[BP+DI]", displacement);
+            M.x86.mode |= SYSMODE_SEG_DS_SS;
+            return (M.x86.R_BP + M.x86.R_DI + displacement) & 0xffff;
+          case 4:
+            DECODE_PRINTF2("%d[SI]", displacement);
+            return (M.x86.R_SI + displacement) & 0xffff;
+          case 5:
+            DECODE_PRINTF2("%d[DI]", displacement);
+            return (M.x86.R_DI + displacement) & 0xffff;
+          case 6:
+            DECODE_PRINTF2("%d[BP]", displacement);
+            M.x86.mode |= SYSMODE_SEG_DS_SS;
+            return (M.x86.R_BP + displacement) & 0xffff;
+          case 7:
+            DECODE_PRINTF2("%d[BX]", displacement);
+            return (M.x86.R_BX + displacement) & 0xffff;
+        }
+    }
+    HALT_SYS();
+    return 0;                   /* SHOULD NOT HAPPEN */
+}
+
+
+/****************************************************************************
+PARAMETERS:
+mod - modifier
+rm  - RM value to decode
+
+RETURNS:
+Offset in memory for the address decoding, multiplexing calls to
+the decode_rmXX_address functions
+
+REMARKS:
+Return the offset given by "mod" addressing.
+****************************************************************************/
+
+unsigned decode_rmXX_address(int mod, int rm)
+{
+  if(mod == 0)
+    return decode_rm00_address(rm);
+  if(mod == 1)
+    return decode_rm01_address(rm);
+  return decode_rm10_address(rm);
+}
+
+
+
diff --git a/other-licence/x86emu/fpu.c b/other-licence/x86emu/fpu.c
new file mode 100644
index 0000000..85f55c8
--- /dev/null
+++ b/other-licence/x86emu/fpu.c
@@ -0,0 +1,945 @@
+/****************************************************************************
+*
+*                       Realmode X86 Emulator Library
+*
+*               Copyright (C) 1991-2004 SciTech Software, Inc.
+*                    Copyright (C) David Mosberger-Tang
+*                      Copyright (C) 1999 Egbert Eich
+*
+*  ========================================================================
+*
+*  Permission to use, copy, modify, distribute, and sell this software and
+*  its documentation for any purpose is hereby granted without fee,
+*  provided that the above copyright notice appear in all copies and that
+*  both that copyright notice and this permission notice appear in
+*  supporting documentation, and that the name of the authors not be used
+*  in advertising or publicity pertaining to distribution of the software
+*  without specific, written prior permission.  The authors makes no
+*  representations about the suitability of this software for any purpose.
+*  It is provided "as is" without express or implied warranty.
+*
+*  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+*  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+*  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+*  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+*  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+*  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+*  PERFORMANCE OF THIS SOFTWARE.
+*
+*  ========================================================================
+*
+* Language:     ANSI C
+* Environment:  Any
+* Developer:    Kendall Bennett
+*
+* Description:  This file contains the code to implement the decoding and
+*               emulation of the FPU instructions.
+*
+****************************************************************************/
+
+#include "x86emui.h"
+
+/*----------------------------- Implementation ----------------------------*/
+
+/* opcode=0xd8 */
+void x86emuOp_esc_coprocess_d8(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("ESC D8\n");
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR_NO_TRACE();
+}
+
+#ifdef DEBUG
+
+static char *x86emu_fpu_op_d9_tab[] = {
+    "FLD\tDWORD PTR ", "ESC_D9\t", "FST\tDWORD PTR ", "FSTP\tDWORD PTR ",
+    "FLDENV\t", "FLDCW\t", "FSTENV\t", "FSTCW\t",
+
+    "FLD\tDWORD PTR ", "ESC_D9\t", "FST\tDWORD PTR ", "FSTP\tDWORD PTR ",
+    "FLDENV\t", "FLDCW\t", "FSTENV\t", "FSTCW\t",
+
+    "FLD\tDWORD PTR ", "ESC_D9\t", "FST\tDWORD PTR ", "FSTP\tDWORD PTR ",
+    "FLDENV\t", "FLDCW\t", "FSTENV\t", "FSTCW\t",
+};
+
+static char *x86emu_fpu_op_d9_tab1[] = {
+    "FLD\t", "FLD\t", "FLD\t", "FLD\t",
+    "FLD\t", "FLD\t", "FLD\t", "FLD\t",
+
+    "FXCH\t", "FXCH\t", "FXCH\t", "FXCH\t",
+    "FXCH\t", "FXCH\t", "FXCH\t", "FXCH\t",
+
+    "FNOP", "ESC_D9", "ESC_D9", "ESC_D9",
+    "ESC_D9", "ESC_D9", "ESC_D9", "ESC_D9",
+
+    "FSTP\t", "FSTP\t", "FSTP\t", "FSTP\t",
+    "FSTP\t", "FSTP\t", "FSTP\t", "FSTP\t",
+
+    "FCHS", "FABS", "ESC_D9", "ESC_D9",
+    "FTST", "FXAM", "ESC_D9", "ESC_D9",
+
+    "FLD1", "FLDL2T", "FLDL2E", "FLDPI",
+    "FLDLG2", "FLDLN2", "FLDZ", "ESC_D9",
+
+    "F2XM1", "FYL2X", "FPTAN", "FPATAN",
+    "FXTRACT", "ESC_D9", "FDECSTP", "FINCSTP",
+
+    "FPREM", "FYL2XP1", "FSQRT", "ESC_D9",
+    "FRNDINT", "FSCALE", "ESC_D9", "ESC_D9",
+};
+
+#endif /* DEBUG */
+
+/* opcode=0xd9 */
+void x86emuOp_esc_coprocess_d9(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rl, rh;
+    uint destoffset;
+    u8 stkelem;
+
+    START_OF_INSTR();
+    FETCH_DECODE_MODRM(mod, rh, rl);
+#ifdef DEBUG
+    if (mod != 3) {
+        DECODE_PRINTINSTR32(x86emu_fpu_op_d9_tab, mod, rh, rl);
+    } else {
+        DECODE_PRINTF(x86emu_fpu_op_d9_tab1[(rh << 3) + rl]);
+    }
+#endif
+    switch (mod) {
+      case 0:
+        destoffset = decode_rm00_address(rl);
+        DECODE_PRINTF("\n");
+        break;
+      case 1:
+        destoffset = decode_rm01_address(rl);
+        DECODE_PRINTF("\n");
+        break;
+      case 2:
+        destoffset = decode_rm10_address(rl);
+        DECODE_PRINTF("\n");
+        break;
+      case 3:                   /* register to register */
+        stkelem = (u8)rl;
+        if (rh < 4) {
+                DECODE_PRINTF2("ST(%d)\n", stkelem);
+        } else {
+                DECODE_PRINTF("\n");
+        }
+        break;
+    }
+#ifdef X86EMU_FPU_PRESENT
+    /* execute */
+    switch (mod) {
+      case 3:
+        switch (rh) {
+          case 0:
+            x86emu_fpu_R_fld(X86EMU_FPU_STKTOP, stkelem);
+            break;
+          case 1:
+            x86emu_fpu_R_fxch(X86EMU_FPU_STKTOP, stkelem);
+            break;
+          case 2:
+            switch (rl) {
+              case 0:
+                x86emu_fpu_R_nop();
+                break;
+              default:
+                x86emu_fpu_illegal();
+                break;
+            }
+          case 3:
+            x86emu_fpu_R_fstp(X86EMU_FPU_STKTOP, stkelem);
+            break;
+          case 4:
+            switch (rl) {
+            case 0:
+                x86emu_fpu_R_fchs(X86EMU_FPU_STKTOP);
+                break;
+            case 1:
+                x86emu_fpu_R_fabs(X86EMU_FPU_STKTOP);
+                break;
+            case 4:
+                x86emu_fpu_R_ftst(X86EMU_FPU_STKTOP);
+                break;
+            case 5:
+                x86emu_fpu_R_fxam(X86EMU_FPU_STKTOP);
+                break;
+            default:
+                /* 2,3,6,7 */
+                x86emu_fpu_illegal();
+                break;
+            }
+            break;
+
+          case 5:
+            switch (rl) {
+              case 0:
+                x86emu_fpu_R_fld1(X86EMU_FPU_STKTOP);
+                break;
+              case 1:
+                x86emu_fpu_R_fldl2t(X86EMU_FPU_STKTOP);
+                break;
+              case 2:
+                x86emu_fpu_R_fldl2e(X86EMU_FPU_STKTOP);
+                break;
+              case 3:
+                x86emu_fpu_R_fldpi(X86EMU_FPU_STKTOP);
+                break;
+              case 4:
+                x86emu_fpu_R_fldlg2(X86EMU_FPU_STKTOP);
+                break;
+              case 5:
+                x86emu_fpu_R_fldln2(X86EMU_FPU_STKTOP);
+                break;
+              case 6:
+                x86emu_fpu_R_fldz(X86EMU_FPU_STKTOP);
+                break;
+              default:
+                /* 7 */
+                x86emu_fpu_illegal();
+                break;
+            }
+            break;
+
+          case 6:
+            switch (rl) {
+              case 0:
+                x86emu_fpu_R_f2xm1(X86EMU_FPU_STKTOP);
+                break;
+              case 1:
+                x86emu_fpu_R_fyl2x(X86EMU_FPU_STKTOP);
+                break;
+              case 2:
+                x86emu_fpu_R_fptan(X86EMU_FPU_STKTOP);
+                break;
+              case 3:
+                x86emu_fpu_R_fpatan(X86EMU_FPU_STKTOP);
+                break;
+              case 4:
+                x86emu_fpu_R_fxtract(X86EMU_FPU_STKTOP);
+                break;
+              case 5:
+                x86emu_fpu_illegal();
+                break;
+              case 6:
+                x86emu_fpu_R_decstp();
+                break;
+              case 7:
+                x86emu_fpu_R_incstp();
+                break;
+            }
+            break;
+
+          case 7:
+            switch (rl) {
+              case 0:
+                x86emu_fpu_R_fprem(X86EMU_FPU_STKTOP);
+                break;
+              case 1:
+                x86emu_fpu_R_fyl2xp1(X86EMU_FPU_STKTOP);
+                break;
+              case 2:
+                x86emu_fpu_R_fsqrt(X86EMU_FPU_STKTOP);
+                break;
+              case 3:
+                x86emu_fpu_illegal();
+                break;
+              case 4:
+                x86emu_fpu_R_frndint(X86EMU_FPU_STKTOP);
+                break;
+              case 5:
+                x86emu_fpu_R_fscale(X86EMU_FPU_STKTOP);
+                break;
+              case 6:
+              case 7:
+              default:
+                x86emu_fpu_illegal();
+                break;
+            }
+            break;
+
+          default:
+            switch (rh) {
+              case 0:
+                x86emu_fpu_M_fld(X86EMU_FPU_FLOAT, destoffset);
+                break;
+              case 1:
+                x86emu_fpu_illegal();
+                break;
+              case 2:
+                x86emu_fpu_M_fst(X86EMU_FPU_FLOAT, destoffset);
+                break;
+              case 3:
+                x86emu_fpu_M_fstp(X86EMU_FPU_FLOAT, destoffset);
+                break;
+              case 4:
+                x86emu_fpu_M_fldenv(X86EMU_FPU_WORD, destoffset);
+                break;
+              case 5:
+                x86emu_fpu_M_fldcw(X86EMU_FPU_WORD, destoffset);
+                break;
+              case 6:
+                x86emu_fpu_M_fstenv(X86EMU_FPU_WORD, destoffset);
+                break;
+              case 7:
+                x86emu_fpu_M_fstcw(X86EMU_FPU_WORD, destoffset);
+                break;
+            }
+        }
+    }
+#endif /* X86EMU_FPU_PRESENT */
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR_NO_TRACE();
+}
+
+#ifdef DEBUG
+
+char *x86emu_fpu_op_da_tab[] = {
+    "FIADD\tDWORD PTR ", "FIMUL\tDWORD PTR ", "FICOM\tDWORD PTR ",
+    "FICOMP\tDWORD PTR ",
+    "FISUB\tDWORD PTR ", "FISUBR\tDWORD PTR ", "FIDIV\tDWORD PTR ",
+    "FIDIVR\tDWORD PTR ",
+
+    "FIADD\tDWORD PTR ", "FIMUL\tDWORD PTR ", "FICOM\tDWORD PTR ",
+    "FICOMP\tDWORD PTR ",
+    "FISUB\tDWORD PTR ", "FISUBR\tDWORD PTR ", "FIDIV\tDWORD PTR ",
+    "FIDIVR\tDWORD PTR ",
+
+    "FIADD\tDWORD PTR ", "FIMUL\tDWORD PTR ", "FICOM\tDWORD PTR ",
+    "FICOMP\tDWORD PTR ",
+    "FISUB\tDWORD PTR ", "FISUBR\tDWORD PTR ", "FIDIV\tDWORD PTR ",
+    "FIDIVR\tDWORD PTR ",
+
+    "ESC_DA ", "ESC_DA ", "ESC_DA ", "ESC_DA ",
+    "ESC_DA     ", "ESC_DA ", "ESC_DA   ", "ESC_DA ",
+};
+
+#endif /* DEBUG */
+
+/* opcode=0xda */
+void x86emuOp_esc_coprocess_da(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rl, rh;
+    uint destoffset;
+    u8 stkelem;
+
+    START_OF_INSTR();
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    DECODE_PRINTINSTR32(x86emu_fpu_op_da_tab, mod, rh, rl);
+    switch (mod) {
+      case 0:
+        destoffset = decode_rm00_address(rl);
+        DECODE_PRINTF("\n");
+        break;
+      case 1:
+        destoffset = decode_rm01_address(rl);
+        DECODE_PRINTF("\n");
+        break;
+      case 2:
+        destoffset = decode_rm10_address(rl);
+        DECODE_PRINTF("\n");
+        break;
+      case 3:           /* register to register */
+        stkelem = (u8)rl;
+        DECODE_PRINTF2("\tST(%d),ST\n", stkelem);
+        break;
+    }
+#ifdef X86EMU_FPU_PRESENT
+    switch (mod) {
+      case 3:
+        x86emu_fpu_illegal();
+        break;
+      default:
+        switch (rh) {
+          case 0:
+            x86emu_fpu_M_iadd(X86EMU_FPU_SHORT, destoffset);
+            break;
+          case 1:
+            x86emu_fpu_M_imul(X86EMU_FPU_SHORT, destoffset);
+            break;
+          case 2:
+            x86emu_fpu_M_icom(X86EMU_FPU_SHORT, destoffset);
+            break;
+          case 3:
+            x86emu_fpu_M_icomp(X86EMU_FPU_SHORT, destoffset);
+            break;
+          case 4:
+            x86emu_fpu_M_isub(X86EMU_FPU_SHORT, destoffset);
+            break;
+          case 5:
+            x86emu_fpu_M_isubr(X86EMU_FPU_SHORT, destoffset);
+            break;
+          case 6:
+            x86emu_fpu_M_idiv(X86EMU_FPU_SHORT, destoffset);
+            break;
+          case 7:
+            x86emu_fpu_M_idivr(X86EMU_FPU_SHORT, destoffset);
+            break;
+        }
+    }
+#endif
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR_NO_TRACE();
+}
+
+#ifdef DEBUG
+
+char *x86emu_fpu_op_db_tab[] = {
+    "FILD\tDWORD PTR ", "ESC_DB\t19", "FIST\tDWORD PTR ", "FISTP\tDWORD PTR ",
+    "ESC_DB\t1C", "FLD\tTBYTE PTR ", "ESC_DB\t1E", "FSTP\tTBYTE PTR ",
+
+    "FILD\tDWORD PTR ", "ESC_DB\t19", "FIST\tDWORD PTR ", "FISTP\tDWORD PTR ",
+    "ESC_DB\t1C", "FLD\tTBYTE PTR ", "ESC_DB\t1E", "FSTP\tTBYTE PTR ",
+
+    "FILD\tDWORD PTR ", "ESC_DB\t19", "FIST\tDWORD PTR ", "FISTP\tDWORD PTR ",
+    "ESC_DB\t1C", "FLD\tTBYTE PTR ", "ESC_DB\t1E", "FSTP\tTBYTE PTR ",
+};
+
+#endif /* DEBUG */
+
+/* opcode=0xdb */
+void x86emuOp_esc_coprocess_db(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rl, rh;
+    uint destoffset;
+
+    START_OF_INSTR();
+    FETCH_DECODE_MODRM(mod, rh, rl);
+#ifdef DEBUG
+    if (mod != 3) {
+        DECODE_PRINTINSTR32(x86emu_fpu_op_db_tab, mod, rh, rl);
+    } else if (rh == 4) {       /* === 11 10 0 nnn */
+        switch (rl) {
+          case 0:
+            DECODE_PRINTF("FENI\n");
+            break;
+          case 1:
+            DECODE_PRINTF("FDISI\n");
+            break;
+          case 2:
+            DECODE_PRINTF("FCLEX\n");
+            break;
+          case 3:
+            DECODE_PRINTF("FINIT\n");
+            break;
+        }
+    } else {
+        DECODE_PRINTF2("ESC_DB %0x\n", (mod << 6) + (rh << 3) + (rl));
+    }
+#endif /* DEBUG */
+    switch (mod) {
+      case 0:
+        destoffset = decode_rm00_address(rl);
+        break;
+      case 1:
+        destoffset = decode_rm01_address(rl);
+        break;
+      case 2:
+        destoffset = decode_rm10_address(rl);
+        break;
+      case 3:                   /* register to register */
+        break;
+    }
+#ifdef X86EMU_FPU_PRESENT
+    /* execute */
+    switch (mod) {
+      case 3:
+        switch (rh) {
+          case 4:
+            switch (rl) {
+              case 0:
+                x86emu_fpu_R_feni();
+                break;
+              case 1:
+                x86emu_fpu_R_fdisi();
+                break;
+              case 2:
+                x86emu_fpu_R_fclex();
+                break;
+              case 3:
+                x86emu_fpu_R_finit();
+                break;
+              default:
+                x86emu_fpu_illegal();
+                break;
+            }
+            break;
+          default:
+            x86emu_fpu_illegal();
+            break;
+        }
+        break;
+      default:
+        switch (rh) {
+          case 0:
+            x86emu_fpu_M_fild(X86EMU_FPU_SHORT, destoffset);
+            break;
+          case 1:
+            x86emu_fpu_illegal();
+            break;
+          case 2:
+            x86emu_fpu_M_fist(X86EMU_FPU_SHORT, destoffset);
+            break;
+          case 3:
+            x86emu_fpu_M_fistp(X86EMU_FPU_SHORT, destoffset);
+            break;
+          case 4:
+            x86emu_fpu_illegal();
+            break;
+          case 5:
+            x86emu_fpu_M_fld(X86EMU_FPU_LDBL, destoffset);
+            break;
+                      case 6:
+            x86emu_fpu_illegal();
+            break;
+          case 7:
+            x86emu_fpu_M_fstp(X86EMU_FPU_LDBL, destoffset);
+            break;
+        }
+    }
+#endif
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR_NO_TRACE();
+}
+
+#ifdef DEBUG
+char *x86emu_fpu_op_dc_tab[] = {
+    "FADD\tQWORD PTR ", "FMUL\tQWORD PTR ", "FCOM\tQWORD PTR ",
+    "FCOMP\tQWORD PTR ",
+    "FSUB\tQWORD PTR ", "FSUBR\tQWORD PTR ", "FDIV\tQWORD PTR ",
+    "FDIVR\tQWORD PTR ",
+
+    "FADD\tQWORD PTR ", "FMUL\tQWORD PTR ", "FCOM\tQWORD PTR ",
+    "FCOMP\tQWORD PTR ",
+    "FSUB\tQWORD PTR ", "FSUBR\tQWORD PTR ", "FDIV\tQWORD PTR ",
+    "FDIVR\tQWORD PTR ",
+
+    "FADD\tQWORD PTR ", "FMUL\tQWORD PTR ", "FCOM\tQWORD PTR ",
+    "FCOMP\tQWORD PTR ",
+    "FSUB\tQWORD PTR ", "FSUBR\tQWORD PTR ", "FDIV\tQWORD PTR ",
+    "FDIVR\tQWORD PTR ",
+
+    "FADD\t", "FMUL\t", "FCOM\t", "FCOMP\t",
+    "FSUBR\t", "FSUB\t", "FDIVR\t", "FDIV\t",
+};
+#endif /* DEBUG */
+
+/* opcode=0xdc */
+void x86emuOp_esc_coprocess_dc(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rl, rh;
+    uint destoffset;
+    u8 stkelem;
+
+    START_OF_INSTR();
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    DECODE_PRINTINSTR32(x86emu_fpu_op_dc_tab, mod, rh, rl);
+    switch (mod) {
+      case 0:
+        destoffset = decode_rm00_address(rl);
+        DECODE_PRINTF("\n");
+        break;
+      case 1:
+        destoffset = decode_rm01_address(rl);
+        DECODE_PRINTF("\n");
+        break;
+      case 2:
+        destoffset = decode_rm10_address(rl);
+        DECODE_PRINTF("\n");
+        break;
+      case 3:                   /* register to register */
+        stkelem = (u8)rl;
+        DECODE_PRINTF2("\tST(%d),ST\n", stkelem);
+        break;
+    }
+#ifdef X86EMU_FPU_PRESENT
+    /* execute */
+    switch (mod) {
+      case 3:
+        switch (rh) {
+          case 0:
+            x86emu_fpu_R_fadd(stkelem, X86EMU_FPU_STKTOP);
+            break;
+          case 1:
+            x86emu_fpu_R_fmul(stkelem, X86EMU_FPU_STKTOP);
+            break;
+          case 2:
+            x86emu_fpu_R_fcom(stkelem, X86EMU_FPU_STKTOP);
+            break;
+          case 3:
+            x86emu_fpu_R_fcomp(stkelem, X86EMU_FPU_STKTOP);
+            break;
+          case 4:
+            x86emu_fpu_R_fsubr(stkelem, X86EMU_FPU_STKTOP);
+            break;
+          case 5:
+            x86emu_fpu_R_fsub(stkelem, X86EMU_FPU_STKTOP);
+            break;
+          case 6:
+            x86emu_fpu_R_fdivr(stkelem, X86EMU_FPU_STKTOP);
+            break;
+          case 7:
+            x86emu_fpu_R_fdiv(stkelem, X86EMU_FPU_STKTOP);
+            break;
+        }
+        break;
+      default:
+        switch (rh) {
+          case 0:
+            x86emu_fpu_M_fadd(X86EMU_FPU_DOUBLE, destoffset);
+            break;
+          case 1:
+            x86emu_fpu_M_fmul(X86EMU_FPU_DOUBLE, destoffset);
+            break;
+          case 2:
+            x86emu_fpu_M_fcom(X86EMU_FPU_DOUBLE, destoffset);
+            break;
+          case 3:
+            x86emu_fpu_M_fcomp(X86EMU_FPU_DOUBLE, destoffset);
+            break;
+          case 4:
+            x86emu_fpu_M_fsub(X86EMU_FPU_DOUBLE, destoffset);
+            break;
+          case 5:
+            x86emu_fpu_M_fsubr(X86EMU_FPU_DOUBLE, destoffset);
+            break;
+          case 6:
+            x86emu_fpu_M_fdiv(X86EMU_FPU_DOUBLE, destoffset);
+            break;
+          case 7:
+            x86emu_fpu_M_fdivr(X86EMU_FPU_DOUBLE, destoffset);
+            break;
+        }
+    }
+#endif
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR_NO_TRACE();
+}
+
+#ifdef DEBUG
+
+static char *x86emu_fpu_op_dd_tab[] = {
+    "FLD\tQWORD PTR ", "ESC_DD\t29,", "FST\tQWORD PTR ", "FSTP\tQWORD PTR ",
+    "FRSTOR\t", "ESC_DD\t2D,", "FSAVE\t", "FSTSW\t",
+
+    "FLD\tQWORD PTR ", "ESC_DD\t29,", "FST\tQWORD PTR ", "FSTP\tQWORD PTR ",
+    "FRSTOR\t", "ESC_DD\t2D,", "FSAVE\t", "FSTSW\t",
+
+    "FLD\tQWORD PTR ", "ESC_DD\t29,", "FST\tQWORD PTR ", "FSTP\tQWORD PTR ",
+    "FRSTOR\t", "ESC_DD\t2D,", "FSAVE\t", "FSTSW\t",
+
+    "FFREE\t", "FXCH\t", "FST\t", "FSTP\t",
+    "ESC_DD\t2C,", "ESC_DD\t2D,", "ESC_DD\t2E,", "ESC_DD\t2F,",
+};
+
+#endif /* DEBUG */
+
+/* opcode=0xdd */
+void x86emuOp_esc_coprocess_dd(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rl, rh;
+    uint destoffset;
+    u8 stkelem;
+
+    START_OF_INSTR();
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    DECODE_PRINTINSTR32(x86emu_fpu_op_dd_tab, mod, rh, rl);
+    switch (mod) {
+      case 0:
+        destoffset = decode_rm00_address(rl);
+        DECODE_PRINTF("\n");
+        break;
+      case 1:
+        destoffset = decode_rm01_address(rl);
+        DECODE_PRINTF("\n");
+        break;
+      case 2:
+        destoffset = decode_rm10_address(rl);
+        DECODE_PRINTF("\n");
+        break;
+      case 3:                   /* register to register */
+        stkelem = (u8)rl;
+        DECODE_PRINTF2("\tST(%d),ST\n", stkelem);
+        break;
+    }
+#ifdef X86EMU_FPU_PRESENT
+    switch (mod) {
+      case 3:
+        switch (rh) {
+          case 0:
+            x86emu_fpu_R_ffree(stkelem);
+            break;
+          case 1:
+            x86emu_fpu_R_fxch(stkelem);
+            break;
+          case 2:
+            x86emu_fpu_R_fst(stkelem);  /* register version */
+            break;
+          case 3:
+            x86emu_fpu_R_fstp(stkelem); /* register version */
+            break;
+          default:
+            x86emu_fpu_illegal();
+            break;
+        }
+        break;
+      default:
+        switch (rh) {
+          case 0:
+            x86emu_fpu_M_fld(X86EMU_FPU_DOUBLE, destoffset);
+            break;
+          case 1:
+            x86emu_fpu_illegal();
+            break;
+          case 2:
+            x86emu_fpu_M_fst(X86EMU_FPU_DOUBLE, destoffset);
+            break;
+          case 3:
+            x86emu_fpu_M_fstp(X86EMU_FPU_DOUBLE, destoffset);
+            break;
+          case 4:
+            x86emu_fpu_M_frstor(X86EMU_FPU_WORD, destoffset);
+            break;
+          case 5:
+            x86emu_fpu_illegal();
+            break;
+          case 6:
+            x86emu_fpu_M_fsave(X86EMU_FPU_WORD, destoffset);
+            break;
+          case 7:
+            x86emu_fpu_M_fstsw(X86EMU_FPU_WORD, destoffset);
+            break;
+        }
+    }
+#endif
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR_NO_TRACE();
+}
+
+#ifdef DEBUG
+
+static char *x86emu_fpu_op_de_tab[] =
+{
+    "FIADD\tWORD PTR ", "FIMUL\tWORD PTR ", "FICOM\tWORD PTR ",
+    "FICOMP\tWORD PTR ",
+    "FISUB\tWORD PTR ", "FISUBR\tWORD PTR ", "FIDIV\tWORD PTR ",
+    "FIDIVR\tWORD PTR ",
+
+    "FIADD\tWORD PTR ", "FIMUL\tWORD PTR ", "FICOM\tWORD PTR ",
+    "FICOMP\tWORD PTR ",
+    "FISUB\tWORD PTR ", "FISUBR\tWORD PTR ", "FIDIV\tWORD PTR ",
+    "FIDIVR\tWORD PTR ",
+
+    "FIADD\tWORD PTR ", "FIMUL\tWORD PTR ", "FICOM\tWORD PTR ",
+    "FICOMP\tWORD PTR ",
+    "FISUB\tWORD PTR ", "FISUBR\tWORD PTR ", "FIDIV\tWORD PTR ",
+    "FIDIVR\tWORD PTR ",
+
+    "FADDP\t", "FMULP\t", "FCOMP\t", "FCOMPP\t",
+    "FSUBRP\t", "FSUBP\t", "FDIVRP\t", "FDIVP\t",
+};
+
+#endif /* DEBUG */
+
+/* opcode=0xde */
+void x86emuOp_esc_coprocess_de(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rl, rh;
+    uint destoffset;
+    u8 stkelem;
+
+    START_OF_INSTR();
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    DECODE_PRINTINSTR32(x86emu_fpu_op_de_tab, mod, rh, rl);
+    switch (mod) {
+      case 0:
+        destoffset = decode_rm00_address(rl);
+        DECODE_PRINTF("\n");
+        break;
+      case 1:
+        destoffset = decode_rm01_address(rl);
+        DECODE_PRINTF("\n");
+        break;
+      case 2:
+        destoffset = decode_rm10_address(rl);
+        DECODE_PRINTF("\n");
+        break;
+      case 3:                   /* register to register */
+        stkelem = (u8)rl;
+        DECODE_PRINTF2("\tST(%d),ST\n", stkelem);
+        break;
+    }
+#ifdef X86EMU_FPU_PRESENT
+    switch (mod) {
+      case 3:
+        switch (rh) {
+          case 0:
+            x86emu_fpu_R_faddp(stkelem, X86EMU_FPU_STKTOP);
+            break;
+          case 1:
+            x86emu_fpu_R_fmulp(stkelem, X86EMU_FPU_STKTOP);
+            break;
+          case 2:
+            x86emu_fpu_R_fcomp(stkelem, X86EMU_FPU_STKTOP);
+            break;
+          case 3:
+            if (stkelem == 1)
+              x86emu_fpu_R_fcompp(stkelem, X86EMU_FPU_STKTOP);
+            else
+              x86emu_fpu_illegal();
+            break;
+          case 4:
+            x86emu_fpu_R_fsubrp(stkelem, X86EMU_FPU_STKTOP);
+            break;
+          case 5:
+            x86emu_fpu_R_fsubp(stkelem, X86EMU_FPU_STKTOP);
+            break;
+          case 6:
+            x86emu_fpu_R_fdivrp(stkelem, X86EMU_FPU_STKTOP);
+            break;
+          case 7:
+            x86emu_fpu_R_fdivp(stkelem, X86EMU_FPU_STKTOP);
+            break;
+        }
+        break;
+      default:
+        switch (rh) {
+          case 0:
+            x86emu_fpu_M_fiadd(X86EMU_FPU_WORD, destoffset);
+            break;
+          case 1:
+            x86emu_fpu_M_fimul(X86EMU_FPU_WORD, destoffset);
+            break;
+          case 2:
+            x86emu_fpu_M_ficom(X86EMU_FPU_WORD, destoffset);
+            break;
+          case 3:
+            x86emu_fpu_M_ficomp(X86EMU_FPU_WORD, destoffset);
+            break;
+          case 4:
+            x86emu_fpu_M_fisub(X86EMU_FPU_WORD, destoffset);
+            break;
+          case 5:
+            x86emu_fpu_M_fisubr(X86EMU_FPU_WORD, destoffset);
+            break;
+          case 6:
+            x86emu_fpu_M_fidiv(X86EMU_FPU_WORD, destoffset);
+            break;
+          case 7:
+            x86emu_fpu_M_fidivr(X86EMU_FPU_WORD, destoffset);
+            break;
+        }
+    }
+#endif
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR_NO_TRACE();
+}
+
+#ifdef DEBUG
+
+static char *x86emu_fpu_op_df_tab[] = {
+    /* mod == 00 */
+    "FILD\tWORD PTR ", "ESC_DF\t39\n", "FIST\tWORD PTR ", "FISTP\tWORD PTR ",
+    "FBLD\tTBYTE PTR ", "FILD\tQWORD PTR ", "FBSTP\tTBYTE PTR ",
+    "FISTP\tQWORD PTR ",
+
+    /* mod == 01 */
+    "FILD\tWORD PTR ", "ESC_DF\t39 ", "FIST\tWORD PTR ", "FISTP\tWORD PTR ",
+    "FBLD\tTBYTE PTR ", "FILD\tQWORD PTR ", "FBSTP\tTBYTE PTR ",
+    "FISTP\tQWORD PTR ",
+
+    /* mod == 10 */
+    "FILD\tWORD PTR ", "ESC_DF\t39 ", "FIST\tWORD PTR ", "FISTP\tWORD PTR ",
+    "FBLD\tTBYTE PTR ", "FILD\tQWORD PTR ", "FBSTP\tTBYTE PTR ",
+    "FISTP\tQWORD PTR ",
+
+    /* mod == 11 */
+    "FFREE\t", "FXCH\t", "FST\t", "FSTP\t",
+    "ESC_DF\t3C,", "ESC_DF\t3D,", "ESC_DF\t3E,", "ESC_DF\t3F,"
+};
+
+#endif /* DEBUG */
+
+/* opcode=0xdf */
+void x86emuOp_esc_coprocess_df(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rl, rh;
+    uint destoffset;
+    u8 stkelem;
+
+    START_OF_INSTR();
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    DECODE_PRINTINSTR32(x86emu_fpu_op_df_tab, mod, rh, rl);
+    switch (mod) {
+      case 0:
+        destoffset = decode_rm00_address(rl);
+        DECODE_PRINTF("\n");
+        break;
+      case 1:
+        destoffset = decode_rm01_address(rl);
+        DECODE_PRINTF("\n");
+        break;
+      case 2:
+        destoffset = decode_rm10_address(rl);
+        DECODE_PRINTF("\n");
+        break;
+      case 3:                   /* register to register */
+        stkelem = (u8)rl;
+        DECODE_PRINTF2("\tST(%d)\n", stkelem);
+        break;
+    }
+#ifdef X86EMU_FPU_PRESENT
+    switch (mod) {
+      case 3:
+        switch (rh) {
+          case 0:
+            x86emu_fpu_R_ffree(stkelem);
+            break;
+          case 1:
+            x86emu_fpu_R_fxch(stkelem);
+            break;
+          case 2:
+            x86emu_fpu_R_fst(stkelem);  /* register version */
+            break;
+          case 3:
+            x86emu_fpu_R_fstp(stkelem); /* register version */
+            break;
+          default:
+            x86emu_fpu_illegal();
+            break;
+        }
+        break;
+      default:
+        switch (rh) {
+          case 0:
+            x86emu_fpu_M_fild(X86EMU_FPU_WORD, destoffset);
+            break;
+          case 1:
+            x86emu_fpu_illegal();
+            break;
+          case 2:
+            x86emu_fpu_M_fist(X86EMU_FPU_WORD, destoffset);
+            break;
+          case 3:
+            x86emu_fpu_M_fistp(X86EMU_FPU_WORD, destoffset);
+            break;
+          case 4:
+            x86emu_fpu_M_fbld(X86EMU_FPU_BSD, destoffset);
+            break;
+          case 5:
+            x86emu_fpu_M_fild(X86EMU_FPU_LONG, destoffset);
+            break;
+          case 6:
+            x86emu_fpu_M_fbstp(X86EMU_FPU_BSD, destoffset);
+            break;
+          case 7:
+            x86emu_fpu_M_fistp(X86EMU_FPU_LONG, destoffset);
+            break;
+        }
+    }
+#endif
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR_NO_TRACE();
+}
diff --git a/other-licence/x86emu/include/x86emu/debug.h b/other-licence/x86emu/include/x86emu/debug.h
new file mode 100644
index 0000000..1f172b1
--- /dev/null
+++ b/other-licence/x86emu/include/x86emu/debug.h
@@ -0,0 +1,221 @@
+/****************************************************************************
+*
+*						Realmode X86 Emulator Library
+*
+*            	Copyright (C) 1996-1999 SciTech Software, Inc.
+* 				     Copyright (C) David Mosberger-Tang
+* 					   Copyright (C) 1999 Egbert Eich
+*
+*  ========================================================================
+*
+*  Permission to use, copy, modify, distribute, and sell this software and
+*  its documentation for any purpose is hereby granted without fee,
+*  provided that the above copyright notice appear in all copies and that
+*  both that copyright notice and this permission notice appear in
+*  supporting documentation, and that the name of the authors not be used
+*  in advertising or publicity pertaining to distribution of the software
+*  without specific, written prior permission.  The authors makes no
+*  representations about the suitability of this software for any purpose.
+*  It is provided "as is" without express or implied warranty.
+*
+*  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+*  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+*  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+*  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+*  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+*  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+*  PERFORMANCE OF THIS SOFTWARE.
+*
+*  ========================================================================
+*
+* Language:		ANSI C
+* Environment:	Any
+* Developer:    Kendall Bennett
+*
+* Description:  Header file for debug definitions.
+*
+****************************************************************************/
+/* $XFree86: xc/extras/x86emu/src/x86emu/x86emu/debug.h,v 1.4 2000/11/21 23:10:27 tsi Exp $ */
+
+#ifndef __X86EMU_DEBUG_H
+#define __X86EMU_DEBUG_H
+
+/*---------------------- Macros and type definitions ----------------------*/
+
+/* checks to be enabled for "runtime" */
+
+#define CHECK_IP_FETCH_F                0x1
+#define CHECK_SP_ACCESS_F               0x2
+#define CHECK_MEM_ACCESS_F              0x4 /*using regular linear pointer */
+#define CHECK_DATA_ACCESS_F             0x8 /*using segment:offset*/
+
+#ifdef DEBUG
+# define CHECK_IP_FETCH()              	(M.x86.check & CHECK_IP_FETCH_F)
+# define CHECK_SP_ACCESS()             	(M.x86.check & CHECK_SP_ACCESS_F)
+# define CHECK_MEM_ACCESS()            	(M.x86.check & CHECK_MEM_ACCESS_F)
+# define CHECK_DATA_ACCESS()           	(M.x86.check & CHECK_DATA_ACCESS_F)
+#else
+# define CHECK_IP_FETCH()
+# define CHECK_SP_ACCESS()
+# define CHECK_MEM_ACCESS()
+# define CHECK_DATA_ACCESS()
+#endif
+
+#ifdef DEBUG
+# define DEBUG_INSTRUMENT()    	(M.x86.debug & DEBUG_INSTRUMENT_F)
+# define DEBUG_DECODE()        	(M.x86.debug & DEBUG_DECODE_F)
+# define DEBUG_TRACE()         	(M.x86.debug & DEBUG_TRACE_F)
+# define DEBUG_STEP()          	(M.x86.debug & DEBUG_STEP_F)
+# define DEBUG_DISASSEMBLE()   	(M.x86.debug & DEBUG_DISASSEMBLE_F)
+# define DEBUG_BREAK()         	(M.x86.debug & DEBUG_BREAK_F)
+# define DEBUG_SVC()           	(M.x86.debug & DEBUG_SVC_F)
+# define DEBUG_SAVE_IP_CS()     (M.x86.debug & DEBUG_SAVE_IP_CS_F)
+
+# define DEBUG_FS()            	(M.x86.debug & DEBUG_FS_F)
+# define DEBUG_PROC()          	(M.x86.debug & DEBUG_PROC_F)
+# define DEBUG_SYSINT()        	(M.x86.debug & DEBUG_SYSINT_F)
+# define DEBUG_TRACECALL()     	(M.x86.debug & DEBUG_TRACECALL_F)
+# define DEBUG_TRACECALLREGS() 	(M.x86.debug & DEBUG_TRACECALL_REGS_F)
+# define DEBUG_TRACEJMP()       (M.x86.debug & DEBUG_TRACEJMP_F)
+# define DEBUG_TRACEJMPREGS()   (M.x86.debug & DEBUG_TRACEJMP_REGS_F)
+# define DEBUG_SYS()           	(M.x86.debug & DEBUG_SYS_F)
+# define DEBUG_MEM_TRACE()     	(M.x86.debug & DEBUG_MEM_TRACE_F)
+# define DEBUG_IO_TRACE()      	(M.x86.debug & DEBUG_IO_TRACE_F)
+# define DEBUG_DECODE_NOPRINT() (M.x86.debug & DEBUG_DECODE_NOPRINT_F)
+#else
+# define DEBUG_INSTRUMENT()    	0
+# define DEBUG_DECODE()        	0
+# define DEBUG_TRACE()         	0
+# define DEBUG_STEP()          	0
+# define DEBUG_DISASSEMBLE()   	0
+# define DEBUG_BREAK()         	0
+# define DEBUG_SVC()           	0
+# define DEBUG_SAVE_IP_CS()     0
+# define DEBUG_FS()            	0
+# define DEBUG_PROC()          	0
+# define DEBUG_SYSINT()        	0
+# define DEBUG_TRACECALL()     	0
+# define DEBUG_TRACECALLREGS() 	0
+# define DEBUG_TRACEJMP()       0
+# define DEBUG_TRACEJMPREGS()   0
+# define DEBUG_SYS()           	0
+# define DEBUG_MEM_TRACE()     	0
+# define DEBUG_IO_TRACE()      	0
+# define DEBUG_DECODE_NOPRINT() 0
+#endif
+
+#ifdef DEBUG
+
+# define DECODE_PRINTF(x)     	if (DEBUG_DECODE()) \
+									x86emu_decode_printf(x)
+# define DECODE_PRINTF2(x,y)  	if (DEBUG_DECODE()) \
+									x86emu_decode_printf2(x,y)
+
+/*
+ * The following allow us to look at the bytes of an instruction.  The
+ * first INCR_INSTRN_LEN, is called everytime bytes are consumed in
+ * the decoding process.  The SAVE_IP_CS is called initially when the
+ * major opcode of the instruction is accessed.
+ */
+#define INC_DECODED_INST_LEN(x)                    	\
+	if (DEBUG_DECODE())  	                       	\
+		x86emu_inc_decoded_inst_len(x)
+
+#define SAVE_IP_CS(x,y)                               			\
+	if (DEBUG_DECODE() | DEBUG_TRACECALL() | DEBUG_BREAK() \
+              | DEBUG_IO_TRACE() | DEBUG_SAVE_IP_CS()) { \
+		M.x86.saved_cs = x;                          			\
+		M.x86.saved_ip = y;                          			\
+	}
+#else
+# define INC_DECODED_INST_LEN(x)
+# define DECODE_PRINTF(x)
+# define DECODE_PRINTF2(x,y)
+# define SAVE_IP_CS(x,y)
+#endif
+
+#ifdef DEBUG
+#define TRACE_REGS()                                   		\
+	if (DEBUG_DISASSEMBLE()) {                         		\
+		x86emu_just_disassemble();                        	\
+		goto EndOfTheInstructionProcedure;             		\
+	}                                                   	\
+	if (DEBUG_TRACE() || DEBUG_DECODE()) X86EMU_trace_regs()
+#else
+# define TRACE_REGS()
+#endif
+
+#ifdef DEBUG
+# define SINGLE_STEP()		if (DEBUG_STEP()) x86emu_single_step()
+#else
+# define SINGLE_STEP()
+#endif
+
+#define TRACE_AND_STEP()	\
+	TRACE_REGS();			\
+	SINGLE_STEP()
+
+#ifdef DEBUG
+# define START_OF_INSTR()
+# define END_OF_INSTR()		EndOfTheInstructionProcedure: x86emu_end_instr();
+# define END_OF_INSTR_NO_TRACE()	x86emu_end_instr();
+#else
+# define START_OF_INSTR()
+# define END_OF_INSTR()
+# define END_OF_INSTR_NO_TRACE()
+#endif
+
+#ifdef DEBUG
+# define  CALL_TRACE(u,v,w,x,s)                                 \
+	if (DEBUG_TRACECALLREGS())									\
+		x86emu_dump_regs();                                     \
+	if (DEBUG_TRACECALL())                                     	\
+		printk("%04x:%04x: CALL %s%04x:%04x\n", u , v, s, w, x);
+# define RETURN_TRACE(n,u,v)                                    \
+	if (DEBUG_TRACECALLREGS())									\
+		x86emu_dump_regs();                                     \
+	if (DEBUG_TRACECALL())                                     	\
+		printk("%04x:%04x: %s\n",u,v,n);
+# define  JMP_TRACE(u,v,w,x,s)                                 \
+   if (DEBUG_TRACEJMPREGS()) \
+      x86emu_dump_regs(); \
+   if (DEBUG_TRACEJMP()) \
+      printk("%04x:%04x: JMP %s%04x:%04x\n", u , v, s, w, x);
+#else
+# define CALL_TRACE(u,v,w,x,s)
+# define RETURN_TRACE(n,u,v)
+# define  JMP_TRACE(u,v,w,x,s)
+#endif
+
+#ifdef DEBUG
+#define	DB(x)	x
+#else
+#define	DB(x)
+#endif
+
+/*-------------------------- Function Prototypes --------------------------*/
+
+#ifdef  __cplusplus
+extern "C" {            			/* Use "C" linkage when in C++ mode */
+#endif
+
+extern void x86emu_inc_decoded_inst_len (int x);
+extern void x86emu_decode_printf (char *x);
+extern void x86emu_decode_printf2 (char *x, int y);
+extern void x86emu_just_disassemble (void);
+extern void x86emu_single_step (void);
+extern void x86emu_end_instr (void);
+extern void x86emu_dump_regs (void);
+extern void x86emu_dump_xregs (void);
+extern void x86emu_print_int_vect (u16 iv);
+extern void x86emu_instrument_instruction (void);
+extern void x86emu_check_ip_access (void);
+extern void x86emu_check_sp_access (void);
+extern void x86emu_check_mem_access (u32 p);
+extern void x86emu_check_data_access (uint s, uint o);
+
+#ifdef  __cplusplus
+}                       			/* End of "C" linkage for C++   	*/
+#endif
+
+#endif /* __X86EMU_DEBUG_H */
diff --git a/other-licence/x86emu/include/x86emu/decode.h b/other-licence/x86emu/include/x86emu/decode.h
new file mode 100644
index 0000000..99ed7f6
--- /dev/null
+++ b/other-licence/x86emu/include/x86emu/decode.h
@@ -0,0 +1,88 @@
+/****************************************************************************
+*
+*						Realmode X86 Emulator Library
+*
+*            	Copyright (C) 1996-1999 SciTech Software, Inc.
+* 				     Copyright (C) David Mosberger-Tang
+* 					   Copyright (C) 1999 Egbert Eich
+*
+*  ========================================================================
+*
+*  Permission to use, copy, modify, distribute, and sell this software and
+*  its documentation for any purpose is hereby granted without fee,
+*  provided that the above copyright notice appear in all copies and that
+*  both that copyright notice and this permission notice appear in
+*  supporting documentation, and that the name of the authors not be used
+*  in advertising or publicity pertaining to distribution of the software
+*  without specific, written prior permission.  The authors makes no
+*  representations about the suitability of this software for any purpose.
+*  It is provided "as is" without express or implied warranty.
+*
+*  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+*  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+*  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+*  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+*  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+*  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+*  PERFORMANCE OF THIS SOFTWARE.
+*
+*  ========================================================================
+*
+* Language:		ANSI C
+* Environment:	Any
+* Developer:    Kendall Bennett
+*
+* Description:  Header file for instruction decoding logic.
+*
+****************************************************************************/
+
+#ifndef __X86EMU_DECODE_H
+#define __X86EMU_DECODE_H
+
+/*---------------------- Macros and type definitions ----------------------*/
+
+/* Instruction Decoding Stuff */
+
+#define FETCH_DECODE_MODRM(mod,rh,rl) 	fetch_decode_modrm(&mod,&rh,&rl)
+#define DECODE_RM_BYTE_REGISTER(r)    	decode_rm_byte_register(r)
+#define DECODE_RM_WORD_REGISTER(r)    	decode_rm_word_register(r)
+#define DECODE_RM_LONG_REGISTER(r)    	decode_rm_long_register(r)
+#define DECODE_CLEAR_SEGOVR()         	M.x86.mode &= ~SYSMODE_CLRMASK
+
+/*-------------------------- Function Prototypes --------------------------*/
+
+#ifdef  __cplusplus
+extern "C" {            			/* Use "C" linkage when in C++ mode */
+#endif
+
+void 	x86emu_intr_raise (u8 type);
+void    fetch_decode_modrm (int *mod,int *regh,int *regl);
+u8      fetch_byte_imm (void);
+u16     fetch_word_imm (void);
+u32     fetch_long_imm (void);
+u8      fetch_data_byte (uint offset);
+u8      fetch_data_byte_abs (uint segment, uint offset);
+u16     fetch_data_word (uint offset);
+u16     fetch_data_word_abs (uint segment, uint offset);
+u32     fetch_data_long (uint offset);
+u32     fetch_data_long_abs (uint segment, uint offset);
+void    store_data_byte (uint offset, u8 val);
+void    store_data_byte_abs (uint segment, uint offset, u8 val);
+void    store_data_word (uint offset, u16 val);
+void    store_data_word_abs (uint segment, uint offset, u16 val);
+void    store_data_long (uint offset, u32 val);
+void    store_data_long_abs (uint segment, uint offset, u32 val);
+u8* 	decode_rm_byte_register(int reg);
+u16* 	decode_rm_word_register(int reg);
+u32* 	decode_rm_long_register(int reg);
+u16* 	decode_rm_seg_register(int reg);
+unsigned decode_rm00_address(int rm);
+unsigned decode_rm01_address(int rm);
+unsigned decode_rm10_address(int rm);
+unsigned decode_rmXX_address(int mod, int rm);
+
+#ifdef  __cplusplus
+}                       			/* End of "C" linkage for C++   	*/
+#endif
+
+#endif /* __X86EMU_DECODE_H */
diff --git a/other-licence/x86emu/include/x86emu/fpu.h b/other-licence/x86emu/include/x86emu/fpu.h
new file mode 100644
index 0000000..5fb2714
--- /dev/null
+++ b/other-licence/x86emu/include/x86emu/fpu.h
@@ -0,0 +1,61 @@
+/****************************************************************************
+*
+*						Realmode X86 Emulator Library
+*
+*            	Copyright (C) 1996-1999 SciTech Software, Inc.
+* 				     Copyright (C) David Mosberger-Tang
+* 					   Copyright (C) 1999 Egbert Eich
+*
+*  ========================================================================
+*
+*  Permission to use, copy, modify, distribute, and sell this software and
+*  its documentation for any purpose is hereby granted without fee,
+*  provided that the above copyright notice appear in all copies and that
+*  both that copyright notice and this permission notice appear in
+*  supporting documentation, and that the name of the authors not be used
+*  in advertising or publicity pertaining to distribution of the software
+*  without specific, written prior permission.  The authors makes no
+*  representations about the suitability of this software for any purpose.
+*  It is provided "as is" without express or implied warranty.
+*
+*  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+*  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+*  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+*  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+*  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+*  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+*  PERFORMANCE OF THIS SOFTWARE.
+*
+*  ========================================================================
+*
+* Language:		ANSI C
+* Environment:	Any
+* Developer:    Kendall Bennett
+*
+* Description:  Header file for FPU instruction decoding.
+*
+****************************************************************************/
+
+#ifndef __X86EMU_FPU_H
+#define __X86EMU_FPU_H
+
+#ifdef  __cplusplus
+extern "C" {            			/* Use "C" linkage when in C++ mode */
+#endif
+
+/* these have to be defined, whether 8087 support compiled in or not. */
+
+extern void x86emuOp_esc_coprocess_d8 (u8 op1);
+extern void x86emuOp_esc_coprocess_d9 (u8 op1);
+extern void x86emuOp_esc_coprocess_da (u8 op1);
+extern void x86emuOp_esc_coprocess_db (u8 op1);
+extern void x86emuOp_esc_coprocess_dc (u8 op1);
+extern void x86emuOp_esc_coprocess_dd (u8 op1);
+extern void x86emuOp_esc_coprocess_de (u8 op1);
+extern void x86emuOp_esc_coprocess_df (u8 op1);
+
+#ifdef  __cplusplus
+}                       			/* End of "C" linkage for C++   	*/
+#endif
+
+#endif /* __X86EMU_FPU_H */
diff --git a/other-licence/x86emu/include/x86emu/fpu_regs.h b/other-licence/x86emu/include/x86emu/fpu_regs.h
new file mode 100644
index 0000000..56e9a04
--- /dev/null
+++ b/other-licence/x86emu/include/x86emu/fpu_regs.h
@@ -0,0 +1,115 @@
+/****************************************************************************
+*
+*						Realmode X86 Emulator Library
+*
+*            	Copyright (C) 1996-1999 SciTech Software, Inc.
+* 				     Copyright (C) David Mosberger-Tang
+* 					   Copyright (C) 1999 Egbert Eich
+*
+*  ========================================================================
+*
+*  Permission to use, copy, modify, distribute, and sell this software and
+*  its documentation for any purpose is hereby granted without fee,
+*  provided that the above copyright notice appear in all copies and that
+*  both that copyright notice and this permission notice appear in
+*  supporting documentation, and that the name of the authors not be used
+*  in advertising or publicity pertaining to distribution of the software
+*  without specific, written prior permission.  The authors makes no
+*  representations about the suitability of this software for any purpose.
+*  It is provided "as is" without express or implied warranty.
+*
+*  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+*  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+*  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+*  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+*  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+*  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+*  PERFORMANCE OF THIS SOFTWARE.
+*
+*  ========================================================================
+*
+* Language:		ANSI C
+* Environment:	Any
+* Developer:    Kendall Bennett
+*
+* Description:  Header file for FPU register definitions.
+*
+****************************************************************************/
+
+#ifndef __X86EMU_FPU_REGS_H
+#define __X86EMU_FPU_REGS_H
+
+#ifdef X86_FPU_SUPPORT
+
+#pragma	pack(1)
+
+/* Basic 8087 register can hold any of the following values: */
+
+union x86_fpu_reg_u {
+    s8                  tenbytes[10];
+    double              dval;
+    float               fval;
+    s16                 sval;
+    s32                 lval;
+	};
+
+struct x86_fpu_reg {
+	union x86_fpu_reg_u reg;
+	char                tag;
+	};
+
+/*
+ * Since we are not going to worry about the problems of aliasing
+ * registers, every time a register is modified, its result type is
+ * set in the tag fields for that register.  If some operation
+ * attempts to access the type in a way inconsistent with its current
+ * storage format, then we flag the operation.  If common, we'll
+ * attempt the conversion.
+ */
+
+#define  X86_FPU_VALID          0x80
+#define  X86_FPU_REGTYP(r)      ((r) & 0x7F)
+
+#define  X86_FPU_WORD           0x0
+#define  X86_FPU_SHORT          0x1
+#define  X86_FPU_LONG           0x2
+#define  X86_FPU_FLOAT          0x3
+#define  X86_FPU_DOUBLE         0x4
+#define  X86_FPU_LDBL           0x5
+#define  X86_FPU_BSD            0x6
+
+#define  X86_FPU_STKTOP  0
+
+struct x86_fpu_registers {
+    struct x86_fpu_reg  x86_fpu_stack[8];
+    int                 x86_fpu_flags;
+    int                 x86_fpu_config;         /* rounding modes, etc. */
+    short               x86_fpu_tos, x86_fpu_bos;
+	};
+
+#pragma	pack()
+
+/*
+ * There are two versions of the following macro.
+ *
+ * One version is for opcode D9, for which there are more than 32
+ * instructions encoded in the second byte of the opcode.
+ *
+ * The other version, deals with all the other 7 i87 opcodes, for
+ * which there are only 32 strings needed to describe the
+ * instructions.
+ */
+
+#endif /* X86_FPU_SUPPORT */
+
+#ifdef DEBUG
+# define DECODE_PRINTINSTR32(t,mod,rh,rl)     	\
+	DECODE_PRINTF(t[(mod<<3)+(rh)]);
+# define DECODE_PRINTINSTR256(t,mod,rh,rl)    	\
+	DECODE_PRINTF(t[(mod<<6)+(rh<<3)+(rl)]);
+#else
+# define DECODE_PRINTINSTR32(t,mod,rh,rl)
+# define DECODE_PRINTINSTR256(t,mod,rh,rl)
+#endif
+
+#endif /* __X86EMU_FPU_REGS_H */
diff --git a/other-licence/x86emu/include/x86emu/ops.h b/other-licence/x86emu/include/x86emu/ops.h
new file mode 100644
index 0000000..65ea676
--- /dev/null
+++ b/other-licence/x86emu/include/x86emu/ops.h
@@ -0,0 +1,45 @@
+/****************************************************************************
+*
+*						Realmode X86 Emulator Library
+*
+*            	Copyright (C) 1996-1999 SciTech Software, Inc.
+* 				     Copyright (C) David Mosberger-Tang
+* 					   Copyright (C) 1999 Egbert Eich
+*
+*  ========================================================================
+*
+*  Permission to use, copy, modify, distribute, and sell this software and
+*  its documentation for any purpose is hereby granted without fee,
+*  provided that the above copyright notice appear in all copies and that
+*  both that copyright notice and this permission notice appear in
+*  supporting documentation, and that the name of the authors not be used
+*  in advertising or publicity pertaining to distribution of the software
+*  without specific, written prior permission.  The authors makes no
+*  representations about the suitability of this software for any purpose.
+*  It is provided "as is" without express or implied warranty.
+*
+*  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+*  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+*  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+*  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+*  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+*  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+*  PERFORMANCE OF THIS SOFTWARE.
+*
+*  ========================================================================
+*
+* Language:		ANSI C
+* Environment:	Any
+* Developer:    Kendall Bennett
+*
+* Description:  Header file for operand decoding functions.
+*
+****************************************************************************/
+
+#ifndef __X86EMU_OPS_H
+#define __X86EMU_OPS_H
+
+extern void (*x86emu_optab[0x100])(u8 op1);
+extern void (*x86emu_optab2[0x100])(u8 op2);
+
+#endif /* __X86EMU_OPS_H */
diff --git a/other-licence/x86emu/include/x86emu/prim_asm.h b/other-licence/x86emu/include/x86emu/prim_asm.h
new file mode 100644
index 0000000..4fa8d55
--- /dev/null
+++ b/other-licence/x86emu/include/x86emu/prim_asm.h
@@ -0,0 +1,971 @@
+/****************************************************************************
+*
+*						Realmode X86 Emulator Library
+*
+*            	Copyright (C) 1996-1999 SciTech Software, Inc.
+* 				     Copyright (C) David Mosberger-Tang
+* 					   Copyright (C) 1999 Egbert Eich
+*
+*  ========================================================================
+*
+*  Permission to use, copy, modify, distribute, and sell this software and
+*  its documentation for any purpose is hereby granted without fee,
+*  provided that the above copyright notice appear in all copies and that
+*  both that copyright notice and this permission notice appear in
+*  supporting documentation, and that the name of the authors not be used
+*  in advertising or publicity pertaining to distribution of the software
+*  without specific, written prior permission.  The authors makes no
+*  representations about the suitability of this software for any purpose.
+*  It is provided "as is" without express or implied warranty.
+*
+*  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+*  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+*  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+*  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+*  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+*  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+*  PERFORMANCE OF THIS SOFTWARE.
+*
+*  ========================================================================
+*
+* Language:		Watcom C++ 10.6 or later
+* Environment:	Any
+* Developer:    Kendall Bennett
+*
+* Description:  Inline assembler versions of the primitive operand
+*				functions for faster performance. At the moment this is
+*				x86 inline assembler, but these functions could be replaced
+*				with native inline assembler for each supported processor
+*				platform.
+*
+****************************************************************************/
+/* $XFree86: xc/extras/x86emu/src/x86emu/x86emu/prim_asm.h,v 1.3 2000/04/19 15:48:15 tsi Exp $ */
+
+#ifndef	__X86EMU_PRIM_ASM_H
+#define	__X86EMU_PRIM_ASM_H
+
+#ifdef	__WATCOMC__
+
+#ifndef	VALIDATE
+#define	__HAVE_INLINE_ASSEMBLER__
+#endif
+
+u32		get_flags_asm(void);
+#pragma aux get_flags_asm =			\
+	"pushf"                         \
+	"pop	eax"                  	\
+	value [eax]                     \
+	modify exact [eax];
+
+u16     aaa_word_asm(u32 *flags,u16 d);
+#pragma aux aaa_word_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"aaa"                  			\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [ax] 				\
+	value [ax]                      \
+	modify exact [ax];
+
+u16     aas_word_asm(u32 *flags,u16 d);
+#pragma aux aas_word_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"aas"                  			\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [ax] 				\
+	value [ax]                      \
+	modify exact [ax];
+
+u16     aad_word_asm(u32 *flags,u16 d);
+#pragma aux aad_word_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"aad"                  			\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [ax] 				\
+	value [ax]                      \
+	modify exact [ax];
+
+u16     aam_word_asm(u32 *flags,u8 d);
+#pragma aux aam_word_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"aam"                  			\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [al] 				\
+	value [ax]                      \
+	modify exact [ax];
+
+u8      adc_byte_asm(u32 *flags,u8 d, u8 s);
+#pragma aux adc_byte_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"adc	al,bl"                  \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [al] [bl]            \
+	value [al]                      \
+	modify exact [al bl];
+
+u16     adc_word_asm(u32 *flags,u16 d, u16 s);
+#pragma aux adc_word_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"adc	ax,bx"                  \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [ax] [bx]            \
+	value [ax]                      \
+	modify exact [ax bx];
+
+u32     adc_long_asm(u32 *flags,u32 d, u32 s);
+#pragma aux adc_long_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"adc	eax,ebx"                \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [eax] [ebx]          \
+	value [eax]                     \
+	modify exact [eax ebx];
+
+u8      add_byte_asm(u32 *flags,u8 d, u8 s);
+#pragma aux add_byte_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"add	al,bl"                  \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [al] [bl]            \
+	value [al]                      \
+	modify exact [al bl];
+
+u16     add_word_asm(u32 *flags,u16 d, u16 s);
+#pragma aux add_word_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"add	ax,bx"                  \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [ax] [bx]            \
+	value [ax]                      \
+	modify exact [ax bx];
+
+u32     add_long_asm(u32 *flags,u32 d, u32 s);
+#pragma aux add_long_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"add	eax,ebx"                \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [eax] [ebx]          \
+	value [eax]                     \
+	modify exact [eax ebx];
+
+u8      and_byte_asm(u32 *flags,u8 d, u8 s);
+#pragma aux and_byte_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"and	al,bl"                  \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [al] [bl]            \
+	value [al]                      \
+	modify exact [al bl];
+
+u16     and_word_asm(u32 *flags,u16 d, u16 s);
+#pragma aux and_word_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"and	ax,bx"                  \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [ax] [bx]            \
+	value [ax]                      \
+	modify exact [ax bx];
+
+u32     and_long_asm(u32 *flags,u32 d, u32 s);
+#pragma aux and_long_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"and	eax,ebx"                \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [eax] [ebx]          \
+	value [eax]                     \
+	modify exact [eax ebx];
+
+u8      cmp_byte_asm(u32 *flags,u8 d, u8 s);
+#pragma aux cmp_byte_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"cmp	al,bl"                  \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [al] [bl]            \
+	value [al]                      \
+	modify exact [al bl];
+
+u16     cmp_word_asm(u32 *flags,u16 d, u16 s);
+#pragma aux cmp_word_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"cmp	ax,bx"                  \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [ax] [bx]            \
+	value [ax]                      \
+	modify exact [ax bx];
+
+u32     cmp_long_asm(u32 *flags,u32 d, u32 s);
+#pragma aux cmp_long_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"cmp	eax,ebx"                \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [eax] [ebx]          \
+	value [eax]                     \
+	modify exact [eax ebx];
+
+u8      daa_byte_asm(u32 *flags,u8 d);
+#pragma aux daa_byte_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"daa"                  			\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [al]            		\
+	value [al]                      \
+	modify exact [al];
+
+u8      das_byte_asm(u32 *flags,u8 d);
+#pragma aux das_byte_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"das"                  			\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [al]            		\
+	value [al]                      \
+	modify exact [al];
+
+u8      dec_byte_asm(u32 *flags,u8 d);
+#pragma aux dec_byte_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"dec	al"                  	\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [al]            		\
+	value [al]                      \
+	modify exact [al];
+
+u16     dec_word_asm(u32 *flags,u16 d);
+#pragma aux dec_word_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"dec	ax"                  	\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [ax]            		\
+	value [ax]                      \
+	modify exact [ax];
+
+u32     dec_long_asm(u32 *flags,u32 d);
+#pragma aux dec_long_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"dec	eax"                	\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [eax]          		\
+	value [eax]                     \
+	modify exact [eax];
+
+u8      inc_byte_asm(u32 *flags,u8 d);
+#pragma aux inc_byte_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"inc	al"                  	\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [al]            		\
+	value [al]                      \
+	modify exact [al];
+
+u16     inc_word_asm(u32 *flags,u16 d);
+#pragma aux inc_word_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"inc	ax"                  	\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [ax]            		\
+	value [ax]                      \
+	modify exact [ax];
+
+u32     inc_long_asm(u32 *flags,u32 d);
+#pragma aux inc_long_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"inc	eax"                	\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [eax]          		\
+	value [eax]                     \
+	modify exact [eax];
+
+u8      or_byte_asm(u32 *flags,u8 d, u8 s);
+#pragma aux or_byte_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"or	al,bl"                  	\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [al] [bl]            \
+	value [al]                      \
+	modify exact [al bl];
+
+u16     or_word_asm(u32 *flags,u16 d, u16 s);
+#pragma aux or_word_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"or	ax,bx"                  	\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [ax] [bx]            \
+	value [ax]                      \
+	modify exact [ax bx];
+
+u32     or_long_asm(u32 *flags,u32 d, u32 s);
+#pragma aux or_long_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"or	eax,ebx"                	\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [eax] [ebx]          \
+	value [eax]                     \
+	modify exact [eax ebx];
+
+u8      neg_byte_asm(u32 *flags,u8 d);
+#pragma aux neg_byte_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"neg	al"                  	\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [al]            		\
+	value [al]                      \
+	modify exact [al];
+
+u16     neg_word_asm(u32 *flags,u16 d);
+#pragma aux neg_word_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"neg	ax"                  	\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [ax]            		\
+	value [ax]                      \
+	modify exact [ax];
+
+u32     neg_long_asm(u32 *flags,u32 d);
+#pragma aux neg_long_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"neg	eax"                	\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [eax]          		\
+	value [eax]                     \
+	modify exact [eax];
+
+u8      not_byte_asm(u32 *flags,u8 d);
+#pragma aux not_byte_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"not	al"                  	\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [al]            		\
+	value [al]                      \
+	modify exact [al];
+
+u16     not_word_asm(u32 *flags,u16 d);
+#pragma aux not_word_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"not	ax"                  	\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [ax]            		\
+	value [ax]                      \
+	modify exact [ax];
+
+u32     not_long_asm(u32 *flags,u32 d);
+#pragma aux not_long_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"not	eax"                	\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [eax]          		\
+	value [eax]                     \
+	modify exact [eax];
+
+u8      rcl_byte_asm(u32 *flags,u8 d, u8 s);
+#pragma aux rcl_byte_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"rcl	al,cl"                  \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [al] [cl]            \
+	value [al]                      \
+	modify exact [al cl];
+
+u16     rcl_word_asm(u32 *flags,u16 d, u8 s);
+#pragma aux rcl_word_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"rcl	ax,cl"                  \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [ax] [cl]            \
+	value [ax]                      \
+	modify exact [ax cl];
+
+u32     rcl_long_asm(u32 *flags,u32 d, u8 s);
+#pragma aux rcl_long_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"rcl	eax,cl"                	\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [eax] [cl]          	\
+	value [eax]                     \
+	modify exact [eax cl];
+
+u8      rcr_byte_asm(u32 *flags,u8 d, u8 s);
+#pragma aux rcr_byte_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"rcr	al,cl"                  \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [al] [cl]            \
+	value [al]                      \
+	modify exact [al cl];
+
+u16     rcr_word_asm(u32 *flags,u16 d, u8 s);
+#pragma aux rcr_word_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"rcr	ax,cl"                  \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [ax] [cl]            \
+	value [ax]                      \
+	modify exact [ax cl];
+
+u32     rcr_long_asm(u32 *flags,u32 d, u8 s);
+#pragma aux rcr_long_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"rcr	eax,cl"                	\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [eax] [cl]          	\
+	value [eax]                     \
+	modify exact [eax cl];
+
+u8      rol_byte_asm(u32 *flags,u8 d, u8 s);
+#pragma aux rol_byte_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"rol	al,cl"                  \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [al] [cl]            \
+	value [al]                      \
+	modify exact [al cl];
+
+u16     rol_word_asm(u32 *flags,u16 d, u8 s);
+#pragma aux rol_word_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"rol	ax,cl"                  \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [ax] [cl]            \
+	value [ax]                      \
+	modify exact [ax cl];
+
+u32     rol_long_asm(u32 *flags,u32 d, u8 s);
+#pragma aux rol_long_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"rol	eax,cl"                	\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [eax] [cl]          	\
+	value [eax]                     \
+	modify exact [eax cl];
+
+u8      ror_byte_asm(u32 *flags,u8 d, u8 s);
+#pragma aux ror_byte_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"ror	al,cl"                  \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [al] [cl]            \
+	value [al]                      \
+	modify exact [al cl];
+
+u16     ror_word_asm(u32 *flags,u16 d, u8 s);
+#pragma aux ror_word_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"ror	ax,cl"                  \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [ax] [cl]            \
+	value [ax]                      \
+	modify exact [ax cl];
+
+u32     ror_long_asm(u32 *flags,u32 d, u8 s);
+#pragma aux ror_long_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"ror	eax,cl"                	\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [eax] [cl]          	\
+	value [eax]                     \
+	modify exact [eax cl];
+
+u8      shl_byte_asm(u32 *flags,u8 d, u8 s);
+#pragma aux shl_byte_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"shl	al,cl"                  \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [al] [cl]            \
+	value [al]                      \
+	modify exact [al cl];
+
+u16     shl_word_asm(u32 *flags,u16 d, u8 s);
+#pragma aux shl_word_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"shl	ax,cl"                  \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [ax] [cl]            \
+	value [ax]                      \
+	modify exact [ax cl];
+
+u32     shl_long_asm(u32 *flags,u32 d, u8 s);
+#pragma aux shl_long_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"shl	eax,cl"                	\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [eax] [cl]          	\
+	value [eax]                     \
+	modify exact [eax cl];
+
+u8      shr_byte_asm(u32 *flags,u8 d, u8 s);
+#pragma aux shr_byte_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"shr	al,cl"                  \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [al] [cl]            \
+	value [al]                      \
+	modify exact [al cl];
+
+u16     shr_word_asm(u32 *flags,u16 d, u8 s);
+#pragma aux shr_word_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"shr	ax,cl"                  \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [ax] [cl]            \
+	value [ax]                      \
+	modify exact [ax cl];
+
+u32     shr_long_asm(u32 *flags,u32 d, u8 s);
+#pragma aux shr_long_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"shr	eax,cl"                	\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [eax] [cl]          	\
+	value [eax]                     \
+	modify exact [eax cl];
+
+u8      sar_byte_asm(u32 *flags,u8 d, u8 s);
+#pragma aux sar_byte_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"sar	al,cl"                  \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [al] [cl]            \
+	value [al]                      \
+	modify exact [al cl];
+
+u16     sar_word_asm(u32 *flags,u16 d, u8 s);
+#pragma aux sar_word_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"sar	ax,cl"                  \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [ax] [cl]            \
+	value [ax]                      \
+	modify exact [ax cl];
+
+u32     sar_long_asm(u32 *flags,u32 d, u8 s);
+#pragma aux sar_long_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"sar	eax,cl"                	\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [eax] [cl]          	\
+	value [eax]                     \
+	modify exact [eax cl];
+
+u16		shld_word_asm(u32 *flags,u16 d, u16 fill, u8 s);
+#pragma aux shld_word_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"shld	ax,dx,cl"               \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [ax] [dx] [cl]       \
+	value [ax]                      \
+	modify exact [ax dx cl];
+
+u32     shld_long_asm(u32 *flags,u32 d, u32 fill, u8 s);
+#pragma aux shld_long_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"shld	eax,edx,cl"             \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [eax] [edx] [cl]     \
+	value [eax]                     \
+	modify exact [eax edx cl];
+
+u16		shrd_word_asm(u32 *flags,u16 d, u16 fill, u8 s);
+#pragma aux shrd_word_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"shrd	ax,dx,cl"               \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [ax] [dx] [cl]       \
+	value [ax]                      \
+	modify exact [ax dx cl];
+
+u32     shrd_long_asm(u32 *flags,u32 d, u32 fill, u8 s);
+#pragma aux shrd_long_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"shrd	eax,edx,cl"             \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [eax] [edx] [cl]     \
+	value [eax]                     \
+	modify exact [eax edx cl];
+
+u8      sbb_byte_asm(u32 *flags,u8 d, u8 s);
+#pragma aux sbb_byte_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"sbb	al,bl"                  \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [al] [bl]            \
+	value [al]                      \
+	modify exact [al bl];
+
+u16     sbb_word_asm(u32 *flags,u16 d, u16 s);
+#pragma aux sbb_word_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"sbb	ax,bx"                  \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [ax] [bx]            \
+	value [ax]                      \
+	modify exact [ax bx];
+
+u32     sbb_long_asm(u32 *flags,u32 d, u32 s);
+#pragma aux sbb_long_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"sbb	eax,ebx"                \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [eax] [ebx]          \
+	value [eax]                     \
+	modify exact [eax ebx];
+
+u8      sub_byte_asm(u32 *flags,u8 d, u8 s);
+#pragma aux sub_byte_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"sub	al,bl"                  \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [al] [bl]            \
+	value [al]                      \
+	modify exact [al bl];
+
+u16     sub_word_asm(u32 *flags,u16 d, u16 s);
+#pragma aux sub_word_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"sub	ax,bx"                  \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [ax] [bx]            \
+	value [ax]                      \
+	modify exact [ax bx];
+
+u32     sub_long_asm(u32 *flags,u32 d, u32 s);
+#pragma aux sub_long_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"sub	eax,ebx"                \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [eax] [ebx]          \
+	value [eax]                     \
+	modify exact [eax ebx];
+
+void	test_byte_asm(u32 *flags,u8 d, u8 s);
+#pragma aux test_byte_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"test	al,bl"                  \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [al] [bl]            \
+	modify exact [al bl];
+
+void	test_word_asm(u32 *flags,u16 d, u16 s);
+#pragma aux test_word_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"test	ax,bx"                  \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [ax] [bx]            \
+	modify exact [ax bx];
+
+void	test_long_asm(u32 *flags,u32 d, u32 s);
+#pragma aux test_long_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"test	eax,ebx"                \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [eax] [ebx]          \
+	modify exact [eax ebx];
+
+u8      xor_byte_asm(u32 *flags,u8 d, u8 s);
+#pragma aux xor_byte_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"xor	al,bl"                  \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [al] [bl]            \
+	value [al]                      \
+	modify exact [al bl];
+
+u16     xor_word_asm(u32 *flags,u16 d, u16 s);
+#pragma aux xor_word_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"xor	ax,bx"                  \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [ax] [bx]            \
+	value [ax]                      \
+	modify exact [ax bx];
+
+u32     xor_long_asm(u32 *flags,u32 d, u32 s);
+#pragma aux xor_long_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"xor	eax,ebx"                \
+	"pushf"                         \
+	"pop	[edi]"            		\
+	parm [edi] [eax] [ebx]          \
+	value [eax]                     \
+	modify exact [eax ebx];
+
+void    imul_byte_asm(u32 *flags,u16 *ax,u8 d,u8 s);
+#pragma aux imul_byte_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"imul	bl"                  	\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	"mov	[esi],ax"				\
+	parm [edi] [esi] [al] [bl]      \
+	modify exact [esi ax bl];
+
+void    imul_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 d,u16 s);
+#pragma aux imul_word_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"imul	bx"                  	\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	"mov	[esi],ax"				\
+	"mov	[ecx],dx"				\
+	parm [edi] [esi] [ecx] [ax] [bx]\
+	modify exact [esi edi ax bx dx];
+
+void    imul_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 d,u32 s);
+#pragma aux imul_long_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"imul	ebx"                  	\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	"mov	[esi],eax"				\
+	"mov	[ecx],edx"				\
+	parm [edi] [esi] [ecx] [eax] [ebx] \
+	modify exact [esi edi eax ebx edx];
+
+void    mul_byte_asm(u32 *flags,u16 *ax,u8 d,u8 s);
+#pragma aux mul_byte_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"mul	bl"                  	\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	"mov	[esi],ax"				\
+	parm [edi] [esi] [al] [bl]      \
+	modify exact [esi ax bl];
+
+void    mul_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 d,u16 s);
+#pragma aux mul_word_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"mul	bx"                  	\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	"mov	[esi],ax"				\
+	"mov	[ecx],dx"				\
+	parm [edi] [esi] [ecx] [ax] [bx]\
+	modify exact [esi edi ax bx dx];
+
+void    mul_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 d,u32 s);
+#pragma aux mul_long_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"mul	ebx"                  	\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	"mov	[esi],eax"				\
+	"mov	[ecx],edx"				\
+	parm [edi] [esi] [ecx] [eax] [ebx] \
+	modify exact [esi edi eax ebx edx];
+
+void	idiv_byte_asm(u32 *flags,u8 *al,u8 *ah,u16 d,u8 s);
+#pragma aux idiv_byte_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"idiv	bl"                  	\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	"mov	[esi],al"				\
+	"mov	[ecx],ah"				\
+	parm [edi] [esi] [ecx] [ax] [bl]\
+	modify exact [esi edi ax bl];
+
+void	idiv_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 dlo,u16 dhi,u16 s);
+#pragma aux idiv_word_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"idiv	bx"                  	\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	"mov	[esi],ax"				\
+	"mov	[ecx],dx"				\
+	parm [edi] [esi] [ecx] [ax] [dx] [bx]\
+	modify exact [esi edi ax dx bx];
+
+void	idiv_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 dlo,u32 dhi,u32 s);
+#pragma aux idiv_long_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"idiv	ebx"                  	\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	"mov	[esi],eax"				\
+	"mov	[ecx],edx"				\
+	parm [edi] [esi] [ecx] [eax] [edx] [ebx]\
+	modify exact [esi edi eax edx ebx];
+
+void	div_byte_asm(u32 *flags,u8 *al,u8 *ah,u16 d,u8 s);
+#pragma aux div_byte_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"div	bl"                  	\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	"mov	[esi],al"				\
+	"mov	[ecx],ah"				\
+	parm [edi] [esi] [ecx] [ax] [bl]\
+	modify exact [esi edi ax bl];
+
+void	div_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 dlo,u16 dhi,u16 s);
+#pragma aux div_word_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"div	bx"                  	\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	"mov	[esi],ax"				\
+	"mov	[ecx],dx"				\
+	parm [edi] [esi] [ecx] [ax] [dx] [bx]\
+	modify exact [esi edi ax dx bx];
+
+void	div_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 dlo,u32 dhi,u32 s);
+#pragma aux div_long_asm =			\
+	"push	[edi]"            		\
+	"popf"                         	\
+	"div	ebx"                  	\
+	"pushf"                         \
+	"pop	[edi]"            		\
+	"mov	[esi],eax"				\
+	"mov	[ecx],edx"				\
+	parm [edi] [esi] [ecx] [eax] [edx] [ebx]\
+	modify exact [esi edi eax edx ebx];
+
+#endif
+
+#endif /* __X86EMU_PRIM_ASM_H */
diff --git a/other-licence/x86emu/include/x86emu/prim_ops.h b/other-licence/x86emu/include/x86emu/prim_ops.h
new file mode 100644
index 0000000..f9f87eb
--- /dev/null
+++ b/other-licence/x86emu/include/x86emu/prim_ops.h
@@ -0,0 +1,231 @@
+/****************************************************************************
+*
+*						Realmode X86 Emulator Library
+*
+*            	Copyright (C) 1996-1999 SciTech Software, Inc.
+* 				     Copyright (C) David Mosberger-Tang
+* 					   Copyright (C) 1999 Egbert Eich
+*
+*  ========================================================================
+*
+*  Permission to use, copy, modify, distribute, and sell this software and
+*  its documentation for any purpose is hereby granted without fee,
+*  provided that the above copyright notice appear in all copies and that
+*  both that copyright notice and this permission notice appear in
+*  supporting documentation, and that the name of the authors not be used
+*  in advertising or publicity pertaining to distribution of the software
+*  without specific, written prior permission.  The authors makes no
+*  representations about the suitability of this software for any purpose.
+*  It is provided "as is" without express or implied warranty.
+*
+*  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+*  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+*  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+*  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+*  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+*  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+*  PERFORMANCE OF THIS SOFTWARE.
+*
+*  ========================================================================
+*
+* Language:		ANSI C
+* Environment:	Any
+* Developer:    Kendall Bennett
+*
+* Description:  Header file for primitive operation functions.
+*
+****************************************************************************/
+
+#ifndef __X86EMU_PRIM_OPS_H
+#define __X86EMU_PRIM_OPS_H
+
+#include "prim_asm.h"
+
+#ifdef  __cplusplus
+extern "C" {            			/* Use "C" linkage when in C++ mode */
+#endif
+
+u16     aaa_word (u16 d);
+u16     aas_word (u16 d);
+u16     aad_word (u16 d);
+u16     aam_word (u8 d);
+u8      adc_byte (u8 d, u8 s);
+u16     adc_word (u16 d, u16 s);
+u32     adc_long (u32 d, u32 s);
+u8      add_byte (u8 d, u8 s);
+u16     add_word (u16 d, u16 s);
+u32     add_long (u32 d, u32 s);
+u8      and_byte (u8 d, u8 s);
+u16     and_word (u16 d, u16 s);
+u32     and_long (u32 d, u32 s);
+u8      cmp_byte (u8 d, u8 s);
+u16     cmp_word (u16 d, u16 s);
+u32     cmp_long (u32 d, u32 s);
+u8      daa_byte (u8 d);
+u8      das_byte (u8 d);
+u8      dec_byte (u8 d);
+u16     dec_word (u16 d);
+u32     dec_long (u32 d);
+u8      inc_byte (u8 d);
+u16     inc_word (u16 d);
+u32     inc_long (u32 d);
+u8      or_byte (u8 d, u8 s);
+u16     or_word (u16 d, u16 s);
+u32     or_long (u32 d, u32 s);
+u8      neg_byte (u8 s);
+u16     neg_word (u16 s);
+u32     neg_long (u32 s);
+u8      not_byte (u8 s);
+u16     not_word (u16 s);
+u32     not_long (u32 s);
+u8      rcl_byte (u8 d, u8 s);
+u16     rcl_word (u16 d, u8 s);
+u32     rcl_long (u32 d, u8 s);
+u8      rcr_byte (u8 d, u8 s);
+u16     rcr_word (u16 d, u8 s);
+u32     rcr_long (u32 d, u8 s);
+u8      rol_byte (u8 d, u8 s);
+u16     rol_word (u16 d, u8 s);
+u32     rol_long (u32 d, u8 s);
+u8      ror_byte (u8 d, u8 s);
+u16     ror_word (u16 d, u8 s);
+u32     ror_long (u32 d, u8 s);
+u8      shl_byte (u8 d, u8 s);
+u16     shl_word (u16 d, u8 s);
+u32     shl_long (u32 d, u8 s);
+u8      shr_byte (u8 d, u8 s);
+u16     shr_word (u16 d, u8 s);
+u32     shr_long (u32 d, u8 s);
+u8      sar_byte (u8 d, u8 s);
+u16     sar_word (u16 d, u8 s);
+u32     sar_long (u32 d, u8 s);
+u16     shld_word (u16 d, u16 fill, u8 s);
+u32     shld_long (u32 d, u32 fill, u8 s);
+u16     shrd_word (u16 d, u16 fill, u8 s);
+u32     shrd_long (u32 d, u32 fill, u8 s);
+u8      sbb_byte (u8 d, u8 s);
+u16     sbb_word (u16 d, u16 s);
+u32     sbb_long (u32 d, u32 s);
+u8      sub_byte (u8 d, u8 s);
+u16     sub_word (u16 d, u16 s);
+u32     sub_long (u32 d, u32 s);
+void    test_byte (u8 d, u8 s);
+void    test_word (u16 d, u16 s);
+void    test_long (u32 d, u32 s);
+u8      xor_byte (u8 d, u8 s);
+u16     xor_word (u16 d, u16 s);
+u32     xor_long (u32 d, u32 s);
+void    imul_byte (u8 s);
+void    imul_word (u16 s);
+void    imul_long (u32 s);
+void 	imul_long_direct(u32 *res_lo, u32* res_hi,u32 d, u32 s);
+void    mul_byte (u8 s);
+void    mul_word (u16 s);
+void    mul_long (u32 s);
+void    idiv_byte (u8 s);
+void    idiv_word (u16 s);
+void    idiv_long (u32 s);
+void    div_byte (u8 s);
+void    div_word (u16 s);
+void    div_long (u32 s);
+void    ins (int size);
+void    outs (int size);
+u16     mem_access_word (int addr);
+void    push_word (u16 w);
+void    push_long (u32 w);
+u16     pop_word (void);
+u32		pop_long (void);
+
+#if  defined(__HAVE_INLINE_ASSEMBLER__) && !defined(PRIM_OPS_NO_REDEFINE_ASM)
+
+#define	aaa_word(d)		aaa_word_asm(&M.x86.R_EFLG,d)
+#define aas_word(d)		aas_word_asm(&M.x86.R_EFLG,d)
+#define aad_word(d)		aad_word_asm(&M.x86.R_EFLG,d)
+#define aam_word(d)		aam_word_asm(&M.x86.R_EFLG,d)
+#define adc_byte(d,s)	adc_byte_asm(&M.x86.R_EFLG,d,s)
+#define adc_word(d,s)	adc_word_asm(&M.x86.R_EFLG,d,s)
+#define adc_long(d,s)	adc_long_asm(&M.x86.R_EFLG,d,s)
+#define add_byte(d,s) 	add_byte_asm(&M.x86.R_EFLG,d,s)
+#define add_word(d,s)	add_word_asm(&M.x86.R_EFLG,d,s)
+#define add_long(d,s)	add_long_asm(&M.x86.R_EFLG,d,s)
+#define and_byte(d,s)	and_byte_asm(&M.x86.R_EFLG,d,s)
+#define and_word(d,s)	and_word_asm(&M.x86.R_EFLG,d,s)
+#define and_long(d,s)	and_long_asm(&M.x86.R_EFLG,d,s)
+#define cmp_byte(d,s)	cmp_byte_asm(&M.x86.R_EFLG,d,s)
+#define cmp_word(d,s)	cmp_word_asm(&M.x86.R_EFLG,d,s)
+#define cmp_long(d,s)	cmp_long_asm(&M.x86.R_EFLG,d,s)
+#define daa_byte(d)		daa_byte_asm(&M.x86.R_EFLG,d)
+#define das_byte(d)		das_byte_asm(&M.x86.R_EFLG,d)
+#define dec_byte(d)		dec_byte_asm(&M.x86.R_EFLG,d)
+#define dec_word(d)		dec_word_asm(&M.x86.R_EFLG,d)
+#define dec_long(d)		dec_long_asm(&M.x86.R_EFLG,d)
+#define inc_byte(d)		inc_byte_asm(&M.x86.R_EFLG,d)
+#define inc_word(d)		inc_word_asm(&M.x86.R_EFLG,d)
+#define inc_long(d)		inc_long_asm(&M.x86.R_EFLG,d)
+#define or_byte(d,s)	or_byte_asm(&M.x86.R_EFLG,d,s)
+#define or_word(d,s)	or_word_asm(&M.x86.R_EFLG,d,s)
+#define or_long(d,s)	or_long_asm(&M.x86.R_EFLG,d,s)
+#define neg_byte(s)		neg_byte_asm(&M.x86.R_EFLG,s)
+#define neg_word(s)		neg_word_asm(&M.x86.R_EFLG,s)
+#define neg_long(s)		neg_long_asm(&M.x86.R_EFLG,s)
+#define not_byte(s)		not_byte_asm(&M.x86.R_EFLG,s)
+#define not_word(s)		not_word_asm(&M.x86.R_EFLG,s)
+#define not_long(s)		not_long_asm(&M.x86.R_EFLG,s)
+#define rcl_byte(d,s)	rcl_byte_asm(&M.x86.R_EFLG,d,s)
+#define rcl_word(d,s)	rcl_word_asm(&M.x86.R_EFLG,d,s)
+#define rcl_long(d,s)	rcl_long_asm(&M.x86.R_EFLG,d,s)
+#define rcr_byte(d,s)	rcr_byte_asm(&M.x86.R_EFLG,d,s)
+#define rcr_word(d,s)	rcr_word_asm(&M.x86.R_EFLG,d,s)
+#define rcr_long(d,s)	rcr_long_asm(&M.x86.R_EFLG,d,s)
+#define rol_byte(d,s)	rol_byte_asm(&M.x86.R_EFLG,d,s)
+#define rol_word(d,s)	rol_word_asm(&M.x86.R_EFLG,d,s)
+#define rol_long(d,s)	rol_long_asm(&M.x86.R_EFLG,d,s)
+#define ror_byte(d,s)	ror_byte_asm(&M.x86.R_EFLG,d,s)
+#define ror_word(d,s)	ror_word_asm(&M.x86.R_EFLG,d,s)
+#define ror_long(d,s)	ror_long_asm(&M.x86.R_EFLG,d,s)
+#define shl_byte(d,s)	shl_byte_asm(&M.x86.R_EFLG,d,s)
+#define shl_word(d,s)	shl_word_asm(&M.x86.R_EFLG,d,s)
+#define shl_long(d,s)	shl_long_asm(&M.x86.R_EFLG,d,s)
+#define shr_byte(d,s)	shr_byte_asm(&M.x86.R_EFLG,d,s)
+#define shr_word(d,s)	shr_word_asm(&M.x86.R_EFLG,d,s)
+#define shr_long(d,s)	shr_long_asm(&M.x86.R_EFLG,d,s)
+#define sar_byte(d,s)	sar_byte_asm(&M.x86.R_EFLG,d,s)
+#define sar_word(d,s)	sar_word_asm(&M.x86.R_EFLG,d,s)
+#define sar_long(d,s)	sar_long_asm(&M.x86.R_EFLG,d,s)
+#define shld_word(d,fill,s)	shld_word_asm(&M.x86.R_EFLG,d,fill,s)
+#define shld_long(d,fill,s)	shld_long_asm(&M.x86.R_EFLG,d,fill,s)
+#define shrd_word(d,fill,s)	shrd_word_asm(&M.x86.R_EFLG,d,fill,s)
+#define shrd_long(d,fill,s)	shrd_long_asm(&M.x86.R_EFLG,d,fill,s)
+#define sbb_byte(d,s)	sbb_byte_asm(&M.x86.R_EFLG,d,s)
+#define sbb_word(d,s)	sbb_word_asm(&M.x86.R_EFLG,d,s)
+#define sbb_long(d,s)	sbb_long_asm(&M.x86.R_EFLG,d,s)
+#define sub_byte(d,s)	sub_byte_asm(&M.x86.R_EFLG,d,s)
+#define sub_word(d,s)	sub_word_asm(&M.x86.R_EFLG,d,s)
+#define sub_long(d,s)	sub_long_asm(&M.x86.R_EFLG,d,s)
+#define test_byte(d,s)	test_byte_asm(&M.x86.R_EFLG,d,s)
+#define test_word(d,s)	test_word_asm(&M.x86.R_EFLG,d,s)
+#define test_long(d,s)	test_long_asm(&M.x86.R_EFLG,d,s)
+#define xor_byte(d,s)	xor_byte_asm(&M.x86.R_EFLG,d,s)
+#define xor_word(d,s)	xor_word_asm(&M.x86.R_EFLG,d,s)
+#define xor_long(d,s)	xor_long_asm(&M.x86.R_EFLG,d,s)
+#define imul_byte(s)	imul_byte_asm(&M.x86.R_EFLG,&M.x86.R_AX,M.x86.R_AL,s)
+#define imul_word(s)	imul_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,s)
+#define imul_long(s)	imul_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,s)
+#define imul_long_direct(res_lo,res_hi,d,s)	imul_long_asm(&M.x86.R_EFLG,res_lo,res_hi,d,s)
+#define mul_byte(s)		mul_byte_asm(&M.x86.R_EFLG,&M.x86.R_AX,M.x86.R_AL,s)
+#define mul_word(s)		mul_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,s)
+#define mul_long(s)		mul_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,s)
+#define idiv_byte(s)	idiv_byte_asm(&M.x86.R_EFLG,&M.x86.R_AL,&M.x86.R_AH,M.x86.R_AX,s)
+#define idiv_word(s)	idiv_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,M.x86.R_DX,s)
+#define idiv_long(s)	idiv_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,M.x86.R_EDX,s)
+#define div_byte(s)		div_byte_asm(&M.x86.R_EFLG,&M.x86.R_AL,&M.x86.R_AH,M.x86.R_AX,s)
+#define div_word(s)		div_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,M.x86.R_DX,s)
+#define div_long(s)		div_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,M.x86.R_EDX,s)
+
+#endif
+
+#ifdef  __cplusplus
+}                       			/* End of "C" linkage for C++   	*/
+#endif
+
+#endif /* __X86EMU_PRIM_OPS_H */
diff --git a/other-licence/x86emu/include/x86emu/regs.h b/other-licence/x86emu/include/x86emu/regs.h
new file mode 100644
index 0000000..585e4db
--- /dev/null
+++ b/other-licence/x86emu/include/x86emu/regs.h
@@ -0,0 +1,375 @@
+/****************************************************************************
+*
+*						Realmode X86 Emulator Library
+*
+*            	Copyright (C) 1996-1999 SciTech Software, Inc.
+* 				     Copyright (C) David Mosberger-Tang
+* 					   Copyright (C) 1999 Egbert Eich
+*
+*  ========================================================================
+*
+*  Permission to use, copy, modify, distribute, and sell this software and
+*  its documentation for any purpose is hereby granted without fee,
+*  provided that the above copyright notice appear in all copies and that
+*  both that copyright notice and this permission notice appear in
+*  supporting documentation, and that the name of the authors not be used
+*  in advertising or publicity pertaining to distribution of the software
+*  without specific, written prior permission.  The authors makes no
+*  representations about the suitability of this software for any purpose.
+*  It is provided "as is" without express or implied warranty.
+*
+*  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+*  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+*  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+*  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+*  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+*  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+*  PERFORMANCE OF THIS SOFTWARE.
+*
+*  ========================================================================
+*
+* Language:		ANSI C
+* Environment:	Any
+* Developer:    Kendall Bennett
+*
+* Description:  Header file for x86 register definitions.
+*
+****************************************************************************/
+/* $XFree86: xc/extras/x86emu/include/x86emu/regs.h,v 1.3 2001/10/28 03:32:25 tsi Exp $ */
+
+#ifndef __X86EMU_REGS_H
+#define __X86EMU_REGS_H
+
+/*---------------------- Macros and type definitions ----------------------*/
+
+#pragma pack(1)
+
+/*
+ * General EAX, EBX, ECX, EDX type registers.  Note that for
+ * portability, and speed, the issue of byte swapping is not addressed
+ * in the registers.  All registers are stored in the default format
+ * available on the host machine.  The only critical issue is that the
+ * registers should line up EXACTLY in the same manner as they do in
+ * the 386.  That is:
+ *
+ * EAX & 0xff  === AL
+ * EAX & 0xffff == AX
+ *
+ * etc.  The result is that alot of the calculations can then be
+ * done using the native instruction set fully.
+ */
+
+#ifdef	__BIG_ENDIAN__
+
+typedef struct {
+    u32 e_reg;
+	} I32_reg_t;
+
+typedef struct {
+	u16 filler0, x_reg;
+	} I16_reg_t;
+
+typedef struct {
+	u8 filler0, filler1, h_reg, l_reg;
+	} I8_reg_t;
+
+#else /* !__BIG_ENDIAN__ */
+
+typedef struct {
+    u32 e_reg;
+	} I32_reg_t;
+
+typedef struct {
+	u16 x_reg;
+	} I16_reg_t;
+
+typedef struct {
+	u8 l_reg, h_reg;
+	} I8_reg_t;
+
+#endif /* BIG_ENDIAN */
+
+typedef union {
+	I32_reg_t   I32_reg;
+	I16_reg_t   I16_reg;
+	I8_reg_t    I8_reg;
+	} i386_general_register;
+
+struct i386_general_regs {
+	i386_general_register A, B, C, D;
+	};
+
+typedef struct i386_general_regs Gen_reg_t;
+
+struct i386_special_regs {
+	i386_general_register SP, BP, SI, DI, IP;
+	u32 FLAGS;
+	};
+
+/*  
+ * Segment registers here represent the 16 bit quantities
+ * CS, DS, ES, SS.
+ */
+
+struct i386_segment_regs {
+    u16 CS, DS, SS, ES, FS, GS;
+	};
+
+/* 8 bit registers */
+#define R_AH  gen.A.I8_reg.h_reg
+#define R_AL  gen.A.I8_reg.l_reg
+#define R_BH  gen.B.I8_reg.h_reg
+#define R_BL  gen.B.I8_reg.l_reg
+#define R_CH  gen.C.I8_reg.h_reg
+#define R_CL  gen.C.I8_reg.l_reg
+#define R_DH  gen.D.I8_reg.h_reg
+#define R_DL  gen.D.I8_reg.l_reg
+
+/* 16 bit registers */
+#define R_AX  gen.A.I16_reg.x_reg
+#define R_BX  gen.B.I16_reg.x_reg
+#define R_CX  gen.C.I16_reg.x_reg
+#define R_DX  gen.D.I16_reg.x_reg
+
+/* 32 bit extended registers */
+#define R_EAX  gen.A.I32_reg.e_reg
+#define R_EBX  gen.B.I32_reg.e_reg
+#define R_ECX  gen.C.I32_reg.e_reg
+#define R_EDX  gen.D.I32_reg.e_reg
+
+/* special registers */
+#define R_SP  spc.SP.I16_reg.x_reg
+#define R_BP  spc.BP.I16_reg.x_reg
+#define R_SI  spc.SI.I16_reg.x_reg
+#define R_DI  spc.DI.I16_reg.x_reg
+#define R_IP  spc.IP.I16_reg.x_reg
+#define R_FLG spc.FLAGS
+
+/* special registers */
+#define R_SP  spc.SP.I16_reg.x_reg
+#define R_BP  spc.BP.I16_reg.x_reg
+#define R_SI  spc.SI.I16_reg.x_reg
+#define R_DI  spc.DI.I16_reg.x_reg
+#define R_IP  spc.IP.I16_reg.x_reg
+#define R_FLG spc.FLAGS
+
+/* special registers */
+#define R_ESP  spc.SP.I32_reg.e_reg
+#define R_EBP  spc.BP.I32_reg.e_reg
+#define R_ESI  spc.SI.I32_reg.e_reg
+#define R_EDI  spc.DI.I32_reg.e_reg
+#define R_EIP  spc.IP.I32_reg.e_reg
+#define R_EFLG spc.FLAGS
+
+/* segment registers */
+#define R_CS  seg.CS
+#define R_DS  seg.DS
+#define R_SS  seg.SS
+#define R_ES  seg.ES
+#define R_FS  seg.FS
+#define R_GS  seg.GS
+
+/* flag conditions   */
+#define FB_CF 0x0001            /* CARRY flag  */
+#define FB_PF 0x0004            /* PARITY flag */
+#define FB_AF 0x0010            /* AUX  flag   */
+#define FB_ZF 0x0040            /* ZERO flag   */
+#define FB_SF 0x0080            /* SIGN flag   */
+#define FB_TF 0x0100            /* TRAP flag   */
+#define FB_IF 0x0200            /* INTERRUPT ENABLE flag */
+#define FB_DF 0x0400            /* DIR flag    */
+#define FB_OF 0x0800            /* OVERFLOW flag */
+
+/* 80286 and above always have bit#1 set */
+#define F_ALWAYS_ON  (0x0002)   /* flag bits always on */
+
+/*
+ * Define a mask for only those flag bits we will ever pass back 
+ * (via PUSHF) 
+ */
+#define F_MSK (FB_CF|FB_PF|FB_AF|FB_ZF|FB_SF|FB_TF|FB_IF|FB_DF|FB_OF)
+
+/* following bits masked in to a 16bit quantity */
+
+#define F_CF 0x0001             /* CARRY flag  */
+#define F_PF 0x0004             /* PARITY flag */
+#define F_AF 0x0010             /* AUX  flag   */
+#define F_ZF 0x0040             /* ZERO flag   */
+#define F_SF 0x0080             /* SIGN flag   */
+#define F_TF 0x0100             /* TRAP flag   */
+#define F_IF 0x0200             /* INTERRUPT ENABLE flag */
+#define F_DF 0x0400             /* DIR flag    */
+#define F_OF 0x0800             /* OVERFLOW flag */
+
+#define TOGGLE_FLAG(flag)     	(M.x86.R_FLG ^= (flag))
+#define SET_FLAG(flag)        	(M.x86.R_FLG |= (flag))
+#define CLEAR_FLAG(flag)      	(M.x86.R_FLG &= ~(flag))
+#define ACCESS_FLAG(flag)     	(M.x86.R_FLG & (flag))
+#define CLEARALL_FLAG(m)    	(M.x86.R_FLG = 0)
+
+#define CONDITIONAL_SET_FLAG(COND,FLAG) \
+  if (COND) SET_FLAG(FLAG); else CLEAR_FLAG(FLAG)
+
+#define F_PF_CALC 0x010000      /* PARITY flag has been calced    */
+#define F_ZF_CALC 0x020000      /* ZERO flag has been calced      */
+#define F_SF_CALC 0x040000      /* SIGN flag has been calced      */
+
+#define F_ALL_CALC      0xff0000        /* All have been calced   */
+
+/*
+ * Emulator machine state.
+ * Segment usage control.
+ */
+#define SYSMODE_SEG_DS_SS       0x00000001
+#define SYSMODE_SEGOVR_CS       0x00000002
+#define SYSMODE_SEGOVR_DS       0x00000004
+#define SYSMODE_SEGOVR_ES       0x00000008
+#define SYSMODE_SEGOVR_FS       0x00000010
+#define SYSMODE_SEGOVR_GS       0x00000020
+#define SYSMODE_SEGOVR_SS       0x00000040
+#define SYSMODE_PREFIX_REPE     0x00000080
+#define SYSMODE_PREFIX_REPNE    0x00000100
+#define SYSMODE_PREFIX_DATA     0x00000200
+#define SYSMODE_PREFIX_ADDR     0x00000400
+#define SYSMODE_INTR_PENDING    0x10000000
+#define SYSMODE_EXTRN_INTR      0x20000000
+#define SYSMODE_HALTED          0x40000000
+
+#define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS      | \
+						 SYSMODE_SEGOVR_CS      | \
+						 SYSMODE_SEGOVR_DS      | \
+						 SYSMODE_SEGOVR_ES      | \
+						 SYSMODE_SEGOVR_FS      | \
+						 SYSMODE_SEGOVR_GS      | \
+						 SYSMODE_SEGOVR_SS)
+#define SYSMODE_CLRMASK (SYSMODE_SEG_DS_SS      | \
+						 SYSMODE_SEGOVR_CS      | \
+						 SYSMODE_SEGOVR_DS      | \
+						 SYSMODE_SEGOVR_ES      | \
+						 SYSMODE_SEGOVR_FS      | \
+						 SYSMODE_SEGOVR_GS      | \
+						 SYSMODE_SEGOVR_SS      | \
+						 SYSMODE_PREFIX_DATA    | \
+						 SYSMODE_PREFIX_ADDR)
+
+#define  INTR_SYNCH           0x1
+#define  INTR_ASYNCH          0x2
+#define  INTR_HALTED          0x4
+
+typedef struct {
+    struct i386_general_regs    gen;
+    struct i386_special_regs    spc;
+    struct i386_segment_regs    seg;
+    /*
+     * MODE contains information on:
+     *  REPE prefix             2 bits  repe,repne
+     *  SEGMENT overrides       5 bits  normal,DS,SS,CS,ES
+     *  Delayed flag set        3 bits  (zero, signed, parity)
+     *  reserved                6 bits
+     *  interrupt #             8 bits  instruction raised interrupt
+     *  BIOS video segregs      4 bits  
+     *  Interrupt Pending       1 bits  
+     *  Extern interrupt        1 bits
+     *  Halted                  1 bits
+     */
+    u32                         mode;
+    volatile int                intr;   /* mask of pending interrupts */
+    volatile int                         debug;
+#ifdef DEBUG
+    int                         check;
+    u16                         saved_ip;
+    u16                         saved_cs;
+    int                         enc_pos;
+    int                         enc_str_pos;
+    char                        decode_buf[32]; /* encoded byte stream  */
+    char                        decoded_buf[256]; /* disassembled strings */
+#endif
+    u8                          intno;
+    u8                          __pad[3];
+	} X86EMU_regs;
+
+/****************************************************************************
+REMARKS:
+Structure maintaining the emulator machine state.
+
+MEMBERS:
+mem_base		- Base real mode memory for the emulator
+abseg			- Base for the absegment
+mem_size		- Size of the real mode memory block for the emulator
+private			- private data pointer
+x86			- X86 registers
+****************************************************************************/
+typedef struct {
+	unsigned long	mem_base;
+	unsigned long	mem_size;
+	unsigned long	abseg;
+	void*        	private;
+	X86EMU_regs		x86;
+	} X86EMU_sysEnv;
+
+#pragma pack()
+
+/*----------------------------- Global Variables --------------------------*/
+
+#ifdef  __cplusplus
+extern "C" {            			/* Use "C" linkage when in C++ mode */
+#endif
+
+/* Global emulator machine state.
+ *
+ * We keep it global to avoid pointer dereferences in the code for speed.
+ */
+
+extern    X86EMU_sysEnv	_X86EMU_env;
+#define   M             _X86EMU_env
+
+#define X86_EAX M.x86.R_EAX
+#define X86_EBX M.x86.R_EBX
+#define X86_ECX M.x86.R_ECX
+#define X86_EDX M.x86.R_EDX
+#define X86_ESI M.x86.R_ESI
+#define X86_EDI M.x86.R_EDI
+#define X86_EBP M.x86.R_EBP
+#define X86_EIP M.x86.R_EIP
+#define X86_ESP M.x86.R_ESP
+#define X86_EFLAGS M.x86.R_EFLG
+
+#define X86_FLAGS M.x86.R_FLG
+#define X86_AX M.x86.R_AX
+#define X86_BX M.x86.R_BX
+#define X86_CX M.x86.R_CX
+#define X86_DX M.x86.R_DX
+#define X86_SI M.x86.R_SI
+#define X86_DI M.x86.R_DI
+#define X86_BP M.x86.R_BP
+#define X86_IP M.x86.R_IP
+#define X86_SP M.x86.R_SP
+#define X86_CS M.x86.R_CS
+#define X86_DS M.x86.R_DS
+#define X86_ES M.x86.R_ES
+#define X86_SS M.x86.R_SS
+#define X86_FS M.x86.R_FS
+#define X86_GS M.x86.R_GS
+
+#define X86_AL M.x86.R_AL
+#define X86_BL M.x86.R_BL
+#define X86_CL M.x86.R_CL
+#define X86_DL M.x86.R_DL
+
+#define X86_AH M.x86.R_AH
+#define X86_BH M.x86.R_BH
+#define X86_CH M.x86.R_CH
+#define X86_DH M.x86.R_DH
+
+		
+/*-------------------------- Function Prototypes --------------------------*/
+
+/* Function to log information at runtime */
+
+void	printk(const char *fmt, ...);
+
+#ifdef  __cplusplus
+}                       			/* End of "C" linkage for C++   	*/
+#endif
+
+#endif /* __X86EMU_REGS_H */
diff --git a/other-licence/x86emu/include/x86emu/types.h b/other-licence/x86emu/include/x86emu/types.h
new file mode 100644
index 0000000..5485eea
--- /dev/null
+++ b/other-licence/x86emu/include/x86emu/types.h
@@ -0,0 +1,89 @@
+/****************************************************************************
+*
+*						Realmode X86 Emulator Library
+*
+*            	Copyright (C) 1996-1999 SciTech Software, Inc.
+* 				     Copyright (C) David Mosberger-Tang
+* 					   Copyright (C) 1999 Egbert Eich
+*
+*  ========================================================================
+*
+*  Permission to use, copy, modify, distribute, and sell this software and
+*  its documentation for any purpose is hereby granted without fee,
+*  provided that the above copyright notice appear in all copies and that
+*  both that copyright notice and this permission notice appear in
+*  supporting documentation, and that the name of the authors not be used
+*  in advertising or publicity pertaining to distribution of the software
+*  without specific, written prior permission.  The authors makes no
+*  representations about the suitability of this software for any purpose.
+*  It is provided "as is" without express or implied warranty.
+*
+*  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+*  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+*  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+*  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+*  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+*  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+*  PERFORMANCE OF THIS SOFTWARE.
+*
+*  ========================================================================
+*
+* Language:		ANSI C
+* Environment:	Any
+* Developer:    Kendall Bennett
+*
+* Description:  Header file for x86 emulator type definitions.
+*
+****************************************************************************/
+
+/* $XFree86: xc/extras/x86emu/include/x86emu/types.h,v 1.4 2000/09/26 15:56:44 tsi Exp $ */
+
+#ifndef __X86EMU_TYPES_H
+#define __X86EMU_TYPES_H
+
+//#ifndef IN_MODULE
+//#include <sys/types.h>
+//#endif
+
+/*
+ * The following kludge is an attempt to work around typedef conflicts with
+ * <sys/types.h>.
+ */
+#define u8   x86emuu8
+#define u16  x86emuu16
+#define u32  x86emuu32
+#define u64  x86emuu64
+#define s8   x86emus8
+#define s16  x86emus16
+#define s32  x86emus32
+#define s64  x86emus64
+#define uint x86emuuint
+#define sint x86emusint
+
+/*---------------------- Macros and type definitions ----------------------*/
+
+/* Currently only for Linux/32bit */
+#if defined(__GNUC__) && !defined(NO_LONG_LONG)
+#define __HAS_LONG_LONG__
+#endif
+
+typedef unsigned char 		u8;
+typedef unsigned short 		u16;
+typedef unsigned int 		u32;
+#ifdef __HAS_LONG_LONG__
+typedef unsigned long long 	u64;
+#endif
+
+typedef signed char 		s8;
+typedef signed short 		s16;
+typedef signed int 		s32;
+#ifdef __HAS_LONG_LONG__
+typedef signed long long 	s64;
+#endif
+
+typedef unsigned int		uint;
+typedef signed int 		sint;
+
+typedef u16 X86EMU_pioAddr;
+
+#endif	/* __X86EMU_TYPES_H */
diff --git a/other-licence/x86emu/include/x86emu/x86emu.h b/other-licence/x86emu/include/x86emu/x86emu.h
new file mode 100644
index 0000000..19256b8
--- /dev/null
+++ b/other-licence/x86emu/include/x86emu/x86emu.h
@@ -0,0 +1,197 @@
+/****************************************************************************
+*
+*						Realmode X86 Emulator Library
+*
+*            	Copyright (C) 1996-1999 SciTech Software, Inc.
+* 				     Copyright (C) David Mosberger-Tang
+* 					   Copyright (C) 1999 Egbert Eich
+*
+*  ========================================================================
+*
+*  Permission to use, copy, modify, distribute, and sell this software and
+*  its documentation for any purpose is hereby granted without fee,
+*  provided that the above copyright notice appear in all copies and that
+*  both that copyright notice and this permission notice appear in
+*  supporting documentation, and that the name of the authors not be used
+*  in advertising or publicity pertaining to distribution of the software
+*  without specific, written prior permission.  The authors makes no
+*  representations about the suitability of this software for any purpose.
+*  It is provided "as is" without express or implied warranty.
+*
+*  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+*  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+*  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+*  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+*  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+*  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+*  PERFORMANCE OF THIS SOFTWARE.
+*
+*  ========================================================================
+*
+* Language:		ANSI C
+* Environment:	Any
+* Developer:    Kendall Bennett
+*
+* Description:  Header file for public specific functions.
+*               Any application linking against us should only
+*               include this header
+*
+****************************************************************************/
+/* $XFree86: xc/extras/x86emu/include/x86emu.h,v 1.2 2000/11/21 23:10:25 tsi Exp $ */
+
+#ifndef __X86EMU_X86EMU_H
+#define __X86EMU_X86EMU_H
+
+#ifdef SCITECH
+#include "scitech.h"
+#define	X86API	_ASMAPI
+#define	X86APIP	_ASMAPIP
+typedef int X86EMU_pioAddr;
+#else
+#include "types.h"
+#define	X86API
+#define	X86APIP	*
+#endif
+#include "regs.h"
+
+/*---------------------- Macros and type definitions ----------------------*/
+
+#pragma	pack(1)
+
+/****************************************************************************
+REMARKS:
+Data structure containing ponters to programmed I/O functions used by the
+emulator. This is used so that the user program can hook all programmed
+I/O for the emulator to handled as necessary by the user program. By
+default the emulator contains simple functions that do not do access the
+hardware in any way. To allow the emualtor access the hardware, you will
+need to override the programmed I/O functions using the X86EMU_setupPioFuncs
+function.
+
+HEADER:
+x86emu.h
+
+MEMBERS:
+inb		- Function to read a byte from an I/O port
+inw		- Function to read a word from an I/O port
+inl     - Function to read a dword from an I/O port
+outb	- Function to write a byte to an I/O port
+outw    - Function to write a word to an I/O port
+outl    - Function to write a dword to an I/O port
+****************************************************************************/
+typedef struct {
+	u8  	(X86APIP inb)(X86EMU_pioAddr addr);
+	u16 	(X86APIP inw)(X86EMU_pioAddr addr);
+	u32 	(X86APIP inl)(X86EMU_pioAddr addr);
+	void 	(X86APIP outb)(X86EMU_pioAddr addr, u8 val);
+	void 	(X86APIP outw)(X86EMU_pioAddr addr, u16 val);
+	void 	(X86APIP outl)(X86EMU_pioAddr addr, u32 val);
+	} X86EMU_pioFuncs;
+
+/****************************************************************************
+REMARKS:
+Data structure containing ponters to memory access functions used by the
+emulator. This is used so that the user program can hook all memory
+access functions as necessary for the emulator. By default the emulator
+contains simple functions that only access the internal memory of the
+emulator. If you need specialised functions to handle access to different
+types of memory (ie: hardware framebuffer accesses and BIOS memory access
+etc), you will need to override this using the X86EMU_setupMemFuncs
+function.
+
+HEADER:
+x86emu.h
+
+MEMBERS:
+rdb		- Function to read a byte from an address
+rdw		- Function to read a word from an address
+rdl     - Function to read a dword from an address
+wrb		- Function to write a byte to an address
+wrw    	- Function to write a word to an address
+wrl    	- Function to write a dword to an address
+****************************************************************************/
+typedef struct {
+	u8  	(X86APIP rdb)(u32 addr);
+	u16 	(X86APIP rdw)(u32 addr);
+	u32 	(X86APIP rdl)(u32 addr);
+	void 	(X86APIP wrb)(u32 addr, u8 val);
+	void 	(X86APIP wrw)(u32 addr, u16 val);
+	void	(X86APIP wrl)(u32 addr, u32 val);
+	} X86EMU_memFuncs;
+
+/****************************************************************************
+  Here are the default memory read and write
+  function in case they are needed as fallbacks.
+***************************************************************************/
+extern u8 X86API rdb(u32 addr);
+extern u16 X86API rdw(u32 addr);
+extern u32 X86API rdl(u32 addr);
+extern void X86API wrb(u32 addr, u8 val);
+extern void X86API wrw(u32 addr, u16 val);
+extern void X86API wrl(u32 addr, u32 val);
+ 
+#pragma	pack()
+
+/*--------------------- type definitions -----------------------------------*/
+
+typedef void (X86APIP X86EMU_intrFuncs)(int num);
+extern X86EMU_intrFuncs _X86EMU_intrTab[256];
+
+/*-------------------------- Function Prototypes --------------------------*/
+
+#ifdef  __cplusplus
+extern "C" {            			/* Use "C" linkage when in C++ mode */
+#endif
+
+void 	X86EMU_setupMemFuncs(X86EMU_memFuncs *funcs);
+void 	X86EMU_setupPioFuncs(X86EMU_pioFuncs *funcs);
+void 	X86EMU_setupIntrFuncs(X86EMU_intrFuncs funcs[]);
+void 	X86EMU_prepareForInt(int num);
+
+//void X86EMU_setMemBase(void *base, size_t size);
+
+/* decode.c */
+
+void 	X86EMU_exec(void);
+void 	X86EMU_halt_sys(void);
+
+#ifdef	DEBUG
+#define	HALT_SYS()	\
+    	printk("halt_sys: file %s, line %d\n", __FILE__, __LINE__);	\
+	X86EMU_halt_sys();
+#else
+#define	HALT_SYS()	X86EMU_halt_sys()
+#endif
+
+/* Debug options */
+
+#define DEBUG_DECODE_F          0x000001 /* print decoded instruction  */
+#define DEBUG_TRACE_F           0x000002 /* dump regs before/after execution */
+#define DEBUG_STEP_F            0x000004
+#define DEBUG_DISASSEMBLE_F     0x000008
+#define DEBUG_BREAK_F           0x000010
+#define DEBUG_SVC_F             0x000020
+#define DEBUG_FS_F              0x000080
+#define DEBUG_PROC_F            0x000100
+#define DEBUG_SYSINT_F          0x000200 /* bios system interrupts. */
+#define DEBUG_TRACECALL_F       0x000400
+#define DEBUG_INSTRUMENT_F      0x000800
+#define DEBUG_MEM_TRACE_F       0x001000 
+#define DEBUG_IO_TRACE_F        0x002000 
+#define DEBUG_TRACECALL_REGS_F  0x004000
+#define DEBUG_DECODE_NOPRINT_F  0x008000 
+#define DEBUG_SAVE_IP_CS_F      0x010000
+#define DEBUG_TRACEJMP_F        0x020000
+#define DEBUG_TRACEJMP_REGS_F   0x040000
+#define DEBUG_SYS_F             (DEBUG_SVC_F|DEBUG_FS_F|DEBUG_PROC_F)
+
+void 	X86EMU_trace_regs(void);
+void 	X86EMU_trace_xregs(void);
+void 	X86EMU_dump_memory(u16 seg, u16 off, u32 amt);
+int 	X86EMU_trace_on(void);
+int 	X86EMU_trace_off(void);
+
+#ifdef  __cplusplus
+}                       			/* End of "C" linkage for C++   	*/
+#endif
+#endif /* __X86EMU_X86EMU_H */
diff --git a/other-licence/x86emu/include/x86emu/x86emui.h b/other-licence/x86emu/include/x86emu/x86emui.h
new file mode 100644
index 0000000..ff69d50
--- /dev/null
+++ b/other-licence/x86emu/include/x86emu/x86emui.h
@@ -0,0 +1,105 @@
+/****************************************************************************
+*
+*						Realmode X86 Emulator Library
+*
+*            	Copyright (C) 1996-1999 SciTech Software, Inc.
+* 				     Copyright (C) David Mosberger-Tang
+* 					   Copyright (C) 1999 Egbert Eich
+*
+*  ========================================================================
+*
+*  Permission to use, copy, modify, distribute, and sell this software and
+*  its documentation for any purpose is hereby granted without fee,
+*  provided that the above copyright notice appear in all copies and that
+*  both that copyright notice and this permission notice appear in
+*  supporting documentation, and that the name of the authors not be used
+*  in advertising or publicity pertaining to distribution of the software
+*  without specific, written prior permission.  The authors makes no
+*  representations about the suitability of this software for any purpose.
+*  It is provided "as is" without express or implied warranty.
+*
+*  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+*  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+*  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+*  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+*  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+*  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+*  PERFORMANCE OF THIS SOFTWARE.
+*
+*  ========================================================================
+*
+* Language:		ANSI C
+* Environment:	Any
+* Developer:    Kendall Bennett
+*
+* Description:  Header file for system specific functions. These functions
+*				are always compiled and linked in the OS depedent libraries,
+*				and never in a binary portable driver.
+*
+****************************************************************************/
+
+/* $XFree86: xc/extras/x86emu/src/x86emu/x86emu/x86emui.h,v 1.4 2001/04/01 13:59:58 tsi Exp $ */
+
+#ifndef __X86EMU_X86EMUI_H
+#define __X86EMU_X86EMUI_H
+
+/* If we are compiling in C++ mode, we can compile some functions as
+ * inline to increase performance (however the code size increases quite
+ * dramatically in this case).
+ */
+
+#if	defined(__cplusplus) && !defined(_NO_INLINE)
+#define	_INLINE	inline
+#else
+#define	_INLINE static
+#endif
+
+/* Get rid of unused parameters in C++ compilation mode */
+
+#ifdef __cplusplus
+#define	X86EMU_UNUSED(v)
+#else
+#define	X86EMU_UNUSED(v)	v
+#endif
+
+#include "x86emu/x86emu.h"
+#include "x86emu/regs.h"
+#include "debug.h"
+#include "decode.h"
+#include "ops.h"
+#include "prim_ops.h"
+#include "fpu.h"
+#include "x86emu/fpu_regs.h"
+
+#ifdef IN_MODULE
+#include <xf86_ansic.h>
+#else
+//#include <stdio.h>
+//#include <stdlib.h>
+#include <string.h>
+#endif                                                                                           
+/*--------------------------- Inline Functions ----------------------------*/
+
+#ifdef  __cplusplus
+extern "C" {            			/* Use "C" linkage when in C++ mode */
+#endif
+
+extern u8  	(X86APIP sys_rdb)(u32 addr);
+extern u16 	(X86APIP sys_rdw)(u32 addr);
+extern u32 	(X86APIP sys_rdl)(u32 addr);
+extern void (X86APIP sys_wrb)(u32 addr,u8 val);
+extern void (X86APIP sys_wrw)(u32 addr,u16 val);
+extern void (X86APIP sys_wrl)(u32 addr,u32 val);
+
+extern u8  	(X86APIP sys_inb)(X86EMU_pioAddr addr);
+extern u16 	(X86APIP sys_inw)(X86EMU_pioAddr addr);
+extern u32 	(X86APIP sys_inl)(X86EMU_pioAddr addr);
+extern void (X86APIP sys_outb)(X86EMU_pioAddr addr,u8 val);
+extern void (X86APIP sys_outw)(X86EMU_pioAddr addr,u16 val);
+extern void	(X86APIP sys_outl)(X86EMU_pioAddr addr,u32 val);
+
+#ifdef  __cplusplus
+}                       			/* End of "C" linkage for C++   	*/
+#endif
+
+#endif /* __X86EMU_X86EMUI_H */
diff --git a/other-licence/x86emu/ops.c b/other-licence/x86emu/ops.c
new file mode 100644
index 0000000..bf10615
--- /dev/null
+++ b/other-licence/x86emu/ops.c
@@ -0,0 +1,5443 @@
+/****************************************************************************
+*
+*						Realmode X86 Emulator Library
+*
+*            	Copyright (C) 1991-2004 SciTech Software, Inc.
+* 				     Copyright (C) David Mosberger-Tang
+* 					   Copyright (C) 1999 Egbert Eich
+*
+*  ========================================================================
+*
+*  Permission to use, copy, modify, distribute, and sell this software and
+*  its documentation for any purpose is hereby granted without fee,
+*  provided that the above copyright notice appear in all copies and that
+*  both that copyright notice and this permission notice appear in
+*  supporting documentation, and that the name of the authors not be used
+*  in advertising or publicity pertaining to distribution of the software
+*  without specific, written prior permission.  The authors makes no
+*  representations about the suitability of this software for any purpose.
+*  It is provided "as is" without express or implied warranty.
+*
+*  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+*  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+*  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+*  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+*  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+*  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+*  PERFORMANCE OF THIS SOFTWARE.
+*
+*  ========================================================================
+*
+* Language:		ANSI C
+* Environment:	Any
+* Developer:    Kendall Bennett
+*
+* Description:  This file includes subroutines to implement the decoding
+*               and emulation of all the x86 processor instructions.
+*
+* There are approximately 250 subroutines in here, which correspond
+* to the 256 byte-"opcodes" found on the 8086.  The table which
+* dispatches this is found in the files optab.[ch].
+*
+* Each opcode proc has a comment preceeding it which gives it's table
+* address.  Several opcodes are missing (undefined) in the table.
+*
+* Each proc includes information for decoding (DECODE_PRINTF and
+* DECODE_PRINTF2), debugging (TRACE_REGS, SINGLE_STEP), and misc
+* functions (START_OF_INSTR, END_OF_INSTR).
+*
+* Many of the procedures are *VERY* similar in coding.  This has
+* allowed for a very large amount of code to be generated in a fairly
+* short amount of time (i.e. cut, paste, and modify).  The result is
+* that much of the code below could have been folded into subroutines
+* for a large reduction in size of this file.  The downside would be
+* that there would be a penalty in execution speed.  The file could
+* also have been *MUCH* larger by inlining certain functions which
+* were called.  This could have resulted even faster execution.  The
+* prime directive I used to decide whether to inline the code or to
+* modularize it, was basically: 1) no unnecessary subroutine calls,
+* 2) no routines more than about 200 lines in size, and 3) modularize
+* any code that I might not get right the first time.  The fetch_*
+* subroutines fall into the latter category.  The The decode_* fall
+* into the second category.  The coding of the "switch(mod){ .... }"
+* in many of the subroutines below falls into the first category.
+* Especially, the coding of {add,and,or,sub,...}_{byte,word}
+* subroutines are an especially glaring case of the third guideline.
+* Since so much of the code is cloned from other modules (compare
+* opcode #00 to opcode #01), making the basic operations subroutine
+* calls is especially important; otherwise mistakes in coding an
+* "add" would represent a nightmare in maintenance.
+*
+****************************************************************************/
+
+#include "x86emui.h"
+
+/*----------------------------- Implementation ----------------------------*/
+
+/* constant arrays to do several instructions in just one function */
+
+#ifdef DEBUG
+static char *x86emu_GenOpName[8] = {
+    "ADD", "OR", "ADC", "SBB", "AND", "SUB", "XOR", "CMP"};
+#endif
+
+/* used by several opcodes  */
+static u8 (*genop_byte_operation[])(u8 d, u8 s) =
+{
+    add_byte,           /* 00 */
+    or_byte,            /* 01 */
+    adc_byte,           /* 02 */
+    sbb_byte,           /* 03 */
+    and_byte,           /* 04 */
+    sub_byte,           /* 05 */
+    xor_byte,           /* 06 */
+    cmp_byte,           /* 07 */
+};
+
+static u16 (*genop_word_operation[])(u16 d, u16 s) =
+{
+    add_word,           /*00 */
+    or_word,            /*01 */
+    adc_word,           /*02 */
+    sbb_word,           /*03 */
+    and_word,           /*04 */
+    sub_word,           /*05 */
+    xor_word,           /*06 */
+    cmp_word,           /*07 */
+};
+
+static u32 (*genop_long_operation[])(u32 d, u32 s) =
+{
+    add_long,           /*00 */
+    or_long,            /*01 */
+    adc_long,           /*02 */
+    sbb_long,           /*03 */
+    and_long,           /*04 */
+    sub_long,           /*05 */
+    xor_long,           /*06 */
+    cmp_long,           /*07 */
+};
+
+/* used by opcodes 80, c0, d0, and d2. */
+static u8(*opcD0_byte_operation[])(u8 d, u8 s) =
+{
+    rol_byte,
+    ror_byte,
+    rcl_byte,
+    rcr_byte,
+    shl_byte,
+    shr_byte,
+    shl_byte,           /* sal_byte === shl_byte  by definition */
+    sar_byte,
+};
+
+/* used by opcodes c1, d1, and d3. */
+static u16(*opcD1_word_operation[])(u16 s, u8 d) =
+{
+    rol_word,
+    ror_word,
+    rcl_word,
+    rcr_word,
+    shl_word,
+    shr_word,
+    shl_word,           /* sal_byte === shl_byte  by definition */
+    sar_word,
+};
+
+/* used by opcodes c1, d1, and d3. */
+static u32 (*opcD1_long_operation[])(u32 s, u8 d) =
+{
+    rol_long,
+    ror_long,
+    rcl_long,
+    rcr_long,
+    shl_long,
+    shr_long,
+    shl_long,           /* sal_byte === shl_byte  by definition */
+    sar_long,
+};
+
+#ifdef DEBUG
+
+static char *opF6_names[8] =
+  { "TEST\t", "", "NOT\t", "NEG\t", "MUL\t", "IMUL\t", "DIV\t", "IDIV\t" };
+
+#endif
+
+/****************************************************************************
+PARAMETERS:
+op1 - Instruction op code
+
+REMARKS:
+Handles illegal opcodes.
+****************************************************************************/
+void x86emuOp_illegal_op(
+    u8 op1)
+{
+    START_OF_INSTR();
+    if (M.x86.R_SP != 0) {
+        DECODE_PRINTF("ILLEGAL X86 OPCODE\n");
+        TRACE_REGS();
+        DB( printk("%04x:%04x: %02X ILLEGAL X86 OPCODE!\n",
+            M.x86.R_CS, M.x86.R_IP-1,op1));
+        HALT_SYS();
+        }
+    else {
+        /* If we get here, it means the stack pointer is back to zero
+         * so we are just returning from an emulator service call
+         * so therte is no need to display an error message. We trap
+         * the emulator with an 0xF1 opcode to finish the service
+         * call.
+         */
+        X86EMU_halt_sys();
+        }
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcodes 0x00, 0x08, 0x10, 0x18, 0x20, 0x28, 0x30, 0x38
+****************************************************************************/
+void x86emuOp_genop_byte_RM_R(u8 op1)
+{
+    int mod, rl, rh;
+    uint destoffset;
+    u8 *destreg, *srcreg;
+    u8 destval;
+
+    op1 = (op1 >> 3) & 0x7;
+
+    START_OF_INSTR();
+    DECODE_PRINTF(x86emu_GenOpName[op1]);
+    DECODE_PRINTF("\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if(mod<3)
+        { destoffset = decode_rmXX_address(mod,rl);
+        DECODE_PRINTF(",");
+        destval = fetch_data_byte(destoffset);
+        srcreg = DECODE_RM_BYTE_REGISTER(rh);
+        DECODE_PRINTF("\n");
+        TRACE_AND_STEP();
+        destval = genop_byte_operation[op1](destval, *srcreg);
+        if (op1 != 7)
+            store_data_byte(destoffset, destval);
+        }
+    else
+        {                       /* register to register */
+        destreg = DECODE_RM_BYTE_REGISTER(rl);
+        DECODE_PRINTF(",");
+        srcreg = DECODE_RM_BYTE_REGISTER(rh);
+        DECODE_PRINTF("\n");
+        TRACE_AND_STEP();
+        *destreg = genop_byte_operation[op1](*destreg, *srcreg);
+        }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcodes 0x01, 0x09, 0x11, 0x19, 0x21, 0x29, 0x31, 0x39
+****************************************************************************/
+void x86emuOp_genop_word_RM_R(u8 op1)
+{
+    int mod, rl, rh;
+    uint destoffset;
+
+    op1 = (op1 >> 3) & 0x7;
+
+    START_OF_INSTR();
+    DECODE_PRINTF(x86emu_GenOpName[op1]);
+    DECODE_PRINTF("\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+
+    if(mod<3) {
+        destoffset = decode_rmXX_address(mod,rl);
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 destval;
+            u32 *srcreg;
+
+            DECODE_PRINTF(",");
+            destval = fetch_data_long(destoffset);
+            srcreg = DECODE_RM_LONG_REGISTER(rh);
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            destval = genop_long_operation[op1](destval, *srcreg);
+            if (op1 != 7)
+                store_data_long(destoffset, destval);
+        } else {
+            u16 destval;
+            u16 *srcreg;
+
+            DECODE_PRINTF(",");
+            destval = fetch_data_word(destoffset);
+            srcreg = DECODE_RM_WORD_REGISTER(rh);
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            destval = genop_word_operation[op1](destval, *srcreg);
+            if (op1 != 7)
+                store_data_word(destoffset, destval);
+        }
+    } else {                    /* register to register */
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 *destreg, *srcreg;
+
+            destreg = DECODE_RM_LONG_REGISTER(rl);
+            DECODE_PRINTF(",");
+            srcreg = DECODE_RM_LONG_REGISTER(rh);
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            *destreg = genop_long_operation[op1](*destreg, *srcreg);
+        } else {
+            u16 *destreg, *srcreg;
+
+            destreg = DECODE_RM_WORD_REGISTER(rl);
+            DECODE_PRINTF(",");
+            srcreg = DECODE_RM_WORD_REGISTER(rh);
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            *destreg = genop_word_operation[op1](*destreg, *srcreg);
+        }
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcodes 0x02, 0x0a, 0x12, 0x1a, 0x22, 0x2a, 0x32, 0x3a
+****************************************************************************/
+void x86emuOp_genop_byte_R_RM(u8 op1)
+{
+    int mod, rl, rh;
+    u8 *destreg, *srcreg;
+    uint srcoffset;
+    u8 srcval;
+
+    op1 = (op1 >> 3) & 0x7;
+
+    START_OF_INSTR();
+    DECODE_PRINTF(x86emu_GenOpName[op1]);
+    DECODE_PRINTF("\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (mod < 3) {
+        destreg = DECODE_RM_BYTE_REGISTER(rh);
+        DECODE_PRINTF(",");
+        srcoffset = decode_rmXX_address(mod,rl);
+        srcval = fetch_data_byte(srcoffset);
+    } else {     /* register to register */
+        destreg = DECODE_RM_BYTE_REGISTER(rh);
+        DECODE_PRINTF(",");
+        srcreg = DECODE_RM_BYTE_REGISTER(rl);
+        srcval = *srcreg;
+    }
+    DECODE_PRINTF("\n");
+    TRACE_AND_STEP();
+    *destreg = genop_byte_operation[op1](*destreg, srcval);
+
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcodes 0x03, 0x0b, 0x13, 0x1b, 0x23, 0x2b, 0x33, 0x3b
+****************************************************************************/
+void x86emuOp_genop_word_R_RM(u8 op1)
+{
+    int mod, rl, rh;
+    uint srcoffset;
+    u32 *destreg32, srcval;
+    u16 *destreg;
+
+    op1 = (op1 >> 3) & 0x7;
+
+    START_OF_INSTR();
+    DECODE_PRINTF(x86emu_GenOpName[op1]);
+    DECODE_PRINTF("\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (mod < 3) {
+        srcoffset = decode_rmXX_address(mod,rl);
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            destreg32 = DECODE_RM_LONG_REGISTER(rh);
+            DECODE_PRINTF(",");
+            srcval = fetch_data_long(srcoffset);
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            *destreg32 = genop_long_operation[op1](*destreg32, srcval);
+        } else {
+            destreg = DECODE_RM_WORD_REGISTER(rh);
+            DECODE_PRINTF(",");
+            srcval = fetch_data_word(srcoffset);
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            *destreg = genop_word_operation[op1](*destreg, srcval);
+        }
+    } else {                     /* register to register */
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 *srcreg;
+            destreg32 = DECODE_RM_LONG_REGISTER(rh);
+            DECODE_PRINTF(",");
+            srcreg = DECODE_RM_LONG_REGISTER(rl);
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            *destreg32 = genop_long_operation[op1](*destreg32, *srcreg);
+        } else {
+            u16 *srcreg;
+            destreg = DECODE_RM_WORD_REGISTER(rh);
+            DECODE_PRINTF(",");
+            srcreg = DECODE_RM_WORD_REGISTER(rl);
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            *destreg = genop_word_operation[op1](*destreg, *srcreg);
+        }
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcodes 0x04, 0x0c, 0x14, 0x1c, 0x24, 0x2c, 0x34, 0x3c
+****************************************************************************/
+void x86emuOp_genop_byte_AL_IMM(u8 op1)
+{
+    u8 srcval;
+
+    op1 = (op1 >> 3) & 0x7;
+
+    START_OF_INSTR();
+    DECODE_PRINTF(x86emu_GenOpName[op1]);
+    DECODE_PRINTF("\tAL,");
+    srcval = fetch_byte_imm();
+    DECODE_PRINTF2("%x\n", srcval);
+    TRACE_AND_STEP();
+    M.x86.R_AL = genop_byte_operation[op1](M.x86.R_AL, srcval);
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcodes 0x05, 0x0d, 0x15, 0x1d, 0x25, 0x2d, 0x35, 0x3d
+****************************************************************************/
+void x86emuOp_genop_word_AX_IMM(u8 op1)
+{
+    u32 srcval;
+
+    op1 = (op1 >> 3) & 0x7;
+
+    START_OF_INSTR();
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        DECODE_PRINTF(x86emu_GenOpName[op1]);
+        DECODE_PRINTF("\tEAX,");
+        srcval = fetch_long_imm();
+    } else {
+        DECODE_PRINTF(x86emu_GenOpName[op1]);
+        DECODE_PRINTF("\tAX,");
+        srcval = fetch_word_imm();
+    }
+    DECODE_PRINTF2("%x\n", srcval);
+    TRACE_AND_STEP();
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        M.x86.R_EAX = genop_long_operation[op1](M.x86.R_EAX, srcval);
+    } else {
+        M.x86.R_AX = genop_word_operation[op1](M.x86.R_AX, (u16)srcval);
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x06
+****************************************************************************/
+void x86emuOp_push_ES(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("PUSH\tES\n");
+    TRACE_AND_STEP();
+    push_word(M.x86.R_ES);
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x07
+****************************************************************************/
+void x86emuOp_pop_ES(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("POP\tES\n");
+    TRACE_AND_STEP();
+    M.x86.R_ES = pop_word();
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0e
+****************************************************************************/
+void x86emuOp_push_CS(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("PUSH\tCS\n");
+    TRACE_AND_STEP();
+    push_word(M.x86.R_CS);
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f. Escape for two-byte opcode (286 or better)
+****************************************************************************/
+void x86emuOp_two_byte(u8 X86EMU_UNUSED(op1))
+{
+    u8 op2 = (*sys_rdb)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP++));
+    INC_DECODED_INST_LEN(1);
+    (*x86emu_optab2[op2])(op2);
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x16
+****************************************************************************/
+void x86emuOp_push_SS(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("PUSH\tSS\n");
+    TRACE_AND_STEP();
+    push_word(M.x86.R_SS);
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x17
+****************************************************************************/
+void x86emuOp_pop_SS(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("POP\tSS\n");
+    TRACE_AND_STEP();
+    M.x86.R_SS = pop_word();
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x1e
+****************************************************************************/
+void x86emuOp_push_DS(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("PUSH\tDS\n");
+    TRACE_AND_STEP();
+    push_word(M.x86.R_DS);
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x1f
+****************************************************************************/
+void x86emuOp_pop_DS(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("POP\tDS\n");
+    TRACE_AND_STEP();
+    M.x86.R_DS = pop_word();
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x26
+****************************************************************************/
+void x86emuOp_segovr_ES(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("ES:\n");
+    TRACE_AND_STEP();
+    M.x86.mode |= SYSMODE_SEGOVR_ES;
+    /*
+     * note the lack of DECODE_CLEAR_SEGOVR(r) since, here is one of 4
+     * opcode subroutines we do not want to do this.
+     */
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x27
+****************************************************************************/
+void x86emuOp_daa(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("DAA\n");
+    TRACE_AND_STEP();
+    M.x86.R_AL = daa_byte(M.x86.R_AL);
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x2e
+****************************************************************************/
+void x86emuOp_segovr_CS(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("CS:\n");
+    TRACE_AND_STEP();
+    M.x86.mode |= SYSMODE_SEGOVR_CS;
+    /* note no DECODE_CLEAR_SEGOVR here. */
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x2f
+****************************************************************************/
+void x86emuOp_das(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("DAS\n");
+    TRACE_AND_STEP();
+    M.x86.R_AL = das_byte(M.x86.R_AL);
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x36
+****************************************************************************/
+void x86emuOp_segovr_SS(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("SS:\n");
+    TRACE_AND_STEP();
+    M.x86.mode |= SYSMODE_SEGOVR_SS;
+    /* no DECODE_CLEAR_SEGOVR ! */
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x37
+****************************************************************************/
+void x86emuOp_aaa(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("AAA\n");
+    TRACE_AND_STEP();
+    M.x86.R_AX = aaa_word(M.x86.R_AX);
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x3e
+****************************************************************************/
+void x86emuOp_segovr_DS(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("DS:\n");
+    TRACE_AND_STEP();
+    M.x86.mode |= SYSMODE_SEGOVR_DS;
+    /* NO DECODE_CLEAR_SEGOVR! */
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x3f
+****************************************************************************/
+void x86emuOp_aas(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("AAS\n");
+    TRACE_AND_STEP();
+    M.x86.R_AX = aas_word(M.x86.R_AX);
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x40 - 0x47
+****************************************************************************/
+void x86emuOp_inc_register(u8 op1)
+{
+    START_OF_INSTR();
+    op1 &= 0x7;
+    DECODE_PRINTF("INC\t");
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        u32 *reg;
+        reg = DECODE_RM_LONG_REGISTER(op1);
+        DECODE_PRINTF("\n");
+        TRACE_AND_STEP();
+        *reg = inc_long(*reg);
+    } else {
+        u16 *reg;
+        reg = DECODE_RM_WORD_REGISTER(op1);
+        DECODE_PRINTF("\n");
+        TRACE_AND_STEP();
+        *reg = inc_word(*reg);
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x48 - 0x4F
+****************************************************************************/
+void x86emuOp_dec_register(u8 op1)
+{
+    START_OF_INSTR();
+    op1 &= 0x7;
+    DECODE_PRINTF("DEC\t");
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        u32 *reg;
+        reg = DECODE_RM_LONG_REGISTER(op1);
+        DECODE_PRINTF("\n");
+        TRACE_AND_STEP();
+        *reg = dec_long(*reg);
+    } else {
+        u16 *reg;
+        reg = DECODE_RM_WORD_REGISTER(op1);
+        DECODE_PRINTF("\n");
+        TRACE_AND_STEP();
+        *reg = dec_word(*reg);
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x50 - 0x57
+****************************************************************************/
+void x86emuOp_push_register(u8 op1)
+{
+    START_OF_INSTR();
+    op1 &= 0x7;
+    DECODE_PRINTF("PUSH\t");
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        u32 *reg;
+        reg = DECODE_RM_LONG_REGISTER(op1);
+        DECODE_PRINTF("\n");
+        TRACE_AND_STEP();
+        push_long(*reg);
+    } else {
+        u16 *reg;
+        reg = DECODE_RM_WORD_REGISTER(op1);
+        DECODE_PRINTF("\n");
+        TRACE_AND_STEP();
+        push_word(*reg);
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x58 - 0x5F
+****************************************************************************/
+void x86emuOp_pop_register(u8 op1)
+{
+    START_OF_INSTR();
+    op1 &= 0x7;
+    DECODE_PRINTF("POP\t");
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        u32 *reg;
+        reg = DECODE_RM_LONG_REGISTER(op1);
+        DECODE_PRINTF("\n");
+        TRACE_AND_STEP();
+        *reg = pop_long();
+    } else {
+        u16 *reg;
+        reg = DECODE_RM_WORD_REGISTER(op1);
+        DECODE_PRINTF("\n");
+        TRACE_AND_STEP();
+        *reg = pop_word();
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x60
+****************************************************************************/
+void x86emuOp_push_all(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        DECODE_PRINTF("PUSHAD\n");
+    } else {
+        DECODE_PRINTF("PUSHA\n");
+    }
+    TRACE_AND_STEP();
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        u32 old_sp = M.x86.R_ESP;
+
+        push_long(M.x86.R_EAX);
+        push_long(M.x86.R_ECX);
+        push_long(M.x86.R_EDX);
+        push_long(M.x86.R_EBX);
+        push_long(old_sp);
+        push_long(M.x86.R_EBP);
+        push_long(M.x86.R_ESI);
+        push_long(M.x86.R_EDI);
+    } else {
+        u16 old_sp = M.x86.R_SP;
+
+        push_word(M.x86.R_AX);
+        push_word(M.x86.R_CX);
+        push_word(M.x86.R_DX);
+        push_word(M.x86.R_BX);
+        push_word(old_sp);
+        push_word(M.x86.R_BP);
+        push_word(M.x86.R_SI);
+        push_word(M.x86.R_DI);
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x61
+****************************************************************************/
+void x86emuOp_pop_all(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        DECODE_PRINTF("POPAD\n");
+    } else {
+        DECODE_PRINTF("POPA\n");
+    }
+    TRACE_AND_STEP();
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        M.x86.R_EDI = pop_long();
+        M.x86.R_ESI = pop_long();
+        M.x86.R_EBP = pop_long();
+        M.x86.R_ESP += 4;              /* skip ESP */
+        M.x86.R_EBX = pop_long();
+        M.x86.R_EDX = pop_long();
+        M.x86.R_ECX = pop_long();
+        M.x86.R_EAX = pop_long();
+    } else {
+        M.x86.R_DI = pop_word();
+        M.x86.R_SI = pop_word();
+        M.x86.R_BP = pop_word();
+        M.x86.R_SP += 2;               /* skip SP */
+        M.x86.R_BX = pop_word();
+        M.x86.R_DX = pop_word();
+        M.x86.R_CX = pop_word();
+        M.x86.R_AX = pop_word();
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/*opcode 0x62   ILLEGAL OP, calls x86emuOp_illegal_op() */
+/*opcode 0x63   ILLEGAL OP, calls x86emuOp_illegal_op() */
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x64
+****************************************************************************/
+void x86emuOp_segovr_FS(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("FS:\n");
+    TRACE_AND_STEP();
+    M.x86.mode |= SYSMODE_SEGOVR_FS;
+    /*
+     * note the lack of DECODE_CLEAR_SEGOVR(r) since, here is one of 4
+     * opcode subroutines we do not want to do this.
+     */
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x65
+****************************************************************************/
+void x86emuOp_segovr_GS(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("GS:\n");
+    TRACE_AND_STEP();
+    M.x86.mode |= SYSMODE_SEGOVR_GS;
+    /*
+     * note the lack of DECODE_CLEAR_SEGOVR(r) since, here is one of 4
+     * opcode subroutines we do not want to do this.
+     */
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x66 - prefix for 32-bit register
+****************************************************************************/
+void x86emuOp_prefix_data(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("DATA:\n");
+    TRACE_AND_STEP();
+    M.x86.mode |= SYSMODE_PREFIX_DATA;
+    /* note no DECODE_CLEAR_SEGOVR here. */
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x67 - prefix for 32-bit address
+****************************************************************************/
+void x86emuOp_prefix_addr(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("ADDR:\n");
+    TRACE_AND_STEP();
+    M.x86.mode |= SYSMODE_PREFIX_ADDR;
+    /* note no DECODE_CLEAR_SEGOVR here. */
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x68
+****************************************************************************/
+void x86emuOp_push_word_IMM(u8 X86EMU_UNUSED(op1))
+{
+    u32 imm;
+
+    START_OF_INSTR();
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        imm = fetch_long_imm();
+    } else {
+        imm = fetch_word_imm();
+    }
+    DECODE_PRINTF2("PUSH\t%x\n", imm);
+    TRACE_AND_STEP();
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        push_long(imm);
+    } else {
+        push_word((u16)imm);
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x69
+****************************************************************************/
+void x86emuOp_imul_word_IMM(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rl, rh;
+    uint srcoffset;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("IMUL\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (mod < 3) {
+        srcoffset = decode_rmXX_address(mod, rl);
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 *destreg;
+            u32 srcval;
+            u32 res_lo,res_hi;
+            s32 imm;
+
+            destreg = DECODE_RM_LONG_REGISTER(rh);
+            DECODE_PRINTF(",");
+            srcval = fetch_data_long(srcoffset);
+            imm = fetch_long_imm();
+            DECODE_PRINTF2(",%d\n", (s32)imm);
+            TRACE_AND_STEP();
+            imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm);
+            if ((((res_lo & 0x80000000) == 0) && (res_hi == 0x00000000)) ||
+                (((res_lo & 0x80000000) != 0) && (res_hi == 0xFFFFFFFF))) {
+                CLEAR_FLAG(F_CF);
+                CLEAR_FLAG(F_OF);
+            } else {
+                SET_FLAG(F_CF);
+                SET_FLAG(F_OF);
+            }
+            *destreg = (u32)res_lo;
+        } else {
+            u16 *destreg;
+            u16 srcval;
+            u32 res;
+            s16 imm;
+
+            destreg = DECODE_RM_WORD_REGISTER(rh);
+            DECODE_PRINTF(",");
+            srcval = fetch_data_word(srcoffset);
+            imm = fetch_word_imm();
+            DECODE_PRINTF2(",%d\n", (s32)imm);
+            TRACE_AND_STEP();
+            res = (s16)srcval * (s16)imm;
+            if ((((res & 0x8000) == 0) && ((res >> 16) == 0x0000)) ||
+                (((res & 0x8000) != 0) && ((res >> 16) == 0xFFFF))) {
+                CLEAR_FLAG(F_CF);
+                CLEAR_FLAG(F_OF);
+            } else {
+                SET_FLAG(F_CF);
+                SET_FLAG(F_OF);
+            }
+            *destreg = (u16)res;
+        }
+    } else {                     /* register to register */
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 *destreg,*srcreg;
+            u32 res_lo,res_hi;
+            s32 imm;
+
+            destreg = DECODE_RM_LONG_REGISTER(rh);
+            DECODE_PRINTF(",");
+            srcreg = DECODE_RM_LONG_REGISTER(rl);
+            imm = fetch_long_imm();
+            DECODE_PRINTF2(",%d\n", (s32)imm);
+            TRACE_AND_STEP();
+            imul_long_direct(&res_lo,&res_hi,(s32)*srcreg,(s32)imm);
+            if ((((res_lo & 0x80000000) == 0) && (res_hi == 0x00000000)) ||
+                (((res_lo & 0x80000000) != 0) && (res_hi == 0xFFFFFFFF))) {
+                CLEAR_FLAG(F_CF);
+                CLEAR_FLAG(F_OF);
+            } else {
+                SET_FLAG(F_CF);
+                SET_FLAG(F_OF);
+            }
+            *destreg = (u32)res_lo;
+        } else {
+            u16 *destreg,*srcreg;
+            u32 res;
+            s16 imm;
+
+            destreg = DECODE_RM_WORD_REGISTER(rh);
+            DECODE_PRINTF(",");
+            srcreg = DECODE_RM_WORD_REGISTER(rl);
+            imm = fetch_word_imm();
+            DECODE_PRINTF2(",%d\n", (s32)imm);
+            res = (s16)*srcreg * (s16)imm;
+            if ((((res & 0x8000) == 0) && ((res >> 16) == 0x0000)) ||
+                (((res & 0x8000) != 0) && ((res >> 16) == 0xFFFF))) {
+                CLEAR_FLAG(F_CF);
+                CLEAR_FLAG(F_OF);
+            } else {
+                SET_FLAG(F_CF);
+                SET_FLAG(F_OF);
+            }
+            *destreg = (u16)res;
+        }
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x6a
+****************************************************************************/
+void x86emuOp_push_byte_IMM(u8 X86EMU_UNUSED(op1))
+{
+    s16 imm;
+
+    START_OF_INSTR();
+    imm = (s8)fetch_byte_imm();
+    DECODE_PRINTF2("PUSH\t%d\n", imm);
+    TRACE_AND_STEP();
+    push_word(imm);
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x6b
+****************************************************************************/
+void x86emuOp_imul_byte_IMM(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rl, rh;
+    uint srcoffset;
+    s8  imm;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("IMUL\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (mod < 3) {
+        srcoffset = decode_rmXX_address(mod, rl);
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 *destreg;
+            u32 srcval;
+            u32 res_lo,res_hi;
+
+            destreg = DECODE_RM_LONG_REGISTER(rh);
+            DECODE_PRINTF(",");
+            srcval = fetch_data_long(srcoffset);
+            imm = fetch_byte_imm();
+            DECODE_PRINTF2(",%d\n", (s32)imm);
+            TRACE_AND_STEP();
+            imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm);
+            if ((((res_lo & 0x80000000) == 0) && (res_hi == 0x00000000)) ||
+                (((res_lo & 0x80000000) != 0) && (res_hi == 0xFFFFFFFF))) {
+                CLEAR_FLAG(F_CF);
+                CLEAR_FLAG(F_OF);
+            } else {
+                SET_FLAG(F_CF);
+                SET_FLAG(F_OF);
+            }
+            *destreg = (u32)res_lo;
+        } else {
+            u16 *destreg;
+            u16 srcval;
+            u32 res;
+
+            destreg = DECODE_RM_WORD_REGISTER(rh);
+            DECODE_PRINTF(",");
+            srcval = fetch_data_word(srcoffset);
+            imm = fetch_byte_imm();
+            DECODE_PRINTF2(",%d\n", (s32)imm);
+            TRACE_AND_STEP();
+            res = (s16)srcval * (s16)imm;
+            if ((((res & 0x8000) == 0) && ((res >> 16) == 0x0000)) ||
+                (((res & 0x8000) != 0) && ((res >> 16) == 0xFFFF))) {
+                CLEAR_FLAG(F_CF);
+                CLEAR_FLAG(F_OF);
+            } else {
+                SET_FLAG(F_CF);
+                SET_FLAG(F_OF);
+            }
+            *destreg = (u16)res;
+        }
+    } else {                     /* register to register */
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 *destreg,*srcreg;
+            u32 res_lo,res_hi;
+
+            destreg = DECODE_RM_LONG_REGISTER(rh);
+            DECODE_PRINTF(",");
+            srcreg = DECODE_RM_LONG_REGISTER(rl);
+            imm = fetch_byte_imm();
+            DECODE_PRINTF2(",%d\n", (s32)imm);
+            TRACE_AND_STEP();
+            imul_long_direct(&res_lo,&res_hi,(s32)*srcreg,(s32)imm);
+            if ((((res_lo & 0x80000000) == 0) && (res_hi == 0x00000000)) ||
+                (((res_lo & 0x80000000) != 0) && (res_hi == 0xFFFFFFFF))) {
+                CLEAR_FLAG(F_CF);
+                CLEAR_FLAG(F_OF);
+            } else {
+                SET_FLAG(F_CF);
+                SET_FLAG(F_OF);
+            }
+            *destreg = (u32)res_lo;
+        } else {
+            u16 *destreg,*srcreg;
+            u32 res;
+
+            destreg = DECODE_RM_WORD_REGISTER(rh);
+            DECODE_PRINTF(",");
+            srcreg = DECODE_RM_WORD_REGISTER(rl);
+            imm = fetch_byte_imm();
+            DECODE_PRINTF2(",%d\n", (s32)imm);
+            TRACE_AND_STEP();
+            res = (s16)*srcreg * (s16)imm;
+            if ((((res & 0x8000) == 0) && ((res >> 16) == 0x0000)) ||
+                (((res & 0x8000) != 0) && ((res >> 16) == 0xFFFF))) {
+                CLEAR_FLAG(F_CF);
+                CLEAR_FLAG(F_OF);
+            } else {
+                SET_FLAG(F_CF);
+                SET_FLAG(F_OF);
+            }
+            *destreg = (u16)res;
+        }
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x6c
+****************************************************************************/
+void x86emuOp_ins_byte(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("INSB\n");
+    ins(1);
+    TRACE_AND_STEP();
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x6d
+****************************************************************************/
+void x86emuOp_ins_word(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        DECODE_PRINTF("INSD\n");
+        ins(4);
+    } else {
+        DECODE_PRINTF("INSW\n");
+        ins(2);
+    }
+    TRACE_AND_STEP();
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x6e
+****************************************************************************/
+void x86emuOp_outs_byte(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("OUTSB\n");
+    outs(1);
+    TRACE_AND_STEP();
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x6f
+****************************************************************************/
+void x86emuOp_outs_word(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        DECODE_PRINTF("OUTSD\n");
+        outs(4);
+    } else {
+        DECODE_PRINTF("OUTSW\n");
+        outs(2);
+    }
+    TRACE_AND_STEP();
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x70 - 0x7F
+****************************************************************************/
+int x86emu_check_jump_condition(u8 op);
+
+void x86emuOp_jump_near_cond(u8 op1)
+{
+    s8 offset;
+    u16 target;
+    int cond;
+
+    /* jump to byte offset if overflow flag is set */
+    START_OF_INSTR();
+    cond = x86emu_check_jump_condition(op1 & 0xF);
+    offset = (s8)fetch_byte_imm();
+    target = (u16)(M.x86.R_IP + (s16)offset);
+    DECODE_PRINTF2("%x\n", target);
+    TRACE_AND_STEP();
+    if (cond)
+        M.x86.R_IP = target;
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x80
+****************************************************************************/
+void x86emuOp_opc80_byte_RM_IMM(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rl, rh;
+    u8 *destreg;
+    uint destoffset;
+    u8 imm;
+    u8 destval;
+
+    /*
+     * Weirdo special case instruction format.  Part of the opcode
+     * held below in "RH".  Doubly nested case would result, except
+     * that the decoded instruction
+     */
+    START_OF_INSTR();
+    FETCH_DECODE_MODRM(mod, rh, rl);
+#ifdef DEBUG
+    if (DEBUG_DECODE()) {
+        /* XXX DECODE_PRINTF may be changed to something more
+           general, so that it is important to leave the strings
+           in the same format, even though the result is that the
+           above test is done twice. */
+
+        switch (rh) {
+        case 0:
+            DECODE_PRINTF("ADD\t");
+            break;
+        case 1:
+            DECODE_PRINTF("OR\t");
+            break;
+        case 2:
+            DECODE_PRINTF("ADC\t");
+            break;
+        case 3:
+            DECODE_PRINTF("SBB\t");
+            break;
+        case 4:
+            DECODE_PRINTF("AND\t");
+            break;
+        case 5:
+            DECODE_PRINTF("SUB\t");
+            break;
+        case 6:
+            DECODE_PRINTF("XOR\t");
+            break;
+        case 7:
+            DECODE_PRINTF("CMP\t");
+            break;
+        }
+    }
+#endif
+    /* know operation, decode the mod byte to find the addressing
+       mode. */
+    if (mod < 3) {
+        DECODE_PRINTF("BYTE PTR ");
+        destoffset = decode_rmXX_address(mod, rl);
+        DECODE_PRINTF(",");
+        destval = fetch_data_byte(destoffset);
+        imm = fetch_byte_imm();
+        DECODE_PRINTF2("%x\n", imm);
+        TRACE_AND_STEP();
+        destval = (*genop_byte_operation[rh]) (destval, imm);
+        if (rh != 7)
+            store_data_byte(destoffset, destval);
+    } else {                     /* register to register */
+        destreg = DECODE_RM_BYTE_REGISTER(rl);
+        DECODE_PRINTF(",");
+        imm = fetch_byte_imm();
+        DECODE_PRINTF2("%x\n", imm);
+        TRACE_AND_STEP();
+        *destreg = (*genop_byte_operation[rh]) (*destreg, imm);
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x81
+****************************************************************************/
+void x86emuOp_opc81_word_RM_IMM(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rl, rh;
+    uint destoffset;
+
+    /*
+     * Weirdo special case instruction format.  Part of the opcode
+     * held below in "RH".  Doubly nested case would result, except
+     * that the decoded instruction
+     */
+    START_OF_INSTR();
+    FETCH_DECODE_MODRM(mod, rh, rl);
+#ifdef DEBUG
+    if (DEBUG_DECODE()) {
+        /* XXX DECODE_PRINTF may be changed to something more
+           general, so that it is important to leave the strings
+           in the same format, even though the result is that the
+           above test is done twice. */
+
+        switch (rh) {
+        case 0:
+            DECODE_PRINTF("ADD\t");
+            break;
+        case 1:
+            DECODE_PRINTF("OR\t");
+            break;
+        case 2:
+            DECODE_PRINTF("ADC\t");
+            break;
+        case 3:
+            DECODE_PRINTF("SBB\t");
+            break;
+        case 4:
+            DECODE_PRINTF("AND\t");
+            break;
+        case 5:
+            DECODE_PRINTF("SUB\t");
+            break;
+        case 6:
+            DECODE_PRINTF("XOR\t");
+            break;
+        case 7:
+            DECODE_PRINTF("CMP\t");
+            break;
+        }
+    }
+#endif
+    /*
+     * Know operation, decode the mod byte to find the addressing
+     * mode.
+     */
+    if (mod < 3) {
+        DECODE_PRINTF("DWORD PTR ");
+        destoffset = decode_rmXX_address(mod, rl);
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 destval,imm;
+
+            DECODE_PRINTF(",");
+            destval = fetch_data_long(destoffset);
+            imm = fetch_long_imm();
+            DECODE_PRINTF2("%x\n", imm);
+            TRACE_AND_STEP();
+            destval = (*genop_long_operation[rh]) (destval, imm);
+            if (rh != 7)
+                store_data_long(destoffset, destval);
+        } else {
+            u16 destval,imm;
+
+            DECODE_PRINTF(",");
+            destval = fetch_data_word(destoffset);
+            imm = fetch_word_imm();
+            DECODE_PRINTF2("%x\n", imm);
+            TRACE_AND_STEP();
+            destval = (*genop_word_operation[rh]) (destval, imm);
+            if (rh != 7)
+                store_data_word(destoffset, destval);
+        }
+    } else {                     /* register to register */
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 *destreg, imm;
+
+            destreg = DECODE_RM_LONG_REGISTER(rl);
+            DECODE_PRINTF(",");
+            imm = fetch_long_imm();
+            DECODE_PRINTF2("%x\n", imm);
+            TRACE_AND_STEP();
+            *destreg = (*genop_long_operation[rh]) (*destreg, imm);
+        } else {
+            u16 *destreg, imm;
+
+            destreg = DECODE_RM_WORD_REGISTER(rl);
+            DECODE_PRINTF(",");
+            imm = fetch_word_imm();
+            DECODE_PRINTF2("%x\n", imm);
+            TRACE_AND_STEP();
+            *destreg = (*genop_word_operation[rh]) (*destreg, imm);
+        }
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x82
+****************************************************************************/
+void x86emuOp_opc82_byte_RM_IMM(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rl, rh;
+    u8 *destreg;
+    uint destoffset;
+    u8 imm;
+    u8 destval;
+
+    /*
+     * Weirdo special case instruction format.  Part of the opcode
+     * held below in "RH".  Doubly nested case would result, except
+     * that the decoded instruction Similar to opcode 81, except that
+     * the immediate byte is sign extended to a word length.
+     */
+    START_OF_INSTR();
+    FETCH_DECODE_MODRM(mod, rh, rl);
+#ifdef DEBUG
+    if (DEBUG_DECODE()) {
+        /* XXX DECODE_PRINTF may be changed to something more
+           general, so that it is important to leave the strings
+           in the same format, even though the result is that the
+           above test is done twice. */
+        switch (rh) {
+        case 0:
+            DECODE_PRINTF("ADD\t");
+            break;
+        case 1:
+            DECODE_PRINTF("OR\t");
+            break;
+        case 2:
+            DECODE_PRINTF("ADC\t");
+            break;
+        case 3:
+            DECODE_PRINTF("SBB\t");
+            break;
+        case 4:
+            DECODE_PRINTF("AND\t");
+            break;
+        case 5:
+            DECODE_PRINTF("SUB\t");
+            break;
+        case 6:
+            DECODE_PRINTF("XOR\t");
+            break;
+        case 7:
+            DECODE_PRINTF("CMP\t");
+            break;
+        }
+    }
+#endif
+    /* know operation, decode the mod byte to find the addressing
+       mode. */
+    if (mod < 3) {
+        DECODE_PRINTF("BYTE PTR ");
+        destoffset = decode_rmXX_address(mod, rl);
+        destval = fetch_data_byte(destoffset);
+        imm = fetch_byte_imm();
+        DECODE_PRINTF2(",%x\n", imm);
+        TRACE_AND_STEP();
+        destval = (*genop_byte_operation[rh]) (destval, imm);
+        if (rh != 7)
+            store_data_byte(destoffset, destval);
+    } else {                     /* register to register */
+        destreg = DECODE_RM_BYTE_REGISTER(rl);
+        imm = fetch_byte_imm();
+        DECODE_PRINTF2(",%x\n", imm);
+        TRACE_AND_STEP();
+        *destreg = (*genop_byte_operation[rh]) (*destreg, imm);
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x83
+****************************************************************************/
+void x86emuOp_opc83_word_RM_IMM(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rl, rh;
+    uint destoffset;
+
+    /*
+     * Weirdo special case instruction format.  Part of the opcode
+     * held below in "RH".  Doubly nested case would result, except
+     * that the decoded instruction Similar to opcode 81, except that
+     * the immediate byte is sign extended to a word length.
+     */
+    START_OF_INSTR();
+    FETCH_DECODE_MODRM(mod, rh, rl);
+#ifdef DEBUG
+    if (DEBUG_DECODE()) {
+        /* XXX DECODE_PRINTF may be changed to something more
+           general, so that it is important to leave the strings
+           in the same format, even though the result is that the
+           above test is done twice. */
+       switch (rh) {
+        case 0:
+            DECODE_PRINTF("ADD\t");
+            break;
+        case 1:
+            DECODE_PRINTF("OR\t");
+            break;
+        case 2:
+            DECODE_PRINTF("ADC\t");
+            break;
+        case 3:
+            DECODE_PRINTF("SBB\t");
+            break;
+        case 4:
+            DECODE_PRINTF("AND\t");
+            break;
+        case 5:
+            DECODE_PRINTF("SUB\t");
+            break;
+        case 6:
+            DECODE_PRINTF("XOR\t");
+            break;
+        case 7:
+            DECODE_PRINTF("CMP\t");
+            break;
+        }
+    }
+#endif
+    /* know operation, decode the mod byte to find the addressing
+       mode. */
+    if (mod < 3) {
+        DECODE_PRINTF("DWORD PTR ");
+        destoffset = decode_rmXX_address(mod,rl);
+
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 destval,imm;
+
+            destval = fetch_data_long(destoffset);
+            imm = (s8) fetch_byte_imm();
+            DECODE_PRINTF2(",%x\n", imm);
+            TRACE_AND_STEP();
+            destval = (*genop_long_operation[rh]) (destval, imm);
+            if (rh != 7)
+                store_data_long(destoffset, destval);
+        } else {
+            u16 destval,imm;
+
+            destval = fetch_data_word(destoffset);
+            imm = (s8) fetch_byte_imm();
+            DECODE_PRINTF2(",%x\n", imm);
+            TRACE_AND_STEP();
+            destval = (*genop_word_operation[rh]) (destval, imm);
+            if (rh != 7)
+                store_data_word(destoffset, destval);
+        }
+    } else {                     /* register to register */
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 *destreg, imm;
+
+            destreg = DECODE_RM_LONG_REGISTER(rl);
+            imm = (s8) fetch_byte_imm();
+            DECODE_PRINTF2(",%x\n", imm);
+            TRACE_AND_STEP();
+            *destreg = (*genop_long_operation[rh]) (*destreg, imm);
+        } else {
+            u16 *destreg, imm;
+
+            destreg = DECODE_RM_WORD_REGISTER(rl);
+            imm = (s8) fetch_byte_imm();
+            DECODE_PRINTF2(",%x\n", imm);
+            TRACE_AND_STEP();
+            *destreg = (*genop_word_operation[rh]) (*destreg, imm);
+        }
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x84
+****************************************************************************/
+void x86emuOp_test_byte_RM_R(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rl, rh;
+    u8 *destreg, *srcreg;
+    uint destoffset;
+    u8 destval;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("TEST\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (mod < 3) {
+        destoffset = decode_rmXX_address(mod, rl);
+        DECODE_PRINTF(",");
+        destval = fetch_data_byte(destoffset);
+        srcreg = DECODE_RM_BYTE_REGISTER(rh);
+        DECODE_PRINTF("\n");
+        TRACE_AND_STEP();
+        test_byte(destval, *srcreg);
+    } else {                     /* register to register */
+        destreg = DECODE_RM_BYTE_REGISTER(rl);
+        DECODE_PRINTF(",");
+        srcreg = DECODE_RM_BYTE_REGISTER(rh);
+        DECODE_PRINTF("\n");
+        TRACE_AND_STEP();
+        test_byte(*destreg, *srcreg);
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x85
+****************************************************************************/
+void x86emuOp_test_word_RM_R(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rl, rh;
+    uint destoffset;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("TEST\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (mod < 3) {
+        destoffset = decode_rmXX_address(mod, rl);
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 destval;
+            u32 *srcreg;
+
+            DECODE_PRINTF(",");
+            destval = fetch_data_long(destoffset);
+            srcreg = DECODE_RM_LONG_REGISTER(rh);
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            test_long(destval, *srcreg);
+        } else {
+            u16 destval;
+            u16 *srcreg;
+
+            DECODE_PRINTF(",");
+            destval = fetch_data_word(destoffset);
+            srcreg = DECODE_RM_WORD_REGISTER(rh);
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            test_word(destval, *srcreg);
+        }
+    } else {                     /* register to register */
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 *destreg,*srcreg;
+
+            destreg = DECODE_RM_LONG_REGISTER(rl);
+            DECODE_PRINTF(",");
+            srcreg = DECODE_RM_LONG_REGISTER(rh);
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            test_long(*destreg, *srcreg);
+        } else {
+            u16 *destreg,*srcreg;
+
+            destreg = DECODE_RM_WORD_REGISTER(rl);
+            DECODE_PRINTF(",");
+            srcreg = DECODE_RM_WORD_REGISTER(rh);
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            test_word(*destreg, *srcreg);
+        }
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x86
+****************************************************************************/
+void x86emuOp_xchg_byte_RM_R(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rl, rh;
+    u8 *destreg, *srcreg;
+    uint destoffset;
+    u8 destval;
+    u8 tmp;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("XCHG\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (mod < 3) {
+        destoffset = decode_rmXX_address(mod, rl);
+        DECODE_PRINTF(",");
+        destval = fetch_data_byte(destoffset);
+        srcreg = DECODE_RM_BYTE_REGISTER(rh);
+        DECODE_PRINTF("\n");
+        TRACE_AND_STEP();
+        tmp = *srcreg;
+        *srcreg = destval;
+        destval = tmp;
+        store_data_byte(destoffset, destval);
+    } else {                     /* register to register */
+        destreg = DECODE_RM_BYTE_REGISTER(rl);
+        DECODE_PRINTF(",");
+        srcreg = DECODE_RM_BYTE_REGISTER(rh);
+        DECODE_PRINTF("\n");
+        TRACE_AND_STEP();
+        tmp = *srcreg;
+        *srcreg = *destreg;
+        *destreg = tmp;
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x87
+****************************************************************************/
+void x86emuOp_xchg_word_RM_R(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rl, rh;
+    uint destoffset;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("XCHG\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (mod < 3) {
+        destoffset = decode_rmXX_address(mod, rl);
+        DECODE_PRINTF(",");
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 *srcreg;
+            u32 destval,tmp;
+
+            destval = fetch_data_long(destoffset);
+            srcreg = DECODE_RM_LONG_REGISTER(rh);
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            tmp = *srcreg;
+            *srcreg = destval;
+            destval = tmp;
+            store_data_long(destoffset, destval);
+        } else {
+            u16 *srcreg;
+            u16 destval,tmp;
+
+            destval = fetch_data_word(destoffset);
+            srcreg = DECODE_RM_WORD_REGISTER(rh);
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            tmp = *srcreg;
+            *srcreg = destval;
+            destval = tmp;
+            store_data_word(destoffset, destval);
+        }
+    } else {                     /* register to register */
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 *destreg,*srcreg;
+            u32 tmp;
+
+            destreg = DECODE_RM_LONG_REGISTER(rl);
+            DECODE_PRINTF(",");
+            srcreg = DECODE_RM_LONG_REGISTER(rh);
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            tmp = *srcreg;
+            *srcreg = *destreg;
+            *destreg = tmp;
+        } else {
+            u16 *destreg,*srcreg;
+            u16 tmp;
+
+            destreg = DECODE_RM_WORD_REGISTER(rl);
+            DECODE_PRINTF(",");
+            srcreg = DECODE_RM_WORD_REGISTER(rh);
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            tmp = *srcreg;
+            *srcreg = *destreg;
+            *destreg = tmp;
+        }
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x88
+****************************************************************************/
+void x86emuOp_mov_byte_RM_R(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rl, rh;
+    u8 *destreg, *srcreg;
+    uint destoffset;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("MOV\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (mod < 3) {
+        destoffset = decode_rmXX_address(mod, rl);
+        DECODE_PRINTF(",");
+        srcreg = DECODE_RM_BYTE_REGISTER(rh);
+        DECODE_PRINTF("\n");
+        TRACE_AND_STEP();
+        store_data_byte(destoffset, *srcreg);
+    } else {                     /* register to register */
+        destreg = DECODE_RM_BYTE_REGISTER(rl);
+        DECODE_PRINTF(",");
+        srcreg = DECODE_RM_BYTE_REGISTER(rh);
+        DECODE_PRINTF("\n");
+        TRACE_AND_STEP();
+        *destreg = *srcreg;
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x89
+****************************************************************************/
+void x86emuOp_mov_word_RM_R(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rl, rh;
+    uint destoffset;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("MOV\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (mod < 3) {
+        destoffset = decode_rmXX_address(mod, rl);
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 *srcreg;
+
+            DECODE_PRINTF(",");
+            srcreg = DECODE_RM_LONG_REGISTER(rh);
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            store_data_long(destoffset, *srcreg);
+        } else {
+            u16 *srcreg;
+
+            DECODE_PRINTF(",");
+            srcreg = DECODE_RM_WORD_REGISTER(rh);
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            store_data_word(destoffset, *srcreg);
+        }
+    } else {                     /* register to register */
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 *destreg,*srcreg;
+
+            destreg = DECODE_RM_LONG_REGISTER(rl);
+            DECODE_PRINTF(",");
+            srcreg = DECODE_RM_LONG_REGISTER(rh);
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            *destreg = *srcreg;
+        } else {
+            u16 *destreg,*srcreg;
+
+            destreg = DECODE_RM_WORD_REGISTER(rl);
+            DECODE_PRINTF(",");
+            srcreg = DECODE_RM_WORD_REGISTER(rh);
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            *destreg = *srcreg;
+        }
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x8a
+****************************************************************************/
+void x86emuOp_mov_byte_R_RM(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rl, rh;
+    u8 *destreg, *srcreg;
+    uint srcoffset;
+    u8 srcval;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("MOV\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (mod < 3) {
+        destreg = DECODE_RM_BYTE_REGISTER(rh);
+        DECODE_PRINTF(",");
+        srcoffset = decode_rmXX_address(mod, rl);
+        srcval = fetch_data_byte(srcoffset);
+        DECODE_PRINTF("\n");
+        TRACE_AND_STEP();
+        *destreg = srcval;
+    } else {                     /* register to register */
+        destreg = DECODE_RM_BYTE_REGISTER(rh);
+        DECODE_PRINTF(",");
+        srcreg = DECODE_RM_BYTE_REGISTER(rl);
+        DECODE_PRINTF("\n");
+        TRACE_AND_STEP();
+        *destreg = *srcreg;
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x8b
+****************************************************************************/
+void x86emuOp_mov_word_R_RM(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rl, rh;
+    uint srcoffset;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("MOV\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (mod < 3) {
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 *destreg;
+            u32 srcval;
+
+            destreg = DECODE_RM_LONG_REGISTER(rh);
+            DECODE_PRINTF(",");
+            srcoffset = decode_rmXX_address(mod, rl);
+            srcval = fetch_data_long(srcoffset);
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            *destreg = srcval;
+        } else {
+            u16 *destreg;
+            u16 srcval;
+
+            destreg = DECODE_RM_WORD_REGISTER(rh);
+            DECODE_PRINTF(",");
+            srcoffset = decode_rmXX_address(mod, rl);
+            srcval = fetch_data_word(srcoffset);
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            *destreg = srcval;
+        }
+    } else {                     /* register to register */
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 *destreg, *srcreg;
+
+            destreg = DECODE_RM_LONG_REGISTER(rh);
+            DECODE_PRINTF(",");
+            srcreg = DECODE_RM_LONG_REGISTER(rl);
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            *destreg = *srcreg;
+        } else {
+            u16 *destreg, *srcreg;
+
+            destreg = DECODE_RM_WORD_REGISTER(rh);
+            DECODE_PRINTF(",");
+            srcreg = DECODE_RM_WORD_REGISTER(rl);
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            *destreg = *srcreg;
+        }
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x8c
+****************************************************************************/
+void x86emuOp_mov_word_RM_SR(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rl, rh;
+    u16 *destreg, *srcreg;
+    uint destoffset;
+    u16 destval;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("MOV\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (mod < 3) {
+        destoffset = decode_rmXX_address(mod, rl);
+        DECODE_PRINTF(",");
+        srcreg = decode_rm_seg_register(rh);
+        DECODE_PRINTF("\n");
+        TRACE_AND_STEP();
+        destval = *srcreg;
+        store_data_word(destoffset, destval);
+    } else {                     /* register to register */
+        destreg = DECODE_RM_WORD_REGISTER(rl);
+        DECODE_PRINTF(",");
+        srcreg = decode_rm_seg_register(rh);
+        DECODE_PRINTF("\n");
+        TRACE_AND_STEP();
+        *destreg = *srcreg;
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x8d
+****************************************************************************/
+void x86emuOp_lea_word_R_M(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rl, rh;
+    u16 *srcreg;
+    uint destoffset;
+
+/*
+ * TODO: Need to handle address size prefix!
+ *
+ * lea  eax,[eax+ebx*2] ??
+ */
+
+    START_OF_INSTR();
+    DECODE_PRINTF("LEA\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (mod < 3) {
+        srcreg = DECODE_RM_WORD_REGISTER(rh);
+        DECODE_PRINTF(",");
+        destoffset = decode_rmXX_address(mod, rl);
+        DECODE_PRINTF("\n");
+        TRACE_AND_STEP();
+        *srcreg = (u16)destoffset;
+        }
+    /* } else { undefined.  Do nothing. } */
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x8e
+****************************************************************************/
+void x86emuOp_mov_word_SR_RM(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rl, rh;
+    u16 *destreg, *srcreg;
+    uint srcoffset;
+    u16 srcval;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("MOV\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (mod < 3) {
+        destreg = decode_rm_seg_register(rh);
+        DECODE_PRINTF(",");
+        srcoffset = decode_rmXX_address(mod, rl);
+        srcval = fetch_data_word(srcoffset);
+        DECODE_PRINTF("\n");
+        TRACE_AND_STEP();
+        *destreg = srcval;
+    } else {                     /* register to register */
+        destreg = decode_rm_seg_register(rh);
+        DECODE_PRINTF(",");
+        srcreg = DECODE_RM_WORD_REGISTER(rl);
+        DECODE_PRINTF("\n");
+        TRACE_AND_STEP();
+        *destreg = *srcreg;
+    }
+    /*
+     * Clean up, and reset all the R_xSP pointers to the correct
+     * locations.  This is about 3x too much overhead (doing all the
+     * segreg ptrs when only one is needed, but this instruction
+     * *cannot* be that common, and this isn't too much work anyway.
+     */
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x8f
+****************************************************************************/
+void x86emuOp_pop_RM(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rl, rh;
+    uint destoffset;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("POP\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (rh != 0) {
+        DECODE_PRINTF("ILLEGAL DECODE OF OPCODE 8F\n");
+        HALT_SYS();
+    }
+    if (mod < 3) {
+        destoffset = decode_rmXX_address(mod, rl);
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 destval;
+
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            destval = pop_long();
+            store_data_long(destoffset, destval);
+        } else {
+            u16 destval;
+
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            destval = pop_word();
+            store_data_word(destoffset, destval);
+        }
+    } else {                    /* register to register */
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 *destreg;
+
+            destreg = DECODE_RM_LONG_REGISTER(rl);
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            *destreg = pop_long();
+        } else {
+            u16 *destreg;
+
+            destreg = DECODE_RM_WORD_REGISTER(rl);
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            *destreg = pop_word();
+        }
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x90
+****************************************************************************/
+void x86emuOp_nop(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("NOP\n");
+    TRACE_AND_STEP();
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x91-0x97
+****************************************************************************/
+void x86emuOp_xchg_word_AX_register(u8 X86EMU_UNUSED(op1))
+{
+    u32 tmp;
+
+    op1 &= 0x7;
+
+    START_OF_INSTR();
+
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        u32 *reg32;
+        DECODE_PRINTF("XCHG\tEAX,");
+        reg32 = DECODE_RM_LONG_REGISTER(op1);
+        DECODE_PRINTF("\n");
+        TRACE_AND_STEP();
+        tmp = M.x86.R_EAX;
+        M.x86.R_EAX = *reg32;
+        *reg32 = tmp;
+    } else {
+        u16 *reg16;
+        DECODE_PRINTF("XCHG\tAX,");
+        reg16 = DECODE_RM_WORD_REGISTER(op1);
+        DECODE_PRINTF("\n");
+        TRACE_AND_STEP();
+        tmp = M.x86.R_AX;
+        M.x86.R_AX = *reg16;
+        *reg16 = (u16)tmp;
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x98
+****************************************************************************/
+void x86emuOp_cbw(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        DECODE_PRINTF("CWDE\n");
+    } else {
+        DECODE_PRINTF("CBW\n");
+    }
+    TRACE_AND_STEP();
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        if (M.x86.R_AX & 0x8000) {
+            M.x86.R_EAX |= 0xffff0000;
+        } else {
+            M.x86.R_EAX &= 0x0000ffff;
+        }
+    } else {
+        if (M.x86.R_AL & 0x80) {
+            M.x86.R_AH = 0xff;
+        } else {
+            M.x86.R_AH = 0x0;
+        }
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x99
+****************************************************************************/
+void x86emuOp_cwd(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        DECODE_PRINTF("CDQ\n");
+    } else {
+        DECODE_PRINTF("CWD\n");
+    }
+    DECODE_PRINTF("CWD\n");
+    TRACE_AND_STEP();
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        if (M.x86.R_EAX & 0x80000000) {
+            M.x86.R_EDX = 0xffffffff;
+        } else {
+            M.x86.R_EDX = 0x0;
+        }
+    } else {
+        if (M.x86.R_AX & 0x8000) {
+            M.x86.R_DX = 0xffff;
+        } else {
+            M.x86.R_DX = 0x0;
+        }
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x9a
+****************************************************************************/
+void x86emuOp_call_far_IMM(u8 X86EMU_UNUSED(op1))
+{
+    u16 farseg, faroff;
+
+    START_OF_INSTR();
+	DECODE_PRINTF("CALL\t");
+	faroff = fetch_word_imm();
+	farseg = fetch_word_imm();
+	DECODE_PRINTF2("%04x:", farseg);
+	DECODE_PRINTF2("%04x\n", faroff);
+	CALL_TRACE(M.x86.saved_cs, M.x86.saved_ip, farseg, faroff, "FAR ");
+
+    /* XXX
+     *
+     * Hooked interrupt vectors calling into our "BIOS" will cause
+     * problems unless all intersegment stuff is checked for BIOS
+     * access.  Check needed here.  For moment, let it alone.
+     */
+    TRACE_AND_STEP();
+    push_word(M.x86.R_CS);
+    M.x86.R_CS = farseg;
+    push_word(M.x86.R_IP);
+    M.x86.R_IP = faroff;
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x9b
+****************************************************************************/
+void x86emuOp_wait(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("WAIT");
+    TRACE_AND_STEP();
+    /* NADA.  */
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x9c
+****************************************************************************/
+void x86emuOp_pushf_word(u8 X86EMU_UNUSED(op1))
+{
+    u32 flags;
+
+    START_OF_INSTR();
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        DECODE_PRINTF("PUSHFD\n");
+    } else {
+        DECODE_PRINTF("PUSHF\n");
+    }
+    TRACE_AND_STEP();
+
+    /* clear out *all* bits not representing flags, and turn on real bits */
+    flags = (M.x86.R_EFLG & F_MSK) | F_ALWAYS_ON;
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        push_long(flags);
+    } else {
+        push_word((u16)flags);
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x9d
+****************************************************************************/
+void x86emuOp_popf_word(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        DECODE_PRINTF("POPFD\n");
+    } else {
+        DECODE_PRINTF("POPF\n");
+    }
+    TRACE_AND_STEP();
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        M.x86.R_EFLG = pop_long();
+    } else {
+        M.x86.R_FLG = pop_word();
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x9e
+****************************************************************************/
+void x86emuOp_sahf(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("SAHF\n");
+    TRACE_AND_STEP();
+    /* clear the lower bits of the flag register */
+    M.x86.R_FLG &= 0xffffff00;
+    /* or in the AH register into the flags register */
+    M.x86.R_FLG |= M.x86.R_AH;
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x9f
+****************************************************************************/
+void x86emuOp_lahf(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("LAHF\n");
+    TRACE_AND_STEP();
+	M.x86.R_AH = (u8)(M.x86.R_FLG & 0xff);
+    /*undocumented TC++ behavior??? Nope.  It's documented, but
+       you have too look real hard to notice it. */
+    M.x86.R_AH |= 0x2;
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xa0
+****************************************************************************/
+void x86emuOp_mov_AL_M_IMM(u8 X86EMU_UNUSED(op1))
+{
+    u16 offset;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("MOV\tAL,");
+    offset = fetch_word_imm();
+    DECODE_PRINTF2("[%04x]\n", offset);
+    TRACE_AND_STEP();
+    M.x86.R_AL = fetch_data_byte(offset);
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xa1
+****************************************************************************/
+void x86emuOp_mov_AX_M_IMM(u8 X86EMU_UNUSED(op1))
+{
+    u16 offset;
+
+    START_OF_INSTR();
+    offset = fetch_word_imm();
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        DECODE_PRINTF2("MOV\tEAX,[%04x]\n", offset);
+    } else {
+        DECODE_PRINTF2("MOV\tAX,[%04x]\n", offset);
+    }
+    TRACE_AND_STEP();
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        M.x86.R_EAX = fetch_data_long(offset);
+    } else {
+        M.x86.R_AX = fetch_data_word(offset);
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xa2
+****************************************************************************/
+void x86emuOp_mov_M_AL_IMM(u8 X86EMU_UNUSED(op1))
+{
+    u16 offset;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("MOV\t");
+    offset = fetch_word_imm();
+    DECODE_PRINTF2("[%04x],AL\n", offset);
+    TRACE_AND_STEP();
+    store_data_byte(offset, M.x86.R_AL);
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xa3
+****************************************************************************/
+void x86emuOp_mov_M_AX_IMM(u8 X86EMU_UNUSED(op1))
+{
+    u16 offset;
+
+    START_OF_INSTR();
+    offset = fetch_word_imm();
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        DECODE_PRINTF2("MOV\t[%04x],EAX\n", offset);
+    } else {
+        DECODE_PRINTF2("MOV\t[%04x],AX\n", offset);
+    }
+    TRACE_AND_STEP();
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        store_data_long(offset, M.x86.R_EAX);
+    } else {
+        store_data_word(offset, M.x86.R_AX);
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xa4
+****************************************************************************/
+void x86emuOp_movs_byte(u8 X86EMU_UNUSED(op1))
+{
+    u8  val;
+    u32 count;
+    int inc;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("MOVS\tBYTE\n");
+    if (ACCESS_FLAG(F_DF))   /* down */
+        inc = -1;
+    else
+        inc = 1;
+    TRACE_AND_STEP();
+    count = 1;
+    if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
+        /* dont care whether REPE or REPNE */
+        /* move them until CX is ZERO. */
+        count = M.x86.R_CX;
+        M.x86.R_CX = 0;
+        M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
+    }
+    while (count--) {
+        val = fetch_data_byte(M.x86.R_SI);
+        store_data_byte_abs(M.x86.R_ES, M.x86.R_DI, val);
+        M.x86.R_SI += inc;
+        M.x86.R_DI += inc;
+        if (M.x86.intr & INTR_HALTED)
+            break;
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xa5
+****************************************************************************/
+void x86emuOp_movs_word(u8 X86EMU_UNUSED(op1))
+{
+    u32 val;
+    int inc;
+    u32 count;
+
+    START_OF_INSTR();
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        DECODE_PRINTF("MOVS\tDWORD\n");
+        if (ACCESS_FLAG(F_DF))      /* down */
+            inc = -4;
+        else
+            inc = 4;
+    } else {
+        DECODE_PRINTF("MOVS\tWORD\n");
+        if (ACCESS_FLAG(F_DF))      /* down */
+            inc = -2;
+        else
+            inc = 2;
+    }
+    TRACE_AND_STEP();
+    count = 1;
+    if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
+        /* dont care whether REPE or REPNE */
+        /* move them until CX is ZERO. */
+        count = M.x86.R_CX;
+        M.x86.R_CX = 0;
+        M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
+    }
+    while (count--) {
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            val = fetch_data_long(M.x86.R_SI);
+            store_data_long_abs(M.x86.R_ES, M.x86.R_DI, val);
+        } else {
+            val = fetch_data_word(M.x86.R_SI);
+            store_data_word_abs(M.x86.R_ES, M.x86.R_DI, (u16)val);
+        }
+        M.x86.R_SI += inc;
+        M.x86.R_DI += inc;
+        if (M.x86.intr & INTR_HALTED)
+            break;
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xa6
+****************************************************************************/
+void x86emuOp_cmps_byte(u8 X86EMU_UNUSED(op1))
+{
+    s8 val1, val2;
+    int inc;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("CMPS\tBYTE\n");
+    TRACE_AND_STEP();
+    if (ACCESS_FLAG(F_DF))   /* down */
+        inc = -1;
+    else
+        inc = 1;
+
+    if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
+        /* REPE  */
+        /* move them until CX is ZERO. */
+        while (M.x86.R_CX != 0) {
+            val1 = fetch_data_byte(M.x86.R_SI);
+            val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI);
+                     cmp_byte(val1, val2);
+            M.x86.R_CX -= 1;
+            M.x86.R_SI += inc;
+            M.x86.R_DI += inc;
+            if ( (M.x86.mode & SYSMODE_PREFIX_REPE) && (ACCESS_FLAG(F_ZF) == 0) ) break;
+            if ( (M.x86.mode & SYSMODE_PREFIX_REPNE) && ACCESS_FLAG(F_ZF) ) break;
+            if (M.x86.intr & INTR_HALTED)
+                break;
+        }
+        M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
+    } else {
+        val1 = fetch_data_byte(M.x86.R_SI);
+        val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI);
+        cmp_byte(val1, val2);
+        M.x86.R_SI += inc;
+        M.x86.R_DI += inc;
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xa7
+****************************************************************************/
+void x86emuOp_cmps_word(u8 X86EMU_UNUSED(op1))
+{
+    u32 val1,val2;
+    int inc;
+
+    START_OF_INSTR();
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        DECODE_PRINTF("CMPS\tDWORD\n");
+        inc = 4;
+    } else {
+        DECODE_PRINTF("CMPS\tWORD\n");
+        inc = 2;
+    }
+    if (ACCESS_FLAG(F_DF))   /* down */
+        inc = -inc;
+
+    TRACE_AND_STEP();
+    if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
+        /* REPE  */
+        /* move them until CX is ZERO. */
+        while (M.x86.R_CX != 0) {
+            if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+                val1 = fetch_data_long(M.x86.R_SI);
+                val2 = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI);
+                cmp_long(val1, val2);
+            } else {
+                val1 = fetch_data_word(M.x86.R_SI);
+                val2 = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI);
+                cmp_word((u16)val1, (u16)val2);
+            }
+            M.x86.R_CX -= 1;
+            M.x86.R_SI += inc;
+            M.x86.R_DI += inc;
+            if ( (M.x86.mode & SYSMODE_PREFIX_REPE) && ACCESS_FLAG(F_ZF) == 0 ) break;
+            if ( (M.x86.mode & SYSMODE_PREFIX_REPNE) && ACCESS_FLAG(F_ZF) ) break;
+            if (M.x86.intr & INTR_HALTED)
+                break;
+        }
+        M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
+    } else {
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            val1 = fetch_data_long(M.x86.R_SI);
+            val2 = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI);
+            cmp_long(val1, val2);
+        } else {
+            val1 = fetch_data_word(M.x86.R_SI);
+            val2 = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI);
+            cmp_word((u16)val1, (u16)val2);
+        }
+        M.x86.R_SI += inc;
+        M.x86.R_DI += inc;
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xa8
+****************************************************************************/
+void x86emuOp_test_AL_IMM(u8 X86EMU_UNUSED(op1))
+{
+    int imm;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("TEST\tAL,");
+    imm = fetch_byte_imm();
+    DECODE_PRINTF2("%04x\n", imm);
+    TRACE_AND_STEP();
+	test_byte(M.x86.R_AL, (u8)imm);
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xa9
+****************************************************************************/
+void x86emuOp_test_AX_IMM(u8 X86EMU_UNUSED(op1))
+{
+    u32 srcval;
+
+    START_OF_INSTR();
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        DECODE_PRINTF("TEST\tEAX,");
+        srcval = fetch_long_imm();
+    } else {
+        DECODE_PRINTF("TEST\tAX,");
+        srcval = fetch_word_imm();
+    }
+    DECODE_PRINTF2("%x\n", srcval);
+    TRACE_AND_STEP();
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        test_long(M.x86.R_EAX, srcval);
+    } else {
+        test_word(M.x86.R_AX, (u16)srcval);
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xaa
+****************************************************************************/
+void x86emuOp_stos_byte(u8 X86EMU_UNUSED(op1))
+{
+    int inc;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("STOS\tBYTE\n");
+    if (ACCESS_FLAG(F_DF))   /* down */
+        inc = -1;
+    else
+        inc = 1;
+    TRACE_AND_STEP();
+    if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
+        /* dont care whether REPE or REPNE */
+        /* move them until CX is ZERO. */
+        while (M.x86.R_CX != 0) {
+            store_data_byte_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_AL);
+            M.x86.R_CX -= 1;
+            M.x86.R_DI += inc;
+            if (M.x86.intr & INTR_HALTED)
+                break;
+        }
+        M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
+    } else {
+        store_data_byte_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_AL);
+        M.x86.R_DI += inc;
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xab
+****************************************************************************/
+void x86emuOp_stos_word(u8 X86EMU_UNUSED(op1))
+{
+    int inc;
+    u32 count;
+
+    START_OF_INSTR();
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        DECODE_PRINTF("STOS\tDWORD\n");
+        if (ACCESS_FLAG(F_DF))   /* down */
+            inc = -4;
+        else
+            inc = 4;
+    } else {
+        DECODE_PRINTF("STOS\tWORD\n");
+        if (ACCESS_FLAG(F_DF))   /* down */
+            inc = -2;
+        else
+            inc = 2;
+    }
+    TRACE_AND_STEP();
+    count = 1;
+    if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
+        /* dont care whether REPE or REPNE */
+        /* move them until CX is ZERO. */
+        count = M.x86.R_CX;
+        M.x86.R_CX = 0;
+        M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
+    }
+    while (count--) {
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            store_data_long_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_EAX);
+        } else {
+            store_data_word_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_AX);
+        }
+        M.x86.R_DI += inc;
+        if (M.x86.intr & INTR_HALTED)
+            break;
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xac
+****************************************************************************/
+void x86emuOp_lods_byte(u8 X86EMU_UNUSED(op1))
+{
+    int inc;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("LODS\tBYTE\n");
+    TRACE_AND_STEP();
+    if (ACCESS_FLAG(F_DF))   /* down */
+        inc = -1;
+    else
+        inc = 1;
+    if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
+        /* dont care whether REPE or REPNE */
+        /* move them until CX is ZERO. */
+        while (M.x86.R_CX != 0) {
+            M.x86.R_AL = fetch_data_byte(M.x86.R_SI);
+            M.x86.R_CX -= 1;
+            M.x86.R_SI += inc;
+            if (M.x86.intr & INTR_HALTED)
+                break;
+        }
+        M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
+    } else {
+        M.x86.R_AL = fetch_data_byte(M.x86.R_SI);
+        M.x86.R_SI += inc;
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xad
+****************************************************************************/
+void x86emuOp_lods_word(u8 X86EMU_UNUSED(op1))
+{
+    int inc;
+    u32 count;
+
+    START_OF_INSTR();
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        DECODE_PRINTF("LODS\tDWORD\n");
+        if (ACCESS_FLAG(F_DF))   /* down */
+            inc = -4;
+        else
+            inc = 4;
+    } else {
+        DECODE_PRINTF("LODS\tWORD\n");
+        if (ACCESS_FLAG(F_DF))   /* down */
+            inc = -2;
+        else
+            inc = 2;
+    }
+    TRACE_AND_STEP();
+    count = 1;
+    if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
+        /* dont care whether REPE or REPNE */
+        /* move them until CX is ZERO. */
+        count = M.x86.R_CX;
+        M.x86.R_CX = 0;
+        M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
+    }
+    while (count--) {
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            M.x86.R_EAX = fetch_data_long(M.x86.R_SI);
+        } else {
+            M.x86.R_AX = fetch_data_word(M.x86.R_SI);
+        }
+        M.x86.R_SI += inc;
+        if (M.x86.intr & INTR_HALTED)
+            break;
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xae
+****************************************************************************/
+void x86emuOp_scas_byte(u8 X86EMU_UNUSED(op1))
+{
+    s8 val2;
+    int inc;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("SCAS\tBYTE\n");
+    TRACE_AND_STEP();
+    if (ACCESS_FLAG(F_DF))   /* down */
+        inc = -1;
+    else
+        inc = 1;
+    if (M.x86.mode & SYSMODE_PREFIX_REPE) {
+        /* REPE  */
+        /* move them until CX is ZERO. */
+        while (M.x86.R_CX != 0) {
+            val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI);
+            cmp_byte(M.x86.R_AL, val2);
+            M.x86.R_CX -= 1;
+            M.x86.R_DI += inc;
+            if (ACCESS_FLAG(F_ZF) == 0)
+                break;
+            if (M.x86.intr & INTR_HALTED)
+                break;
+        }
+        M.x86.mode &= ~SYSMODE_PREFIX_REPE;
+    } else if (M.x86.mode & SYSMODE_PREFIX_REPNE) {
+        /* REPNE  */
+        /* move them until CX is ZERO. */
+        while (M.x86.R_CX != 0) {
+            val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI);
+            cmp_byte(M.x86.R_AL, val2);
+            M.x86.R_CX -= 1;
+            M.x86.R_DI += inc;
+            if (ACCESS_FLAG(F_ZF))
+                break;          /* zero flag set means equal */
+            if (M.x86.intr & INTR_HALTED)
+                break;
+        }
+        M.x86.mode &= ~SYSMODE_PREFIX_REPNE;
+    } else {
+        val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI);
+        cmp_byte(M.x86.R_AL, val2);
+        M.x86.R_DI += inc;
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xaf
+****************************************************************************/
+void x86emuOp_scas_word(u8 X86EMU_UNUSED(op1))
+{
+    int inc;
+    u32 val;
+
+    START_OF_INSTR();
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        DECODE_PRINTF("SCAS\tDWORD\n");
+        if (ACCESS_FLAG(F_DF))   /* down */
+            inc = -4;
+        else
+            inc = 4;
+    } else {
+        DECODE_PRINTF("SCAS\tWORD\n");
+        if (ACCESS_FLAG(F_DF))   /* down */
+            inc = -2;
+        else
+            inc = 2;
+    }
+    TRACE_AND_STEP();
+    if (M.x86.mode & SYSMODE_PREFIX_REPE) {
+        /* REPE  */
+        /* move them until CX is ZERO. */
+        while (M.x86.R_CX != 0) {
+            if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+                val = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI);
+                cmp_long(M.x86.R_EAX, val);
+            } else {
+                val = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI);
+                cmp_word(M.x86.R_AX, (u16)val);
+            }
+            M.x86.R_CX -= 1;
+            M.x86.R_DI += inc;
+            if (ACCESS_FLAG(F_ZF) == 0)
+                break;
+            if (M.x86.intr & INTR_HALTED)
+                break;
+        }
+        M.x86.mode &= ~SYSMODE_PREFIX_REPE;
+    } else if (M.x86.mode & SYSMODE_PREFIX_REPNE) {
+        /* REPNE  */
+        /* move them until CX is ZERO. */
+        while (M.x86.R_CX != 0) {
+            if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+                val = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI);
+                cmp_long(M.x86.R_EAX, val);
+            } else {
+                val = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI);
+                cmp_word(M.x86.R_AX, (u16)val);
+            }
+            M.x86.R_CX -= 1;
+            M.x86.R_DI += inc;
+            if (ACCESS_FLAG(F_ZF))
+                break;          /* zero flag set means equal */
+            if (M.x86.intr & INTR_HALTED)
+                break;
+        }
+        M.x86.mode &= ~SYSMODE_PREFIX_REPNE;
+    } else {
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            val = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI);
+            cmp_long(M.x86.R_EAX, val);
+        } else {
+            val = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI);
+            cmp_word(M.x86.R_AX, (u16)val);
+        }
+        M.x86.R_DI += inc;
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xb0 - 0xb7
+****************************************************************************/
+void x86emuOp_mov_byte_register_IMM(u8 op1)
+{
+    u8 imm, *ptr;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("MOV\t");
+    ptr = DECODE_RM_BYTE_REGISTER(op1 & 0x7);
+    DECODE_PRINTF(",");
+    imm = fetch_byte_imm();
+    DECODE_PRINTF2("%x\n", imm);
+    TRACE_AND_STEP();
+    *ptr = imm;
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xb8 - 0xbf
+****************************************************************************/
+void x86emuOp_mov_word_register_IMM(u8 X86EMU_UNUSED(op1))
+{
+    u32 srcval;
+
+    op1 &= 0x7;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("MOV\t");
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        u32 *reg32;
+        reg32 = DECODE_RM_LONG_REGISTER(op1);
+        srcval = fetch_long_imm();
+        DECODE_PRINTF2(",%x\n", srcval);
+        TRACE_AND_STEP();
+        *reg32 = srcval;
+    } else {
+        u16 *reg16;
+        reg16 = DECODE_RM_WORD_REGISTER(op1);
+        srcval = fetch_word_imm();
+        DECODE_PRINTF2(",%x\n", srcval);
+        TRACE_AND_STEP();
+        *reg16 = (u16)srcval;
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xc0
+****************************************************************************/
+void x86emuOp_opcC0_byte_RM_MEM(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rl, rh;
+    u8 *destreg;
+    uint destoffset;
+    u8 destval;
+    u8 amt;
+
+    /*
+     * Yet another weirdo special case instruction format.  Part of
+     * the opcode held below in "RH".  Doubly nested case would
+     * result, except that the decoded instruction
+     */
+    START_OF_INSTR();
+    FETCH_DECODE_MODRM(mod, rh, rl);
+#ifdef DEBUG
+    if (DEBUG_DECODE()) {
+        /* XXX DECODE_PRINTF may be changed to something more
+           general, so that it is important to leave the strings
+           in the same format, even though the result is that the
+           above test is done twice. */
+
+        switch (rh) {
+        case 0:
+            DECODE_PRINTF("ROL\t");
+            break;
+        case 1:
+            DECODE_PRINTF("ROR\t");
+            break;
+        case 2:
+            DECODE_PRINTF("RCL\t");
+            break;
+        case 3:
+            DECODE_PRINTF("RCR\t");
+            break;
+        case 4:
+            DECODE_PRINTF("SHL\t");
+            break;
+        case 5:
+            DECODE_PRINTF("SHR\t");
+            break;
+        case 6:
+            DECODE_PRINTF("SAL\t");
+            break;
+        case 7:
+            DECODE_PRINTF("SAR\t");
+            break;
+        }
+    }
+#endif
+    /* know operation, decode the mod byte to find the addressing
+       mode. */
+    if (mod < 3) {
+        DECODE_PRINTF("BYTE PTR ");
+        destoffset = decode_rmXX_address(mod, rl);
+        amt = fetch_byte_imm();
+        DECODE_PRINTF2(",%x\n", amt);
+        destval = fetch_data_byte(destoffset);
+        TRACE_AND_STEP();
+        destval = (*opcD0_byte_operation[rh]) (destval, amt);
+        store_data_byte(destoffset, destval);
+    } else {                     /* register to register */
+        destreg = DECODE_RM_BYTE_REGISTER(rl);
+        amt = fetch_byte_imm();
+        DECODE_PRINTF2(",%x\n", amt);
+        TRACE_AND_STEP();
+        destval = (*opcD0_byte_operation[rh]) (*destreg, amt);
+        *destreg = destval;
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xc1
+****************************************************************************/
+void x86emuOp_opcC1_word_RM_MEM(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rl, rh;
+    uint destoffset;
+    u8 amt;
+
+    /*
+     * Yet another weirdo special case instruction format.  Part of
+     * the opcode held below in "RH".  Doubly nested case would
+     * result, except that the decoded instruction
+     */
+    START_OF_INSTR();
+    FETCH_DECODE_MODRM(mod, rh, rl);
+#ifdef DEBUG
+    if (DEBUG_DECODE()) {
+        /* XXX DECODE_PRINTF may be changed to something more
+           general, so that it is important to leave the strings
+           in the same format, even though the result is that the
+           above test is done twice. */
+
+        switch (rh) {
+        case 0:
+            DECODE_PRINTF("ROL\t");
+            break;
+        case 1:
+            DECODE_PRINTF("ROR\t");
+            break;
+        case 2:
+            DECODE_PRINTF("RCL\t");
+            break;
+        case 3:
+            DECODE_PRINTF("RCR\t");
+            break;
+        case 4:
+            DECODE_PRINTF("SHL\t");
+            break;
+        case 5:
+            DECODE_PRINTF("SHR\t");
+            break;
+        case 6:
+            DECODE_PRINTF("SAL\t");
+            break;
+        case 7:
+            DECODE_PRINTF("SAR\t");
+            break;
+        }
+    }
+#endif
+    /* know operation, decode the mod byte to find the addressing
+       mode. */
+    if (mod < 3) {
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 destval;
+
+            DECODE_PRINTF("DWORD PTR ");
+            destoffset = decode_rmXX_address(mod, rl);
+            amt = fetch_byte_imm();
+            DECODE_PRINTF2(",%x\n", amt);
+            destval = fetch_data_long(destoffset);
+            TRACE_AND_STEP();
+            destval = (*opcD1_long_operation[rh]) (destval, amt);
+            store_data_long(destoffset, destval);
+        } else {
+            u16 destval;
+
+            DECODE_PRINTF("WORD PTR ");
+            destoffset = decode_rmXX_address(mod, rl);
+            amt = fetch_byte_imm();
+            DECODE_PRINTF2(",%x\n", amt);
+            destval = fetch_data_word(destoffset);
+            TRACE_AND_STEP();
+            destval = (*opcD1_word_operation[rh]) (destval, amt);
+            store_data_word(destoffset, destval);
+        }
+    } else {                     /* register to register */
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 *destreg;
+
+            destreg = DECODE_RM_LONG_REGISTER(rl);
+            amt = fetch_byte_imm();
+            DECODE_PRINTF2(",%x\n", amt);
+            TRACE_AND_STEP();
+            *destreg = (*opcD1_long_operation[rh]) (*destreg, amt);
+        } else {
+            u16 *destreg;
+
+            destreg = DECODE_RM_WORD_REGISTER(rl);
+            amt = fetch_byte_imm();
+            DECODE_PRINTF2(",%x\n", amt);
+            TRACE_AND_STEP();
+            *destreg = (*opcD1_word_operation[rh]) (*destreg, amt);
+        }
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xc2
+****************************************************************************/
+void x86emuOp_ret_near_IMM(u8 X86EMU_UNUSED(op1))
+{
+    u16 imm;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("RET\t");
+    imm = fetch_word_imm();
+    DECODE_PRINTF2("%x\n", imm);
+	RETURN_TRACE("RET",M.x86.saved_cs,M.x86.saved_ip);
+	TRACE_AND_STEP();
+    M.x86.R_IP = pop_word();
+    M.x86.R_SP += imm;
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xc3
+****************************************************************************/
+void x86emuOp_ret_near(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("RET\n");
+	RETURN_TRACE("RET",M.x86.saved_cs,M.x86.saved_ip);
+	TRACE_AND_STEP();
+    M.x86.R_IP = pop_word();
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xc4
+****************************************************************************/
+void x86emuOp_les_R_IMM(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rh, rl;
+    u16 *dstreg;
+    uint srcoffset;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("LES\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (mod < 3) {
+        dstreg = DECODE_RM_WORD_REGISTER(rh);
+        DECODE_PRINTF(",");
+        srcoffset = decode_rmXX_address(mod, rl);
+        DECODE_PRINTF("\n");
+        TRACE_AND_STEP();
+        *dstreg = fetch_data_word(srcoffset);
+        M.x86.R_ES = fetch_data_word(srcoffset + 2);
+    }
+    /* else UNDEFINED!                   register to register */
+
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xc5
+****************************************************************************/
+void x86emuOp_lds_R_IMM(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rh, rl;
+    u16 *dstreg;
+    uint srcoffset;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("LDS\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (mod < 3) {
+        dstreg = DECODE_RM_WORD_REGISTER(rh);
+        DECODE_PRINTF(",");
+        srcoffset = decode_rmXX_address(mod, rl);
+        DECODE_PRINTF("\n");
+        TRACE_AND_STEP();
+        *dstreg = fetch_data_word(srcoffset);
+        M.x86.R_DS = fetch_data_word(srcoffset + 2);
+    }
+    /* else UNDEFINED! */
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xc6
+****************************************************************************/
+void x86emuOp_mov_byte_RM_IMM(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rl, rh;
+    u8 *destreg;
+    uint destoffset;
+    u8 imm;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("MOV\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (rh != 0) {
+        DECODE_PRINTF("ILLEGAL DECODE OF OPCODE c6\n");
+        HALT_SYS();
+    }
+    if (mod < 3) {
+        DECODE_PRINTF("BYTE PTR ");
+        destoffset = decode_rmXX_address(mod, rl);
+        imm = fetch_byte_imm();
+        DECODE_PRINTF2(",%2x\n", imm);
+        TRACE_AND_STEP();
+        store_data_byte(destoffset, imm);
+    } else {                     /* register to register */
+        destreg = DECODE_RM_BYTE_REGISTER(rl);
+        imm = fetch_byte_imm();
+        DECODE_PRINTF2(",%2x\n", imm);
+        TRACE_AND_STEP();
+        *destreg = imm;
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xc7
+****************************************************************************/
+void x86emuOp_mov_word_RM_IMM(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rl, rh;
+    uint destoffset;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("MOV\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (rh != 0) {
+        DECODE_PRINTF("ILLEGAL DECODE OF OPCODE 8F\n");
+        HALT_SYS();
+    }
+    if (mod < 3) {
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 imm;
+
+            DECODE_PRINTF("DWORD PTR ");
+            destoffset = decode_rmXX_address(mod, rl);
+            imm = fetch_long_imm();
+            DECODE_PRINTF2(",%x\n", imm);
+            TRACE_AND_STEP();
+            store_data_long(destoffset, imm);
+        } else {
+            u16 imm;
+
+            DECODE_PRINTF("WORD PTR ");
+            destoffset = decode_rmXX_address(mod, rl);
+            imm = fetch_word_imm();
+            DECODE_PRINTF2(",%x\n", imm);
+            TRACE_AND_STEP();
+            store_data_word(destoffset, imm);
+        }
+    } else {                     /* register to register */
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+			u32 *destreg;
+			u32 imm;
+
+            destreg = DECODE_RM_LONG_REGISTER(rl);
+            imm = fetch_long_imm();
+            DECODE_PRINTF2(",%x\n", imm);
+            TRACE_AND_STEP();
+            *destreg = imm;
+        } else {
+			u16 *destreg;
+			u16 imm;
+
+            destreg = DECODE_RM_WORD_REGISTER(rl);
+            imm = fetch_word_imm();
+            DECODE_PRINTF2(",%x\n", imm);
+            TRACE_AND_STEP();
+            *destreg = imm;
+        }
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xc8
+****************************************************************************/
+void x86emuOp_enter(u8 X86EMU_UNUSED(op1))
+{
+    u16 local,frame_pointer;
+    u8  nesting;
+    int i;
+
+    START_OF_INSTR();
+    local = fetch_word_imm();
+    nesting = fetch_byte_imm();
+    DECODE_PRINTF2("ENTER %x\n", local);
+    DECODE_PRINTF2(",%x\n", nesting);
+    TRACE_AND_STEP();
+    push_word(M.x86.R_BP);
+    frame_pointer = M.x86.R_SP;
+    if (nesting > 0) {
+        for (i = 1; i < nesting; i++) {
+            M.x86.R_BP -= 2;
+            push_word(fetch_data_word_abs(M.x86.R_SS, M.x86.R_BP));
+            }
+        push_word(frame_pointer);
+        }
+    M.x86.R_BP = frame_pointer;
+    M.x86.R_SP = (u16)(M.x86.R_SP - local);
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xc9
+****************************************************************************/
+void x86emuOp_leave(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("LEAVE\n");
+    TRACE_AND_STEP();
+    M.x86.R_SP = M.x86.R_BP;
+    M.x86.R_BP = pop_word();
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xca
+****************************************************************************/
+void x86emuOp_ret_far_IMM(u8 X86EMU_UNUSED(op1))
+{
+    u16 imm;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("RETF\t");
+    imm = fetch_word_imm();
+    DECODE_PRINTF2("%x\n", imm);
+	RETURN_TRACE("RETF",M.x86.saved_cs,M.x86.saved_ip);
+	TRACE_AND_STEP();
+    M.x86.R_IP = pop_word();
+    M.x86.R_CS = pop_word();
+    M.x86.R_SP += imm;
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xcb
+****************************************************************************/
+void x86emuOp_ret_far(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("RETF\n");
+	RETURN_TRACE("RETF",M.x86.saved_cs,M.x86.saved_ip);
+	TRACE_AND_STEP();
+    M.x86.R_IP = pop_word();
+    M.x86.R_CS = pop_word();
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xcc
+****************************************************************************/
+void x86emuOp_int3(u8 X86EMU_UNUSED(op1))
+{
+    u16 tmp;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("INT 3\n");
+    tmp = (u16) mem_access_word(3 * 4 + 2);
+    /* access the segment register */
+    TRACE_AND_STEP();
+	if (_X86EMU_intrTab[3]) {
+		(*_X86EMU_intrTab[3])(3);
+    } else {
+        push_word((u16)M.x86.R_FLG);
+        CLEAR_FLAG(F_IF);
+        CLEAR_FLAG(F_TF);
+        push_word(M.x86.R_CS);
+        M.x86.R_CS = mem_access_word(3 * 4 + 2);
+        push_word(M.x86.R_IP);
+        M.x86.R_IP = mem_access_word(3 * 4);
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xcd
+****************************************************************************/
+void x86emuOp_int_IMM(u8 X86EMU_UNUSED(op1))
+{
+    u16 tmp;
+    u8 intnum;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("INT\t");
+    intnum = fetch_byte_imm();
+    DECODE_PRINTF2("%x\n", intnum);
+    tmp = mem_access_word(intnum * 4 + 2);
+    TRACE_AND_STEP();
+	if (_X86EMU_intrTab[intnum]) {
+		(*_X86EMU_intrTab[intnum])(intnum);
+    } else {
+        push_word((u16)M.x86.R_FLG);
+        CLEAR_FLAG(F_IF);
+        CLEAR_FLAG(F_TF);
+        push_word(M.x86.R_CS);
+        M.x86.R_CS = mem_access_word(intnum * 4 + 2);
+        push_word(M.x86.R_IP);
+        M.x86.R_IP = mem_access_word(intnum * 4);
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xce
+****************************************************************************/
+void x86emuOp_into(u8 X86EMU_UNUSED(op1))
+{
+    u16 tmp;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("INTO\n");
+    TRACE_AND_STEP();
+    if (ACCESS_FLAG(F_OF)) {
+        tmp = mem_access_word(4 * 4 + 2);
+		if (_X86EMU_intrTab[4]) {
+			(*_X86EMU_intrTab[4])(4);
+        } else {
+            push_word((u16)M.x86.R_FLG);
+            CLEAR_FLAG(F_IF);
+            CLEAR_FLAG(F_TF);
+            push_word(M.x86.R_CS);
+            M.x86.R_CS = mem_access_word(4 * 4 + 2);
+            push_word(M.x86.R_IP);
+            M.x86.R_IP = mem_access_word(4 * 4);
+        }
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xcf
+****************************************************************************/
+void x86emuOp_iret(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("IRET\n");
+
+    TRACE_AND_STEP();
+
+    M.x86.R_IP = pop_word();
+    M.x86.R_CS = pop_word();
+    M.x86.R_FLG = pop_word();
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xd0
+****************************************************************************/
+void x86emuOp_opcD0_byte_RM_1(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rl, rh;
+    u8 *destreg;
+    uint destoffset;
+    u8 destval;
+
+    /*
+     * Yet another weirdo special case instruction format.  Part of
+     * the opcode held below in "RH".  Doubly nested case would
+     * result, except that the decoded instruction
+     */
+    START_OF_INSTR();
+    FETCH_DECODE_MODRM(mod, rh, rl);
+#ifdef DEBUG
+    if (DEBUG_DECODE()) {
+        /* XXX DECODE_PRINTF may be changed to something more
+           general, so that it is important to leave the strings
+           in the same format, even though the result is that the
+           above test is done twice. */
+        switch (rh) {
+        case 0:
+            DECODE_PRINTF("ROL\t");
+            break;
+        case 1:
+            DECODE_PRINTF("ROR\t");
+            break;
+        case 2:
+            DECODE_PRINTF("RCL\t");
+            break;
+        case 3:
+            DECODE_PRINTF("RCR\t");
+            break;
+        case 4:
+            DECODE_PRINTF("SHL\t");
+            break;
+        case 5:
+            DECODE_PRINTF("SHR\t");
+            break;
+        case 6:
+            DECODE_PRINTF("SAL\t");
+            break;
+        case 7:
+            DECODE_PRINTF("SAR\t");
+            break;
+        }
+    }
+#endif
+    /* know operation, decode the mod byte to find the addressing
+       mode. */
+    if (mod < 3) {
+        DECODE_PRINTF("BYTE PTR ");
+        destoffset = decode_rmXX_address(mod, rl);
+        DECODE_PRINTF(",1\n");
+        destval = fetch_data_byte(destoffset);
+        TRACE_AND_STEP();
+        destval = (*opcD0_byte_operation[rh]) (destval, 1);
+        store_data_byte(destoffset, destval);
+    } else {                     /* register to register */
+        destreg = DECODE_RM_BYTE_REGISTER(rl);
+        DECODE_PRINTF(",1\n");
+        TRACE_AND_STEP();
+        destval = (*opcD0_byte_operation[rh]) (*destreg, 1);
+        *destreg = destval;
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xd1
+****************************************************************************/
+void x86emuOp_opcD1_word_RM_1(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rl, rh;
+    uint destoffset;
+
+    /*
+     * Yet another weirdo special case instruction format.  Part of
+     * the opcode held below in "RH".  Doubly nested case would
+     * result, except that the decoded instruction
+     */
+    START_OF_INSTR();
+    FETCH_DECODE_MODRM(mod, rh, rl);
+#ifdef DEBUG
+    if (DEBUG_DECODE()) {
+        /* XXX DECODE_PRINTF may be changed to something more
+           general, so that it is important to leave the strings
+           in the same format, even though the result is that the
+           above test is done twice. */
+        switch (rh) {
+        case 0:
+            DECODE_PRINTF("ROL\t");
+            break;
+        case 1:
+            DECODE_PRINTF("ROR\t");
+            break;
+        case 2:
+            DECODE_PRINTF("RCL\t");
+            break;
+        case 3:
+            DECODE_PRINTF("RCR\t");
+            break;
+        case 4:
+            DECODE_PRINTF("SHL\t");
+            break;
+        case 5:
+            DECODE_PRINTF("SHR\t");
+            break;
+        case 6:
+            DECODE_PRINTF("SAL\t");
+            break;
+        case 7:
+            DECODE_PRINTF("SAR\t");
+            break;
+        }
+    }
+#endif
+    /* know operation, decode the mod byte to find the addressing
+       mode. */
+    if (mod < 3) {
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 destval;
+
+            DECODE_PRINTF("DWORD PTR ");
+            destoffset = decode_rmXX_address(mod, rl);
+            DECODE_PRINTF(",1\n");
+            destval = fetch_data_long(destoffset);
+            TRACE_AND_STEP();
+            destval = (*opcD1_long_operation[rh]) (destval, 1);
+            store_data_long(destoffset, destval);
+        } else {
+            u16 destval;
+
+            DECODE_PRINTF("WORD PTR ");
+            destoffset = decode_rmXX_address(mod, rl);
+            DECODE_PRINTF(",1\n");
+            destval = fetch_data_word(destoffset);
+            TRACE_AND_STEP();
+            destval = (*opcD1_word_operation[rh]) (destval, 1);
+            store_data_word(destoffset, destval);
+        }
+    } else {                     /* register to register */
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+			u32 destval;
+			u32 *destreg;
+
+            destreg = DECODE_RM_LONG_REGISTER(rl);
+            DECODE_PRINTF(",1\n");
+            TRACE_AND_STEP();
+            destval = (*opcD1_long_operation[rh]) (*destreg, 1);
+            *destreg = destval;
+        } else {
+			u16 destval;
+			u16 *destreg;
+
+            destreg = DECODE_RM_WORD_REGISTER(rl);
+            DECODE_PRINTF(",1\n");
+            TRACE_AND_STEP();
+            destval = (*opcD1_word_operation[rh]) (*destreg, 1);
+            *destreg = destval;
+        }
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xd2
+****************************************************************************/
+void x86emuOp_opcD2_byte_RM_CL(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rl, rh;
+    u8 *destreg;
+    uint destoffset;
+    u8 destval;
+    u8 amt;
+
+    /*
+     * Yet another weirdo special case instruction format.  Part of
+     * the opcode held below in "RH".  Doubly nested case would
+     * result, except that the decoded instruction
+     */
+    START_OF_INSTR();
+    FETCH_DECODE_MODRM(mod, rh, rl);
+#ifdef DEBUG
+    if (DEBUG_DECODE()) {
+        /* XXX DECODE_PRINTF may be changed to something more
+           general, so that it is important to leave the strings
+           in the same format, even though the result is that the
+           above test is done twice. */
+        switch (rh) {
+        case 0:
+            DECODE_PRINTF("ROL\t");
+            break;
+        case 1:
+            DECODE_PRINTF("ROR\t");
+            break;
+        case 2:
+            DECODE_PRINTF("RCL\t");
+            break;
+        case 3:
+            DECODE_PRINTF("RCR\t");
+            break;
+        case 4:
+            DECODE_PRINTF("SHL\t");
+            break;
+        case 5:
+            DECODE_PRINTF("SHR\t");
+            break;
+        case 6:
+            DECODE_PRINTF("SAL\t");
+            break;
+        case 7:
+            DECODE_PRINTF("SAR\t");
+            break;
+        }
+    }
+#endif
+    /* know operation, decode the mod byte to find the addressing
+       mode. */
+    amt = M.x86.R_CL;
+    if (mod < 3) {
+        DECODE_PRINTF("BYTE PTR ");
+        destoffset = decode_rmXX_address(mod, rl);
+        DECODE_PRINTF(",CL\n");
+        destval = fetch_data_byte(destoffset);
+        TRACE_AND_STEP();
+        destval = (*opcD0_byte_operation[rh]) (destval, amt);
+        store_data_byte(destoffset, destval);
+    } else {                     /* register to register */
+        destreg = DECODE_RM_BYTE_REGISTER(rl);
+        DECODE_PRINTF(",CL\n");
+        TRACE_AND_STEP();
+        destval = (*opcD0_byte_operation[rh]) (*destreg, amt);
+        *destreg = destval;
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xd3
+****************************************************************************/
+void x86emuOp_opcD3_word_RM_CL(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rl, rh;
+    uint destoffset;
+    u8 amt;
+
+    /*
+     * Yet another weirdo special case instruction format.  Part of
+     * the opcode held below in "RH".  Doubly nested case would
+     * result, except that the decoded instruction
+     */
+    START_OF_INSTR();
+    FETCH_DECODE_MODRM(mod, rh, rl);
+#ifdef DEBUG
+    if (DEBUG_DECODE()) {
+        /* XXX DECODE_PRINTF may be changed to something more
+           general, so that it is important to leave the strings
+           in the same format, even though the result is that the
+           above test is done twice. */
+        switch (rh) {
+        case 0:
+            DECODE_PRINTF("ROL\t");
+            break;
+        case 1:
+            DECODE_PRINTF("ROR\t");
+            break;
+        case 2:
+            DECODE_PRINTF("RCL\t");
+            break;
+        case 3:
+            DECODE_PRINTF("RCR\t");
+            break;
+        case 4:
+            DECODE_PRINTF("SHL\t");
+            break;
+        case 5:
+            DECODE_PRINTF("SHR\t");
+            break;
+        case 6:
+            DECODE_PRINTF("SAL\t");
+            break;
+        case 7:
+            DECODE_PRINTF("SAR\t");
+            break;
+        }
+    }
+#endif
+    /* know operation, decode the mod byte to find the addressing
+       mode. */
+    amt = M.x86.R_CL;
+    if (mod < 3) {
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 destval;
+
+            DECODE_PRINTF("DWORD PTR ");
+            destoffset = decode_rmXX_address(mod, rl);
+            DECODE_PRINTF(",CL\n");
+            destval = fetch_data_long(destoffset);
+            TRACE_AND_STEP();
+            destval = (*opcD1_long_operation[rh]) (destval, amt);
+            store_data_long(destoffset, destval);
+        } else {
+            u16 destval;
+
+            DECODE_PRINTF("WORD PTR ");
+            destoffset = decode_rmXX_address(mod, rl);
+            DECODE_PRINTF(",CL\n");
+            destval = fetch_data_word(destoffset);
+            TRACE_AND_STEP();
+            destval = (*opcD1_word_operation[rh]) (destval, amt);
+            store_data_word(destoffset, destval);
+        }
+    } else {                     /* register to register */
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 *destreg;
+
+            destreg = DECODE_RM_LONG_REGISTER(rl);
+            DECODE_PRINTF(",CL\n");
+            TRACE_AND_STEP();
+            *destreg = (*opcD1_long_operation[rh]) (*destreg, amt);
+        } else {
+            u16 *destreg;
+
+            destreg = DECODE_RM_WORD_REGISTER(rl);
+            DECODE_PRINTF(",CL\n");
+            TRACE_AND_STEP();
+            *destreg = (*opcD1_word_operation[rh]) (*destreg, amt);
+        }
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xd4
+****************************************************************************/
+void x86emuOp_aam(u8 X86EMU_UNUSED(op1))
+{
+    u8 a;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("AAM\n");
+    a = fetch_byte_imm();      /* this is a stupid encoding. */
+    if (a != 10) {
+        DECODE_PRINTF("ERROR DECODING AAM\n");
+        TRACE_REGS();
+        HALT_SYS();
+    }
+    TRACE_AND_STEP();
+    /* note the type change here --- returning AL and AH in AX. */
+    M.x86.R_AX = aam_word(M.x86.R_AL);
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xd5
+****************************************************************************/
+void x86emuOp_aad(u8 X86EMU_UNUSED(op1))
+{
+    u8 a;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("AAD\n");
+    a = fetch_byte_imm();
+    TRACE_AND_STEP();
+    M.x86.R_AX = aad_word(M.x86.R_AX);
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/* opcode 0xd6 ILLEGAL OPCODE */
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xd7
+****************************************************************************/
+void x86emuOp_xlat(u8 X86EMU_UNUSED(op1))
+{
+    u16 addr;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("XLAT\n");
+    TRACE_AND_STEP();
+	addr = (u16)(M.x86.R_BX + (u8)M.x86.R_AL);
+    M.x86.R_AL = fetch_data_byte(addr);
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/* instuctions  D8 .. DF are in i87_ops.c */
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xe0
+****************************************************************************/
+void x86emuOp_loopne(u8 X86EMU_UNUSED(op1))
+{
+    s16 ip;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("LOOPNE\t");
+    ip = (s8) fetch_byte_imm();
+    ip += (s16) M.x86.R_IP;
+    DECODE_PRINTF2("%04x\n", ip);
+    TRACE_AND_STEP();
+    M.x86.R_CX -= 1;
+    if (M.x86.R_CX != 0 && !ACCESS_FLAG(F_ZF))      /* CX != 0 and !ZF */
+        M.x86.R_IP = ip;
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xe1
+****************************************************************************/
+void x86emuOp_loope(u8 X86EMU_UNUSED(op1))
+{
+    s16 ip;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("LOOPE\t");
+    ip = (s8) fetch_byte_imm();
+    ip += (s16) M.x86.R_IP;
+    DECODE_PRINTF2("%04x\n", ip);
+    TRACE_AND_STEP();
+    M.x86.R_CX -= 1;
+    if (M.x86.R_CX != 0 && ACCESS_FLAG(F_ZF))       /* CX != 0 and ZF */
+        M.x86.R_IP = ip;
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xe2
+****************************************************************************/
+void x86emuOp_loop(u8 X86EMU_UNUSED(op1))
+{
+    s16 ip;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("LOOP\t");
+    ip = (s8) fetch_byte_imm();
+    ip += (s16) M.x86.R_IP;
+    DECODE_PRINTF2("%04x\n", ip);
+    TRACE_AND_STEP();
+    M.x86.R_CX -= 1;
+    if (M.x86.R_CX != 0)
+        M.x86.R_IP = ip;
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xe3
+****************************************************************************/
+void x86emuOp_jcxz(u8 X86EMU_UNUSED(op1))
+{
+    u16 target;
+    s8  offset;
+
+    /* jump to byte offset if overflow flag is set */
+    START_OF_INSTR();
+    DECODE_PRINTF("JCXZ\t");
+    offset = (s8)fetch_byte_imm();
+    target = (u16)(M.x86.R_IP + offset);
+    DECODE_PRINTF2("%x\n", target);
+    TRACE_AND_STEP();
+    if (M.x86.R_CX == 0)
+        M.x86.R_IP = target;
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xe4
+****************************************************************************/
+void x86emuOp_in_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
+{
+    u8 port;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("IN\t");
+	port = (u8) fetch_byte_imm();
+    DECODE_PRINTF2("%x,AL\n", port);
+    TRACE_AND_STEP();
+    M.x86.R_AL = (*sys_inb)(port);
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xe5
+****************************************************************************/
+void x86emuOp_in_word_AX_IMM(u8 X86EMU_UNUSED(op1))
+{
+    u8 port;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("IN\t");
+	port = (u8) fetch_byte_imm();
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        DECODE_PRINTF2("EAX,%x\n", port);
+    } else {
+        DECODE_PRINTF2("AX,%x\n", port);
+    }
+    TRACE_AND_STEP();
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        M.x86.R_EAX = (*sys_inl)(port);
+    } else {
+        M.x86.R_AX = (*sys_inw)(port);
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xe6
+****************************************************************************/
+void x86emuOp_out_byte_IMM_AL(u8 X86EMU_UNUSED(op1))
+{
+    u8 port;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("OUT\t");
+	port = (u8) fetch_byte_imm();
+    DECODE_PRINTF2("%x,AL\n", port);
+    TRACE_AND_STEP();
+    (*sys_outb)(port, M.x86.R_AL);
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xe7
+****************************************************************************/
+void x86emuOp_out_word_IMM_AX(u8 X86EMU_UNUSED(op1))
+{
+    u8 port;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("OUT\t");
+	port = (u8) fetch_byte_imm();
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        DECODE_PRINTF2("%x,EAX\n", port);
+    } else {
+        DECODE_PRINTF2("%x,AX\n", port);
+    }
+    TRACE_AND_STEP();
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        (*sys_outl)(port, M.x86.R_EAX);
+    } else {
+        (*sys_outw)(port, M.x86.R_AX);
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xe8
+****************************************************************************/
+void x86emuOp_call_near_IMM(u8 X86EMU_UNUSED(op1))
+{
+    s16 ip;
+
+    START_OF_INSTR();
+	DECODE_PRINTF("CALL\t");
+	ip = (s16) fetch_word_imm();
+	ip += (s16) M.x86.R_IP;    /* CHECK SIGN */
+	DECODE_PRINTF2("%04x\n", ip);
+	CALL_TRACE(M.x86.saved_cs, M.x86.saved_ip, M.x86.R_CS, ip, "");
+    TRACE_AND_STEP();
+    push_word(M.x86.R_IP);
+    M.x86.R_IP = ip;
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xe9
+****************************************************************************/
+void x86emuOp_jump_near_IMM(u8 X86EMU_UNUSED(op1))
+{
+    int ip;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("JMP\t");
+    ip = (s16)fetch_word_imm();
+    ip += (s16)M.x86.R_IP;
+    DECODE_PRINTF2("%04x\n", ip);
+    JMP_TRACE(M.x86.saved_cs, M.x86.saved_ip, M.x86.R_CS, ip, " NEAR ");
+    TRACE_AND_STEP();
+    M.x86.R_IP = (u16)ip;
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xea
+****************************************************************************/
+void x86emuOp_jump_far_IMM(u8 X86EMU_UNUSED(op1))
+{
+    u16 cs, ip;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("JMP\tFAR ");
+    ip = fetch_word_imm();
+    cs = fetch_word_imm();
+    DECODE_PRINTF2("%04x:", cs);
+    DECODE_PRINTF2("%04x\n", ip);
+    JMP_TRACE(M.x86.saved_cs, M.x86.saved_ip, cs, ip, " FAR ");
+    TRACE_AND_STEP();
+    M.x86.R_IP = ip;
+    M.x86.R_CS = cs;
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xeb
+****************************************************************************/
+void x86emuOp_jump_byte_IMM(u8 X86EMU_UNUSED(op1))
+{
+    u16 target;
+    s8 offset;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("JMP\t");
+    offset = (s8)fetch_byte_imm();
+    target = (u16)(M.x86.R_IP + offset);
+    DECODE_PRINTF2("%x\n", target);
+    JMP_TRACE(M.x86.saved_cs, M.x86.saved_ip, M.x86.R_CS, target, " BYTE ");
+    TRACE_AND_STEP();
+    M.x86.R_IP = target;
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xec
+****************************************************************************/
+void x86emuOp_in_byte_AL_DX(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("IN\tAL,DX\n");
+    TRACE_AND_STEP();
+    M.x86.R_AL = (*sys_inb)(M.x86.R_DX);
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xed
+****************************************************************************/
+void x86emuOp_in_word_AX_DX(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        DECODE_PRINTF("IN\tEAX,DX\n");
+    } else {
+        DECODE_PRINTF("IN\tAX,DX\n");
+    }
+    TRACE_AND_STEP();
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        M.x86.R_EAX = (*sys_inl)(M.x86.R_DX);
+    } else {
+        M.x86.R_AX = (*sys_inw)(M.x86.R_DX);
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xee
+****************************************************************************/
+void x86emuOp_out_byte_DX_AL(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("OUT\tDX,AL\n");
+    TRACE_AND_STEP();
+    (*sys_outb)(M.x86.R_DX, M.x86.R_AL);
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xef
+****************************************************************************/
+void x86emuOp_out_word_DX_AX(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        DECODE_PRINTF("OUT\tDX,EAX\n");
+    } else {
+        DECODE_PRINTF("OUT\tDX,AX\n");
+    }
+    TRACE_AND_STEP();
+    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+        (*sys_outl)(M.x86.R_DX, M.x86.R_EAX);
+    } else {
+        (*sys_outw)(M.x86.R_DX, M.x86.R_AX);
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xf0
+****************************************************************************/
+void x86emuOp_lock(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("LOCK:\n");
+    TRACE_AND_STEP();
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/*opcode 0xf1 ILLEGAL OPERATION */
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xf2
+****************************************************************************/
+void x86emuOp_repne(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("REPNE\n");
+    TRACE_AND_STEP();
+    M.x86.mode |= SYSMODE_PREFIX_REPNE;
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xf3
+****************************************************************************/
+void x86emuOp_repe(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("REPE\n");
+    TRACE_AND_STEP();
+    M.x86.mode |= SYSMODE_PREFIX_REPE;
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xf4
+****************************************************************************/
+void x86emuOp_halt(u8 X86EMU_UNUSED(op1))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("HALT\n");
+    TRACE_AND_STEP();
+    HALT_SYS();
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xf5
+****************************************************************************/
+void x86emuOp_cmc(u8 X86EMU_UNUSED(op1))
+{
+    /* complement the carry flag. */
+    START_OF_INSTR();
+    DECODE_PRINTF("CMC\n");
+    TRACE_AND_STEP();
+    TOGGLE_FLAG(F_CF);
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xf6
+****************************************************************************/
+void x86emuOp_opcF6_byte_RM(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rl, rh;
+    u8 *destreg;
+    uint destoffset;
+    u8 destval, srcval;
+
+    /* long, drawn out code follows.  Double switch for a total
+       of 32 cases.  */
+    START_OF_INSTR();
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    DECODE_PRINTF(opF6_names[rh]);
+    if (mod < 3) {
+        DECODE_PRINTF("BYTE PTR ");
+        destoffset = decode_rmXX_address(mod, rl);
+        destval = fetch_data_byte(destoffset);
+
+        switch (rh) {
+        case 0:         /* test byte imm */
+            DECODE_PRINTF(",");
+            srcval = fetch_byte_imm();
+            DECODE_PRINTF2("%02x\n", srcval);
+            TRACE_AND_STEP();
+            test_byte(destval, srcval);
+            break;
+        case 1:
+            DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\n");
+            HALT_SYS();
+            break;
+        case 2:
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            destval = not_byte(destval);
+            store_data_byte(destoffset, destval);
+            break;
+        case 3:
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            destval = neg_byte(destval);
+            store_data_byte(destoffset, destval);
+            break;
+        case 4:
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            mul_byte(destval);
+            break;
+        case 5:
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            imul_byte(destval);
+            break;
+        case 6:
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            div_byte(destval);
+            break;
+        default:
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            idiv_byte(destval);
+            break;
+        }
+    } else {                     /* mod=11 */
+        destreg = DECODE_RM_BYTE_REGISTER(rl);
+        switch (rh) {
+        case 0:         /* test byte imm */
+            DECODE_PRINTF(",");
+            srcval = fetch_byte_imm();
+            DECODE_PRINTF2("%02x\n", srcval);
+            TRACE_AND_STEP();
+            test_byte(*destreg, srcval);
+            break;
+        case 1:
+            DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\n");
+            HALT_SYS();
+            break;
+        case 2:
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            *destreg = not_byte(*destreg);
+            break;
+        case 3:
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            *destreg = neg_byte(*destreg);
+            break;
+        case 4:
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            mul_byte(*destreg);      /*!!!  */
+            break;
+        case 5:
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            imul_byte(*destreg);
+            break;
+        case 6:
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            div_byte(*destreg);
+            break;
+        default:
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            idiv_byte(*destreg);
+            break;
+        }
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xf7
+****************************************************************************/
+void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rl, rh;
+    uint destoffset;
+
+    START_OF_INSTR();
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    DECODE_PRINTF(opF6_names[rh]);
+    if (mod < 3) {
+
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 destval, srcval;
+
+            DECODE_PRINTF("DWORD PTR ");
+            destoffset = decode_rmXX_address(mod, rl);
+            destval = fetch_data_long(destoffset);
+
+            switch (rh) {
+            case 0:
+                DECODE_PRINTF(",");
+                srcval = fetch_long_imm();
+                DECODE_PRINTF2("%x\n", srcval);
+                TRACE_AND_STEP();
+                test_long(destval, srcval);
+                break;
+            case 1:
+                DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F7\n");
+                HALT_SYS();
+                break;
+            case 2:
+                DECODE_PRINTF("\n");
+                TRACE_AND_STEP();
+                destval = not_long(destval);
+                store_data_long(destoffset, destval);
+                break;
+            case 3:
+                DECODE_PRINTF("\n");
+                TRACE_AND_STEP();
+                destval = neg_long(destval);
+                store_data_long(destoffset, destval);
+                break;
+            case 4:
+                DECODE_PRINTF("\n");
+                TRACE_AND_STEP();
+                mul_long(destval);
+                break;
+            case 5:
+                DECODE_PRINTF("\n");
+                TRACE_AND_STEP();
+                imul_long(destval);
+                break;
+            case 6:
+                DECODE_PRINTF("\n");
+                TRACE_AND_STEP();
+                div_long(destval);
+                break;
+            case 7:
+                DECODE_PRINTF("\n");
+                TRACE_AND_STEP();
+                idiv_long(destval);
+                break;
+            }
+        } else {
+            u16 destval, srcval;
+
+            DECODE_PRINTF("WORD PTR ");
+            destoffset = decode_rmXX_address(mod, rl);
+            destval = fetch_data_word(destoffset);
+
+            switch (rh) {
+            case 0:         /* test word imm */
+                DECODE_PRINTF(",");
+                srcval = fetch_word_imm();
+                DECODE_PRINTF2("%x\n", srcval);
+                TRACE_AND_STEP();
+                test_word(destval, srcval);
+                break;
+            case 1:
+                DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F7\n");
+                HALT_SYS();
+                break;
+            case 2:
+                DECODE_PRINTF("\n");
+                TRACE_AND_STEP();
+                destval = not_word(destval);
+                store_data_word(destoffset, destval);
+                break;
+            case 3:
+                DECODE_PRINTF("\n");
+                TRACE_AND_STEP();
+                destval = neg_word(destval);
+                store_data_word(destoffset, destval);
+                break;
+            case 4:
+                DECODE_PRINTF("\n");
+                TRACE_AND_STEP();
+                mul_word(destval);
+                break;
+            case 5:
+                DECODE_PRINTF("\n");
+                TRACE_AND_STEP();
+                imul_word(destval);
+                break;
+            case 6:
+                DECODE_PRINTF("\n");
+                TRACE_AND_STEP();
+                div_word(destval);
+                break;
+            case 7:
+                DECODE_PRINTF("\n");
+                TRACE_AND_STEP();
+                idiv_word(destval);
+                break;
+            }
+        }
+
+    } else {                     /* mod=11 */
+
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 *destreg;
+            u32 srcval;
+
+            destreg = DECODE_RM_LONG_REGISTER(rl);
+
+            switch (rh) {
+            case 0:         /* test word imm */
+                DECODE_PRINTF(",");
+                srcval = fetch_long_imm();
+                DECODE_PRINTF2("%x\n", srcval);
+                TRACE_AND_STEP();
+                test_long(*destreg, srcval);
+                break;
+            case 1:
+                DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\n");
+                HALT_SYS();
+                break;
+            case 2:
+                DECODE_PRINTF("\n");
+                TRACE_AND_STEP();
+                *destreg = not_long(*destreg);
+                break;
+            case 3:
+                DECODE_PRINTF("\n");
+                TRACE_AND_STEP();
+                *destreg = neg_long(*destreg);
+                break;
+            case 4:
+                DECODE_PRINTF("\n");
+                TRACE_AND_STEP();
+                mul_long(*destreg);      /*!!!  */
+                break;
+            case 5:
+                DECODE_PRINTF("\n");
+                TRACE_AND_STEP();
+                imul_long(*destreg);
+                break;
+            case 6:
+                DECODE_PRINTF("\n");
+                TRACE_AND_STEP();
+                div_long(*destreg);
+                break;
+            case 7:
+                DECODE_PRINTF("\n");
+                TRACE_AND_STEP();
+                idiv_long(*destreg);
+                break;
+            }
+        } else {
+            u16 *destreg;
+            u16 srcval;
+
+            destreg = DECODE_RM_WORD_REGISTER(rl);
+
+            switch (rh) {
+            case 0:         /* test word imm */
+                DECODE_PRINTF(",");
+                srcval = fetch_word_imm();
+                DECODE_PRINTF2("%x\n", srcval);
+                TRACE_AND_STEP();
+                test_word(*destreg, srcval);
+                break;
+            case 1:
+                DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\n");
+                HALT_SYS();
+                break;
+            case 2:
+                DECODE_PRINTF("\n");
+                TRACE_AND_STEP();
+                *destreg = not_word(*destreg);
+                break;
+            case 3:
+                DECODE_PRINTF("\n");
+                TRACE_AND_STEP();
+                *destreg = neg_word(*destreg);
+                break;
+            case 4:
+                DECODE_PRINTF("\n");
+                TRACE_AND_STEP();
+                mul_word(*destreg);      /*!!!  */
+                break;
+            case 5:
+                DECODE_PRINTF("\n");
+                TRACE_AND_STEP();
+                imul_word(*destreg);
+                break;
+            case 6:
+                DECODE_PRINTF("\n");
+                TRACE_AND_STEP();
+                div_word(*destreg);
+                break;
+            case 7:
+                DECODE_PRINTF("\n");
+                TRACE_AND_STEP();
+                idiv_word(*destreg);
+                break;
+            }
+        }
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xf8
+****************************************************************************/
+void x86emuOp_clc(u8 X86EMU_UNUSED(op1))
+{
+    /* clear the carry flag. */
+    START_OF_INSTR();
+    DECODE_PRINTF("CLC\n");
+    TRACE_AND_STEP();
+    CLEAR_FLAG(F_CF);
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xf9
+****************************************************************************/
+void x86emuOp_stc(u8 X86EMU_UNUSED(op1))
+{
+    /* set the carry flag. */
+    START_OF_INSTR();
+    DECODE_PRINTF("STC\n");
+    TRACE_AND_STEP();
+    SET_FLAG(F_CF);
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xfa
+****************************************************************************/
+void x86emuOp_cli(u8 X86EMU_UNUSED(op1))
+{
+    /* clear interrupts. */
+    START_OF_INSTR();
+    DECODE_PRINTF("CLI\n");
+    TRACE_AND_STEP();
+    CLEAR_FLAG(F_IF);
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xfb
+****************************************************************************/
+void x86emuOp_sti(u8 X86EMU_UNUSED(op1))
+{
+    /* enable  interrupts. */
+    START_OF_INSTR();
+    DECODE_PRINTF("STI\n");
+    TRACE_AND_STEP();
+    SET_FLAG(F_IF);
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xfc
+****************************************************************************/
+void x86emuOp_cld(u8 X86EMU_UNUSED(op1))
+{
+    /* clear interrupts. */
+    START_OF_INSTR();
+    DECODE_PRINTF("CLD\n");
+    TRACE_AND_STEP();
+    CLEAR_FLAG(F_DF);
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xfd
+****************************************************************************/
+void x86emuOp_std(u8 X86EMU_UNUSED(op1))
+{
+    /* clear interrupts. */
+    START_OF_INSTR();
+    DECODE_PRINTF("STD\n");
+    TRACE_AND_STEP();
+    SET_FLAG(F_DF);
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xfe
+****************************************************************************/
+void x86emuOp_opcFE_byte_RM(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rh, rl;
+    u8 destval;
+    uint destoffset;
+    u8 *destreg;
+
+    /* Yet another special case instruction. */
+    START_OF_INSTR();
+    FETCH_DECODE_MODRM(mod, rh, rl);
+#ifdef DEBUG
+    if (DEBUG_DECODE()) {
+        /* XXX DECODE_PRINTF may be changed to something more
+           general, so that it is important to leave the strings
+           in the same format, even though the result is that the
+           above test is done twice. */
+
+        switch (rh) {
+        case 0:
+            DECODE_PRINTF("INC\t");
+            break;
+        case 1:
+            DECODE_PRINTF("DEC\t");
+            break;
+        case 2:
+        case 3:
+        case 4:
+        case 5:
+        case 6:
+        case 7:
+            DECODE_PRINTF2("ILLEGAL OP MAJOR OP 0xFE MINOR OP %x \n", mod);
+            HALT_SYS();
+            break;
+        }
+    }
+#endif
+    if (mod < 3) {
+        DECODE_PRINTF("BYTE PTR ");
+        destoffset = decode_rmXX_address(mod, rl);
+        DECODE_PRINTF("\n");
+        destval = fetch_data_byte(destoffset);
+        TRACE_AND_STEP();
+        if (rh == 0)
+          destval = inc_byte(destval);
+        else
+          destval = dec_byte(destval);
+        store_data_byte(destoffset, destval);
+    } else {
+        destreg = DECODE_RM_BYTE_REGISTER(rl);
+        DECODE_PRINTF("\n");
+        TRACE_AND_STEP();
+        if (rh == 0)
+          *destreg = inc_byte(*destreg);
+        else
+          *destreg = dec_byte(*destreg);
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xff
+****************************************************************************/
+void x86emuOp_opcFF_word_RM(u8 X86EMU_UNUSED(op1))
+{
+    int mod, rh, rl;
+    uint destoffset = 0;
+	u16 *destreg;
+	u16 destval,destval2;
+
+    /* Yet another special case instruction. */
+    START_OF_INSTR();
+    FETCH_DECODE_MODRM(mod, rh, rl);
+#ifdef DEBUG
+    if (DEBUG_DECODE()) {
+        /* XXX DECODE_PRINTF may be changed to something more
+           general, so that it is important to leave the strings
+           in the same format, even though the result is that the
+           above test is done twice. */
+
+        switch (rh) {
+        case 0:
+            if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+                DECODE_PRINTF("INC\tDWORD PTR ");
+            } else {
+                DECODE_PRINTF("INC\tWORD PTR ");
+            }
+            break;
+        case 1:
+            if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+                DECODE_PRINTF("DEC\tDWORD PTR ");
+            } else {
+                DECODE_PRINTF("DEC\tWORD PTR ");
+            }
+            break;
+        case 2:
+            DECODE_PRINTF("CALL\t ");
+            break;
+        case 3:
+            DECODE_PRINTF("CALL\tFAR ");
+            break;
+        case 4:
+            DECODE_PRINTF("JMP\t");
+            break;
+        case 5:
+            DECODE_PRINTF("JMP\tFAR ");
+            break;
+        case 6:
+            DECODE_PRINTF("PUSH\t");
+            break;
+        case 7:
+            DECODE_PRINTF("ILLEGAL DECODING OF OPCODE FF\t");
+            HALT_SYS();
+            break;
+        }
+    }
+#endif
+    if (mod < 3) {
+        destoffset = decode_rmXX_address(mod, rl);
+        DECODE_PRINTF("\n");
+        switch (rh) {
+        case 0:         /* inc word ptr ... */
+            if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+                u32 destval;
+
+                destval = fetch_data_long(destoffset);
+                TRACE_AND_STEP();
+                destval = inc_long(destval);
+                store_data_long(destoffset, destval);
+            } else {
+                u16 destval;
+
+                destval = fetch_data_word(destoffset);
+                TRACE_AND_STEP();
+                destval = inc_word(destval);
+                store_data_word(destoffset, destval);
+            }
+            break;
+        case 1:         /* dec word ptr ... */
+            if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+                u32 destval;
+
+                destval = fetch_data_long(destoffset);
+                TRACE_AND_STEP();
+                destval = dec_long(destval);
+                store_data_long(destoffset, destval);
+            } else {
+                u16 destval;
+
+                destval = fetch_data_word(destoffset);
+                TRACE_AND_STEP();
+                destval = dec_word(destval);
+                store_data_word(destoffset, destval);
+            }
+            break;
+        case 2:         /* call word ptr ... */
+            destval = fetch_data_word(destoffset);
+            TRACE_AND_STEP();
+            push_word(M.x86.R_IP);
+            M.x86.R_IP = destval;
+            break;
+        case 3:         /* call far ptr ... */
+            destval = fetch_data_word(destoffset);
+            destval2 = fetch_data_word(destoffset + 2);
+            TRACE_AND_STEP();
+            push_word(M.x86.R_CS);
+            M.x86.R_CS = destval2;
+            push_word(M.x86.R_IP);
+            M.x86.R_IP = destval;
+            break;
+        case 4:         /* jmp word ptr ... */
+            destval = fetch_data_word(destoffset);
+            JMP_TRACE(M.x86.saved_cs, M.x86.saved_ip, M.x86.R_CS, destval, " WORD ");
+            TRACE_AND_STEP();
+            M.x86.R_IP = destval;
+            break;
+        case 5:         /* jmp far ptr ... */
+            destval = fetch_data_word(destoffset);
+            destval2 = fetch_data_word(destoffset + 2);
+            JMP_TRACE(M.x86.saved_cs, M.x86.saved_ip, destval2, destval, " FAR ");
+            TRACE_AND_STEP();
+            M.x86.R_IP = destval;
+            M.x86.R_CS = destval2;
+            break;
+        case 6:         /*  push word ptr ... */
+            if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+                u32 destval;
+
+                destval = fetch_data_long(destoffset);
+                TRACE_AND_STEP();
+                push_long(destval);
+            } else {
+                u16 destval;
+
+                destval = fetch_data_word(destoffset);
+                TRACE_AND_STEP();
+                push_word(destval);
+            }
+            break;
+        }
+    } else {
+        switch (rh) {
+        case 0:
+            if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+                u32 *destreg;
+
+                destreg = DECODE_RM_LONG_REGISTER(rl);
+                DECODE_PRINTF("\n");
+                TRACE_AND_STEP();
+                *destreg = inc_long(*destreg);
+            } else {
+                u16 *destreg;
+
+                destreg = DECODE_RM_WORD_REGISTER(rl);
+                DECODE_PRINTF("\n");
+                TRACE_AND_STEP();
+                *destreg = inc_word(*destreg);
+            }
+            break;
+        case 1:
+            if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+                u32 *destreg;
+
+                destreg = DECODE_RM_LONG_REGISTER(rl);
+                DECODE_PRINTF("\n");
+                TRACE_AND_STEP();
+                *destreg = dec_long(*destreg);
+            } else {
+                u16 *destreg;
+
+                destreg = DECODE_RM_WORD_REGISTER(rl);
+                DECODE_PRINTF("\n");
+                TRACE_AND_STEP();
+                *destreg = dec_word(*destreg);
+            }
+            break;
+        case 2:         /* call word ptr ... */
+            destreg = DECODE_RM_WORD_REGISTER(rl);
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            push_word(M.x86.R_IP);
+            M.x86.R_IP = *destreg;
+            break;
+        case 3:         /* jmp far ptr ... */
+            DECODE_PRINTF("OPERATION UNDEFINED 0XFF \n");
+            TRACE_AND_STEP();
+            HALT_SYS();
+            break;
+
+        case 4:         /* jmp  ... */
+            destreg = DECODE_RM_WORD_REGISTER(rl);
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            M.x86.R_IP = (u16) (*destreg);
+            break;
+        case 5:         /* jmp far ptr ... */
+            DECODE_PRINTF("OPERATION UNDEFINED 0XFF \n");
+            TRACE_AND_STEP();
+            HALT_SYS();
+            break;
+        case 6:
+            if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+                u32 *destreg;
+
+                destreg = DECODE_RM_LONG_REGISTER(rl);
+                DECODE_PRINTF("\n");
+                TRACE_AND_STEP();
+                push_long(*destreg);
+            } else {
+                u16 *destreg;
+
+                destreg = DECODE_RM_WORD_REGISTER(rl);
+                DECODE_PRINTF("\n");
+                TRACE_AND_STEP();
+                push_word(*destreg);
+            }
+            break;
+        }
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/***************************************************************************
+ * Single byte operation code table:
+ **************************************************************************/
+void (*x86emu_optab[256])(u8) =
+{
+/*  0x00 */ x86emuOp_genop_byte_RM_R,
+/*  0x01 */ x86emuOp_genop_word_RM_R,
+/*  0x02 */ x86emuOp_genop_byte_R_RM,
+/*  0x03 */ x86emuOp_genop_word_R_RM,
+/*  0x04 */ x86emuOp_genop_byte_AL_IMM,
+/*  0x05 */ x86emuOp_genop_word_AX_IMM,
+/*  0x06 */ x86emuOp_push_ES,
+/*  0x07 */ x86emuOp_pop_ES,
+
+/*  0x08 */ x86emuOp_genop_byte_RM_R,
+/*  0x09 */ x86emuOp_genop_word_RM_R,
+/*  0x0a */ x86emuOp_genop_byte_R_RM,
+/*  0x0b */ x86emuOp_genop_word_R_RM,
+/*  0x0c */ x86emuOp_genop_byte_AL_IMM,
+/*  0x0d */ x86emuOp_genop_word_AX_IMM,
+/*  0x0e */ x86emuOp_push_CS,
+/*  0x0f */ x86emuOp_two_byte,
+
+/*  0x10 */ x86emuOp_genop_byte_RM_R,
+/*  0x11 */ x86emuOp_genop_word_RM_R,
+/*  0x12 */ x86emuOp_genop_byte_R_RM,
+/*  0x13 */ x86emuOp_genop_word_R_RM,
+/*  0x14 */ x86emuOp_genop_byte_AL_IMM,
+/*  0x15 */ x86emuOp_genop_word_AX_IMM,
+/*  0x16 */ x86emuOp_push_SS,
+/*  0x17 */ x86emuOp_pop_SS,
+
+/*  0x18 */ x86emuOp_genop_byte_RM_R,
+/*  0x19 */ x86emuOp_genop_word_RM_R,
+/*  0x1a */ x86emuOp_genop_byte_R_RM,
+/*  0x1b */ x86emuOp_genop_word_R_RM,
+/*  0x1c */ x86emuOp_genop_byte_AL_IMM,
+/*  0x1d */ x86emuOp_genop_word_AX_IMM,
+/*  0x1e */ x86emuOp_push_DS,
+/*  0x1f */ x86emuOp_pop_DS,
+
+/*  0x20 */ x86emuOp_genop_byte_RM_R,
+/*  0x21 */ x86emuOp_genop_word_RM_R,
+/*  0x22 */ x86emuOp_genop_byte_R_RM,
+/*  0x23 */ x86emuOp_genop_word_R_RM,
+/*  0x24 */ x86emuOp_genop_byte_AL_IMM,
+/*  0x25 */ x86emuOp_genop_word_AX_IMM,
+/*  0x26 */ x86emuOp_segovr_ES,
+/*  0x27 */ x86emuOp_daa,
+
+/*  0x28 */ x86emuOp_genop_byte_RM_R,
+/*  0x29 */ x86emuOp_genop_word_RM_R,
+/*  0x2a */ x86emuOp_genop_byte_R_RM,
+/*  0x2b */ x86emuOp_genop_word_R_RM,
+/*  0x2c */ x86emuOp_genop_byte_AL_IMM,
+/*  0x2d */ x86emuOp_genop_word_AX_IMM,
+/*  0x2e */ x86emuOp_segovr_CS,
+/*  0x2f */ x86emuOp_das,
+
+/*  0x30 */ x86emuOp_genop_byte_RM_R,
+/*  0x31 */ x86emuOp_genop_word_RM_R,
+/*  0x32 */ x86emuOp_genop_byte_R_RM,
+/*  0x33 */ x86emuOp_genop_word_R_RM,
+/*  0x34 */ x86emuOp_genop_byte_AL_IMM,
+/*  0x35 */ x86emuOp_genop_word_AX_IMM,
+/*  0x36 */ x86emuOp_segovr_SS,
+/*  0x37 */ x86emuOp_aaa,
+
+/*  0x38 */ x86emuOp_genop_byte_RM_R,
+/*  0x39 */ x86emuOp_genop_word_RM_R,
+/*  0x3a */ x86emuOp_genop_byte_R_RM,
+/*  0x3b */ x86emuOp_genop_word_R_RM,
+/*  0x3c */ x86emuOp_genop_byte_AL_IMM,
+/*  0x3d */ x86emuOp_genop_word_AX_IMM,
+/*  0x3e */ x86emuOp_segovr_DS,
+/*  0x3f */ x86emuOp_aas,
+
+/*  0x40 */ x86emuOp_inc_register,
+/*  0x41 */ x86emuOp_inc_register,
+/*  0x42 */ x86emuOp_inc_register,
+/*  0x43 */ x86emuOp_inc_register,
+/*  0x44 */ x86emuOp_inc_register,
+/*  0x45 */ x86emuOp_inc_register,
+/*  0x46 */ x86emuOp_inc_register,
+/*  0x47 */ x86emuOp_inc_register,
+
+/*  0x48 */ x86emuOp_dec_register,
+/*  0x49 */ x86emuOp_dec_register,
+/*  0x4a */ x86emuOp_dec_register,
+/*  0x4b */ x86emuOp_dec_register,
+/*  0x4c */ x86emuOp_dec_register,
+/*  0x4d */ x86emuOp_dec_register,
+/*  0x4e */ x86emuOp_dec_register,
+/*  0x4f */ x86emuOp_dec_register,
+
+/*  0x50 */ x86emuOp_push_register,
+/*  0x51 */ x86emuOp_push_register,
+/*  0x52 */ x86emuOp_push_register,
+/*  0x53 */ x86emuOp_push_register,
+/*  0x54 */ x86emuOp_push_register,
+/*  0x55 */ x86emuOp_push_register,
+/*  0x56 */ x86emuOp_push_register,
+/*  0x57 */ x86emuOp_push_register,
+
+/*  0x58 */ x86emuOp_pop_register,
+/*  0x59 */ x86emuOp_pop_register,
+/*  0x5a */ x86emuOp_pop_register,
+/*  0x5b */ x86emuOp_pop_register,
+/*  0x5c */ x86emuOp_pop_register,
+/*  0x5d */ x86emuOp_pop_register,
+/*  0x5e */ x86emuOp_pop_register,
+/*  0x5f */ x86emuOp_pop_register,
+
+/*  0x60 */ x86emuOp_push_all,
+/*  0x61 */ x86emuOp_pop_all,
+/*  0x62 */ x86emuOp_illegal_op,   /* bound */
+/*  0x63 */ x86emuOp_illegal_op,   /* arpl */
+/*  0x64 */ x86emuOp_segovr_FS,
+/*  0x65 */ x86emuOp_segovr_GS,
+/*  0x66 */ x86emuOp_prefix_data,
+/*  0x67 */ x86emuOp_prefix_addr,
+
+/*  0x68 */ x86emuOp_push_word_IMM,
+/*  0x69 */ x86emuOp_imul_word_IMM,
+/*  0x6a */ x86emuOp_push_byte_IMM,
+/*  0x6b */ x86emuOp_imul_byte_IMM,
+/*  0x6c */ x86emuOp_ins_byte,
+/*  0x6d */ x86emuOp_ins_word,
+/*  0x6e */ x86emuOp_outs_byte,
+/*  0x6f */ x86emuOp_outs_word,
+
+/*  0x70 */ x86emuOp_jump_near_cond,
+/*  0x71 */ x86emuOp_jump_near_cond,
+/*  0x72 */ x86emuOp_jump_near_cond,
+/*  0x73 */ x86emuOp_jump_near_cond,
+/*  0x74 */ x86emuOp_jump_near_cond,
+/*  0x75 */ x86emuOp_jump_near_cond,
+/*  0x76 */ x86emuOp_jump_near_cond,
+/*  0x77 */ x86emuOp_jump_near_cond,
+
+/*  0x78 */ x86emuOp_jump_near_cond,
+/*  0x79 */ x86emuOp_jump_near_cond,
+/*  0x7a */ x86emuOp_jump_near_cond,
+/*  0x7b */ x86emuOp_jump_near_cond,
+/*  0x7c */ x86emuOp_jump_near_cond,
+/*  0x7d */ x86emuOp_jump_near_cond,
+/*  0x7e */ x86emuOp_jump_near_cond,
+/*  0x7f */ x86emuOp_jump_near_cond,
+
+/*  0x80 */ x86emuOp_opc80_byte_RM_IMM,
+/*  0x81 */ x86emuOp_opc81_word_RM_IMM,
+/*  0x82 */ x86emuOp_opc82_byte_RM_IMM,
+/*  0x83 */ x86emuOp_opc83_word_RM_IMM,
+/*  0x84 */ x86emuOp_test_byte_RM_R,
+/*  0x85 */ x86emuOp_test_word_RM_R,
+/*  0x86 */ x86emuOp_xchg_byte_RM_R,
+/*  0x87 */ x86emuOp_xchg_word_RM_R,
+
+/*  0x88 */ x86emuOp_mov_byte_RM_R,
+/*  0x89 */ x86emuOp_mov_word_RM_R,
+/*  0x8a */ x86emuOp_mov_byte_R_RM,
+/*  0x8b */ x86emuOp_mov_word_R_RM,
+/*  0x8c */ x86emuOp_mov_word_RM_SR,
+/*  0x8d */ x86emuOp_lea_word_R_M,
+/*  0x8e */ x86emuOp_mov_word_SR_RM,
+/*  0x8f */ x86emuOp_pop_RM,
+
+/*  0x90 */ x86emuOp_nop,
+/*  0x91 */ x86emuOp_xchg_word_AX_register,
+/*  0x92 */ x86emuOp_xchg_word_AX_register,
+/*  0x93 */ x86emuOp_xchg_word_AX_register,
+/*  0x94 */ x86emuOp_xchg_word_AX_register,
+/*  0x95 */ x86emuOp_xchg_word_AX_register,
+/*  0x96 */ x86emuOp_xchg_word_AX_register,
+/*  0x97 */ x86emuOp_xchg_word_AX_register,
+
+/*  0x98 */ x86emuOp_cbw,
+/*  0x99 */ x86emuOp_cwd,
+/*  0x9a */ x86emuOp_call_far_IMM,
+/*  0x9b */ x86emuOp_wait,
+/*  0x9c */ x86emuOp_pushf_word,
+/*  0x9d */ x86emuOp_popf_word,
+/*  0x9e */ x86emuOp_sahf,
+/*  0x9f */ x86emuOp_lahf,
+
+/*  0xa0 */ x86emuOp_mov_AL_M_IMM,
+/*  0xa1 */ x86emuOp_mov_AX_M_IMM,
+/*  0xa2 */ x86emuOp_mov_M_AL_IMM,
+/*  0xa3 */ x86emuOp_mov_M_AX_IMM,
+/*  0xa4 */ x86emuOp_movs_byte,
+/*  0xa5 */ x86emuOp_movs_word,
+/*  0xa6 */ x86emuOp_cmps_byte,
+/*  0xa7 */ x86emuOp_cmps_word,
+/*  0xa8 */ x86emuOp_test_AL_IMM,
+/*  0xa9 */ x86emuOp_test_AX_IMM,
+/*  0xaa */ x86emuOp_stos_byte,
+/*  0xab */ x86emuOp_stos_word,
+/*  0xac */ x86emuOp_lods_byte,
+/*  0xad */ x86emuOp_lods_word,
+/*  0xac */ x86emuOp_scas_byte,
+/*  0xad */ x86emuOp_scas_word,
+
+/*  0xb0 */ x86emuOp_mov_byte_register_IMM,
+/*  0xb1 */ x86emuOp_mov_byte_register_IMM,
+/*  0xb2 */ x86emuOp_mov_byte_register_IMM,
+/*  0xb3 */ x86emuOp_mov_byte_register_IMM,
+/*  0xb4 */ x86emuOp_mov_byte_register_IMM,
+/*  0xb5 */ x86emuOp_mov_byte_register_IMM,
+/*  0xb6 */ x86emuOp_mov_byte_register_IMM,
+/*  0xb7 */ x86emuOp_mov_byte_register_IMM,
+
+/*  0xb8 */ x86emuOp_mov_word_register_IMM,
+/*  0xb9 */ x86emuOp_mov_word_register_IMM,
+/*  0xba */ x86emuOp_mov_word_register_IMM,
+/*  0xbb */ x86emuOp_mov_word_register_IMM,
+/*  0xbc */ x86emuOp_mov_word_register_IMM,
+/*  0xbd */ x86emuOp_mov_word_register_IMM,
+/*  0xbe */ x86emuOp_mov_word_register_IMM,
+/*  0xbf */ x86emuOp_mov_word_register_IMM,
+
+/*  0xc0 */ x86emuOp_opcC0_byte_RM_MEM,
+/*  0xc1 */ x86emuOp_opcC1_word_RM_MEM,
+/*  0xc2 */ x86emuOp_ret_near_IMM,
+/*  0xc3 */ x86emuOp_ret_near,
+/*  0xc4 */ x86emuOp_les_R_IMM,
+/*  0xc5 */ x86emuOp_lds_R_IMM,
+/*  0xc6 */ x86emuOp_mov_byte_RM_IMM,
+/*  0xc7 */ x86emuOp_mov_word_RM_IMM,
+/*  0xc8 */ x86emuOp_enter,
+/*  0xc9 */ x86emuOp_leave,
+/*  0xca */ x86emuOp_ret_far_IMM,
+/*  0xcb */ x86emuOp_ret_far,
+/*  0xcc */ x86emuOp_int3,
+/*  0xcd */ x86emuOp_int_IMM,
+/*  0xce */ x86emuOp_into,
+/*  0xcf */ x86emuOp_iret,
+
+/*  0xd0 */ x86emuOp_opcD0_byte_RM_1,
+/*  0xd1 */ x86emuOp_opcD1_word_RM_1,
+/*  0xd2 */ x86emuOp_opcD2_byte_RM_CL,
+/*  0xd3 */ x86emuOp_opcD3_word_RM_CL,
+/*  0xd4 */ x86emuOp_aam,
+/*  0xd5 */ x86emuOp_aad,
+/*  0xd6 */ x86emuOp_illegal_op,   /* Undocumented SETALC instruction */
+/*  0xd7 */ x86emuOp_xlat,
+/*  0xd8 */ x86emuOp_esc_coprocess_d8,
+/*  0xd9 */ x86emuOp_esc_coprocess_d9,
+/*  0xda */ x86emuOp_esc_coprocess_da,
+/*  0xdb */ x86emuOp_esc_coprocess_db,
+/*  0xdc */ x86emuOp_esc_coprocess_dc,
+/*  0xdd */ x86emuOp_esc_coprocess_dd,
+/*  0xde */ x86emuOp_esc_coprocess_de,
+/*  0xdf */ x86emuOp_esc_coprocess_df,
+
+/*  0xe0 */ x86emuOp_loopne,
+/*  0xe1 */ x86emuOp_loope,
+/*  0xe2 */ x86emuOp_loop,
+/*  0xe3 */ x86emuOp_jcxz,
+/*  0xe4 */ x86emuOp_in_byte_AL_IMM,
+/*  0xe5 */ x86emuOp_in_word_AX_IMM,
+/*  0xe6 */ x86emuOp_out_byte_IMM_AL,
+/*  0xe7 */ x86emuOp_out_word_IMM_AX,
+
+/*  0xe8 */ x86emuOp_call_near_IMM,
+/*  0xe9 */ x86emuOp_jump_near_IMM,
+/*  0xea */ x86emuOp_jump_far_IMM,
+/*  0xeb */ x86emuOp_jump_byte_IMM,
+/*  0xec */ x86emuOp_in_byte_AL_DX,
+/*  0xed */ x86emuOp_in_word_AX_DX,
+/*  0xee */ x86emuOp_out_byte_DX_AL,
+/*  0xef */ x86emuOp_out_word_DX_AX,
+
+/*  0xf0 */ x86emuOp_lock,
+/*  0xf1 */ x86emuOp_illegal_op,
+/*  0xf2 */ x86emuOp_repne,
+/*  0xf3 */ x86emuOp_repe,
+/*  0xf4 */ x86emuOp_halt,
+/*  0xf5 */ x86emuOp_cmc,
+/*  0xf6 */ x86emuOp_opcF6_byte_RM,
+/*  0xf7 */ x86emuOp_opcF7_word_RM,
+
+/*  0xf8 */ x86emuOp_clc,
+/*  0xf9 */ x86emuOp_stc,
+/*  0xfa */ x86emuOp_cli,
+/*  0xfb */ x86emuOp_sti,
+/*  0xfc */ x86emuOp_cld,
+/*  0xfd */ x86emuOp_std,
+/*  0xfe */ x86emuOp_opcFE_byte_RM,
+/*  0xff */ x86emuOp_opcFF_word_RM,
+};
diff --git a/other-licence/x86emu/ops2.c b/other-licence/x86emu/ops2.c
new file mode 100644
index 0000000..448d968
--- /dev/null
+++ b/other-licence/x86emu/ops2.c
@@ -0,0 +1,1764 @@
+/****************************************************************************
+*
+*                       Realmode X86 Emulator Library
+*
+*               Copyright (C) 1991-2004 SciTech Software, Inc.
+*                    Copyright (C) David Mosberger-Tang
+*                      Copyright (C) 1999 Egbert Eich
+*
+*  ========================================================================
+*
+*  Permission to use, copy, modify, distribute, and sell this software and
+*  its documentation for any purpose is hereby granted without fee,
+*  provided that the above copyright notice appear in all copies and that
+*  both that copyright notice and this permission notice appear in
+*  supporting documentation, and that the name of the authors not be used
+*  in advertising or publicity pertaining to distribution of the software
+*  without specific, written prior permission.  The authors makes no
+*  representations about the suitability of this software for any purpose.
+*  It is provided "as is" without express or implied warranty.
+*
+*  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+*  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+*  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+*  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+*  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+*  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+*  PERFORMANCE OF THIS SOFTWARE.
+*
+*  ========================================================================
+*
+* Language:     ANSI C
+* Environment:  Any
+* Developer:    Kendall Bennett
+*
+* Description:  This file includes subroutines to implement the decoding
+*               and emulation of all the x86 extended two-byte processor
+*               instructions.
+*
+****************************************************************************/
+
+#include "x86emui.h"
+
+/*----------------------------- Implementation ----------------------------*/
+
+/****************************************************************************
+PARAMETERS:
+op1 - Instruction op code
+
+REMARKS:
+Handles illegal opcodes.
+****************************************************************************/
+void x86emuOp2_illegal_op(
+    u8 op2)
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("ILLEGAL EXTENDED X86 OPCODE\n");
+    TRACE_REGS();
+    printk("%04x:%04x: %02X ILLEGAL EXTENDED X86 OPCODE!\n",
+        M.x86.R_CS, M.x86.R_IP-2,op2);
+    HALT_SYS();
+    END_OF_INSTR();
+}
+
+#define xorl(a,b)   (((a) && !(b)) || (!(a) && (b)))
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0x80-0x8F
+****************************************************************************/
+int x86emu_check_jump_condition(u8 op)
+{
+    switch (op) {
+      case 0x0:
+        DECODE_PRINTF("JO\t");
+        return ACCESS_FLAG(F_OF);
+      case 0x1:
+        DECODE_PRINTF("JNO\t");
+        return !ACCESS_FLAG(F_OF);
+        break;
+      case 0x2:
+        DECODE_PRINTF("JB\t");
+        return ACCESS_FLAG(F_CF);
+        break;
+      case 0x3:
+        DECODE_PRINTF("JNB\t");
+        return !ACCESS_FLAG(F_CF);
+        break;
+      case 0x4:
+        DECODE_PRINTF("JZ\t");
+        return ACCESS_FLAG(F_ZF);
+        break;
+      case 0x5:
+        DECODE_PRINTF("JNZ\t");
+        return !ACCESS_FLAG(F_ZF);
+        break;
+      case 0x6:
+        DECODE_PRINTF("JBE\t");
+        return ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF);
+        break;
+      case 0x7:
+        DECODE_PRINTF("JNBE\t");
+        return !(ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF));
+        break;
+      case 0x8:
+        DECODE_PRINTF("JS\t");
+        return ACCESS_FLAG(F_SF);
+        break;
+      case 0x9:
+        DECODE_PRINTF("JNS\t");
+        return !ACCESS_FLAG(F_SF);
+        break;
+      case 0xa:
+        DECODE_PRINTF("JP\t");
+        return ACCESS_FLAG(F_PF);
+        break;
+      case 0xb:
+        DECODE_PRINTF("JNP\t");
+        return !ACCESS_FLAG(F_PF);
+        break;
+      case 0xc:
+        DECODE_PRINTF("JL\t");
+        return xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF));
+        break;
+      case 0xd:
+        DECODE_PRINTF("JNL\t");
+        return !xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF));
+        break;
+      case 0xe:
+        DECODE_PRINTF("JLE\t");
+        return (xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) ||
+                ACCESS_FLAG(F_ZF));
+        break;
+      default:
+        DECODE_PRINTF("JNLE\t");
+        return !(xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) ||
+                 ACCESS_FLAG(F_ZF));
+    }
+}
+
+void x86emuOp2_long_jump(u8 op2)
+{
+    s32 target;
+    int cond;
+
+    /* conditional jump to word offset. */
+    START_OF_INSTR();
+    cond = x86emu_check_jump_condition(op2 & 0xF);
+    target = (s16) fetch_word_imm();
+    target += (s16) M.x86.R_IP;
+    DECODE_PRINTF2("%04x\n", target);
+    TRACE_AND_STEP();
+    if (cond)
+        M.x86.R_IP = (u16)target;
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0x90-0x9F
+****************************************************************************/
+void x86emuOp2_set_byte(u8 op2)
+{
+    int mod, rl, rh;
+    uint destoffset;
+    u8  *destreg;
+    char *name = 0;
+    int cond = 0;
+
+    START_OF_INSTR();
+    switch (op2) {
+      case 0x90:
+        name = "SETO\t";
+        cond =  ACCESS_FLAG(F_OF);
+        break;
+      case 0x91:
+        name = "SETNO\t";
+        cond = !ACCESS_FLAG(F_OF);
+        break;
+      case 0x92:
+        name = "SETB\t";
+        cond = ACCESS_FLAG(F_CF);
+        break;
+      case 0x93:
+        name = "SETNB\t";
+        cond = !ACCESS_FLAG(F_CF);
+        break;
+      case 0x94:
+        name = "SETZ\t";
+        cond = ACCESS_FLAG(F_ZF);
+        break;
+      case 0x95:
+        name = "SETNZ\t";
+        cond = !ACCESS_FLAG(F_ZF);
+        break;
+      case 0x96:
+        name = "SETBE\t";
+        cond = ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF);
+        break;
+      case 0x97:
+        name = "SETNBE\t";
+        cond = !(ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF));
+        break;
+      case 0x98:
+        name = "SETS\t";
+        cond = ACCESS_FLAG(F_SF);
+        break;
+      case 0x99:
+        name = "SETNS\t";
+        cond = !ACCESS_FLAG(F_SF);
+        break;
+      case 0x9a:
+        name = "SETP\t";
+        cond = ACCESS_FLAG(F_PF);
+        break;
+      case 0x9b:
+        name = "SETNP\t";
+        cond = !ACCESS_FLAG(F_PF);
+        break;
+      case 0x9c:
+        name = "SETL\t";
+        cond = xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF));
+        break;
+      case 0x9d:
+        name = "SETNL\t";
+        cond = !xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF));
+        break;
+      case 0x9e:
+        name = "SETLE\t";
+        cond = (xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) ||
+                ACCESS_FLAG(F_ZF));
+        break;
+      case 0x9f:
+        name = "SETNLE\t";
+        cond = !(xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) ||
+                 ACCESS_FLAG(F_ZF));
+        break;
+    }
+    DECODE_PRINTF(name);
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (mod < 3) {
+        destoffset = decode_rmXX_address(mod, rl);
+        TRACE_AND_STEP();
+        store_data_byte(destoffset, cond ? 0x01 : 0x00);
+    } else {                     /* register to register */
+        destreg = DECODE_RM_BYTE_REGISTER(rl);
+        TRACE_AND_STEP();
+        *destreg = cond ? 0x01 : 0x00;
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xa0
+****************************************************************************/
+void x86emuOp2_push_FS(u8 X86EMU_UNUSED(op2))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("PUSH\tFS\n");
+    TRACE_AND_STEP();
+    push_word(M.x86.R_FS);
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xa1
+****************************************************************************/
+void x86emuOp2_pop_FS(u8 X86EMU_UNUSED(op2))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("POP\tFS\n");
+    TRACE_AND_STEP();
+    M.x86.R_FS = pop_word();
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xa3
+****************************************************************************/
+void x86emuOp2_bt_R(u8 X86EMU_UNUSED(op2))
+{
+    int mod, rl, rh;
+    uint srcoffset;
+    int bit,disp;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("BT\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (mod < 3) {
+        srcoffset = decode_rmXX_address(mod, rl);
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 srcval;
+            u32 *shiftreg;
+
+            DECODE_PRINTF(",");
+            shiftreg = DECODE_RM_LONG_REGISTER(rh);
+            TRACE_AND_STEP();
+            bit = *shiftreg & 0x1F;
+            disp = (s16)*shiftreg >> 5;
+            srcval = fetch_data_long(srcoffset+disp);
+            CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
+        } else {
+            u16 srcval;
+            u16 *shiftreg;
+
+            DECODE_PRINTF(",");
+            shiftreg = DECODE_RM_WORD_REGISTER(rh);
+            TRACE_AND_STEP();
+            bit = *shiftreg & 0xF;
+            disp = (s16)*shiftreg >> 4;
+            srcval = fetch_data_word(srcoffset+disp);
+            CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
+        }
+    } else {                     /* register to register */
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 *srcreg,*shiftreg;
+
+            srcreg = DECODE_RM_LONG_REGISTER(rl);
+            DECODE_PRINTF(",");
+            shiftreg = DECODE_RM_LONG_REGISTER(rh);
+            TRACE_AND_STEP();
+            bit = *shiftreg & 0x1F;
+            CONDITIONAL_SET_FLAG(*srcreg & (0x1 << bit),F_CF);
+        } else {
+            u16 *srcreg,*shiftreg;
+
+            srcreg = DECODE_RM_WORD_REGISTER(rl);
+            DECODE_PRINTF(",");
+            shiftreg = DECODE_RM_WORD_REGISTER(rh);
+            TRACE_AND_STEP();
+            bit = *shiftreg & 0xF;
+            CONDITIONAL_SET_FLAG(*srcreg & (0x1 << bit),F_CF);
+        }
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xa4
+****************************************************************************/
+void x86emuOp2_shld_IMM(u8 X86EMU_UNUSED(op2))
+{
+    int mod, rl, rh;
+    uint destoffset;
+    u8 shift;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("SHLD\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (mod < 3) {
+        destoffset = decode_rmXX_address(mod, rl);
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 destval;
+            u32 *shiftreg;
+
+            DECODE_PRINTF(",");
+            shiftreg = DECODE_RM_LONG_REGISTER(rh);
+            DECODE_PRINTF(",");
+            shift = fetch_byte_imm();
+            DECODE_PRINTF2("%d\n", shift);
+            TRACE_AND_STEP();
+            destval = fetch_data_long(destoffset);
+            destval = shld_long(destval,*shiftreg,shift);
+            store_data_long(destoffset, destval);
+        } else {
+            u16 destval;
+            u16 *shiftreg;
+
+            DECODE_PRINTF(",");
+            shiftreg = DECODE_RM_WORD_REGISTER(rh);
+            DECODE_PRINTF(",");
+            shift = fetch_byte_imm();
+            DECODE_PRINTF2("%d\n", shift);
+            TRACE_AND_STEP();
+            destval = fetch_data_word(destoffset);
+            destval = shld_word(destval,*shiftreg,shift);
+            store_data_word(destoffset, destval);
+        }
+    } else {                     /* register to register */
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 *destreg,*shiftreg;
+
+            destreg = DECODE_RM_LONG_REGISTER(rl);
+            DECODE_PRINTF(",");
+            shiftreg = DECODE_RM_LONG_REGISTER(rh);
+            DECODE_PRINTF(",");
+            shift = fetch_byte_imm();
+            DECODE_PRINTF2("%d\n", shift);
+            TRACE_AND_STEP();
+            *destreg = shld_long(*destreg,*shiftreg,shift);
+        } else {
+            u16 *destreg,*shiftreg;
+
+            destreg = DECODE_RM_WORD_REGISTER(rl);
+            DECODE_PRINTF(",");
+            shiftreg = DECODE_RM_WORD_REGISTER(rh);
+            DECODE_PRINTF(",");
+            shift = fetch_byte_imm();
+            DECODE_PRINTF2("%d\n", shift);
+            TRACE_AND_STEP();
+            *destreg = shld_word(*destreg,*shiftreg,shift);
+        }
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xa5
+****************************************************************************/
+void x86emuOp2_shld_CL(u8 X86EMU_UNUSED(op2))
+{
+    int mod, rl, rh;
+    uint destoffset;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("SHLD\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (mod < 3) {
+        destoffset = decode_rmXX_address(mod, rl);
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 destval;
+            u32 *shiftreg;
+
+            DECODE_PRINTF(",");
+            shiftreg = DECODE_RM_LONG_REGISTER(rh);
+            DECODE_PRINTF(",CL\n");
+            TRACE_AND_STEP();
+            destval = fetch_data_long(destoffset);
+            destval = shld_long(destval,*shiftreg,M.x86.R_CL);
+            store_data_long(destoffset, destval);
+        } else {
+            u16 destval;
+            u16 *shiftreg;
+
+            DECODE_PRINTF(",");
+            shiftreg = DECODE_RM_WORD_REGISTER(rh);
+            DECODE_PRINTF(",CL\n");
+            TRACE_AND_STEP();
+            destval = fetch_data_word(destoffset);
+            destval = shld_word(destval,*shiftreg,M.x86.R_CL);
+            store_data_word(destoffset, destval);
+        }
+    } else {                     /* register to register */
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 *destreg,*shiftreg;
+
+            destreg = DECODE_RM_LONG_REGISTER(rl);
+            DECODE_PRINTF(",");
+            shiftreg = DECODE_RM_LONG_REGISTER(rh);
+            DECODE_PRINTF(",CL\n");
+            TRACE_AND_STEP();
+            *destreg = shld_long(*destreg,*shiftreg,M.x86.R_CL);
+        } else {
+            u16 *destreg,*shiftreg;
+
+            destreg = DECODE_RM_WORD_REGISTER(rl);
+            DECODE_PRINTF(",");
+            shiftreg = DECODE_RM_WORD_REGISTER(rh);
+            DECODE_PRINTF(",CL\n");
+            TRACE_AND_STEP();
+            *destreg = shld_word(*destreg,*shiftreg,M.x86.R_CL);
+        }
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xa8
+****************************************************************************/
+void x86emuOp2_push_GS(u8 X86EMU_UNUSED(op2))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("PUSH\tGS\n");
+    TRACE_AND_STEP();
+    push_word(M.x86.R_GS);
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xa9
+****************************************************************************/
+void x86emuOp2_pop_GS(u8 X86EMU_UNUSED(op2))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("POP\tGS\n");
+    TRACE_AND_STEP();
+    M.x86.R_GS = pop_word();
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xaa
+****************************************************************************/
+void x86emuOp2_bts_R(u8 X86EMU_UNUSED(op2))
+{
+    int mod, rl, rh;
+    uint srcoffset;
+    int bit,disp;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("BTS\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (mod < 3) {
+        srcoffset = decode_rmXX_address(mod, rl);
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 srcval,mask;
+            u32 *shiftreg;
+
+            DECODE_PRINTF(",");
+            shiftreg = DECODE_RM_LONG_REGISTER(rh);
+            TRACE_AND_STEP();
+            bit = *shiftreg & 0x1F;
+            disp = (s16)*shiftreg >> 5;
+            srcval = fetch_data_long(srcoffset+disp);
+            mask = (0x1 << bit);
+            CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
+            store_data_long(srcoffset+disp, srcval | mask);
+        } else {
+            u16 srcval,mask;
+            u16 *shiftreg;
+
+            DECODE_PRINTF(",");
+            shiftreg = DECODE_RM_WORD_REGISTER(rh);
+            TRACE_AND_STEP();
+            bit = *shiftreg & 0xF;
+            disp = (s16)*shiftreg >> 4;
+            srcval = fetch_data_word(srcoffset+disp);
+            mask = (u16)(0x1 << bit);
+            CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
+            store_data_word(srcoffset+disp, srcval | mask);
+        }
+    } else {                     /* register to register */
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 *srcreg,*shiftreg;
+            u32 mask;
+
+            srcreg = DECODE_RM_LONG_REGISTER(rl);
+            DECODE_PRINTF(",");
+            shiftreg = DECODE_RM_LONG_REGISTER(rh);
+            TRACE_AND_STEP();
+            bit = *shiftreg & 0x1F;
+            mask = (0x1 << bit);
+            CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
+            *srcreg |= mask;
+        } else {
+            u16 *srcreg,*shiftreg;
+            u16 mask;
+
+            srcreg = DECODE_RM_WORD_REGISTER(rl);
+            DECODE_PRINTF(",");
+            shiftreg = DECODE_RM_WORD_REGISTER(rh);
+            TRACE_AND_STEP();
+            bit = *shiftreg & 0xF;
+            mask = (u16)(0x1 << bit);
+            CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
+            *srcreg |= mask;
+        }
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xac
+****************************************************************************/
+void x86emuOp2_shrd_IMM(u8 X86EMU_UNUSED(op2))
+{
+    int mod, rl, rh;
+    uint destoffset;
+    u8 shift;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("SHLD\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (mod < 3) {
+        destoffset = decode_rmXX_address(mod, rl);
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 destval;
+            u32 *shiftreg;
+
+            DECODE_PRINTF(",");
+            shiftreg = DECODE_RM_LONG_REGISTER(rh);
+            DECODE_PRINTF(",");
+            shift = fetch_byte_imm();
+            DECODE_PRINTF2("%d\n", shift);
+            TRACE_AND_STEP();
+            destval = fetch_data_long(destoffset);
+            destval = shrd_long(destval,*shiftreg,shift);
+            store_data_long(destoffset, destval);
+        } else {
+            u16 destval;
+            u16 *shiftreg;
+
+            DECODE_PRINTF(",");
+            shiftreg = DECODE_RM_WORD_REGISTER(rh);
+            DECODE_PRINTF(",");
+            shift = fetch_byte_imm();
+            DECODE_PRINTF2("%d\n", shift);
+            TRACE_AND_STEP();
+            destval = fetch_data_word(destoffset);
+            destval = shrd_word(destval,*shiftreg,shift);
+            store_data_word(destoffset, destval);
+        }
+    } else {                     /* register to register */
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 *destreg,*shiftreg;
+
+            destreg = DECODE_RM_LONG_REGISTER(rl);
+            DECODE_PRINTF(",");
+            shiftreg = DECODE_RM_LONG_REGISTER(rh);
+            DECODE_PRINTF(",");
+            shift = fetch_byte_imm();
+            DECODE_PRINTF2("%d\n", shift);
+            TRACE_AND_STEP();
+            *destreg = shrd_long(*destreg,*shiftreg,shift);
+        } else {
+            u16 *destreg,*shiftreg;
+
+            destreg = DECODE_RM_WORD_REGISTER(rl);
+            DECODE_PRINTF(",");
+            shiftreg = DECODE_RM_WORD_REGISTER(rh);
+            DECODE_PRINTF(",");
+            shift = fetch_byte_imm();
+            DECODE_PRINTF2("%d\n", shift);
+            TRACE_AND_STEP();
+            *destreg = shrd_word(*destreg,*shiftreg,shift);
+        }
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xad
+****************************************************************************/
+void x86emuOp2_shrd_CL(u8 X86EMU_UNUSED(op2))
+{
+    int mod, rl, rh;
+    uint destoffset;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("SHLD\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (mod < 3) {
+        destoffset = decode_rmXX_address(mod, rl);
+        DECODE_PRINTF(",");
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 destval;
+            u32 *shiftreg;
+
+            shiftreg = DECODE_RM_LONG_REGISTER(rh);
+            DECODE_PRINTF(",CL\n");
+            TRACE_AND_STEP();
+            destval = fetch_data_long(destoffset);
+            destval = shrd_long(destval,*shiftreg,M.x86.R_CL);
+            store_data_long(destoffset, destval);
+        } else {
+            u16 destval;
+            u16 *shiftreg;
+
+            shiftreg = DECODE_RM_WORD_REGISTER(rh);
+            DECODE_PRINTF(",CL\n");
+            TRACE_AND_STEP();
+            destval = fetch_data_word(destoffset);
+            destval = shrd_word(destval,*shiftreg,M.x86.R_CL);
+            store_data_word(destoffset, destval);
+        }
+    } else {                     /* register to register */
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 *destreg,*shiftreg;
+
+            destreg = DECODE_RM_LONG_REGISTER(rl);
+            DECODE_PRINTF(",");
+            shiftreg = DECODE_RM_LONG_REGISTER(rh);
+            DECODE_PRINTF(",CL\n");
+            TRACE_AND_STEP();
+            *destreg = shrd_long(*destreg,*shiftreg,M.x86.R_CL);
+        } else {
+            u16 *destreg,*shiftreg;
+
+            destreg = DECODE_RM_WORD_REGISTER(rl);
+            DECODE_PRINTF(",");
+            shiftreg = DECODE_RM_WORD_REGISTER(rh);
+            DECODE_PRINTF(",CL\n");
+            TRACE_AND_STEP();
+            *destreg = shrd_word(*destreg,*shiftreg,M.x86.R_CL);
+        }
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xaf
+****************************************************************************/
+void x86emuOp2_imul_R_RM(u8 X86EMU_UNUSED(op2))
+{
+    int mod, rl, rh;
+    uint srcoffset;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("IMUL\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (mod < 3) {
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 *destreg;
+            u32 srcval;
+            u32 res_lo,res_hi;
+
+            destreg = DECODE_RM_LONG_REGISTER(rh);
+            DECODE_PRINTF(",");
+            srcoffset = decode_rmXX_address(mod, rl);
+            srcval = fetch_data_long(srcoffset);
+            TRACE_AND_STEP();
+            imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)srcval);
+            if (res_hi != 0) {
+                SET_FLAG(F_CF);
+                SET_FLAG(F_OF);
+            } else {
+                CLEAR_FLAG(F_CF);
+                CLEAR_FLAG(F_OF);
+            }
+            *destreg = (u32)res_lo;
+        } else {
+            u16 *destreg;
+            u16 srcval;
+            u32 res;
+
+            destreg = DECODE_RM_WORD_REGISTER(rh);
+            DECODE_PRINTF(",");
+            srcoffset = decode_rmXX_address(mod, rl);
+            srcval = fetch_data_word(srcoffset);
+            TRACE_AND_STEP();
+            res = (s16)*destreg * (s16)srcval;
+            if (res > 0xFFFF) {
+                SET_FLAG(F_CF);
+                SET_FLAG(F_OF);
+            } else {
+                CLEAR_FLAG(F_CF);
+                CLEAR_FLAG(F_OF);
+            }
+            *destreg = (u16)res;
+        }
+    } else {                     /* register to register */
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 *destreg,*srcreg;
+            u32 res_lo,res_hi;
+
+            destreg = DECODE_RM_LONG_REGISTER(rh);
+            DECODE_PRINTF(",");
+            srcreg = DECODE_RM_LONG_REGISTER(rl);
+            TRACE_AND_STEP();
+            imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)*srcreg);
+            if (res_hi != 0) {
+                SET_FLAG(F_CF);
+                SET_FLAG(F_OF);
+            } else {
+                CLEAR_FLAG(F_CF);
+                CLEAR_FLAG(F_OF);
+            }
+            *destreg = (u32)res_lo;
+        } else {
+            u16 *destreg,*srcreg;
+            u32 res;
+
+            destreg = DECODE_RM_WORD_REGISTER(rh);
+            DECODE_PRINTF(",");
+            srcreg = DECODE_RM_WORD_REGISTER(rl);
+            res = (s16)*destreg * (s16)*srcreg;
+            if (res > 0xFFFF) {
+                SET_FLAG(F_CF);
+                SET_FLAG(F_OF);
+            } else {
+                CLEAR_FLAG(F_CF);
+                CLEAR_FLAG(F_OF);
+            }
+            *destreg = (u16)res;
+        }
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xb2
+****************************************************************************/
+void x86emuOp2_lss_R_IMM(u8 X86EMU_UNUSED(op2))
+{
+    int mod, rh, rl;
+    u16 *dstreg;
+    uint srcoffset;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("LSS\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (mod < 3) {
+        dstreg = DECODE_RM_WORD_REGISTER(rh);
+        DECODE_PRINTF(",");
+        srcoffset = decode_rmXX_address(mod, rl);
+        DECODE_PRINTF("\n");
+        TRACE_AND_STEP();
+        *dstreg = fetch_data_word(srcoffset);
+        M.x86.R_SS = fetch_data_word(srcoffset + 2);
+    } else {                     /* register to register */
+        /* UNDEFINED! */
+        TRACE_AND_STEP();
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xb3
+****************************************************************************/
+void x86emuOp2_btr_R(u8 X86EMU_UNUSED(op2))
+{
+    int mod, rl, rh;
+    uint srcoffset;
+    int bit,disp;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("BTR\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (mod < 3) {
+        srcoffset = decode_rmXX_address(mod, rl);
+        DECODE_PRINTF(",");
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 srcval,mask;
+            u32 *shiftreg;
+
+            shiftreg = DECODE_RM_LONG_REGISTER(rh);
+            TRACE_AND_STEP();
+            bit = *shiftreg & 0x1F;
+            disp = (s16)*shiftreg >> 5;
+            srcval = fetch_data_long(srcoffset+disp);
+            mask = (0x1 << bit);
+            CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
+            store_data_long(srcoffset+disp, srcval & ~mask);
+        } else {
+            u16 srcval,mask;
+            u16 *shiftreg;
+
+            shiftreg = DECODE_RM_WORD_REGISTER(rh);
+            TRACE_AND_STEP();
+            bit = *shiftreg & 0xF;
+            disp = (s16)*shiftreg >> 4;
+            srcval = fetch_data_word(srcoffset+disp);
+            mask = (u16)(0x1 << bit);
+            CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
+            store_data_word(srcoffset+disp, (u16)(srcval & ~mask));
+        }
+    } else {                     /* register to register */
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 *srcreg,*shiftreg;
+            u32 mask;
+
+            srcreg = DECODE_RM_LONG_REGISTER(rl);
+            DECODE_PRINTF(",");
+            shiftreg = DECODE_RM_LONG_REGISTER(rh);
+            TRACE_AND_STEP();
+            bit = *shiftreg & 0x1F;
+            mask = (0x1 << bit);
+            CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
+            *srcreg &= ~mask;
+        } else {
+            u16 *srcreg,*shiftreg;
+            u16 mask;
+
+            srcreg = DECODE_RM_WORD_REGISTER(rl);
+            DECODE_PRINTF(",");
+            shiftreg = DECODE_RM_WORD_REGISTER(rh);
+            TRACE_AND_STEP();
+            bit = *shiftreg & 0xF;
+            mask = (u16)(0x1 << bit);
+            CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
+            *srcreg &= ~mask;
+        }
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xb4
+****************************************************************************/
+void x86emuOp2_lfs_R_IMM(u8 X86EMU_UNUSED(op2))
+{
+    int mod, rh, rl;
+    u16 *dstreg;
+    uint srcoffset;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("LFS\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (mod < 3) {
+        dstreg = DECODE_RM_WORD_REGISTER(rh);
+        DECODE_PRINTF(",");
+        srcoffset = decode_rmXX_address(mod, rl);
+        DECODE_PRINTF("\n");
+        TRACE_AND_STEP();
+        *dstreg = fetch_data_word(srcoffset);
+        M.x86.R_FS = fetch_data_word(srcoffset + 2);
+    } else {                     /* register to register */
+        /* UNDEFINED! */
+        TRACE_AND_STEP();
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xb5
+****************************************************************************/
+void x86emuOp2_lgs_R_IMM(u8 X86EMU_UNUSED(op2))
+{
+    int mod, rh, rl;
+    u16 *dstreg;
+    uint srcoffset;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("LGS\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (mod < 3) {
+        dstreg = DECODE_RM_WORD_REGISTER(rh);
+        DECODE_PRINTF(",");
+        srcoffset = decode_rmXX_address(mod, rl);
+        DECODE_PRINTF("\n");
+        TRACE_AND_STEP();
+        *dstreg = fetch_data_word(srcoffset);
+        M.x86.R_GS = fetch_data_word(srcoffset + 2);
+    } else {                     /* register to register */
+        /* UNDEFINED! */
+        TRACE_AND_STEP();
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xb6
+****************************************************************************/
+void x86emuOp2_movzx_byte_R_RM(u8 X86EMU_UNUSED(op2))
+{
+    int mod, rl, rh;
+    uint srcoffset;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("MOVZX\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (mod < 3) {
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 *destreg;
+            u32 srcval;
+
+            destreg = DECODE_RM_LONG_REGISTER(rh);
+            DECODE_PRINTF(",");
+            srcoffset = decode_rmXX_address(mod, rl);
+            srcval = fetch_data_byte(srcoffset);
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            *destreg = srcval;
+        } else {
+            u16 *destreg;
+            u16 srcval;
+
+            destreg = DECODE_RM_WORD_REGISTER(rh);
+            DECODE_PRINTF(",");
+            srcoffset = decode_rmXX_address(mod, rl);
+            srcval = fetch_data_byte(srcoffset);
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            *destreg = srcval;
+        }
+    } else {                     /* register to register */
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 *destreg;
+            u8  *srcreg;
+
+            destreg = DECODE_RM_LONG_REGISTER(rh);
+            DECODE_PRINTF(",");
+            srcreg = DECODE_RM_BYTE_REGISTER(rl);
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            *destreg = *srcreg;
+        } else {
+            u16 *destreg;
+            u8  *srcreg;
+
+            destreg = DECODE_RM_WORD_REGISTER(rh);
+            DECODE_PRINTF(",");
+            srcreg = DECODE_RM_BYTE_REGISTER(rl);
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            *destreg = *srcreg;
+        }
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xb7
+****************************************************************************/
+void x86emuOp2_movzx_word_R_RM(u8 X86EMU_UNUSED(op2))
+{
+    int mod, rl, rh;
+    uint srcoffset;
+    u32 *destreg;
+    u32 srcval;
+    u16 *srcreg;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("MOVZX\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (mod < 3) {
+        destreg = DECODE_RM_LONG_REGISTER(rh);
+        DECODE_PRINTF(",");
+        srcoffset = decode_rmXX_address(mod, rl);
+        srcval = fetch_data_word(srcoffset);
+        DECODE_PRINTF("\n");
+        TRACE_AND_STEP();
+        *destreg = srcval;
+    } else {                     /* register to register */
+        destreg = DECODE_RM_LONG_REGISTER(rh);
+        DECODE_PRINTF(",");
+        srcreg = DECODE_RM_WORD_REGISTER(rl);
+        DECODE_PRINTF("\n");
+        TRACE_AND_STEP();
+        *destreg = *srcreg;
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xba
+****************************************************************************/
+void x86emuOp2_btX_I(u8 X86EMU_UNUSED(op2))
+{
+    int mod, rl, rh;
+    uint srcoffset;
+    u8 shift;
+    int bit;
+
+    START_OF_INSTR();
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    switch (rh) {
+    case 4:
+        DECODE_PRINTF("BT\t");
+        break;
+    case 5:
+        DECODE_PRINTF("BTS\t");
+        break;
+    case 6:
+        DECODE_PRINTF("BTR\t");
+        break;
+    case 7:
+        DECODE_PRINTF("BTC\t");
+        break;
+    default:
+        DECODE_PRINTF("ILLEGAL EXTENDED X86 OPCODE\n");
+        TRACE_REGS();
+        printk("%04x:%04x: %02X%02X ILLEGAL EXTENDED X86 OPCODE EXTENSION!\n",
+                M.x86.R_CS, M.x86.R_IP-3,op2, (mod<<6)|(rh<<3)|rl);
+        HALT_SYS();
+    }
+    if (mod < 3) {
+
+        srcoffset = decode_rmXX_address(mod, rl);
+        shift = fetch_byte_imm();
+        DECODE_PRINTF2(",%d\n", shift);
+        TRACE_AND_STEP();
+
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 srcval, mask;
+
+            bit = shift & 0x1F;
+            srcval = fetch_data_long(srcoffset);
+            mask = (0x1 << bit);
+            CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
+            switch (rh) {
+            case 5:
+                store_data_long(srcoffset, srcval | mask);
+                break;
+            case 6:
+                store_data_long(srcoffset, srcval & ~mask);
+                break;
+            case 7:
+                store_data_long(srcoffset, srcval ^ mask);
+                break;
+            default:
+                break;
+            }
+        } else {
+            u16 srcval, mask;
+
+            bit = shift & 0xF;
+            srcval = fetch_data_word(srcoffset);
+            mask = (0x1 << bit);
+            CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
+            switch (rh) {
+            case 5:
+                store_data_word(srcoffset, srcval | mask);
+                break;
+            case 6:
+                store_data_word(srcoffset, srcval & ~mask);
+                break;
+            case 7:
+                store_data_word(srcoffset, srcval ^ mask);
+                break;
+            default:
+                break;
+            }
+        }
+    } else {                     /* register to register */
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 *srcreg;
+            u32 mask;
+
+            srcreg = DECODE_RM_LONG_REGISTER(rl);
+            shift = fetch_byte_imm();
+            DECODE_PRINTF2(",%d\n", shift);
+            TRACE_AND_STEP();
+            bit = shift & 0x1F;
+            mask = (0x1 << bit);
+            CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
+            switch (rh) {
+            case 5:
+                *srcreg |= mask;
+                break;
+            case 6:
+                *srcreg &= ~mask;
+                break;
+            case 7:
+                *srcreg ^= mask;
+                break;
+            default:
+                break;
+            }
+        } else {
+            u16 *srcreg;
+            u16 mask;
+
+            srcreg = DECODE_RM_WORD_REGISTER(rl);
+            shift = fetch_byte_imm();
+            DECODE_PRINTF2(",%d\n", shift);
+            TRACE_AND_STEP();
+            bit = shift & 0xF;
+            mask = (0x1 << bit);
+            CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
+            switch (rh) {
+            case 5:
+                *srcreg |= mask;
+                break;
+            case 6:
+                *srcreg &= ~mask;
+                break;
+            case 7:
+                *srcreg ^= mask;
+                break;
+            default:
+                break;
+            }
+        }
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xbb
+****************************************************************************/
+void x86emuOp2_btc_R(u8 X86EMU_UNUSED(op2))
+{
+    int mod, rl, rh;
+    uint srcoffset;
+    int bit,disp;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("BTC\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (mod < 3) {
+        srcoffset = decode_rmXX_address(mod, rl);
+        DECODE_PRINTF(",");
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 srcval,mask;
+            u32 *shiftreg;
+
+            shiftreg = DECODE_RM_LONG_REGISTER(rh);
+            TRACE_AND_STEP();
+            bit = *shiftreg & 0x1F;
+            disp = (s16)*shiftreg >> 5;
+            srcval = fetch_data_long(srcoffset+disp);
+            mask = (0x1 << bit);
+            CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
+            store_data_long(srcoffset+disp, srcval ^ mask);
+        } else {
+            u16 srcval,mask;
+            u16 *shiftreg;
+
+            shiftreg = DECODE_RM_WORD_REGISTER(rh);
+            TRACE_AND_STEP();
+            bit = *shiftreg & 0xF;
+            disp = (s16)*shiftreg >> 4;
+            srcval = fetch_data_word(srcoffset+disp);
+            mask = (u16)(0x1 << bit);
+            CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
+            store_data_word(srcoffset+disp, (u16)(srcval ^ mask));
+        }
+    } else {                     /* register to register */
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 *srcreg,*shiftreg;
+            u32 mask;
+
+            srcreg = DECODE_RM_LONG_REGISTER(rl);
+            DECODE_PRINTF(",");
+            shiftreg = DECODE_RM_LONG_REGISTER(rh);
+            TRACE_AND_STEP();
+            bit = *shiftreg & 0x1F;
+            mask = (0x1 << bit);
+            CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
+            *srcreg ^= mask;
+        } else {
+            u16 *srcreg,*shiftreg;
+            u16 mask;
+
+            srcreg = DECODE_RM_WORD_REGISTER(rl);
+            DECODE_PRINTF(",");
+            shiftreg = DECODE_RM_WORD_REGISTER(rh);
+            TRACE_AND_STEP();
+            bit = *shiftreg & 0xF;
+            mask = (u16)(0x1 << bit);
+            CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
+            *srcreg ^= mask;
+        }
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xbc
+****************************************************************************/
+void x86emuOp2_bsf(u8 X86EMU_UNUSED(op2))
+{
+    int mod, rl, rh;
+    uint srcoffset;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("BSF\n");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (mod < 3) {
+        srcoffset = decode_rmXX_address(mod, rl);
+        DECODE_PRINTF(",");
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 srcval, *dstreg;
+
+            dstreg = DECODE_RM_LONG_REGISTER(rh);
+            TRACE_AND_STEP();
+            srcval = fetch_data_long(srcoffset);
+            CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
+            for(*dstreg = 0; *dstreg < 32; (*dstreg)++)
+                if ((srcval >> *dstreg) & 1) break;
+        } else {
+            u16 srcval, *dstreg;
+
+            dstreg = DECODE_RM_WORD_REGISTER(rh);
+            TRACE_AND_STEP();
+            srcval = fetch_data_word(srcoffset);
+            CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
+            for(*dstreg = 0; *dstreg < 16; (*dstreg)++)
+                if ((srcval >> *dstreg) & 1) break;
+        }
+    } else {             /* register to register */
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 *srcreg, *dstreg;
+
+            srcreg = DECODE_RM_LONG_REGISTER(rl);
+            DECODE_PRINTF(",");
+            dstreg = DECODE_RM_LONG_REGISTER(rh);
+            TRACE_AND_STEP();
+            CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF);
+            for(*dstreg = 0; *dstreg < 32; (*dstreg)++)
+                if ((*srcreg >> *dstreg) & 1) break;
+        } else {
+            u16 *srcreg, *dstreg;
+
+            srcreg = DECODE_RM_WORD_REGISTER(rl);
+            DECODE_PRINTF(",");
+            dstreg = DECODE_RM_WORD_REGISTER(rh);
+            TRACE_AND_STEP();
+            CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF);
+            for(*dstreg = 0; *dstreg < 16; (*dstreg)++)
+                if ((*srcreg >> *dstreg) & 1) break;
+        }
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xbd
+****************************************************************************/
+void x86emuOp2_bsr(u8 X86EMU_UNUSED(op2))
+{
+    int mod, rl, rh;
+    uint srcoffset;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("BSF\n");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (mod < 3) {
+        srcoffset = decode_rmXX_address(mod, rl);
+        DECODE_PRINTF(",");
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 srcval, *dstreg;
+
+            dstreg = DECODE_RM_LONG_REGISTER(rh);
+            TRACE_AND_STEP();
+            srcval = fetch_data_long(srcoffset);
+            CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
+            for(*dstreg = 31; *dstreg > 0; (*dstreg)--)
+                if ((srcval >> *dstreg) & 1) break;
+        } else {
+            u16 srcval, *dstreg;
+
+            dstreg = DECODE_RM_WORD_REGISTER(rh);
+            TRACE_AND_STEP();
+            srcval = fetch_data_word(srcoffset);
+            CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
+            for(*dstreg = 15; *dstreg > 0; (*dstreg)--)
+                if ((srcval >> *dstreg) & 1) break;
+        }
+    } else {             /* register to register */
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 *srcreg, *dstreg;
+
+            srcreg = DECODE_RM_LONG_REGISTER(rl);
+            DECODE_PRINTF(",");
+            dstreg = DECODE_RM_LONG_REGISTER(rh);
+            TRACE_AND_STEP();
+            CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF);
+            for(*dstreg = 31; *dstreg > 0; (*dstreg)--)
+                if ((*srcreg >> *dstreg) & 1) break;
+        } else {
+            u16 *srcreg, *dstreg;
+
+            srcreg = DECODE_RM_WORD_REGISTER(rl);
+            DECODE_PRINTF(",");
+            dstreg = DECODE_RM_WORD_REGISTER(rh);
+            TRACE_AND_STEP();
+            CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF);
+            for(*dstreg = 15; *dstreg > 0; (*dstreg)--)
+                if ((*srcreg >> *dstreg) & 1) break;
+        }
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xbe
+****************************************************************************/
+void x86emuOp2_movsx_byte_R_RM(u8 X86EMU_UNUSED(op2))
+{
+    int mod, rl, rh;
+    uint srcoffset;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("MOVSX\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (mod < 3) {
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 *destreg;
+            u32 srcval;
+
+            destreg = DECODE_RM_LONG_REGISTER(rh);
+            DECODE_PRINTF(",");
+            srcoffset = decode_rmXX_address(mod, rl);
+            srcval = (s32)((s8)fetch_data_byte(srcoffset));
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            *destreg = srcval;
+        } else {
+            u16 *destreg;
+            u16 srcval;
+
+            destreg = DECODE_RM_WORD_REGISTER(rh);
+            DECODE_PRINTF(",");
+            srcoffset = decode_rmXX_address(mod, rl);
+            srcval = (s16)((s8)fetch_data_byte(srcoffset));
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            *destreg = srcval;
+        }
+    } else {                     /* register to register */
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            u32 *destreg;
+            u8  *srcreg;
+
+            destreg = DECODE_RM_LONG_REGISTER(rh);
+            DECODE_PRINTF(",");
+            srcreg = DECODE_RM_BYTE_REGISTER(rl);
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            *destreg = (s32)((s8)*srcreg);
+        } else {
+            u16 *destreg;
+            u8  *srcreg;
+
+            destreg = DECODE_RM_WORD_REGISTER(rh);
+            DECODE_PRINTF(",");
+            srcreg = DECODE_RM_BYTE_REGISTER(rl);
+            DECODE_PRINTF("\n");
+            TRACE_AND_STEP();
+            *destreg = (s16)((s8)*srcreg);
+        }
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xbf
+****************************************************************************/
+void x86emuOp2_movsx_word_R_RM(u8 X86EMU_UNUSED(op2))
+{
+    int mod, rl, rh;
+    uint srcoffset;
+    u32 *destreg;
+    u32 srcval;
+    u16 *srcreg;
+
+    START_OF_INSTR();
+    DECODE_PRINTF("MOVSX\t");
+    FETCH_DECODE_MODRM(mod, rh, rl);
+    if (mod < 3) {
+        destreg = DECODE_RM_LONG_REGISTER(rh);
+        DECODE_PRINTF(",");
+        srcoffset = decode_rmXX_address(mod, rl);
+        srcval = (s32)((s16)fetch_data_word(srcoffset));
+        DECODE_PRINTF("\n");
+        TRACE_AND_STEP();
+        *destreg = srcval;
+    } else {                     /* register to register */
+        destreg = DECODE_RM_LONG_REGISTER(rh);
+        DECODE_PRINTF(",");
+        srcreg = DECODE_RM_WORD_REGISTER(rl);
+        DECODE_PRINTF("\n");
+        TRACE_AND_STEP();
+        *destreg = (s32)((s16)*srcreg);
+    }
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/***************************************************************************
+ * Double byte operation code table:
+ **************************************************************************/
+void (*x86emu_optab2[256])(u8) =
+{
+/*  0x00 */ x86emuOp2_illegal_op,  /* Group F (ring 0 PM)      */
+/*  0x01 */ x86emuOp2_illegal_op,  /* Group G (ring 0 PM)      */
+/*  0x02 */ x86emuOp2_illegal_op,  /* lar (ring 0 PM)          */
+/*  0x03 */ x86emuOp2_illegal_op,  /* lsl (ring 0 PM)          */
+/*  0x04 */ x86emuOp2_illegal_op,
+/*  0x05 */ x86emuOp2_illegal_op,  /* loadall (undocumented)   */
+/*  0x06 */ x86emuOp2_illegal_op,  /* clts (ring 0 PM)         */
+/*  0x07 */ x86emuOp2_illegal_op,  /* loadall (undocumented)   */
+/*  0x08 */ x86emuOp2_illegal_op,  /* invd (ring 0 PM)         */
+/*  0x09 */ x86emuOp2_illegal_op,  /* wbinvd (ring 0 PM)       */
+/*  0x0a */ x86emuOp2_illegal_op,
+/*  0x0b */ x86emuOp2_illegal_op,
+/*  0x0c */ x86emuOp2_illegal_op,
+/*  0x0d */ x86emuOp2_illegal_op,
+/*  0x0e */ x86emuOp2_illegal_op,
+/*  0x0f */ x86emuOp2_illegal_op,
+
+/*  0x10 */ x86emuOp2_illegal_op,
+/*  0x11 */ x86emuOp2_illegal_op,
+/*  0x12 */ x86emuOp2_illegal_op,
+/*  0x13 */ x86emuOp2_illegal_op,
+/*  0x14 */ x86emuOp2_illegal_op,
+/*  0x15 */ x86emuOp2_illegal_op,
+/*  0x16 */ x86emuOp2_illegal_op,
+/*  0x17 */ x86emuOp2_illegal_op,
+/*  0x18 */ x86emuOp2_illegal_op,
+/*  0x19 */ x86emuOp2_illegal_op,
+/*  0x1a */ x86emuOp2_illegal_op,
+/*  0x1b */ x86emuOp2_illegal_op,
+/*  0x1c */ x86emuOp2_illegal_op,
+/*  0x1d */ x86emuOp2_illegal_op,
+/*  0x1e */ x86emuOp2_illegal_op,
+/*  0x1f */ x86emuOp2_illegal_op,
+
+/*  0x20 */ x86emuOp2_illegal_op,  /* mov reg32,creg (ring 0 PM) */
+/*  0x21 */ x86emuOp2_illegal_op,  /* mov reg32,dreg (ring 0 PM) */
+/*  0x22 */ x86emuOp2_illegal_op,  /* mov creg,reg32 (ring 0 PM) */
+/*  0x23 */ x86emuOp2_illegal_op,  /* mov dreg,reg32 (ring 0 PM) */
+/*  0x24 */ x86emuOp2_illegal_op,  /* mov reg32,treg (ring 0 PM) */
+/*  0x25 */ x86emuOp2_illegal_op,
+/*  0x26 */ x86emuOp2_illegal_op,  /* mov treg,reg32 (ring 0 PM) */
+/*  0x27 */ x86emuOp2_illegal_op,
+/*  0x28 */ x86emuOp2_illegal_op,
+/*  0x29 */ x86emuOp2_illegal_op,
+/*  0x2a */ x86emuOp2_illegal_op,
+/*  0x2b */ x86emuOp2_illegal_op,
+/*  0x2c */ x86emuOp2_illegal_op,
+/*  0x2d */ x86emuOp2_illegal_op,
+/*  0x2e */ x86emuOp2_illegal_op,
+/*  0x2f */ x86emuOp2_illegal_op,
+
+/*  0x30 */ x86emuOp2_illegal_op,
+/*  0x31 */ x86emuOp2_illegal_op,
+/*  0x32 */ x86emuOp2_illegal_op,
+/*  0x33 */ x86emuOp2_illegal_op,
+/*  0x34 */ x86emuOp2_illegal_op,
+/*  0x35 */ x86emuOp2_illegal_op,
+/*  0x36 */ x86emuOp2_illegal_op,
+/*  0x37 */ x86emuOp2_illegal_op,
+/*  0x38 */ x86emuOp2_illegal_op,
+/*  0x39 */ x86emuOp2_illegal_op,
+/*  0x3a */ x86emuOp2_illegal_op,
+/*  0x3b */ x86emuOp2_illegal_op,
+/*  0x3c */ x86emuOp2_illegal_op,
+/*  0x3d */ x86emuOp2_illegal_op,
+/*  0x3e */ x86emuOp2_illegal_op,
+/*  0x3f */ x86emuOp2_illegal_op,
+
+/*  0x40 */ x86emuOp2_illegal_op,
+/*  0x41 */ x86emuOp2_illegal_op,
+/*  0x42 */ x86emuOp2_illegal_op,
+/*  0x43 */ x86emuOp2_illegal_op,
+/*  0x44 */ x86emuOp2_illegal_op,
+/*  0x45 */ x86emuOp2_illegal_op,
+/*  0x46 */ x86emuOp2_illegal_op,
+/*  0x47 */ x86emuOp2_illegal_op,
+/*  0x48 */ x86emuOp2_illegal_op,
+/*  0x49 */ x86emuOp2_illegal_op,
+/*  0x4a */ x86emuOp2_illegal_op,
+/*  0x4b */ x86emuOp2_illegal_op,
+/*  0x4c */ x86emuOp2_illegal_op,
+/*  0x4d */ x86emuOp2_illegal_op,
+/*  0x4e */ x86emuOp2_illegal_op,
+/*  0x4f */ x86emuOp2_illegal_op,
+
+/*  0x50 */ x86emuOp2_illegal_op,
+/*  0x51 */ x86emuOp2_illegal_op,
+/*  0x52 */ x86emuOp2_illegal_op,
+/*  0x53 */ x86emuOp2_illegal_op,
+/*  0x54 */ x86emuOp2_illegal_op,
+/*  0x55 */ x86emuOp2_illegal_op,
+/*  0x56 */ x86emuOp2_illegal_op,
+/*  0x57 */ x86emuOp2_illegal_op,
+/*  0x58 */ x86emuOp2_illegal_op,
+/*  0x59 */ x86emuOp2_illegal_op,
+/*  0x5a */ x86emuOp2_illegal_op,
+/*  0x5b */ x86emuOp2_illegal_op,
+/*  0x5c */ x86emuOp2_illegal_op,
+/*  0x5d */ x86emuOp2_illegal_op,
+/*  0x5e */ x86emuOp2_illegal_op,
+/*  0x5f */ x86emuOp2_illegal_op,
+
+/*  0x60 */ x86emuOp2_illegal_op,
+/*  0x61 */ x86emuOp2_illegal_op,
+/*  0x62 */ x86emuOp2_illegal_op,
+/*  0x63 */ x86emuOp2_illegal_op,
+/*  0x64 */ x86emuOp2_illegal_op,
+/*  0x65 */ x86emuOp2_illegal_op,
+/*  0x66 */ x86emuOp2_illegal_op,
+/*  0x67 */ x86emuOp2_illegal_op,
+/*  0x68 */ x86emuOp2_illegal_op,
+/*  0x69 */ x86emuOp2_illegal_op,
+/*  0x6a */ x86emuOp2_illegal_op,
+/*  0x6b */ x86emuOp2_illegal_op,
+/*  0x6c */ x86emuOp2_illegal_op,
+/*  0x6d */ x86emuOp2_illegal_op,
+/*  0x6e */ x86emuOp2_illegal_op,
+/*  0x6f */ x86emuOp2_illegal_op,
+
+/*  0x70 */ x86emuOp2_illegal_op,
+/*  0x71 */ x86emuOp2_illegal_op,
+/*  0x72 */ x86emuOp2_illegal_op,
+/*  0x73 */ x86emuOp2_illegal_op,
+/*  0x74 */ x86emuOp2_illegal_op,
+/*  0x75 */ x86emuOp2_illegal_op,
+/*  0x76 */ x86emuOp2_illegal_op,
+/*  0x77 */ x86emuOp2_illegal_op,
+/*  0x78 */ x86emuOp2_illegal_op,
+/*  0x79 */ x86emuOp2_illegal_op,
+/*  0x7a */ x86emuOp2_illegal_op,
+/*  0x7b */ x86emuOp2_illegal_op,
+/*  0x7c */ x86emuOp2_illegal_op,
+/*  0x7d */ x86emuOp2_illegal_op,
+/*  0x7e */ x86emuOp2_illegal_op,
+/*  0x7f */ x86emuOp2_illegal_op,
+
+/*  0x80 */ x86emuOp2_long_jump,
+/*  0x81 */ x86emuOp2_long_jump,
+/*  0x82 */ x86emuOp2_long_jump,
+/*  0x83 */ x86emuOp2_long_jump,
+/*  0x84 */ x86emuOp2_long_jump,
+/*  0x85 */ x86emuOp2_long_jump,
+/*  0x86 */ x86emuOp2_long_jump,
+/*  0x87 */ x86emuOp2_long_jump,
+/*  0x88 */ x86emuOp2_long_jump,
+/*  0x89 */ x86emuOp2_long_jump,
+/*  0x8a */ x86emuOp2_long_jump,
+/*  0x8b */ x86emuOp2_long_jump,
+/*  0x8c */ x86emuOp2_long_jump,
+/*  0x8d */ x86emuOp2_long_jump,
+/*  0x8e */ x86emuOp2_long_jump,
+/*  0x8f */ x86emuOp2_long_jump,
+
+/*  0x90 */ x86emuOp2_set_byte,
+/*  0x91 */ x86emuOp2_set_byte,
+/*  0x92 */ x86emuOp2_set_byte,
+/*  0x93 */ x86emuOp2_set_byte,
+/*  0x94 */ x86emuOp2_set_byte,
+/*  0x95 */ x86emuOp2_set_byte,
+/*  0x96 */ x86emuOp2_set_byte,
+/*  0x97 */ x86emuOp2_set_byte,
+/*  0x98 */ x86emuOp2_set_byte,
+/*  0x99 */ x86emuOp2_set_byte,
+/*  0x9a */ x86emuOp2_set_byte,
+/*  0x9b */ x86emuOp2_set_byte,
+/*  0x9c */ x86emuOp2_set_byte,
+/*  0x9d */ x86emuOp2_set_byte,
+/*  0x9e */ x86emuOp2_set_byte,
+/*  0x9f */ x86emuOp2_set_byte,
+
+/*  0xa0 */ x86emuOp2_push_FS,
+/*  0xa1 */ x86emuOp2_pop_FS,
+/*  0xa2 */ x86emuOp2_illegal_op,
+/*  0xa3 */ x86emuOp2_bt_R,
+/*  0xa4 */ x86emuOp2_shld_IMM,
+/*  0xa5 */ x86emuOp2_shld_CL,
+/*  0xa6 */ x86emuOp2_illegal_op,
+/*  0xa7 */ x86emuOp2_illegal_op,
+/*  0xa8 */ x86emuOp2_push_GS,
+/*  0xa9 */ x86emuOp2_pop_GS,
+/*  0xaa */ x86emuOp2_illegal_op,
+/*  0xab */ x86emuOp2_bt_R,
+/*  0xac */ x86emuOp2_shrd_IMM,
+/*  0xad */ x86emuOp2_shrd_CL,
+/*  0xae */ x86emuOp2_illegal_op,
+/*  0xaf */ x86emuOp2_imul_R_RM,
+
+/*  0xb0 */ x86emuOp2_illegal_op,  /* TODO: cmpxchg */
+/*  0xb1 */ x86emuOp2_illegal_op,  /* TODO: cmpxchg */
+/*  0xb2 */ x86emuOp2_lss_R_IMM,
+/*  0xb3 */ x86emuOp2_btr_R,
+/*  0xb4 */ x86emuOp2_lfs_R_IMM,
+/*  0xb5 */ x86emuOp2_lgs_R_IMM,
+/*  0xb6 */ x86emuOp2_movzx_byte_R_RM,
+/*  0xb7 */ x86emuOp2_movzx_word_R_RM,
+/*  0xb8 */ x86emuOp2_illegal_op,
+/*  0xb9 */ x86emuOp2_illegal_op,
+/*  0xba */ x86emuOp2_btX_I,
+/*  0xbb */ x86emuOp2_btc_R,
+/*  0xbc */ x86emuOp2_bsf,
+/*  0xbd */ x86emuOp2_bsr,
+/*  0xbe */ x86emuOp2_movsx_byte_R_RM,
+/*  0xbf */ x86emuOp2_movsx_word_R_RM,
+
+/*  0xc0 */ x86emuOp2_illegal_op,  /* TODO: xadd */
+/*  0xc1 */ x86emuOp2_illegal_op,  /* TODO: xadd */
+/*  0xc2 */ x86emuOp2_illegal_op,
+/*  0xc3 */ x86emuOp2_illegal_op,
+/*  0xc4 */ x86emuOp2_illegal_op,
+/*  0xc5 */ x86emuOp2_illegal_op,
+/*  0xc6 */ x86emuOp2_illegal_op,
+/*  0xc7 */ x86emuOp2_illegal_op,
+/*  0xc8 */ x86emuOp2_illegal_op,  /* TODO: bswap */
+/*  0xc9 */ x86emuOp2_illegal_op,  /* TODO: bswap */
+/*  0xca */ x86emuOp2_illegal_op,  /* TODO: bswap */
+/*  0xcb */ x86emuOp2_illegal_op,  /* TODO: bswap */
+/*  0xcc */ x86emuOp2_illegal_op,  /* TODO: bswap */
+/*  0xcd */ x86emuOp2_illegal_op,  /* TODO: bswap */
+/*  0xce */ x86emuOp2_illegal_op,  /* TODO: bswap */
+/*  0xcf */ x86emuOp2_illegal_op,  /* TODO: bswap */
+
+/*  0xd0 */ x86emuOp2_illegal_op,
+/*  0xd1 */ x86emuOp2_illegal_op,
+/*  0xd2 */ x86emuOp2_illegal_op,
+/*  0xd3 */ x86emuOp2_illegal_op,
+/*  0xd4 */ x86emuOp2_illegal_op,
+/*  0xd5 */ x86emuOp2_illegal_op,
+/*  0xd6 */ x86emuOp2_illegal_op,
+/*  0xd7 */ x86emuOp2_illegal_op,
+/*  0xd8 */ x86emuOp2_illegal_op,
+/*  0xd9 */ x86emuOp2_illegal_op,
+/*  0xda */ x86emuOp2_illegal_op,
+/*  0xdb */ x86emuOp2_illegal_op,
+/*  0xdc */ x86emuOp2_illegal_op,
+/*  0xdd */ x86emuOp2_illegal_op,
+/*  0xde */ x86emuOp2_illegal_op,
+/*  0xdf */ x86emuOp2_illegal_op,
+
+/*  0xe0 */ x86emuOp2_illegal_op,
+/*  0xe1 */ x86emuOp2_illegal_op,
+/*  0xe2 */ x86emuOp2_illegal_op,
+/*  0xe3 */ x86emuOp2_illegal_op,
+/*  0xe4 */ x86emuOp2_illegal_op,
+/*  0xe5 */ x86emuOp2_illegal_op,
+/*  0xe6 */ x86emuOp2_illegal_op,
+/*  0xe7 */ x86emuOp2_illegal_op,
+/*  0xe8 */ x86emuOp2_illegal_op,
+/*  0xe9 */ x86emuOp2_illegal_op,
+/*  0xea */ x86emuOp2_illegal_op,
+/*  0xeb */ x86emuOp2_illegal_op,
+/*  0xec */ x86emuOp2_illegal_op,
+/*  0xed */ x86emuOp2_illegal_op,
+/*  0xee */ x86emuOp2_illegal_op,
+/*  0xef */ x86emuOp2_illegal_op,
+
+/*  0xf0 */ x86emuOp2_illegal_op,
+/*  0xf1 */ x86emuOp2_illegal_op,
+/*  0xf2 */ x86emuOp2_illegal_op,
+/*  0xf3 */ x86emuOp2_illegal_op,
+/*  0xf4 */ x86emuOp2_illegal_op,
+/*  0xf5 */ x86emuOp2_illegal_op,
+/*  0xf6 */ x86emuOp2_illegal_op,
+/*  0xf7 */ x86emuOp2_illegal_op,
+/*  0xf8 */ x86emuOp2_illegal_op,
+/*  0xf9 */ x86emuOp2_illegal_op,
+/*  0xfa */ x86emuOp2_illegal_op,
+/*  0xfb */ x86emuOp2_illegal_op,
+/*  0xfc */ x86emuOp2_illegal_op,
+/*  0xfd */ x86emuOp2_illegal_op,
+/*  0xfe */ x86emuOp2_illegal_op,
+/*  0xff */ x86emuOp2_illegal_op,
+};
diff --git a/other-licence/x86emu/prim_ops.c b/other-licence/x86emu/prim_ops.c
new file mode 100644
index 0000000..fa19cb4
--- /dev/null
+++ b/other-licence/x86emu/prim_ops.c
@@ -0,0 +1,2451 @@
+/****************************************************************************
+*
+*                       Realmode X86 Emulator Library
+*
+*               Copyright (C) 1991-2004 SciTech Software, Inc.
+*                    Copyright (C) David Mosberger-Tang
+*                      Copyright (C) 1999 Egbert Eich
+*
+*  ========================================================================
+*
+*  Permission to use, copy, modify, distribute, and sell this software and
+*  its documentation for any purpose is hereby granted without fee,
+*  provided that the above copyright notice appear in all copies and that
+*  both that copyright notice and this permission notice appear in
+*  supporting documentation, and that the name of the authors not be used
+*  in advertising or publicity pertaining to distribution of the software
+*  without specific, written prior permission.  The authors makes no
+*  representations about the suitability of this software for any purpose.
+*  It is provided "as is" without express or implied warranty.
+*
+*  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+*  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+*  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+*  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+*  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+*  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+*  PERFORMANCE OF THIS SOFTWARE.
+*
+*  ========================================================================
+*
+* Language:     ANSI C
+* Environment:  Any
+* Developer:    Kendall Bennett
+*
+* Description:  This file contains the code to implement the primitive
+*               machine operations used by the emulation code in ops.c
+*
+* Carry Chain Calculation
+*
+* This represents a somewhat expensive calculation which is
+* apparently required to emulate the setting of the OF and AF flag.
+* The latter is not so important, but the former is.  The overflow
+* flag is the XOR of the top two bits of the carry chain for an
+* addition (similar for subtraction).  Since we do not want to
+* simulate the addition in a bitwise manner, we try to calculate the
+* carry chain given the two operands and the result.
+*
+* So, given the following table, which represents the addition of two
+* bits, we can derive a formula for the carry chain.
+*
+* a   b   cin   r     cout
+* 0   0   0     0     0
+* 0   0   1     1     0
+* 0   1   0     1     0
+* 0   1   1     0     1
+* 1   0   0     1     0
+* 1   0   1     0     1
+* 1   1   0     0     1
+* 1   1   1     1     1
+*
+* Construction of table for cout:
+*
+* ab
+* r  \  00   01   11  10
+* |------------------
+* 0  |   0    1    1   1
+* 1  |   0    0    1   0
+*
+* By inspection, one gets:  cc = ab +  r'(a + b)
+*
+* That represents alot of operations, but NO CHOICE....
+*
+* Borrow Chain Calculation.
+*
+* The following table represents the subtraction of two bits, from
+* which we can derive a formula for the borrow chain.
+*
+* a   b   bin   r     bout
+* 0   0   0     0     0
+* 0   0   1     1     1
+* 0   1   0     1     1
+* 0   1   1     0     1
+* 1   0   0     1     0
+* 1   0   1     0     0
+* 1   1   0     0     0
+* 1   1   1     1     1
+*
+* Construction of table for cout:
+*
+* ab
+* r  \  00   01   11  10
+* |------------------
+* 0  |   0    1    0   0
+* 1  |   1    1    1   0
+*
+* By inspection, one gets:  bc = a'b +  r(a' + b)
+*
+****************************************************************************/
+
+#define PRIM_OPS_NO_REDEFINE_ASM
+#include "x86emui.h"
+
+#define abs(x) ({                               \
+                int __x = (x);                  \
+                (__x < 0) ? -__x : __x;         \
+        })
+
+#define labs(x) ({                              \
+                long __x = (x);                 \
+                (__x < 0) ? -__x : __x;         \
+        })
+
+/*------------------------- Global Variables ------------------------------*/
+
+static u32 x86emu_parity_tab[8] =
+{
+    0x96696996,
+    0x69969669,
+    0x69969669,
+    0x96696996,
+    0x69969669,
+    0x96696996,
+    0x96696996,
+    0x69969669,
+};
+
+#define PARITY(x)   (((x86emu_parity_tab[(x) / 32] >> ((x) % 32)) & 1) == 0)
+#define XOR2(x)     (((x) ^ ((x)>>1)) & 0x1)
+
+/*----------------------------- Implementation ----------------------------*/
+
+
+/*--------- Side effects helper functions -------*/
+
+/****************************************************************************
+REMARKS:
+implements side efects for byte operations that don't overflow
+****************************************************************************/
+
+static void set_parity_flag(u32 res)
+{
+    CONDITIONAL_SET_FLAG(PARITY(res & 0xFF), F_PF);
+}
+
+static void set_szp_flags_8(u8 res)
+{
+    CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
+    CONDITIONAL_SET_FLAG(res == 0, F_ZF);
+    set_parity_flag(res);
+}
+
+static void set_szp_flags_16(u16 res)
+{
+    CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
+    CONDITIONAL_SET_FLAG(res == 0, F_ZF);
+    set_parity_flag(res);
+}
+
+static void set_szp_flags_32(u32 res)
+{
+    CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
+    CONDITIONAL_SET_FLAG(res == 0, F_ZF);
+    set_parity_flag(res);
+}
+
+static void no_carry_byte_side_eff(u8 res)
+{
+    CLEAR_FLAG(F_OF);
+    CLEAR_FLAG(F_CF);
+    CLEAR_FLAG(F_AF);
+    set_szp_flags_8(res);
+}
+
+static void no_carry_word_side_eff(u16 res)
+{
+    CLEAR_FLAG(F_OF);
+    CLEAR_FLAG(F_CF);
+    CLEAR_FLAG(F_AF);
+    set_szp_flags_16(res);
+}
+
+static void no_carry_long_side_eff(u32 res)
+{
+    CLEAR_FLAG(F_OF);
+    CLEAR_FLAG(F_CF);
+    CLEAR_FLAG(F_AF);
+    set_szp_flags_32(res);
+}
+
+static void calc_carry_chain(int bits, u32 d, u32 s, u32 res, int set_carry)
+{
+    u32 cc;
+
+    cc = (s & d) | ((~res) & (s | d));
+    CONDITIONAL_SET_FLAG(XOR2(cc >> (bits - 2)), F_OF);
+    CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
+    if (set_carry) {
+        CONDITIONAL_SET_FLAG(res & (1 << bits), F_CF);
+    }
+}
+
+static void calc_borrow_chain(int bits, u32 d, u32 s, u32 res, int set_carry)
+{
+    u32 bc;
+
+    bc = (res & (~d | s)) | (~d & s);
+    CONDITIONAL_SET_FLAG(XOR2(bc >> (bits - 2)), F_OF);
+    CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
+    if (set_carry) {
+        CONDITIONAL_SET_FLAG(bc & (1 << (bits - 1)), F_CF);
+    }
+}
+
+/****************************************************************************
+REMARKS:
+Implements the AAA instruction and side effects.
+****************************************************************************/
+u16 aaa_word(u16 d)
+{
+    u16 res;
+    if ((d & 0xf) > 0x9 || ACCESS_FLAG(F_AF)) {
+        d += 0x6;
+        d += 0x100;
+        SET_FLAG(F_AF);
+        SET_FLAG(F_CF);
+    } else {
+        CLEAR_FLAG(F_CF);
+        CLEAR_FLAG(F_AF);
+    }
+    res = (u16)(d & 0xFF0F);
+    set_szp_flags_16(res);
+    return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the AAA instruction and side effects.
+****************************************************************************/
+u16 aas_word(u16 d)
+{
+    u16 res;
+    if ((d & 0xf) > 0x9 || ACCESS_FLAG(F_AF)) {
+        d -= 0x6;
+        d -= 0x100;
+        SET_FLAG(F_AF);
+        SET_FLAG(F_CF);
+    } else {
+        CLEAR_FLAG(F_CF);
+        CLEAR_FLAG(F_AF);
+    }
+    res = (u16)(d & 0xFF0F);
+    set_szp_flags_16(res);
+    return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the AAD instruction and side effects.
+****************************************************************************/
+u16 aad_word(u16 d)
+{
+    u16 l;
+    u8 hb, lb;
+
+    hb = (u8)((d >> 8) & 0xff);
+    lb = (u8)((d & 0xff));
+    l = (u16)((lb + 10 * hb) & 0xFF);
+
+    no_carry_byte_side_eff(l & 0xFF);
+    return l;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the AAM instruction and side effects.
+****************************************************************************/
+u16 aam_word(u8 d)
+{
+    u16 h, l;
+
+    h = (u16)(d / 10);
+    l = (u16)(d % 10);
+    l |= (u16)(h << 8);
+
+    no_carry_byte_side_eff(l & 0xFF);
+    return l;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the ADC instruction and side effects.
+****************************************************************************/
+u8 adc_byte(u8 d, u8 s)
+{
+    u32 res;   /* all operands in native machine order */
+
+    res = d + s;
+    if (ACCESS_FLAG(F_CF)) res++;
+
+    set_szp_flags_8(res);
+    calc_carry_chain(8,s,d,res,1);
+
+    return (u8)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the ADC instruction and side effects.
+****************************************************************************/
+u16 adc_word(u16 d, u16 s)
+{
+    u32 res;   /* all operands in native machine order */
+
+    res = d + s;
+    if (ACCESS_FLAG(F_CF))
+        res++;
+
+    set_szp_flags_16((u16)res);
+    calc_carry_chain(16,s,d,res,1);
+
+    return (u16)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the ADC instruction and side effects.
+****************************************************************************/
+u32 adc_long(u32 d, u32 s)
+{
+    u32 lo;    /* all operands in native machine order */
+    u32 hi;
+    u32 res;
+
+    lo = (d & 0xFFFF) + (s & 0xFFFF);
+    res = d + s;
+
+    if (ACCESS_FLAG(F_CF)) {
+        lo++;
+        res++;
+    }
+
+    hi = (lo >> 16) + (d >> 16) + (s >> 16);
+
+    set_szp_flags_32(res);
+    calc_carry_chain(32,s,d,res,0);
+
+    CONDITIONAL_SET_FLAG(hi & 0x10000, F_CF);
+
+    return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the ADD instruction and side effects.
+****************************************************************************/
+u8 add_byte(u8 d, u8 s)
+{
+    u32 res;   /* all operands in native machine order */
+
+    res = d + s;
+    set_szp_flags_8((u8)res);
+    calc_carry_chain(8,s,d,res,1);
+
+    return (u8)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the ADD instruction and side effects.
+****************************************************************************/
+u16 add_word(u16 d, u16 s)
+{
+    u32 res;   /* all operands in native machine order */
+
+    res = d + s;
+    set_szp_flags_16((u16)res);
+    calc_carry_chain(16,s,d,res,1);
+
+    return (u16)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the ADD instruction and side effects.
+****************************************************************************/
+u32 add_long(u32 d, u32 s)
+{
+    u32 res;
+
+    res = d + s;
+    set_szp_flags_32(res);
+    calc_carry_chain(32,s,d,res,0);
+
+    CONDITIONAL_SET_FLAG(res < d || res < s, F_CF);
+
+    return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the AND instruction and side effects.
+****************************************************************************/
+u8 and_byte(u8 d, u8 s)
+{
+    u8 res;    /* all operands in native machine order */
+
+    res = d & s;
+
+    no_carry_byte_side_eff(res);
+    return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the AND instruction and side effects.
+****************************************************************************/
+u16 and_word(u16 d, u16 s)
+{
+    u16 res;   /* all operands in native machine order */
+
+    res = d & s;
+
+    no_carry_word_side_eff(res);
+    return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the AND instruction and side effects.
+****************************************************************************/
+u32 and_long(u32 d, u32 s)
+{
+    u32 res;   /* all operands in native machine order */
+
+    res = d & s;
+    no_carry_long_side_eff(res);
+    return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the CMP instruction and side effects.
+****************************************************************************/
+u8 cmp_byte(u8 d, u8 s)
+{
+    u32 res;   /* all operands in native machine order */
+
+    res = d - s;
+    set_szp_flags_8((u8)res);
+    calc_borrow_chain(8, d, s, res, 1);
+
+    return d;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the CMP instruction and side effects.
+****************************************************************************/
+u16 cmp_word(u16 d, u16 s)
+{
+    u32 res;   /* all operands in native machine order */
+
+    res = d - s;
+    set_szp_flags_16((u16)res);
+    calc_borrow_chain(16, d, s, res, 1);
+
+    return d;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the CMP instruction and side effects.
+****************************************************************************/
+u32 cmp_long(u32 d, u32 s)
+{
+    u32 res;   /* all operands in native machine order */
+
+    res = d - s;
+    set_szp_flags_32(res);
+    calc_borrow_chain(32, d, s, res, 1);
+
+    return d;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the DAA instruction and side effects.
+****************************************************************************/
+u8 daa_byte(u8 d)
+{
+    u32 res = d;
+    if ((d & 0xf) > 9 || ACCESS_FLAG(F_AF)) {
+        res += 6;
+        SET_FLAG(F_AF);
+    }
+    if (res > 0x9F || ACCESS_FLAG(F_CF)) {
+        res += 0x60;
+        SET_FLAG(F_CF);
+    }
+    set_szp_flags_8((u8)res);
+    return (u8)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the DAS instruction and side effects.
+****************************************************************************/
+u8 das_byte(u8 d)
+{
+    if ((d & 0xf) > 9 || ACCESS_FLAG(F_AF)) {
+        d -= 6;
+        SET_FLAG(F_AF);
+    }
+    if (d > 0x9F || ACCESS_FLAG(F_CF)) {
+        d -= 0x60;
+        SET_FLAG(F_CF);
+    }
+    set_szp_flags_8(d);
+    return d;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the DEC instruction and side effects.
+****************************************************************************/
+u8 dec_byte(u8 d)
+{
+    u32 res;   /* all operands in native machine order */
+
+    res = d - 1;
+    set_szp_flags_8((u8)res);
+    calc_borrow_chain(8, d, 1, res, 0);
+
+    return (u8)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the DEC instruction and side effects.
+****************************************************************************/
+u16 dec_word(u16 d)
+{
+    u32 res;   /* all operands in native machine order */
+
+    res = d - 1;
+    set_szp_flags_16((u16)res);
+    calc_borrow_chain(16, d, 1, res, 0);
+
+    return (u16)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the DEC instruction and side effects.
+****************************************************************************/
+u32 dec_long(u32 d)
+{
+    u32 res;   /* all operands in native machine order */
+
+    res = d - 1;
+
+    set_szp_flags_32(res);
+    calc_borrow_chain(32, d, 1, res, 0);
+
+    return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the INC instruction and side effects.
+****************************************************************************/
+u8 inc_byte(u8 d)
+{
+    u32 res;   /* all operands in native machine order */
+
+    res = d + 1;
+    set_szp_flags_8((u8)res);
+    calc_carry_chain(8, d, 1, res, 0);
+
+    return (u8)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the INC instruction and side effects.
+****************************************************************************/
+u16 inc_word(u16 d)
+{
+    u32 res;   /* all operands in native machine order */
+
+    res = d + 1;
+    set_szp_flags_16((u16)res);
+    calc_carry_chain(16, d, 1, res, 0);
+
+    return (u16)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the INC instruction and side effects.
+****************************************************************************/
+u32 inc_long(u32 d)
+{
+    u32 res;   /* all operands in native machine order */
+
+    res = d + 1;
+    set_szp_flags_32(res);
+    calc_carry_chain(32, d, 1, res, 0);
+
+    return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the OR instruction and side effects.
+****************************************************************************/
+u8 or_byte(u8 d, u8 s)
+{
+    u8 res;    /* all operands in native machine order */
+
+    res = d | s;
+    no_carry_byte_side_eff(res);
+
+    return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the OR instruction and side effects.
+****************************************************************************/
+u16 or_word(u16 d, u16 s)
+{
+    u16 res;   /* all operands in native machine order */
+
+    res = d | s;
+    no_carry_word_side_eff(res);
+    return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the OR instruction and side effects.
+****************************************************************************/
+u32 or_long(u32 d, u32 s)
+{
+    u32 res;   /* all operands in native machine order */
+
+    res = d | s;
+    no_carry_long_side_eff(res);
+    return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the OR instruction and side effects.
+****************************************************************************/
+u8 neg_byte(u8 s)
+{
+    u8 res;
+
+    CONDITIONAL_SET_FLAG(s != 0, F_CF);
+    res = (u8)-s;
+    set_szp_flags_8(res);
+    calc_borrow_chain(8, 0, s, res, 0);
+
+    return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the OR instruction and side effects.
+****************************************************************************/
+u16 neg_word(u16 s)
+{
+    u16 res;
+
+    CONDITIONAL_SET_FLAG(s != 0, F_CF);
+    res = (u16)-s;
+    set_szp_flags_16((u16)res);
+    calc_borrow_chain(16, 0, s, res, 0);
+
+    return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the OR instruction and side effects.
+****************************************************************************/
+u32 neg_long(u32 s)
+{
+    u32 res;
+
+    CONDITIONAL_SET_FLAG(s != 0, F_CF);
+    res = (u32)-s;
+    set_szp_flags_32(res);
+    calc_borrow_chain(32, 0, s, res, 0);
+
+    return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the NOT instruction and side effects.
+****************************************************************************/
+u8 not_byte(u8 s)
+{
+    return ~s;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the NOT instruction and side effects.
+****************************************************************************/
+u16 not_word(u16 s)
+{
+    return ~s;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the NOT instruction and side effects.
+****************************************************************************/
+u32 not_long(u32 s)
+{
+    return ~s;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the RCL instruction and side effects.
+****************************************************************************/
+u8 rcl_byte(u8 d, u8 s)
+{
+    unsigned int res, cnt, mask, cf;
+
+    /* s is the rotate distance.  It varies from 0 - 8. */
+    /* have
+
+       CF  B_7 B_6 B_5 B_4 B_3 B_2 B_1 B_0
+
+       want to rotate through the carry by "s" bits.  We could
+       loop, but that's inefficient.  So the width is 9,
+       and we split into three parts:
+
+       The new carry flag   (was B_n)
+       the stuff in B_n-1 .. B_0
+       the stuff in B_7 .. B_n+1
+
+       The new rotate is done mod 9, and given this,
+       for a rotation of n bits (mod 9) the new carry flag is
+       then located n bits from the MSB.  The low part is
+       then shifted up cnt bits, and the high part is or'd
+       in.  Using CAPS for new values, and lowercase for the
+       original values, this can be expressed as:
+
+       IF n > 0
+       1) CF <-  b_(8-n)
+       2) B_(7) .. B_(n)  <-  b_(8-(n+1)) .. b_0
+       3) B_(n-1) <- cf
+       4) B_(n-2) .. B_0 <-  b_7 .. b_(8-(n-1))
+     */
+    res = d;
+    if ((cnt = s % 9) != 0) {
+        /* extract the new CARRY FLAG. */
+        /* CF <-  b_(8-n)             */
+        cf = (d >> (8 - cnt)) & 0x1;
+
+        /* get the low stuff which rotated
+           into the range B_7 .. B_cnt */
+        /* B_(7) .. B_(n)  <-  b_(8-(n+1)) .. b_0  */
+        /* note that the right hand side done by the mask */
+        res = (d << cnt) & 0xff;
+
+        /* now the high stuff which rotated around
+           into the positions B_cnt-2 .. B_0 */
+        /* B_(n-2) .. B_0 <-  b_7 .. b_(8-(n-1)) */
+        /* shift it downward, 7-(n-2) = 9-n positions.
+           and mask off the result before or'ing in.
+         */
+        mask = (1 << (cnt - 1)) - 1;
+        res |= (d >> (9 - cnt)) & mask;
+
+        /* if the carry flag was set, or it in.  */
+        if (ACCESS_FLAG(F_CF)) {     /* carry flag is set */
+            /*  B_(n-1) <- cf */
+            res |= 1 << (cnt - 1);
+        }
+        /* set the new carry flag, based on the variable "cf" */
+        CONDITIONAL_SET_FLAG(cf, F_CF);
+        /* OVERFLOW is set *IFF* cnt==1, then it is the
+           xor of CF and the most significant bit.  Blecck. */
+        /* parenthesized this expression since it appears to
+           be causing OF to be misset */
+        CONDITIONAL_SET_FLAG(cnt == 1 && XOR2(cf + ((res >> 6) & 0x2)),
+                             F_OF);
+
+    }
+    return (u8)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the RCL instruction and side effects.
+****************************************************************************/
+u16 rcl_word(u16 d, u8 s)
+{
+    unsigned int res, cnt, mask, cf;
+
+    res = d;
+    if ((cnt = s % 17) != 0) {
+        cf = (d >> (16 - cnt)) & 0x1;
+        res = (d << cnt) & 0xffff;
+        mask = (1 << (cnt - 1)) - 1;
+        res |= (d >> (17 - cnt)) & mask;
+        if (ACCESS_FLAG(F_CF)) {
+            res |= 1 << (cnt - 1);
+        }
+        CONDITIONAL_SET_FLAG(cf, F_CF);
+        CONDITIONAL_SET_FLAG(cnt == 1 && XOR2(cf + ((res >> 14) & 0x2)),
+                             F_OF);
+    }
+    return (u16)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the RCL instruction and side effects.
+****************************************************************************/
+u32 rcl_long(u32 d, u8 s)
+{
+    u32 res, cnt, mask, cf;
+
+    res = d;
+    if ((cnt = s % 33) != 0) {
+        cf = (d >> (32 - cnt)) & 0x1;
+        res = (d << cnt) & 0xffffffff;
+        mask = (1 << (cnt - 1)) - 1;
+        res |= (d >> (33 - cnt)) & mask;
+        if (ACCESS_FLAG(F_CF)) {     /* carry flag is set */
+            res |= 1 << (cnt - 1);
+        }
+        CONDITIONAL_SET_FLAG(cf, F_CF);
+        CONDITIONAL_SET_FLAG(cnt == 1 && XOR2(cf + ((res >> 30) & 0x2)),
+                             F_OF);
+    }
+    return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the RCR instruction and side effects.
+****************************************************************************/
+u8 rcr_byte(u8 d, u8 s)
+{
+    u32 res, cnt;
+    u32 mask, cf, ocf = 0;
+
+    /* rotate right through carry */
+    /*
+       s is the rotate distance.  It varies from 0 - 8.
+       d is the byte object rotated.
+
+       have
+
+       CF  B_7 B_6 B_5 B_4 B_3 B_2 B_1 B_0
+
+       The new rotate is done mod 9, and given this,
+       for a rotation of n bits (mod 9) the new carry flag is
+       then located n bits from the LSB.  The low part is
+       then shifted up cnt bits, and the high part is or'd
+       in.  Using CAPS for new values, and lowercase for the
+       original values, this can be expressed as:
+
+       IF n > 0
+       1) CF <-  b_(n-1)
+       2) B_(8-(n+1)) .. B_(0)  <-  b_(7) .. b_(n)
+       3) B_(8-n) <- cf
+       4) B_(7) .. B_(8-(n-1)) <-  b_(n-2) .. b_(0)
+     */
+    res = d;
+    if ((cnt = s % 9) != 0) {
+        /* extract the new CARRY FLAG. */
+        /* CF <-  b_(n-1)              */
+        if (cnt == 1) {
+            cf = d & 0x1;
+            /* note hackery here.  Access_flag(..) evaluates to either
+               0 if flag not set
+               non-zero if flag is set.
+               doing access_flag(..) != 0 casts that into either
+               0..1 in any representation of the flags register
+               (i.e. packed bit array or unpacked.)
+             */
+            ocf = ACCESS_FLAG(F_CF) != 0;
+        } else
+            cf = (d >> (cnt - 1)) & 0x1;
+
+        /* B_(8-(n+1)) .. B_(0)  <-  b_(7) .. b_n  */
+        /* note that the right hand side done by the mask
+           This is effectively done by shifting the
+           object to the right.  The result must be masked,
+           in case the object came in and was treated
+           as a negative number.  Needed??? */
+
+        mask = (1 << (8 - cnt)) - 1;
+        res = (d >> cnt) & mask;
+
+        /* now the high stuff which rotated around
+           into the positions B_cnt-2 .. B_0 */
+        /* B_(7) .. B_(8-(n-1)) <-  b_(n-2) .. b_(0) */
+        /* shift it downward, 7-(n-2) = 9-n positions.
+           and mask off the result before or'ing in.
+         */
+        res |= (d << (9 - cnt));
+
+        /* if the carry flag was set, or it in.  */
+        if (ACCESS_FLAG(F_CF)) {     /* carry flag is set */
+            /*  B_(8-n) <- cf */
+            res |= 1 << (8 - cnt);
+        }
+        /* set the new carry flag, based on the variable "cf" */
+        CONDITIONAL_SET_FLAG(cf, F_CF);
+        /* OVERFLOW is set *IFF* cnt==1, then it is the
+           xor of CF and the most significant bit.  Blecck. */
+        /* parenthesized... */
+        if (cnt == 1) {
+            CONDITIONAL_SET_FLAG(XOR2(ocf + ((d >> 6) & 0x2)),
+                                 F_OF);
+        }
+    }
+    return (u8)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the RCR instruction and side effects.
+****************************************************************************/
+u16 rcr_word(u16 d, u8 s)
+{
+    u32 res, cnt;
+    u32 mask, cf, ocf = 0;
+
+    /* rotate right through carry */
+    res = d;
+    if ((cnt = s % 17) != 0) {
+        if (cnt == 1) {
+            cf = d & 0x1;
+            ocf = ACCESS_FLAG(F_CF) != 0;
+        } else
+            cf = (d >> (cnt - 1)) & 0x1;
+        mask = (1 << (16 - cnt)) - 1;
+        res = (d >> cnt) & mask;
+        res |= (d << (17 - cnt));
+        if (ACCESS_FLAG(F_CF)) {
+            res |= 1 << (16 - cnt);
+        }
+        CONDITIONAL_SET_FLAG(cf, F_CF);
+        if (cnt == 1) {
+            CONDITIONAL_SET_FLAG(XOR2(ocf + ((d >> 14) & 0x2)),
+                                 F_OF);
+        }
+    }
+    return (u16)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the RCR instruction and side effects.
+****************************************************************************/
+u32 rcr_long(u32 d, u8 s)
+{
+    u32 res, cnt;
+    u32 mask, cf, ocf = 0;
+
+    /* rotate right through carry */
+    res = d;
+    if ((cnt = s % 33) != 0) {
+        if (cnt == 1) {
+            cf = d & 0x1;
+            ocf = ACCESS_FLAG(F_CF) != 0;
+        } else
+            cf = (d >> (cnt - 1)) & 0x1;
+        mask = (1 << (32 - cnt)) - 1;
+        res = (d >> cnt) & mask;
+        if (cnt != 1)
+            res |= (d << (33 - cnt));
+        if (ACCESS_FLAG(F_CF)) {     /* carry flag is set */
+            res |= 1 << (32 - cnt);
+        }
+        CONDITIONAL_SET_FLAG(cf, F_CF);
+        if (cnt == 1) {
+            CONDITIONAL_SET_FLAG(XOR2(ocf + ((d >> 30) & 0x2)),
+                                 F_OF);
+        }
+    }
+    return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the ROL instruction and side effects.
+****************************************************************************/
+u8 rol_byte(u8 d, u8 s)
+{
+    unsigned int res, cnt, mask;
+
+    /* rotate left */
+    /*
+       s is the rotate distance.  It varies from 0 - 8.
+       d is the byte object rotated.
+
+       have
+
+       CF  B_7 ... B_0
+
+       The new rotate is done mod 8.
+       Much simpler than the "rcl" or "rcr" operations.
+
+       IF n > 0
+       1) B_(7) .. B_(n)  <-  b_(8-(n+1)) .. b_(0)
+       2) B_(n-1) .. B_(0) <-  b_(7) .. b_(8-n)
+     */
+    res = d;
+    if ((cnt = s % 8) != 0) {
+        /* B_(7) .. B_(n)  <-  b_(8-(n+1)) .. b_(0) */
+        res = (d << cnt);
+
+        /* B_(n-1) .. B_(0) <-  b_(7) .. b_(8-n) */
+        mask = (1 << cnt) - 1;
+        res |= (d >> (8 - cnt)) & mask;
+
+        /* set the new carry flag, Note that it is the low order
+           bit of the result!!!                               */
+        CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
+        /* OVERFLOW is set *IFF* s==1, then it is the
+           xor of CF and the most significant bit.  Blecck. */
+        CONDITIONAL_SET_FLAG(s == 1 &&
+                             XOR2((res & 0x1) + ((res >> 6) & 0x2)),
+                             F_OF);
+    } if (s != 0) {
+        /* set the new carry flag, Note that it is the low order
+           bit of the result!!!                               */
+        CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
+    }
+    return (u8)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the ROL instruction and side effects.
+****************************************************************************/
+u16 rol_word(u16 d, u8 s)
+{
+    unsigned int res, cnt, mask;
+
+    res = d;
+    if ((cnt = s % 16) != 0) {
+        res = (d << cnt);
+        mask = (1 << cnt) - 1;
+        res |= (d >> (16 - cnt)) & mask;
+        CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
+        CONDITIONAL_SET_FLAG(s == 1 &&
+                             XOR2((res & 0x1) + ((res >> 14) & 0x2)),
+                             F_OF);
+    } if (s != 0) {
+        /* set the new carry flag, Note that it is the low order
+           bit of the result!!!                               */
+        CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
+    }
+    return (u16)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the ROL instruction and side effects.
+****************************************************************************/
+u32 rol_long(u32 d, u8 s)
+{
+    u32 res, cnt, mask;
+
+    res = d;
+    if ((cnt = s % 32) != 0) {
+        res = (d << cnt);
+        mask = (1 << cnt) - 1;
+        res |= (d >> (32 - cnt)) & mask;
+        CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
+        CONDITIONAL_SET_FLAG(s == 1 &&
+                             XOR2((res & 0x1) + ((res >> 30) & 0x2)),
+                             F_OF);
+    } if (s != 0) {
+        /* set the new carry flag, Note that it is the low order
+           bit of the result!!!                               */
+        CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
+    }
+    return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the ROR instruction and side effects.
+****************************************************************************/
+u8 ror_byte(u8 d, u8 s)
+{
+    unsigned int res, cnt, mask;
+
+    /* rotate right */
+    /*
+       s is the rotate distance.  It varies from 0 - 8.
+       d is the byte object rotated.
+
+       have
+
+       B_7 ... B_0
+
+       The rotate is done mod 8.
+
+       IF n > 0
+       1) B_(8-(n+1)) .. B_(0)  <-  b_(7) .. b_(n)
+       2) B_(7) .. B_(8-n) <-  b_(n-1) .. b_(0)
+     */
+    res = d;
+    if ((cnt = s % 8) != 0) {           /* not a typo, do nada if cnt==0 */
+        /* B_(7) .. B_(8-n) <-  b_(n-1) .. b_(0) */
+        res = (d << (8 - cnt));
+
+        /* B_(8-(n+1)) .. B_(0)  <-  b_(7) .. b_(n) */
+        mask = (1 << (8 - cnt)) - 1;
+        res |= (d >> (cnt)) & mask;
+
+        /* set the new carry flag, Note that it is the low order
+           bit of the result!!!                               */
+        CONDITIONAL_SET_FLAG(res & 0x80, F_CF);
+        /* OVERFLOW is set *IFF* s==1, then it is the
+           xor of the two most significant bits.  Blecck. */
+        CONDITIONAL_SET_FLAG(s == 1 && XOR2(res >> 6), F_OF);
+    } else if (s != 0) {
+        /* set the new carry flag, Note that it is the low order
+           bit of the result!!!                               */
+        CONDITIONAL_SET_FLAG(res & 0x80, F_CF);
+    }
+    return (u8)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the ROR instruction and side effects.
+****************************************************************************/
+u16 ror_word(u16 d, u8 s)
+{
+    unsigned int res, cnt, mask;
+
+    res = d;
+    if ((cnt = s % 16) != 0) {
+        res = (d << (16 - cnt));
+        mask = (1 << (16 - cnt)) - 1;
+        res |= (d >> (cnt)) & mask;
+        CONDITIONAL_SET_FLAG(res & 0x8000, F_CF);
+        CONDITIONAL_SET_FLAG(s == 1 && XOR2(res >> 14), F_OF);
+    } else if (s != 0) {
+        /* set the new carry flag, Note that it is the low order
+           bit of the result!!!                               */
+        CONDITIONAL_SET_FLAG(res & 0x8000, F_CF);
+    }
+    return (u16)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the ROR instruction and side effects.
+****************************************************************************/
+u32 ror_long(u32 d, u8 s)
+{
+    u32 res, cnt, mask;
+
+    res = d;
+    if ((cnt = s % 32) != 0) {
+        res = (d << (32 - cnt));
+        mask = (1 << (32 - cnt)) - 1;
+        res |= (d >> (cnt)) & mask;
+        CONDITIONAL_SET_FLAG(res & 0x80000000, F_CF);
+        CONDITIONAL_SET_FLAG(s == 1 && XOR2(res >> 30), F_OF);
+    } else if (s != 0) {
+        /* set the new carry flag, Note that it is the low order
+           bit of the result!!!                               */
+        CONDITIONAL_SET_FLAG(res & 0x80000000, F_CF);
+    }
+    return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SHL instruction and side effects.
+****************************************************************************/
+u8 shl_byte(u8 d, u8 s)
+{
+    unsigned int cnt, res, cf;
+
+    if (s < 8) {
+        cnt = s % 8;
+
+        /* last bit shifted out goes into carry flag */
+        if (cnt > 0) {
+            res = d << cnt;
+            cf = d & (1 << (8 - cnt));
+            CONDITIONAL_SET_FLAG(cf, F_CF);
+            set_szp_flags_8((u8)res);
+        } else {
+            res = (u8) d;
+        }
+
+        if (cnt == 1) {
+            /* Needs simplification. */
+            CONDITIONAL_SET_FLAG(
+                                    (((res & 0x80) == 0x80) ^
+                                     (ACCESS_FLAG(F_CF) != 0)),
+            /* was (M.x86.R_FLG&F_CF)==F_CF)), */
+                                    F_OF);
+        } else {
+            CLEAR_FLAG(F_OF);
+        }
+    } else {
+        res = 0;
+        CONDITIONAL_SET_FLAG((d << (s-1)) & 0x80, F_CF);
+        CLEAR_FLAG(F_OF);
+        CLEAR_FLAG(F_SF);
+        SET_FLAG(F_PF);
+        SET_FLAG(F_ZF);
+    }
+    return (u8)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SHL instruction and side effects.
+****************************************************************************/
+u16 shl_word(u16 d, u8 s)
+{
+    unsigned int cnt, res, cf;
+
+    if (s < 16) {
+        cnt = s % 16;
+        if (cnt > 0) {
+            res = d << cnt;
+            cf = d & (1 << (16 - cnt));
+            CONDITIONAL_SET_FLAG(cf, F_CF);
+            set_szp_flags_16((u16)res);
+        } else {
+            res = (u16) d;
+        }
+
+        if (cnt == 1) {
+            CONDITIONAL_SET_FLAG(
+                                    (((res & 0x8000) == 0x8000) ^
+                                     (ACCESS_FLAG(F_CF) != 0)),
+                                    F_OF);
+        } else {
+            CLEAR_FLAG(F_OF);
+        }
+    } else {
+        res = 0;
+        CONDITIONAL_SET_FLAG((d << (s-1)) & 0x8000, F_CF);
+        CLEAR_FLAG(F_OF);
+        CLEAR_FLAG(F_SF);
+        SET_FLAG(F_PF);
+        SET_FLAG(F_ZF);
+    }
+    return (u16)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SHL instruction and side effects.
+****************************************************************************/
+u32 shl_long(u32 d, u8 s)
+{
+    unsigned int cnt, res, cf;
+
+    if (s < 32) {
+        cnt = s % 32;
+        if (cnt > 0) {
+            res = d << cnt;
+            cf = d & (1 << (32 - cnt));
+            CONDITIONAL_SET_FLAG(cf, F_CF);
+            set_szp_flags_32((u32)res);
+        } else {
+            res = d;
+        }
+        if (cnt == 1) {
+            CONDITIONAL_SET_FLAG((((res & 0x80000000) == 0x80000000) ^
+                                  (ACCESS_FLAG(F_CF) != 0)), F_OF);
+        } else {
+            CLEAR_FLAG(F_OF);
+        }
+    } else {
+        res = 0;
+        CONDITIONAL_SET_FLAG((d << (s-1)) & 0x80000000, F_CF);
+        CLEAR_FLAG(F_OF);
+        CLEAR_FLAG(F_SF);
+        SET_FLAG(F_PF);
+        SET_FLAG(F_ZF);
+    }
+    return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SHR instruction and side effects.
+****************************************************************************/
+u8 shr_byte(u8 d, u8 s)
+{
+    unsigned int cnt, res, cf;
+
+    if (s < 8) {
+        cnt = s % 8;
+        if (cnt > 0) {
+            cf = d & (1 << (cnt - 1));
+            res = d >> cnt;
+            CONDITIONAL_SET_FLAG(cf, F_CF);
+            set_szp_flags_8((u8)res);
+        } else {
+            res = (u8) d;
+        }
+
+        if (cnt == 1) {
+            CONDITIONAL_SET_FLAG(XOR2(res >> 6), F_OF);
+        } else {
+            CLEAR_FLAG(F_OF);
+        }
+    } else {
+        res = 0;
+        CONDITIONAL_SET_FLAG((d >> (s-1)) & 0x1, F_CF);
+        CLEAR_FLAG(F_OF);
+        CLEAR_FLAG(F_SF);
+        SET_FLAG(F_PF);
+        SET_FLAG(F_ZF);
+    }
+    return (u8)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SHR instruction and side effects.
+****************************************************************************/
+u16 shr_word(u16 d, u8 s)
+{
+    unsigned int cnt, res, cf;
+
+    if (s < 16) {
+        cnt = s % 16;
+        if (cnt > 0) {
+            cf = d & (1 << (cnt - 1));
+            res = d >> cnt;
+            CONDITIONAL_SET_FLAG(cf, F_CF);
+            set_szp_flags_16((u16)res);
+        } else {
+            res = d;
+        }
+
+        if (cnt == 1) {
+            CONDITIONAL_SET_FLAG(XOR2(res >> 14), F_OF);
+        } else {
+            CLEAR_FLAG(F_OF);
+        }
+    } else {
+        res = 0;
+        CLEAR_FLAG(F_CF);
+        CLEAR_FLAG(F_OF);
+        SET_FLAG(F_ZF);
+        CLEAR_FLAG(F_SF);
+        CLEAR_FLAG(F_PF);
+    }
+    return (u16)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SHR instruction and side effects.
+****************************************************************************/
+u32 shr_long(u32 d, u8 s)
+{
+    unsigned int cnt, res, cf;
+
+    if (s < 32) {
+        cnt = s % 32;
+        if (cnt > 0) {
+            cf = d & (1 << (cnt - 1));
+            res = d >> cnt;
+            CONDITIONAL_SET_FLAG(cf, F_CF);
+            set_szp_flags_32((u32)res);
+        } else {
+            res = d;
+        }
+        if (cnt == 1) {
+            CONDITIONAL_SET_FLAG(XOR2(res >> 30), F_OF);
+        } else {
+            CLEAR_FLAG(F_OF);
+        }
+    } else {
+        res = 0;
+        CLEAR_FLAG(F_CF);
+        CLEAR_FLAG(F_OF);
+        SET_FLAG(F_ZF);
+        CLEAR_FLAG(F_SF);
+        CLEAR_FLAG(F_PF);
+    }
+    return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SAR instruction and side effects.
+****************************************************************************/
+u8 sar_byte(u8 d, u8 s)
+{
+    unsigned int cnt, res, cf, mask, sf;
+
+    res = d;
+    sf = d & 0x80;
+    cnt = s % 8;
+    if (cnt > 0 && cnt < 8) {
+        mask = (1 << (8 - cnt)) - 1;
+        cf = d & (1 << (cnt - 1));
+        res = (d >> cnt) & mask;
+        CONDITIONAL_SET_FLAG(cf, F_CF);
+        if (sf) {
+            res |= ~mask;
+        }
+        set_szp_flags_8((u8)res);
+    } else if (cnt >= 8) {
+        if (sf) {
+            res = 0xff;
+            SET_FLAG(F_CF);
+            CLEAR_FLAG(F_ZF);
+            SET_FLAG(F_SF);
+            SET_FLAG(F_PF);
+        } else {
+            res = 0;
+            CLEAR_FLAG(F_CF);
+            SET_FLAG(F_ZF);
+            CLEAR_FLAG(F_SF);
+            CLEAR_FLAG(F_PF);
+        }
+    }
+    return (u8)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SAR instruction and side effects.
+****************************************************************************/
+u16 sar_word(u16 d, u8 s)
+{
+    unsigned int cnt, res, cf, mask, sf;
+
+    sf = d & 0x8000;
+    cnt = s % 16;
+    res = d;
+    if (cnt > 0 && cnt < 16) {
+        mask = (1 << (16 - cnt)) - 1;
+        cf = d & (1 << (cnt - 1));
+        res = (d >> cnt) & mask;
+        CONDITIONAL_SET_FLAG(cf, F_CF);
+        if (sf) {
+            res |= ~mask;
+        }
+        set_szp_flags_16((u16)res);
+    } else if (cnt >= 16) {
+        if (sf) {
+            res = 0xffff;
+            SET_FLAG(F_CF);
+            CLEAR_FLAG(F_ZF);
+            SET_FLAG(F_SF);
+            SET_FLAG(F_PF);
+        } else {
+            res = 0;
+            CLEAR_FLAG(F_CF);
+            SET_FLAG(F_ZF);
+            CLEAR_FLAG(F_SF);
+            CLEAR_FLAG(F_PF);
+        }
+    }
+    return (u16)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SAR instruction and side effects.
+****************************************************************************/
+u32 sar_long(u32 d, u8 s)
+{
+    u32 cnt, res, cf, mask, sf;
+
+    sf = d & 0x80000000;
+    cnt = s % 32;
+    res = d;
+    if (cnt > 0 && cnt < 32) {
+        mask = (1 << (32 - cnt)) - 1;
+        cf = d & (1 << (cnt - 1));
+        res = (d >> cnt) & mask;
+        CONDITIONAL_SET_FLAG(cf, F_CF);
+        if (sf) {
+            res |= ~mask;
+        }
+        set_szp_flags_32(res);
+    } else if (cnt >= 32) {
+        if (sf) {
+            res = 0xffffffff;
+            SET_FLAG(F_CF);
+            CLEAR_FLAG(F_ZF);
+            SET_FLAG(F_SF);
+            SET_FLAG(F_PF);
+        } else {
+            res = 0;
+            CLEAR_FLAG(F_CF);
+            SET_FLAG(F_ZF);
+            CLEAR_FLAG(F_SF);
+            CLEAR_FLAG(F_PF);
+        }
+    }
+    return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SHLD instruction and side effects.
+****************************************************************************/
+u16 shld_word (u16 d, u16 fill, u8 s)
+{
+    unsigned int cnt, res, cf;
+
+    if (s < 16) {
+        cnt = s % 16;
+        if (cnt > 0) {
+            res = (d << cnt) | (fill >> (16-cnt));
+            cf = d & (1 << (16 - cnt));
+            CONDITIONAL_SET_FLAG(cf, F_CF);
+            set_szp_flags_16((u16)res);
+        } else {
+            res = d;
+        }
+        if (cnt == 1) {
+            CONDITIONAL_SET_FLAG((((res & 0x8000) == 0x8000) ^
+                                  (ACCESS_FLAG(F_CF) != 0)), F_OF);
+        } else {
+            CLEAR_FLAG(F_OF);
+        }
+    } else {
+        res = 0;
+        CONDITIONAL_SET_FLAG((d << (s-1)) & 0x8000, F_CF);
+        CLEAR_FLAG(F_OF);
+        CLEAR_FLAG(F_SF);
+        SET_FLAG(F_PF);
+        SET_FLAG(F_ZF);
+    }
+    return (u16)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SHLD instruction and side effects.
+****************************************************************************/
+u32 shld_long (u32 d, u32 fill, u8 s)
+{
+    unsigned int cnt, res, cf;
+
+    if (s < 32) {
+        cnt = s % 32;
+        if (cnt > 0) {
+            res = (d << cnt) | (fill >> (32-cnt));
+            cf = d & (1 << (32 - cnt));
+            CONDITIONAL_SET_FLAG(cf, F_CF);
+            set_szp_flags_32((u32)res);
+        } else {
+            res = d;
+        }
+        if (cnt == 1) {
+            CONDITIONAL_SET_FLAG((((res & 0x80000000) == 0x80000000) ^
+                                  (ACCESS_FLAG(F_CF) != 0)), F_OF);
+        } else {
+            CLEAR_FLAG(F_OF);
+        }
+    } else {
+        res = 0;
+        CONDITIONAL_SET_FLAG((d << (s-1)) & 0x80000000, F_CF);
+        CLEAR_FLAG(F_OF);
+        CLEAR_FLAG(F_SF);
+        SET_FLAG(F_PF);
+        SET_FLAG(F_ZF);
+    }
+    return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SHRD instruction and side effects.
+****************************************************************************/
+u16 shrd_word (u16 d, u16 fill, u8 s)
+{
+    unsigned int cnt, res, cf;
+
+    if (s < 16) {
+        cnt = s % 16;
+        if (cnt > 0) {
+            cf = d & (1 << (cnt - 1));
+            res = (d >> cnt) | (fill << (16 - cnt));
+            CONDITIONAL_SET_FLAG(cf, F_CF);
+            set_szp_flags_16((u16)res);
+        } else {
+            res = d;
+        }
+
+        if (cnt == 1) {
+            CONDITIONAL_SET_FLAG(XOR2(res >> 14), F_OF);
+        } else {
+            CLEAR_FLAG(F_OF);
+        }
+    } else {
+        res = 0;
+        CLEAR_FLAG(F_CF);
+        CLEAR_FLAG(F_OF);
+        SET_FLAG(F_ZF);
+        CLEAR_FLAG(F_SF);
+        CLEAR_FLAG(F_PF);
+    }
+    return (u16)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SHRD instruction and side effects.
+****************************************************************************/
+u32 shrd_long (u32 d, u32 fill, u8 s)
+{
+    unsigned int cnt, res, cf;
+
+    if (s < 32) {
+        cnt = s % 32;
+        if (cnt > 0) {
+            cf = d & (1 << (cnt - 1));
+            res = (d >> cnt) | (fill << (32 - cnt));
+            CONDITIONAL_SET_FLAG(cf, F_CF);
+            set_szp_flags_32((u32)res);
+        } else {
+            res = d;
+        }
+        if (cnt == 1) {
+            CONDITIONAL_SET_FLAG(XOR2(res >> 30), F_OF);
+        } else {
+            CLEAR_FLAG(F_OF);
+        }
+    } else {
+        res = 0;
+        CLEAR_FLAG(F_CF);
+        CLEAR_FLAG(F_OF);
+        SET_FLAG(F_ZF);
+        CLEAR_FLAG(F_SF);
+        CLEAR_FLAG(F_PF);
+    }
+    return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SBB instruction and side effects.
+****************************************************************************/
+u8 sbb_byte(u8 d, u8 s)
+{
+    u32 res;   /* all operands in native machine order */
+    u32 bc;
+
+    if (ACCESS_FLAG(F_CF))
+        res = d - s - 1;
+    else
+        res = d - s;
+    set_szp_flags_8((u8)res);
+
+    /* calculate the borrow chain.  See note at top */
+    bc = (res & (~d | s)) | (~d & s);
+    CONDITIONAL_SET_FLAG(bc & 0x80, F_CF);
+    CONDITIONAL_SET_FLAG(XOR2(bc >> 6), F_OF);
+    CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
+    return (u8)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SBB instruction and side effects.
+****************************************************************************/
+u16 sbb_word(u16 d, u16 s)
+{
+    u32 res;   /* all operands in native machine order */
+    u32 bc;
+
+    if (ACCESS_FLAG(F_CF))
+        res = d - s - 1;
+    else
+        res = d - s;
+    set_szp_flags_16((u16)res);
+
+    /* calculate the borrow chain.  See note at top */
+    bc = (res & (~d | s)) | (~d & s);
+    CONDITIONAL_SET_FLAG(bc & 0x8000, F_CF);
+    CONDITIONAL_SET_FLAG(XOR2(bc >> 14), F_OF);
+    CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
+    return (u16)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SBB instruction and side effects.
+****************************************************************************/
+u32 sbb_long(u32 d, u32 s)
+{
+    u32 res;   /* all operands in native machine order */
+    u32 bc;
+
+    if (ACCESS_FLAG(F_CF))
+        res = d - s - 1;
+    else
+        res = d - s;
+
+    set_szp_flags_32(res);
+
+    /* calculate the borrow chain.  See note at top */
+    bc = (res & (~d | s)) | (~d & s);
+    CONDITIONAL_SET_FLAG(bc & 0x80000000, F_CF);
+    CONDITIONAL_SET_FLAG(XOR2(bc >> 30), F_OF);
+    CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
+    return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SUB instruction and side effects.
+****************************************************************************/
+u8 sub_byte(u8 d, u8 s)
+{
+    u32 res;   /* all operands in native machine order */
+    u32 bc;
+
+    res = d - s;
+    set_szp_flags_8((u8)res);
+
+    /* calculate the borrow chain.  See note at top */
+    bc = (res & (~d | s)) | (~d & s);
+    CONDITIONAL_SET_FLAG(bc & 0x80, F_CF);
+    CONDITIONAL_SET_FLAG(XOR2(bc >> 6), F_OF);
+    CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
+    return (u8)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SUB instruction and side effects.
+****************************************************************************/
+u16 sub_word(u16 d, u16 s)
+{
+    u32 res;   /* all operands in native machine order */
+    u32 bc;
+
+    res = d - s;
+    set_szp_flags_16((u16)res);
+
+    /* calculate the borrow chain.  See note at top */
+    bc = (res & (~d | s)) | (~d & s);
+    CONDITIONAL_SET_FLAG(bc & 0x8000, F_CF);
+    CONDITIONAL_SET_FLAG(XOR2(bc >> 14), F_OF);
+    CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
+    return (u16)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SUB instruction and side effects.
+****************************************************************************/
+u32 sub_long(u32 d, u32 s)
+{
+    u32 res;   /* all operands in native machine order */
+    u32 bc;
+
+    res = d - s;
+    set_szp_flags_32(res);
+
+    /* calculate the borrow chain.  See note at top */
+    bc = (res & (~d | s)) | (~d & s);
+    CONDITIONAL_SET_FLAG(bc & 0x80000000, F_CF);
+    CONDITIONAL_SET_FLAG(XOR2(bc >> 30), F_OF);
+    CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
+    return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the TEST instruction and side effects.
+****************************************************************************/
+void test_byte(u8 d, u8 s)
+{
+    u32 res;   /* all operands in native machine order */
+
+    res = d & s;
+
+    CLEAR_FLAG(F_OF);
+    set_szp_flags_8((u8)res);
+    /* AF == dont care */
+    CLEAR_FLAG(F_CF);
+}
+
+/****************************************************************************
+REMARKS:
+Implements the TEST instruction and side effects.
+****************************************************************************/
+void test_word(u16 d, u16 s)
+{
+    u32 res;   /* all operands in native machine order */
+
+    res = d & s;
+
+    CLEAR_FLAG(F_OF);
+    set_szp_flags_16((u16)res);
+    /* AF == dont care */
+    CLEAR_FLAG(F_CF);
+}
+
+/****************************************************************************
+REMARKS:
+Implements the TEST instruction and side effects.
+****************************************************************************/
+void test_long(u32 d, u32 s)
+{
+    u32 res;   /* all operands in native machine order */
+
+    res = d & s;
+
+    CLEAR_FLAG(F_OF);
+    set_szp_flags_32(res);
+    /* AF == dont care */
+    CLEAR_FLAG(F_CF);
+}
+
+/****************************************************************************
+REMARKS:
+Implements the XOR instruction and side effects.
+****************************************************************************/
+u8 xor_byte(u8 d, u8 s)
+{
+    u8 res;    /* all operands in native machine order */
+
+    res = d ^ s;
+    no_carry_byte_side_eff(res);
+    return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the XOR instruction and side effects.
+****************************************************************************/
+u16 xor_word(u16 d, u16 s)
+{
+    u16 res;   /* all operands in native machine order */
+
+    res = d ^ s;
+    no_carry_word_side_eff(res);
+    return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the XOR instruction and side effects.
+****************************************************************************/
+u32 xor_long(u32 d, u32 s)
+{
+    u32 res;   /* all operands in native machine order */
+
+    res = d ^ s;
+    no_carry_long_side_eff(res);
+    return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the IMUL instruction and side effects.
+****************************************************************************/
+void imul_byte(u8 s)
+{
+    s16 res = (s16)((s8)M.x86.R_AL * (s8)s);
+
+    M.x86.R_AX = res;
+    if (((M.x86.R_AL & 0x80) == 0 && M.x86.R_AH == 0x00) ||
+        ((M.x86.R_AL & 0x80) != 0 && M.x86.R_AH == 0xFF)) {
+        CLEAR_FLAG(F_CF);
+        CLEAR_FLAG(F_OF);
+    } else {
+        SET_FLAG(F_CF);
+        SET_FLAG(F_OF);
+    }
+}
+
+/****************************************************************************
+REMARKS:
+Implements the IMUL instruction and side effects.
+****************************************************************************/
+void imul_word(u16 s)
+{
+    s32 res = (s16)M.x86.R_AX * (s16)s;
+
+    M.x86.R_AX = (u16)res;
+    M.x86.R_DX = (u16)(res >> 16);
+    if (((M.x86.R_AX & 0x8000) == 0 && M.x86.R_DX == 0x0000) ||
+        ((M.x86.R_AX & 0x8000) != 0 && M.x86.R_DX == 0xFFFF)) {
+        CLEAR_FLAG(F_CF);
+        CLEAR_FLAG(F_OF);
+    } else {
+        SET_FLAG(F_CF);
+        SET_FLAG(F_OF);
+    }
+}
+
+/****************************************************************************
+REMARKS:
+Implements the IMUL instruction and side effects.
+****************************************************************************/
+void imul_long_direct(u32 *res_lo, u32* res_hi,u32 d, u32 s)
+{
+#ifdef  __HAS_LONG_LONG__
+    s64 res = (s64)d * (s64)s;
+
+    *res_lo = (u32)res;
+    *res_hi = (u32)(res >> 32);
+#else
+    u32 d_lo,d_hi,d_sign;
+    u32 s_lo,s_hi,s_sign;
+    u32 rlo_lo,rlo_hi,rhi_lo;
+
+    if ((d_sign = d & 0x80000000) != 0)
+        d = -d;
+    d_lo = d & 0xFFFF;
+    d_hi = d >> 16;
+    if ((s_sign = s & 0x80000000) != 0)
+        s = -s;
+    s_lo = s & 0xFFFF;
+    s_hi = s >> 16;
+    rlo_lo = d_lo * s_lo;
+    rlo_hi = (d_hi * s_lo + d_lo * s_hi) + (rlo_lo >> 16);
+    rhi_lo = d_hi * s_hi + (rlo_hi >> 16);
+    *res_lo = (rlo_hi << 16) | (rlo_lo & 0xFFFF);
+    *res_hi = rhi_lo;
+    if (d_sign != s_sign) {
+        d = ~*res_lo;
+        s = (((d & 0xFFFF) + 1) >> 16) + (d >> 16);
+        *res_lo = ~*res_lo+1;
+        *res_hi = ~*res_hi+(s >> 16);
+        }
+#endif
+}
+
+/****************************************************************************
+REMARKS:
+Implements the IMUL instruction and side effects.
+****************************************************************************/
+void imul_long(u32 s)
+{
+    imul_long_direct(&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,s);
+    if (((M.x86.R_EAX & 0x80000000) == 0 && M.x86.R_EDX == 0x00000000) ||
+        ((M.x86.R_EAX & 0x80000000) != 0 && M.x86.R_EDX == 0xFFFFFFFF)) {
+        CLEAR_FLAG(F_CF);
+        CLEAR_FLAG(F_OF);
+    } else {
+        SET_FLAG(F_CF);
+        SET_FLAG(F_OF);
+    }
+}
+
+/****************************************************************************
+REMARKS:
+Implements the MUL instruction and side effects.
+****************************************************************************/
+void mul_byte(u8 s)
+{
+    u16 res = (u16)(M.x86.R_AL * s);
+
+    M.x86.R_AX = res;
+    if (M.x86.R_AH == 0) {
+        CLEAR_FLAG(F_CF);
+        CLEAR_FLAG(F_OF);
+    } else {
+        SET_FLAG(F_CF);
+        SET_FLAG(F_OF);
+    }
+}
+
+/****************************************************************************
+REMARKS:
+Implements the MUL instruction and side effects.
+****************************************************************************/
+void mul_word(u16 s)
+{
+    u32 res = M.x86.R_AX * s;
+
+    M.x86.R_AX = (u16)res;
+    M.x86.R_DX = (u16)(res >> 16);
+    if (M.x86.R_DX == 0) {
+        CLEAR_FLAG(F_CF);
+        CLEAR_FLAG(F_OF);
+    } else {
+        SET_FLAG(F_CF);
+        SET_FLAG(F_OF);
+    }
+}
+
+/****************************************************************************
+REMARKS:
+Implements the MUL instruction and side effects.
+****************************************************************************/
+void mul_long(u32 s)
+{
+#ifdef  __HAS_LONG_LONG__
+    u64 res = (u32)M.x86.R_EAX * (u32)s;
+
+    M.x86.R_EAX = (u32)res;
+    M.x86.R_EDX = (u32)(res >> 32);
+#else
+    u32 a,a_lo,a_hi;
+    u32 s_lo,s_hi;
+    u32 rlo_lo,rlo_hi,rhi_lo;
+
+    a = M.x86.R_EAX;
+    a_lo = a & 0xFFFF;
+    a_hi = a >> 16;
+    s_lo = s & 0xFFFF;
+    s_hi = s >> 16;
+    rlo_lo = a_lo * s_lo;
+    rlo_hi = (a_hi * s_lo + a_lo * s_hi) + (rlo_lo >> 16);
+    rhi_lo = a_hi * s_hi + (rlo_hi >> 16);
+    M.x86.R_EAX = (rlo_hi << 16) | (rlo_lo & 0xFFFF);
+    M.x86.R_EDX = rhi_lo;
+#endif
+    if (M.x86.R_EDX == 0) {
+        CLEAR_FLAG(F_CF);
+        CLEAR_FLAG(F_OF);
+    } else {
+        SET_FLAG(F_CF);
+        SET_FLAG(F_OF);
+    }
+}
+
+/****************************************************************************
+REMARKS:
+Implements the IDIV instruction and side effects.
+****************************************************************************/
+void idiv_byte(u8 s)
+{
+    s32 dvd, div, mod;
+
+    dvd = (s16)M.x86.R_AX;
+    if (s == 0) {
+        x86emu_intr_raise(0);
+        return;
+    }
+    div = dvd / (s8)s;
+    mod = dvd % (s8)s;
+    if (abs(div) > 0x7f) {
+        x86emu_intr_raise(0);
+        return;
+    }
+    M.x86.R_AL = (s8) div;
+    M.x86.R_AH = (s8) mod;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the IDIV instruction and side effects.
+****************************************************************************/
+void idiv_word(u16 s)
+{
+    s32 dvd, div, mod;
+
+    dvd = (((s32)M.x86.R_DX) << 16) | M.x86.R_AX;
+    if (s == 0) {
+        x86emu_intr_raise(0);
+        return;
+    }
+    div = dvd / (s16)s;
+    mod = dvd % (s16)s;
+    if (abs(div) > 0x7fff) {
+        x86emu_intr_raise(0);
+        return;
+    }
+    CLEAR_FLAG(F_CF);
+    CLEAR_FLAG(F_SF);
+    CONDITIONAL_SET_FLAG(div == 0, F_ZF);
+    set_parity_flag(mod);
+
+    M.x86.R_AX = (u16)div;
+    M.x86.R_DX = (u16)mod;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the IDIV instruction and side effects.
+****************************************************************************/
+void idiv_long(u32 s)
+{
+#ifdef  __HAS_LONG_LONG__
+    s64 dvd, div, mod;
+
+    dvd = (((s64)M.x86.R_EDX) << 32) | M.x86.R_EAX;
+    if (s == 0) {
+        x86emu_intr_raise(0);
+        return;
+    }
+    div = dvd / (s32)s;
+    mod = dvd % (s32)s;
+    if (abs(div) > 0x7fffffff) {
+        x86emu_intr_raise(0);
+        return;
+    }
+#else
+    s32 div = 0, mod;
+    s32 h_dvd = M.x86.R_EDX;
+    u32 l_dvd = M.x86.R_EAX;
+    u32 abs_s = s & 0x7FFFFFFF;
+    u32 abs_h_dvd = h_dvd & 0x7FFFFFFF;
+    u32 h_s = abs_s >> 1;
+    u32 l_s = abs_s << 31;
+    int counter = 31;
+    int carry;
+
+    if (s == 0) {
+        x86emu_intr_raise(0);
+        return;
+    }
+    do {
+        div <<= 1;
+        carry = (l_dvd >= l_s) ? 0 : 1;
+
+        if (abs_h_dvd < (h_s + carry)) {
+            h_s >>= 1;
+            l_s = abs_s << (--counter);
+            continue;
+        } else {
+            abs_h_dvd -= (h_s + carry);
+            l_dvd = carry ? ((0xFFFFFFFF - l_s) + l_dvd + 1)
+                : (l_dvd - l_s);
+            h_s >>= 1;
+            l_s = abs_s << (--counter);
+            div |= 1;
+            continue;
+        }
+
+    } while (counter > -1);
+    /* overflow */
+    if (abs_h_dvd || (l_dvd > abs_s)) {
+        x86emu_intr_raise(0);
+        return;
+    }
+    /* sign */
+    div |= ((h_dvd & 0x10000000) ^ (s & 0x10000000));
+    mod = l_dvd;
+
+#endif
+    CLEAR_FLAG(F_CF);
+    CLEAR_FLAG(F_AF);
+    CLEAR_FLAG(F_SF);
+    SET_FLAG(F_ZF);
+    set_parity_flag(mod);
+
+    M.x86.R_EAX = (u32)div;
+    M.x86.R_EDX = (u32)mod;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the DIV instruction and side effects.
+****************************************************************************/
+void div_byte(u8 s)
+{
+    u32 dvd, div, mod;
+
+    dvd = M.x86.R_AX;
+    if (s == 0) {
+        x86emu_intr_raise(0);
+        return;
+    }
+    div = dvd / (u8)s;
+    mod = dvd % (u8)s;
+    if (abs(div) > 0xff) {
+        x86emu_intr_raise(0);
+        return;
+    }
+    M.x86.R_AL = (u8)div;
+    M.x86.R_AH = (u8)mod;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the DIV instruction and side effects.
+****************************************************************************/
+void div_word(u16 s)
+{
+    u32 dvd, div, mod;
+
+    dvd = (((u32)M.x86.R_DX) << 16) | M.x86.R_AX;
+    if (s == 0) {
+        x86emu_intr_raise(0);
+        return;
+    }
+    div = dvd / (u16)s;
+    mod = dvd % (u16)s;
+    if (abs(div) > 0xffff) {
+        x86emu_intr_raise(0);
+        return;
+    }
+    CLEAR_FLAG(F_CF);
+    CLEAR_FLAG(F_SF);
+    CONDITIONAL_SET_FLAG(div == 0, F_ZF);
+    set_parity_flag(mod);
+
+    M.x86.R_AX = (u16)div;
+    M.x86.R_DX = (u16)mod;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the DIV instruction and side effects.
+****************************************************************************/
+void div_long(u32 s)
+{
+#ifdef  __HAS_LONG_LONG__
+    u64 dvd, div, mod;
+
+    dvd = (((u64)M.x86.R_EDX) << 32) | M.x86.R_EAX;
+    if (s == 0) {
+        x86emu_intr_raise(0);
+        return;
+    }
+    div = dvd / (u32)s;
+    mod = dvd % (u32)s;
+    if (abs(div) > 0xffffffff) {
+        x86emu_intr_raise(0);
+        return;
+    }
+#else
+    s32 div = 0, mod;
+    s32 h_dvd = M.x86.R_EDX;
+    u32 l_dvd = M.x86.R_EAX;
+
+    u32 h_s = s;
+    u32 l_s = 0;
+    int counter = 32;
+    int carry;
+
+    if (s == 0) {
+        x86emu_intr_raise(0);
+        return;
+    }
+    do {
+        div <<= 1;
+        carry = (l_dvd >= l_s) ? 0 : 1;
+
+        if (h_dvd < (h_s + carry)) {
+            h_s >>= 1;
+            l_s = s << (--counter);
+            continue;
+        } else {
+            h_dvd -= (h_s + carry);
+            l_dvd = carry ? ((0xFFFFFFFF - l_s) + l_dvd + 1)
+                : (l_dvd - l_s);
+            h_s >>= 1;
+            l_s = s << (--counter);
+            div |= 1;
+            continue;
+        }
+
+    } while (counter > -1);
+    /* overflow */
+    if (h_dvd || (l_dvd > s)) {
+        x86emu_intr_raise(0);
+        return;
+    }
+    mod = l_dvd;
+#endif
+    CLEAR_FLAG(F_CF);
+    CLEAR_FLAG(F_AF);
+    CLEAR_FLAG(F_SF);
+    SET_FLAG(F_ZF);
+    set_parity_flag(mod);
+
+    M.x86.R_EAX = (u32)div;
+    M.x86.R_EDX = (u32)mod;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the IN string instruction and side effects.
+****************************************************************************/
+
+static void single_in(int size)
+{
+    if(size == 1)
+        store_data_byte_abs(M.x86.R_ES, M.x86.R_DI,(*sys_inb)(M.x86.R_DX));
+    else if (size == 2)
+        store_data_word_abs(M.x86.R_ES, M.x86.R_DI,(*sys_inw)(M.x86.R_DX));
+    else
+        store_data_long_abs(M.x86.R_ES, M.x86.R_DI,(*sys_inl)(M.x86.R_DX));
+}
+
+void ins(int size)
+{
+    int inc = size;
+
+    if (ACCESS_FLAG(F_DF)) {
+        inc = -size;
+    }
+    if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
+        /* dont care whether REPE or REPNE */
+        /* in until CX is ZERO. */
+        u32 count = ((M.x86.mode & SYSMODE_PREFIX_DATA) ?
+                     M.x86.R_ECX : M.x86.R_CX);
+
+        while (count--) {
+          single_in(size);
+          M.x86.R_DI += inc;
+          }
+        M.x86.R_CX = 0;
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            M.x86.R_ECX = 0;
+        }
+        M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
+    } else {
+        single_in(size);
+        M.x86.R_DI += inc;
+    }
+}
+
+/****************************************************************************
+REMARKS:
+Implements the OUT string instruction and side effects.
+****************************************************************************/
+
+static void single_out(int size)
+{
+     if(size == 1)
+       (*sys_outb)(M.x86.R_DX,fetch_data_byte_abs(M.x86.R_ES, M.x86.R_SI));
+     else if (size == 2)
+       (*sys_outw)(M.x86.R_DX,fetch_data_word_abs(M.x86.R_ES, M.x86.R_SI));
+     else
+       (*sys_outl)(M.x86.R_DX,fetch_data_long_abs(M.x86.R_ES, M.x86.R_SI));
+}
+
+void outs(int size)
+{
+    int inc = size;
+
+    if (ACCESS_FLAG(F_DF)) {
+        inc = -size;
+    }
+    if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
+        /* dont care whether REPE or REPNE */
+        /* out until CX is ZERO. */
+        u32 count = ((M.x86.mode & SYSMODE_PREFIX_DATA) ?
+                     M.x86.R_ECX : M.x86.R_CX);
+        while (count--) {
+          single_out(size);
+          M.x86.R_SI += inc;
+          }
+        M.x86.R_CX = 0;
+        if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+            M.x86.R_ECX = 0;
+        }
+        M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
+    } else {
+        single_out(size);
+        M.x86.R_SI += inc;
+    }
+}
+
+/****************************************************************************
+PARAMETERS:
+addr    - Address to fetch word from
+
+REMARKS:
+Fetches a word from emulator memory using an absolute address.
+****************************************************************************/
+u16 mem_access_word(int addr)
+{
+DB( if (CHECK_MEM_ACCESS())
+      x86emu_check_mem_access(addr);)
+    return (*sys_rdw)(addr);
+}
+
+/****************************************************************************
+REMARKS:
+Pushes a word onto the stack.
+
+NOTE: Do not inline this, as (*sys_wrX) is already inline!
+****************************************************************************/
+void push_word(u16 w)
+{
+DB( if (CHECK_SP_ACCESS())
+      x86emu_check_sp_access();)
+    M.x86.R_SP -= 2;
+    (*sys_wrw)(((u32)M.x86.R_SS << 4)  + M.x86.R_SP, w);
+}
+
+/****************************************************************************
+REMARKS:
+Pushes a long onto the stack.
+
+NOTE: Do not inline this, as (*sys_wrX) is already inline!
+****************************************************************************/
+void push_long(u32 w)
+{
+DB( if (CHECK_SP_ACCESS())
+      x86emu_check_sp_access();)
+    M.x86.R_SP -= 4;
+    (*sys_wrl)(((u32)M.x86.R_SS << 4)  + M.x86.R_SP, w);
+}
+
+/****************************************************************************
+REMARKS:
+Pops a word from the stack.
+
+NOTE: Do not inline this, as (*sys_rdX) is already inline!
+****************************************************************************/
+u16 pop_word(void)
+{
+    u16 res;
+
+DB( if (CHECK_SP_ACCESS())
+      x86emu_check_sp_access();)
+    res = (*sys_rdw)(((u32)M.x86.R_SS << 4)  + M.x86.R_SP);
+    M.x86.R_SP += 2;
+    return res;
+}
+
+/****************************************************************************
+REMARKS:
+Pops a long from the stack.
+
+NOTE: Do not inline this, as (*sys_rdX) is already inline!
+****************************************************************************/
+u32 pop_long(void)
+{
+    u32 res;
+
+DB( if (CHECK_SP_ACCESS())
+      x86emu_check_sp_access();)
+    res = (*sys_rdl)(((u32)M.x86.R_SS << 4)  + M.x86.R_SP);
+    M.x86.R_SP += 4;
+    return res;
+}
+
diff --git a/other-licence/x86emu/sys.c b/other-licence/x86emu/sys.c
new file mode 100644
index 0000000..8a1dc03
--- /dev/null
+++ b/other-licence/x86emu/sys.c
@@ -0,0 +1,402 @@
+/****************************************************************************
+*
+*						Realmode X86 Emulator Library
+*
+*            	Copyright (C) 1996-1999 SciTech Software, Inc.
+* 				     Copyright (C) David Mosberger-Tang
+* 					   Copyright (C) 1999 Egbert Eich
+*
+*  ========================================================================
+*
+*  Permission to use, copy, modify, distribute, and sell this software and
+*  its documentation for any purpose is hereby granted without fee,
+*  provided that the above copyright notice appear in all copies and that
+*  both that copyright notice and this permission notice appear in
+*  supporting documentation, and that the name of the authors not be used
+*  in advertising or publicity pertaining to distribution of the software
+*  without specific, written prior permission.  The authors makes no
+*  representations about the suitability of this software for any purpose.
+*  It is provided "as is" without express or implied warranty.
+*
+*  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+*  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+*  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+*  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+*  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+*  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+*  PERFORMANCE OF THIS SOFTWARE.
+*
+*  ========================================================================
+*
+* Language:		ANSI C
+* Environment:	Any
+* Developer:    Kendall Bennett
+*
+* Description:  This file includes subroutines which are related to
+*				programmed I/O and memory access. Included in this module
+*				are default functions with limited usefulness. For real
+*				uses these functions will most likely be overriden by the
+*				user library.
+*
+****************************************************************************/
+/* $XFree86: xc/extras/x86emu/src/x86emu/sys.c,v 1.5 2000/08/23 22:10:01 tsi Exp $ */
+
+#include <x86emu/x86emu.h>
+#include <x86emu/regs.h>
+#include "debug.h"
+#include "prim_ops.h"
+
+#ifdef IN_MODULE
+#include "xf86_ansic.h"
+#else
+#include <string.h>
+#endif
+/*------------------------- Global Variables ------------------------------*/
+
+X86EMU_sysEnv _X86EMU_env;	/* Global emulator machine state */
+X86EMU_intrFuncs _X86EMU_intrTab[256];
+
+/*----------------------------- Implementation ----------------------------*/
+
+/* compute a pointer. This replaces code scattered all over the place! */
+u8 *mem_ptr(u32 addr, int size)
+{
+	u8 *retaddr = 0;
+
+	if (addr > M.mem_size - size) {
+		DB(printk("mem_ptr: address %#lx out of range!\n", addr);)
+		    HALT_SYS();
+	}
+	if (addr < 0x200) {
+		//printk("%x:%x updating int vector 0x%x\n",
+		//       M.x86.R_CS, M.x86.R_IP, addr >> 2);
+	}
+	retaddr = (u8 *) (M.mem_base + addr);
+
+	return retaddr;
+}
+
+/****************************************************************************
+PARAMETERS:
+addr	- Emulator memory address to read
+
+RETURNS:
+Byte value read from emulator memory.
+
+REMARKS:
+Reads a byte value from the emulator memory. 
+****************************************************************************/
+u8 X86API rdb(u32 addr)
+{
+	u8 val;
+	u8 *ptr;
+
+	ptr = mem_ptr(addr, 1);
+
+	val = *ptr;
+	DB(if (DEBUG_MEM_TRACE())
+	   printk("%#08x 1 -> %#x\n", addr, val);)
+		return val;
+}
+
+/****************************************************************************
+PARAMETERS:
+addr	- Emulator memory address to read
+
+RETURNS:
+Word value read from emulator memory.
+
+REMARKS:
+Reads a word value from the emulator memory.
+****************************************************************************/
+u16 X86API rdw(u32 addr)
+{
+	u16 val = 0;
+	u8 *ptr;
+
+	ptr = mem_ptr(addr, 2);
+	val = *(u16 *) (ptr);
+
+	DB(if (DEBUG_MEM_TRACE())
+	   printk("%#08x 2 -> %#x\n", addr, val);)
+	return val;
+}
+
+/****************************************************************************
+PARAMETERS:
+addr	- Emulator memory address to read
+
+RETURNS:
+Long value read from emulator memory.
+REMARKS:
+Reads a long value from the emulator memory. 
+****************************************************************************/
+u32 X86API rdl(u32 addr)
+{
+	u32 val = 0;
+	u8 *ptr;
+
+	ptr = mem_ptr(addr, 4);
+       	val = *(u32 *) (ptr);
+
+	DB(if (DEBUG_MEM_TRACE())
+	   printk("%#08x 4 -> %#x\n", addr, val);)
+	return val;
+}
+
+/****************************************************************************
+PARAMETERS:
+addr	- Emulator memory address to read
+val		- Value to store
+
+REMARKS:
+Writes a byte value to emulator memory.
+****************************************************************************/
+void X86API wrb(u32 addr, u8 val)
+{
+	u8 *ptr;
+
+	ptr = mem_ptr(addr, 1);
+	*(u8 *) (ptr) = val;
+
+	DB(if (DEBUG_MEM_TRACE())
+	   printk("%#08x 1 <- %#x\n", addr, val);)
+}
+
+/****************************************************************************
+PARAMETERS:
+addr	- Emulator memory address to read
+val		- Value to store
+
+REMARKS:
+Writes a word value to emulator memory.
+****************************************************************************/
+void X86API wrw(u32 addr, u16 val)
+{
+	u8 *ptr;
+
+	ptr = mem_ptr(addr, 2);
+	*(u16 *) (ptr) = val;
+
+	DB(if (DEBUG_MEM_TRACE())
+	   printk("%#08x 2 <- %#x\n", addr, val);)
+}
+
+/****************************************************************************
+PARAMETERS:
+addr	- Emulator memory address to read
+val		- Value to store
+
+REMARKS:
+Writes a long value to emulator memory. 
+****************************************************************************/
+void X86API wrl(u32 addr, u32 val)
+{
+	u8 *ptr;
+
+	ptr = mem_ptr(addr, 4);
+	*(u32 *) (ptr) = val;
+
+	DB(if (DEBUG_MEM_TRACE())
+	   printk("%#08x 4 <- %#x\n", addr, val);)
+
+
+}
+
+/****************************************************************************
+PARAMETERS:
+addr	- PIO address to read
+RETURN:
+0
+REMARKS:
+Default PIO byte read function. Doesn't perform real inb.
+****************************************************************************/
+static u8 X86API p_inb(X86EMU_pioAddr addr)
+{
+	DB(if (DEBUG_IO_TRACE())
+		printk("inb %#04x \n", addr);)
+	return 0;
+}
+
+/****************************************************************************
+PARAMETERS:
+addr	- PIO address to read
+RETURN:
+0
+REMARKS:
+Default PIO word read function. Doesn't perform real inw.
+****************************************************************************/
+static u16 X86API p_inw(X86EMU_pioAddr addr)
+{
+	DB(if (DEBUG_IO_TRACE())
+		printk("inw %#04x \n", addr);)
+	return 0;
+}
+
+/****************************************************************************
+PARAMETERS:
+addr	- PIO address to read
+RETURN:
+0
+REMARKS:
+Default PIO long read function. Doesn't perform real inl.
+****************************************************************************/
+static u32 X86API p_inl(X86EMU_pioAddr addr)
+{
+	DB(if (DEBUG_IO_TRACE())
+		printk("inl %#04x \n", addr);)
+	return 0;
+}
+
+/****************************************************************************
+PARAMETERS:
+addr	- PIO address to write
+val     - Value to store
+REMARKS:
+Default PIO byte write function. Doesn't perform real outb.
+****************************************************************************/
+static void X86API p_outb(X86EMU_pioAddr addr, u8 val)
+{
+	DB(if (DEBUG_IO_TRACE())
+		printk("outb %#02x -> %#04x \n", val, addr);)
+	return;
+}
+
+/****************************************************************************
+PARAMETERS:
+addr	- PIO address to write
+val     - Value to store
+REMARKS:
+Default PIO word write function. Doesn't perform real outw.
+****************************************************************************/
+static void X86API p_outw(X86EMU_pioAddr addr, u16 val)
+{
+	DB(if (DEBUG_IO_TRACE())
+		printk("outw %#04x -> %#04x \n", val, addr);)
+	return;
+}
+
+/****************************************************************************
+PARAMETERS:
+addr	- PIO address to write
+val     - Value to store
+REMARKS:
+Default PIO ;ong write function. Doesn't perform real outl.
+****************************************************************************/
+static void X86API p_outl(X86EMU_pioAddr addr, u32 val)
+{
+	DB(if (DEBUG_IO_TRACE())
+	       printk("outl %#08x -> %#04x \n", val, addr);)
+
+	return;
+}
+
+/*------------------------- Global Variables ------------------------------*/
+
+u8(X86APIP sys_rdb) (u32 addr) = rdb;
+u16(X86APIP sys_rdw) (u32 addr) = rdw;
+u32(X86APIP sys_rdl) (u32 addr) = rdl;
+void (X86APIP sys_wrb) (u32 addr, u8 val) = wrb;
+void (X86APIP sys_wrw) (u32 addr, u16 val) = wrw;
+void (X86APIP sys_wrl) (u32 addr, u32 val) = wrl;
+u8(X86APIP sys_inb) (X86EMU_pioAddr addr) = p_inb;
+u16(X86APIP sys_inw) (X86EMU_pioAddr addr) = p_inw;
+u32(X86APIP sys_inl) (X86EMU_pioAddr addr) = p_inl;
+void (X86APIP sys_outb) (X86EMU_pioAddr addr, u8 val) = p_outb;
+void (X86APIP sys_outw) (X86EMU_pioAddr addr, u16 val) = p_outw;
+void (X86APIP sys_outl) (X86EMU_pioAddr addr, u32 val) = p_outl;
+
+/*----------------------------- Setup -------------------------------------*/
+
+/****************************************************************************
+PARAMETERS:
+funcs	- New memory function pointers to make active
+
+REMARKS:
+This function is used to set the pointers to functions which access
+memory space, allowing the user application to override these functions
+and hook them out as necessary for their application.
+****************************************************************************/
+void X86EMU_setupMemFuncs(X86EMU_memFuncs * funcs)
+{
+	sys_rdb = funcs->rdb;
+	sys_rdw = funcs->rdw;
+	sys_rdl = funcs->rdl;
+	sys_wrb = funcs->wrb;
+	sys_wrw = funcs->wrw;
+	sys_wrl = funcs->wrl;
+}
+
+/****************************************************************************
+PARAMETERS:
+funcs	- New programmed I/O function pointers to make active
+
+REMARKS:
+This function is used to set the pointers to functions which access
+I/O space, allowing the user application to override these functions
+and hook them out as necessary for their application.
+****************************************************************************/
+void X86EMU_setupPioFuncs(X86EMU_pioFuncs * funcs)
+{
+	sys_inb = funcs->inb;
+	sys_inw = funcs->inw;
+	sys_inl = funcs->inl;
+	sys_outb = funcs->outb;
+	sys_outw = funcs->outw;
+	sys_outl = funcs->outl;
+}
+
+/****************************************************************************
+PARAMETERS:
+funcs	- New interrupt vector table to make active
+
+REMARKS:
+This function is used to set the pointers to functions which handle
+interrupt processing in the emulator, allowing the user application to
+hook interrupts as necessary for their application. Any interrupts that
+are not hooked by the user application, and reflected and handled internally
+in the emulator via the interrupt vector table. This allows the application
+to get control when the code being emulated executes specific software
+interrupts.
+****************************************************************************/
+void X86EMU_setupIntrFuncs(X86EMU_intrFuncs funcs[])
+{
+	int i;
+
+	for (i = 0; i < 256; i++)
+		_X86EMU_intrTab[i] = NULL;
+	if (funcs) {
+		for (i = 0; i < 256; i++)
+			_X86EMU_intrTab[i] = funcs[i];
+	}
+}
+
+/****************************************************************************
+PARAMETERS:
+int	- New software interrupt to prepare for
+
+REMARKS:
+This function is used to set up the emulator state to exceute a software
+interrupt. This can be used by the user application code to allow an
+interrupt to be hooked, examined and then reflected back to the emulator
+so that the code in the emulator will continue processing the software
+interrupt as per normal. This essentially allows system code to actively
+hook and handle certain software interrupts as necessary.
+****************************************************************************/
+void X86EMU_prepareForInt(int num)
+{
+	push_word((u16) M.x86.R_FLG);
+	CLEAR_FLAG(F_IF);
+	CLEAR_FLAG(F_TF);
+	push_word(M.x86.R_CS);
+	M.x86.R_CS = mem_access_word(num * 4 + 2);
+	push_word(M.x86.R_IP);
+	M.x86.R_IP = mem_access_word(num * 4);
+	M.x86.intr = 0;
+}
+
+void X86EMU_setMemBase(void *base, size_t size)
+{
+	M.mem_base = (unsigned long) base;
+	M.mem_size = size;
+}
diff --git a/other-licence/x86emu/x86emu_changes.diff b/other-licence/x86emu/x86emu_changes.diff
new file mode 100644
index 0000000..91d2442
--- /dev/null
+++ b/other-licence/x86emu/x86emu_changes.diff
@@ -0,0 +1,364 @@
+Index: debug.c
+===================================================================
+RCS file: /cvs/osdf/cvs/host/other-licence/x86emu/debug.c,v
+retrieving revision 1.1
+diff -u -u -r1.1 debug.c
+--- debug.c	7 Sep 2007 10:01:21 -0000	1.1
++++ debug.c	19 Oct 2007 08:29:16 -0000
+@@ -185,7 +185,7 @@
+     for (i=0; i< M.x86.enc_pos; i++) {
+         sprintf(buf1+2*i,"%02x", fetch_data_byte_abs(s,o+i));
+     }
+-    printk("%-20s",buf1);
++    printk("%-20s ",buf1);
+ }
+ 
+ static void print_decoded_instruction (void)
+Index: ops.c
+===================================================================
+RCS file: /cvs/osdf/cvs/host/other-licence/x86emu/ops.c,v
+retrieving revision 1.1
+diff -u -u -r1.1 ops.c
+--- ops.c	7 Sep 2007 10:01:21 -0000	1.1
++++ ops.c	19 Oct 2007 08:29:16 -0000
+@@ -2526,6 +2526,8 @@
+         store_data_byte_abs(M.x86.R_ES, M.x86.R_DI, val);
+         M.x86.R_SI += inc;
+         M.x86.R_DI += inc;
++        if (M.x86.intr & INTR_HALTED)
++            break;
+     }
+     DECODE_CLEAR_SEGOVR();
+     END_OF_INSTR();
+@@ -2574,6 +2576,8 @@
+         }
+         M.x86.R_SI += inc;
+         M.x86.R_DI += inc;
++        if (M.x86.intr & INTR_HALTED)
++            break;
+     }
+     DECODE_CLEAR_SEGOVR();
+     END_OF_INSTR();
+@@ -2608,6 +2612,8 @@
+             M.x86.R_DI += inc;
+             if ( (M.x86.mode & SYSMODE_PREFIX_REPE) && (ACCESS_FLAG(F_ZF) == 0) ) break;
+             if ( (M.x86.mode & SYSMODE_PREFIX_REPNE) && ACCESS_FLAG(F_ZF) ) break;
++            if (M.x86.intr & INTR_HALTED)
++                break;
+         }
+         M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
+     } else {
+@@ -2660,6 +2666,8 @@
+             M.x86.R_DI += inc;
+             if ( (M.x86.mode & SYSMODE_PREFIX_REPE) && ACCESS_FLAG(F_ZF) == 0 ) break;
+             if ( (M.x86.mode & SYSMODE_PREFIX_REPNE) && ACCESS_FLAG(F_ZF) ) break;
++            if (M.x86.intr & INTR_HALTED)
++                break;
+         }
+         M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
+     } else {
+@@ -2746,6 +2754,8 @@
+             store_data_byte_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_AL);
+             M.x86.R_CX -= 1;
+             M.x86.R_DI += inc;
++            if (M.x86.intr & INTR_HALTED)
++                break;
+         }
+         M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
+     } else {
+@@ -2795,6 +2805,8 @@
+             store_data_word_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_AX);
+         }
+         M.x86.R_DI += inc;
++        if (M.x86.intr & INTR_HALTED)
++            break;
+     }
+     DECODE_CLEAR_SEGOVR();
+     END_OF_INSTR();
+@@ -2822,6 +2834,8 @@
+             M.x86.R_AL = fetch_data_byte(M.x86.R_SI);
+             M.x86.R_CX -= 1;
+             M.x86.R_SI += inc;
++            if (M.x86.intr & INTR_HALTED)
++                break;
+         }
+         M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
+     } else {
+@@ -2871,6 +2885,8 @@
+             M.x86.R_AX = fetch_data_word(M.x86.R_SI);
+         }
+         M.x86.R_SI += inc;
++        if (M.x86.intr & INTR_HALTED)
++            break;
+     }
+     DECODE_CLEAR_SEGOVR();
+     END_OF_INSTR();
+@@ -2902,6 +2918,8 @@
+             M.x86.R_DI += inc;
+             if (ACCESS_FLAG(F_ZF) == 0)
+                 break;
++            if (M.x86.intr & INTR_HALTED)
++                break;
+         }
+         M.x86.mode &= ~SYSMODE_PREFIX_REPE;
+     } else if (M.x86.mode & SYSMODE_PREFIX_REPNE) {
+@@ -2914,6 +2932,8 @@
+             M.x86.R_DI += inc;
+             if (ACCESS_FLAG(F_ZF))
+                 break;          /* zero flag set means equal */
++            if (M.x86.intr & INTR_HALTED)
++                break;
+         }
+         M.x86.mode &= ~SYSMODE_PREFIX_REPNE;
+     } else {
+@@ -2964,6 +2984,8 @@
+             M.x86.R_DI += inc;
+             if (ACCESS_FLAG(F_ZF) == 0)
+                 break;
++            if (M.x86.intr & INTR_HALTED)
++                break;
+         }
+         M.x86.mode &= ~SYSMODE_PREFIX_REPE;
+     } else if (M.x86.mode & SYSMODE_PREFIX_REPNE) {
+@@ -2981,6 +3003,8 @@
+             M.x86.R_DI += inc;
+             if (ACCESS_FLAG(F_ZF))
+                 break;          /* zero flag set means equal */
++            if (M.x86.intr & INTR_HALTED)
++                break;
+         }
+         M.x86.mode &= ~SYSMODE_PREFIX_REPNE;
+     } else {
+@@ -4213,6 +4237,7 @@
+     ip = (s16)fetch_word_imm();
+     ip += (s16)M.x86.R_IP;
+     DECODE_PRINTF2("%04x\n", ip);
++    JMP_TRACE(M.x86.saved_cs, M.x86.saved_ip, M.x86.R_CS, ip, " NEAR ");
+     TRACE_AND_STEP();
+     M.x86.R_IP = (u16)ip;
+     DECODE_CLEAR_SEGOVR();
+@@ -4233,6 +4258,7 @@
+     cs = fetch_word_imm();
+     DECODE_PRINTF2("%04x:", cs);
+     DECODE_PRINTF2("%04x\n", ip);
++    JMP_TRACE(M.x86.saved_cs, M.x86.saved_ip, cs, ip, " FAR ");
+     TRACE_AND_STEP();
+     M.x86.R_IP = ip;
+     M.x86.R_CS = cs;
+@@ -4254,6 +4280,7 @@
+     offset = (s8)fetch_byte_imm();
+     target = (u16)(M.x86.R_IP + offset);
+     DECODE_PRINTF2("%x\n", target);
++    JMP_TRACE(M.x86.saved_cs, M.x86.saved_ip, M.x86.R_CS, target, " BYTE ");
+     TRACE_AND_STEP();
+     M.x86.R_IP = target;
+     DECODE_CLEAR_SEGOVR();
+@@ -5013,12 +5040,14 @@
+             break;
+         case 4:         /* jmp word ptr ... */
+             destval = fetch_data_word(destoffset);
++            JMP_TRACE(M.x86.saved_cs, M.x86.saved_ip, M.x86.R_CS, destval, " WORD ");
+             TRACE_AND_STEP();
+             M.x86.R_IP = destval;
+             break;
+         case 5:         /* jmp far ptr ... */
+             destval = fetch_data_word(destoffset);
+             destval2 = fetch_data_word(destoffset + 2);
++            JMP_TRACE(M.x86.saved_cs, M.x86.saved_ip, destval2, destval, " FAR ");
+             TRACE_AND_STEP();
+             M.x86.R_IP = destval;
+             M.x86.R_CS = destval2;
+Index: sys.c
+===================================================================
+RCS file: /cvs/osdf/cvs/host/other-licence/x86emu/sys.c,v
+retrieving revision 1.1
+retrieving revision 1.2
+diff -u -u -r1.1 -r1.2
+--- sys.c	7 Sep 2007 10:01:21 -0000	1.1
++++ sys.c	7 Sep 2007 10:03:13 -0000	1.2
+@@ -45,11 +45,6 @@
+ #include <x86emu/regs.h>
+ #include "debug.h"
+ #include "prim_ops.h"
+-#ifdef LINUXBIOS_VERSION
+-#include "io.h"
+-#else
+-#include <sys/io.h>
+-#endif
+ 
+ #ifdef IN_MODULE
+ #include "xf86_ansic.h"
+@@ -220,7 +215,7 @@
+ {
+ 	DB(if (DEBUG_IO_TRACE())
+ 		printk("inb %#04x \n", addr);)
+-	return inb(addr);
++	return 0;
+ }
+ 
+ /****************************************************************************
+@@ -235,7 +230,7 @@
+ {
+ 	DB(if (DEBUG_IO_TRACE())
+ 		printk("inw %#04x \n", addr);)
+-	return inw(addr);
++	return 0;
+ }
+ 
+ /****************************************************************************
+@@ -250,7 +245,7 @@
+ {
+ 	DB(if (DEBUG_IO_TRACE())
+ 		printk("inl %#04x \n", addr);)
+-	return inl(addr);
++	return 0;
+ }
+ 
+ /****************************************************************************
+@@ -264,7 +259,6 @@
+ {
+ 	DB(if (DEBUG_IO_TRACE())
+ 		printk("outb %#02x -> %#04x \n", val, addr);)
+-	outb(val, addr);
+ 	return;
+ }
+ 
+@@ -279,7 +273,6 @@
+ {
+ 	DB(if (DEBUG_IO_TRACE())
+ 		printk("outw %#04x -> %#04x \n", val, addr);)
+-	outw(val, addr);
+ 	return;
+ }
+ 
+@@ -295,7 +288,6 @@
+ 	DB(if (DEBUG_IO_TRACE())
+ 	       printk("outl %#08x -> %#04x \n", val, addr);)
+ 
+-	outl(val, addr);
+ 	return;
+ }
+ 
+@@ -405,6 +397,6 @@
+ 
+ void X86EMU_setMemBase(void *base, size_t size)
+ {
+-	M.mem_base = (int) base;
++	M.mem_base = (unsigned long) base;
+ 	M.mem_size = size;
+ }
+Index: include/x86emu/debug.h
+===================================================================
+RCS file: /cvs/osdf/cvs/host/other-licence/x86emu/include/x86emu/debug.h,v
+retrieving revision 1.1
+diff -u -u -r1.1 debug.h
+--- include/x86emu/debug.h	7 Sep 2007 10:01:21 -0000	1.1
++++ include/x86emu/debug.h	19 Oct 2007 08:29:16 -0000
+@@ -40,8 +40,6 @@
+ #ifndef __X86EMU_DEBUG_H
+ #define __X86EMU_DEBUG_H
+ 
+-//#define DEBUG 0
+-#undef DEBUG
+ /*---------------------- Macros and type definitions ----------------------*/
+ 
+ /* checks to be enabled for "runtime" */
+@@ -78,6 +76,8 @@
+ # define DEBUG_SYSINT()        	(M.x86.debug & DEBUG_SYSINT_F)
+ # define DEBUG_TRACECALL()     	(M.x86.debug & DEBUG_TRACECALL_F)
+ # define DEBUG_TRACECALLREGS() 	(M.x86.debug & DEBUG_TRACECALL_REGS_F)
++# define DEBUG_TRACEJMP()       (M.x86.debug & DEBUG_TRACEJMP_F)
++# define DEBUG_TRACEJMPREGS()   (M.x86.debug & DEBUG_TRACEJMP_REGS_F)
+ # define DEBUG_SYS()           	(M.x86.debug & DEBUG_SYS_F)
+ # define DEBUG_MEM_TRACE()     	(M.x86.debug & DEBUG_MEM_TRACE_F)
+ # define DEBUG_IO_TRACE()      	(M.x86.debug & DEBUG_IO_TRACE_F)
+@@ -96,6 +96,8 @@
+ # define DEBUG_SYSINT()        	0
+ # define DEBUG_TRACECALL()     	0
+ # define DEBUG_TRACECALLREGS() 	0
++# define DEBUG_TRACEJMP()       0
++# define DEBUG_TRACEJMPREGS()   0
+ # define DEBUG_SYS()           	0
+ # define DEBUG_MEM_TRACE()     	0
+ # define DEBUG_IO_TRACE()      	0
+@@ -174,9 +176,15 @@
+ 		x86emu_dump_regs();                                     \
+ 	if (DEBUG_TRACECALL())                                     	\
+ 		printk("%04x:%04x: %s\n",u,v,n);
++# define  JMP_TRACE(u,v,w,x,s)                                 \
++   if (DEBUG_TRACEJMPREGS()) \
++      x86emu_dump_regs(); \
++   if (DEBUG_TRACEJMP()) \
++      printk("%04x:%04x: JMP %s%04x:%04x\n", u , v, s, w, x);
+ #else
+ # define CALL_TRACE(u,v,w,x,s)
+ # define RETURN_TRACE(n,u,v)
++# define  JMP_TRACE(u,v,w,x,s)
+ #endif
+ 
+ #ifdef DEBUG
+Index: include/x86emu/regs.h
+===================================================================
+RCS file: /cvs/osdf/cvs/host/other-licence/x86emu/include/x86emu/regs.h,v
+retrieving revision 1.1
+diff -u -u -r1.1 regs.h
+--- include/x86emu/regs.h	7 Sep 2007 10:01:21 -0000	1.1
++++ include/x86emu/regs.h	19 Oct 2007 08:29:16 -0000
+@@ -274,9 +274,9 @@
+      */
+     u32                         mode;
+     volatile int                intr;   /* mask of pending interrupts */
+-	int                         debug;
++    volatile int                         debug;
+ #ifdef DEBUG
+-	int                         check;
++    int                         check;
+     u16                         saved_ip;
+     u16                         saved_cs;
+     int                         enc_pos;
+@@ -366,7 +366,7 @@
+ 
+ /* Function to log information at runtime */
+ 
+-//void	printk(const char *fmt, ...);
++void	printk(const char *fmt, ...);
+ 
+ #ifdef  __cplusplus
+ }                       			/* End of "C" linkage for C++   	*/
+Index: include/x86emu/x86emu.h
+===================================================================
+RCS file: /cvs/osdf/cvs/host/other-licence/x86emu/include/x86emu/x86emu.h,v
+retrieving revision 1.1
+diff -u -u -r1.1 x86emu.h
+--- include/x86emu/x86emu.h	7 Sep 2007 10:01:21 -0000	1.1
++++ include/x86emu/x86emu.h	19 Oct 2007 08:29:16 -0000
+@@ -42,14 +42,6 @@
+ #ifndef __X86EMU_X86EMU_H
+ #define __X86EMU_X86EMU_H
+ 
+-/* FIXME: undefine printk for the moment */
+-#ifdef LINUXBIOS_VERSION
+-#include <console.h>
+-#define printk(x...) printk(BIOS_DEBUG, x)
+-#else
+-#define printk printf
+-#endif 
+-
+ #ifdef SCITECH
+ #include "scitech.h"
+ #define	X86API	_ASMAPI
+@@ -189,6 +181,8 @@
+ #define DEBUG_TRACECALL_REGS_F  0x004000
+ #define DEBUG_DECODE_NOPRINT_F  0x008000 
+ #define DEBUG_SAVE_IP_CS_F      0x010000
++#define DEBUG_TRACEJMP_F        0x020000
++#define DEBUG_TRACEJMP_REGS_F   0x040000
+ #define DEBUG_SYS_F             (DEBUG_SVC_F|DEBUG_FS_F|DEBUG_PROC_F)
+ 
+ void 	X86EMU_trace_regs(void);
+@@ -200,5 +194,4 @@
+ #ifdef  __cplusplus
+ }                       			/* End of "C" linkage for C++   	*/
+ #endif
+-
+ #endif /* __X86EMU_X86EMU_H */
diff --git a/other-licence/x86emu/x86emu_download.sh b/other-licence/x86emu/x86emu_download.sh
new file mode 100755
index 0000000..43ca332
--- /dev/null
+++ b/other-licence/x86emu/x86emu_download.sh
@@ -0,0 +1,60 @@
+# *****************************************************************************
+# * Copyright (c) 2004, 2007 IBM Corporation
+# * All rights reserved.
+# * This program and the accompanying materials
+# * are made available under the terms of the BSD License
+# * which accompanies this distribution, and is available at
+# * http://www.opensource.org/licenses/bsd-license.php
+# *
+# * Contributors:
+# *     IBM Corporation - initial implementation
+# ****************************************************************************/
+#!/bin/bash
+
+#set -x
+#set -e
+
+SVN=`which svn`
+PATCH=`which patch`
+DIFF_FILE=./x86emu_changes.diff
+
+# check wether svn, patch, ... is available...
+
+if [ ! -x $SVN ]; then
+	echo "subversion executable not found!"
+	exit -1
+fi
+if [ ! -x $PATCH ]; then
+	echo "patch executable not found!"
+	exit -1
+fi
+if [ ! -r $DIFF_FILE ]; then
+	echo "diff file $DIFF_FILE not found!"
+	exit -1
+fi
+
+# download the x86emu sources from LinuxBIOS subversion
+
+#revision known to work...
+REV=496
+
+echo "Checking out x86emu from coreboot-v3 repository revision $REV"
+$SVN co svn://coreboot.org/repository/coreboot-v3/util/x86emu -r $REV
+
+echo "Copying files..."
+
+cp -v x86emu/x86emu/*.c .
+cp -v x86emu/x86emu/*.h include/x86emu
+cp -v x86emu/include/x86emu/*.h include/x86emu
+
+echo "Removing checked out subversion directory..."
+
+rm -rf x86emu
+
+echo "Patching files..."
+
+$PATCH -p0 < x86emu_changes.diff
+
+
+echo "done"
+exit 0
diff --git a/rtas/Makefile.inc b/rtas/Makefile.inc
index 30e8015..b7799c5 100644
--- a/rtas/Makefile.inc
+++ b/rtas/Makefile.inc
@@ -25,9 +25,9 @@ CPPFLAGS	+= -I$(RTASBRDDIR) -I$(RTASCMNDIR) \
 		  -I$(INCLCMNDIR) -I$(INCLBRDDIR) \
 		  -I$(LIBCMNDIR)/libc/include \
 		  -I$(INCLCMNDIR)/$(CPUARCH)
-ASFLAGS		=  $(PLATFORM) -Wa,-mregnames $(FLAG)
+ASFLAGS		= -Wa,-mregnames $(FLAG)
 CFLAGS		+= -g -nostdinc -ffreestanding -Wall -Wextra -O2 -msoft-float \
-		  -mno-altivec -mabi=no-altivec $(PLATFORM) $(FLAG)
+		  -mno-altivec -mabi=no-altivec $(FLAG)
 
 # Common RTAS files:
 RTAS_SRC_ASM	= reloc.S rtas_common.S rtas_entry.S rtas_term.S \
diff --git a/rtas/rtas_call.c b/rtas/rtas_call.c
index 6cc7351..a75ab96 100644
--- a/rtas/rtas_call.c
+++ b/rtas/rtas_call.c
@@ -10,7 +10,7 @@
  *     IBM Corporation - initial implementation
  *****************************************************************************/
 
-#include <types.h>
+#include <stdint.h>
 #include <rtas.h>
 #include "rtas_table.h"
 
diff --git a/slof/Makefile.inc b/slof/Makefile.inc
index 57bfce3..2bc6dad 100644
--- a/slof/Makefile.inc
+++ b/slof/Makefile.inc
@@ -85,6 +85,9 @@ paflof: $(SLOFCMNDIR)/OF.lds $(SLOFCMNDIR)/ofw.o paflof.o $(SLOFCMNDIR)/entry.o
 	$(CC) -T$(SLOFCMNDIR)/OF.lds $(SLOFCMNDIR)/ofw.o paflof.o \
 	    $(SLOFCMNDIR)/entry.o romfs.o OF.o nvramlog.o $(LLFWBRDDIR)/board_io.o \
 	    $(LLFWBRDDIR)/io_generic_lib.o $(LDFLAGS) $(SLOF_LIBS) -o $@
+	#save a copy of paflof before stripping
+	@cp $@ $@.unstripped
+	$(STRIP) -s $@
 
 paflof.o:
 	$(CC) $(CPPFLAGS) $(CFLAGS) -c -o $@ $(SLOFCMNDIR)/paflof.c
@@ -94,9 +97,6 @@ $(SLOFCMNDIR)/xvect.bin: $(SLOFCMNDIR)/lowmem.o
 	dd if=xvect.bin.tmp of=$(SLOFCMNDIR)/xvect.bin bs=256 skip=1 2>/dev/null
 	rm -f xvect.bin.tmp
 
-slof.bin: paflof 
-	$(OBJCOPY) -Obinary paflof $@ 
-
 romfs.o:
 	$(CC) $(CPPFLAGS) $(ASFLAGS) -c -o $@ $(LLFWCMNDIR)/romfs.S
 
@@ -137,7 +137,7 @@ create_OF_ffs:
 # Targets for cleaning up:
 clean_slof:
 	rm -f $(SLOFCMNDIR)/*.o $(SLOFCMNDIR)/*.bin $(SLOFCMNDIR)/*.elf
-	rm -f dict.xt board.code paflof slof.bin default-font.bin
+	rm -f dict.xt board.code paflof paflof.unstripped default-font.bin
 	rm -f $(filter %.fsi,$(OF_FFS_FILES))
 
 distclean_slof:	clean_slof
diff --git a/slof/OF.lds b/slof/OF.lds
index 44d710b..61ddd1c 100644
--- a/slof/OF.lds
+++ b/slof/OF.lds
@@ -20,10 +20,10 @@ SECTIONS
         . = 0xE100000;
         _slof_start = .;
 	. = 0x0E10C000;
+	_start_OF = .;
 	.slof.loader : { *(.slof.loader) }
 	. = 0x0E110000; /* + SIZEOF_HEADERS; */
 	_slof_text = .;
-	_start_OF = .;
 /*	.rela : { *(.rela.*) } */
 	.text : { *(.entry_text) *(.text) } = 0x60000000
 	_slof_text_end = .;
diff --git a/slof/engine.in b/slof/engine.in
index 3ab62da..2799c1e 100644
--- a/slof/engine.in
+++ b/slof/engine.in
@@ -102,7 +102,7 @@ col(-ROLL DUP ?DUP 0BRANCH(9) >R ROT R> SWAP >R 1 - BRANCH(-12) ?DUP 0BRANCH(6)
 col(2>R R> ROT >R SWAP >R >R)
 col(2R> R> R> R> ROT >R SWAP)
 col(2R@ R> R> R@ OVER >R ROT >R SWAP)
-
+cod(?PICK)
 
 // Arithmetic.
 col(2* 1 LSHIFT)
@@ -135,7 +135,6 @@ col(U>= U< 0=)
 col(WITHIN ROT DUP ROT >= 0BRANCH(3) 2DROP FALSE EXIT > 0BRANCH(2) FALSE EXIT TRUE)
 col(BETWEEN 1 + WITHIN)
 
-
 // Double-cell single-bit shifts.
 col(D2* 2* OVER 0< - >R 2* R>)
 col(UD2/ >R U2/ R@ LIT(8*CELLSIZE-1) LSHIFT OR R> U2/)
diff --git a/slof/fs/base.fs b/slof/fs/base.fs
index 9327e53..ab8cf39 100644
--- a/slof/fs/base.fs
+++ b/slof/fs/base.fs
@@ -14,6 +14,8 @@
 \ Words missing in *.in files
 VARIABLE mask -1 mask !
 
+VARIABLE huge-tftp-load 0 huge-tftp-load !
+
 : default-hw-exception s" Exception #" type . ;
 
 ' default-hw-exception to hw-exception-handler
diff --git a/slof/fs/boot.fs b/slof/fs/boot.fs
index ded2b0e..6c20c5f 100644
--- a/slof/fs/boot.fs
+++ b/slof/fs/boot.fs
@@ -133,7 +133,10 @@ defer go ( -- )
 
 
 : do-load ( devstr len -- img-size )	\ Device method wrapper
-   258 set-watchdog                     \ Set watchdog timer to 10 minutes
+                                        \ Set watchdog timer to 10 minutes, mul.
+                                        \ multiply with 2 because DHCP needs 1
+                                        \ sec. per try and add 1 min to avoid
+   4ec set-watchdog                     \ race conditions with watchdog timeout
    my-self >r current-node @ >r         \ Save my-self
    ." Trying to load: " $bootargs type ."  from: " 2dup type ."  ... "
    2dup open-dev dup IF
diff --git a/slof/fs/bootmsg.fs b/slof/fs/bootmsg.fs
index 91cef6f..7d1e9f7 100644
--- a/slof/fs/bootmsg.fs
+++ b/slof/fs/bootmsg.fs
@@ -21,7 +21,7 @@ create debugstr 255 allot
   bootmsg-cp ;
 
 : (warning) ( id level ptr len -- )
-  dup 1 + TO debuglen
+  dup TO debuglen
   debugstr swap move           \ copy into buffer
   0 debuglen debugstr + c!     \ terminate '\0'
   debugstr bootmsg-warning
@@ -38,7 +38,7 @@ create debugstr 255 allot
 ; immediate
 
 : (debug-cp) ( id level ptr len -- )
-  dup 1 + TO debuglen
+  dup TO debuglen
   debugstr swap move           \ copy into buffer
   0 debuglen debugstr + c!     \ terminate '\0'
   debugstr bootmsg-debugcp
@@ -55,7 +55,7 @@ create debugstr 255 allot
 ; immediate
 
 : (error) ( id ptr len -- )
-  dup 1 + TO debuglen
+  dup TO debuglen
   debugstr swap move           \ copy into buffer
   0 debuglen debugstr + c!     \ terminate '\0'
   debugstr bootmsg-error
diff --git a/slof/fs/client.fs b/slof/fs/client.fs
index 01c4686..ffd4cdb 100644
--- a/slof/fs/client.fs
+++ b/slof/fs/client.fs
@@ -117,9 +117,15 @@ ALSO client-voc DEFINITIONS
   zcount rot get-property 0= IF nip ELSE -1 THEN ;
 
 : setprop ( phandle zstr buf len -- size|-1 )
-  dup >r here dup >r swap dup allot move r> r>
-  dup >r 2swap swap current-node @ >r set-node
-  zcount property r> set-node r> ;
+   dup >r            \ save len
+   encode-bytes      ( phandle zstr prop-addr prop-len )
+   2swap zcount rot  ( prop-addr prop-len name-addr name-len phandle )
+   current-node @ >r \ save current node
+   set-node          \ change to specified node
+   property          \ set property
+   r> set-node       \ restore original node
+   r>                \ always return size, because we can not fail.
+;
 
 \ VERY HACKISH
 : canon ( zstr buf len -- len' )
diff --git a/slof/fs/elf.fs b/slof/fs/elf.fs
index f7edf76..d60df34 100644
--- a/slof/fs/elf.fs
+++ b/slof/fs/elf.fs
@@ -106,6 +106,17 @@ false value elf-claim?
     2drop
 ;
 
+: claim-segment64 ( file-addr program-header-addr -- )
+    elf-claim? IF
+       >r
+       here last-claim , to last-claim                \ Setup ptr to last claim
+       \ Put addr and size ain the data space
+       r@ phdr64>p_vaddr @ dup , r> phdr64>p_memsz @ dup , ( file-addr addr size )
+       0 ['] claim CATCH IF ABORT" Memory for ELF file already in use " THEN
+    THEN
+    2drop
+;
+
 : load-segment ( file-addr program-header-addr -- )
   >r
   ( file-addr  R: program-header-addr )
@@ -175,7 +186,7 @@ false value elf-claim?
       dup phdr64>p_type l@ 1 = IF	  \ PT_LOAD ?
 
   ( file-addr program-header-addr )
-        2dup claim-segment	  \ claim segment
+        2dup claim-segment64	          \ claim segment
 
   ( file-addr program-header-addr )
         2dup load-segment64 THEN	  \ copy segment
diff --git a/slof/fs/envvar.fs b/slof/fs/envvar.fs
index de96e43..9542bed 100644
--- a/slof/fs/envvar.fs
+++ b/slof/fs/envvar.fs
@@ -20,12 +20,15 @@ wordlist CONSTANT envvars
 
 \ create a definition in  envvars
 : create-env ( "name" -- )
-   get-current  envvars set-current  CREATE  set-current ;
+   get-current  envvars set-current  CREATE  set-current
+;
 
 \ lay out the data for the separate envvar types
 : env-int ( n -- )  1 c, align , DOES> char+ aligned @ ;
-: env-bytes ( a len -- )  2 c, align dup , here swap dup allot move
-   DOES> char+ aligned dup @ >r cell+ r> ;
+: env-bytes ( a len -- )
+   2 c, align dup , here swap dup allot move
+   DOES> char+ aligned dup @ >r cell+ r>
+;
 : env-string ( str len -- )  3 c, string, DOES> char+ count ;
 : env-flag ( f -- )  4 c, c, DOES> char+ c@ 0<> ;
 : env-secmode ( sm -- )  5 c, c, DOES> char+ c@ ;
@@ -38,26 +41,31 @@ wordlist CONSTANT envvars
 : default-secmode ( sm "name" -- )  create-env env-secmode ;
 
 : set-option ( option-name len option len -- )
-  2swap encode-string
-  2swap s" /options" find-node dup IF set-property ELSE drop 2drop 2drop THEN ;
+   2swap encode-string
+   2swap s" /options" find-node dup IF set-property ELSE drop 2drop 2drop THEN
+;
 
 \ find an envvar's current and default value, and its type
 : findenv ( name len -- adr def-adr type | 0 )
    2dup envvars voc-find dup 0<> IF ( ABORT" not a configuration variable" )
-   link> >body char+ >r (find-order) link> >body dup char+ swap c@ r> swap
-   else nip nip THEN ;
+      link> >body char+ >r (find-order) link> >body dup char+ swap c@ r> swap
+   ELSE
+      nip nip
+   THEN
+;
 
 : test-flag ( param len -- true | false )
-  2dup s" true" string=ci -rot s" false" string=ci or
-  ;
+   2dup s" true" string=ci -rot s" false" string=ci or
+;
 
 : test-secmode ( param len -- true | false )
-  2dup s" none" string=ci -rot 2dup s" command" string=ci -rot s" full"
-  string=ci or or
-  ;
+   2dup s" none" string=ci -rot 2dup s" command" string=ci -rot s" full"
+   string=ci or or
+;
 
 : isdigit ( char -- true | false )
-  30 39 between ;
+   30 39 between
+;
 
 : test-int ( param len -- true | false )
   drop c@ isdigit if true else false then ;
@@ -73,8 +81,8 @@ wordlist CONSTANT envvars
 ;
 
 : findtype ( param len name len -- param len name len type )
-  2dup findenv dup 0= \ try to find type of envvar
-  IF             \ no type found
+   2dup findenv dup 0= \ try to find type of envvar
+   IF             \ no type found
     drop 2swap
     2dup test-flag if 4 -rot else
     2dup test-secmode if 5 -rot else
@@ -94,30 +102,30 @@ wordlist CONSTANT envvars
    4dup set-option
    findtype dup 0=
    IF
-     true ABORT" not a configuration variable"
+      true ABORT" not a configuration variable"
    ELSE
-     -rot $CREATE CASE
-     1 OF evaluate env-int ENDOF \ XXX: wants decimal and 0x...
-     \ Since we don't have 0x for hexnumbers, we need to find out the type ...
-     2 OF
-        2dup                    ( param len param len )
-        depth >r                ( param len param len  R: depth-before )
-        ['] evaluate CATCH IF   \ Catch 'unknown Forth words'...
-           ( param len param' len'  R: depth-before )
-           2drop  r> drop
-           env-string           \ and encode 'unknown word' as string
-        ELSE
-           ( param len [...evaluated results...]  R: depth-before )
-           \ If EVALUATE placed two items on the stack, use env-bytes,
-           \ for one item use env-int:
-           depth r> = IF env-bytes ELSE env-int THEN
-           2drop
-        THEN
-     ENDOF
-     3 OF env-string ENDOF
-     4 OF evaluate env-flag ENDOF
-     5 OF evaluate env-secmode ENDOF \ XXX: recognize none, command, full
-     ENDCASE
+      -rot $CREATE CASE
+      1 OF evaluate env-int ENDOF \ XXX: wants decimal and 0x...
+      \ Since we don't have 0x for hexnumbers, we need to find out the type ...
+      2 OF
+         2dup                    ( param len param len )
+         depth >r                ( param len param len  R: depth-before )
+         ['] evaluate CATCH IF   \ Catch 'unknown Forth words'...
+            ( param len param' len'  R: depth-before )
+            2drop  r> drop
+            env-string           \ and encode 'unknown word' as string
+         ELSE
+            ( param len [...evaluated results...]  R: depth-before )
+            \ If EVALUATE placed two items on the stack, use env-bytes,
+            \ for one item use env-int:
+            depth r> = IF env-bytes ELSE env-int THEN
+            2drop
+         THEN
+      ENDOF
+      3 OF env-string ENDOF
+      4 OF evaluate env-flag ENDOF
+      5 OF evaluate env-secmode ENDOF \ XXX: recognize none, command, full
+      ENDCASE
    THEN
 ;
 
@@ -132,11 +140,14 @@ wordlist CONSTANT envvars
    3 OF count type ENDOF
    4 OF c@ IF ." true" ELSE ." false" THEN ENDOF
    5 OF c@ . ENDOF \ XXX: print symbolically
-   ENDCASE ;
+   ENDCASE
+;
 
-: .printenv-header cr
-  s" ---environment variable--------current value-------------default value------"
-  type cr ;
+: .printenv-header ( -- )
+   cr
+   s" ---environment variable--------current value-------------default value------"
+   type cr
+;
 
 DEFER old-emit
 0 VALUE emit-counter
@@ -144,33 +155,43 @@ DEFER old-emit
 : emit-and-count emit-counter 1 + to emit-counter old-emit ;
 
 : .enable-emit-counter
-  0 to emit-counter
-  ['] emit behavior to old-emit
-  ['] emit-and-count to emit ;
+   0 to emit-counter
+   ['] emit behavior to old-emit
+   ['] emit-and-count to emit
+;
 
 : .disable-emit-counter
-  ['] old-emit behavior to emit ;
+   ['] old-emit behavior to emit
+;
 
-: .spaces dup 0 > IF spaces ELSE
-  drop space THEN ;
+: .spaces
+   dup 0 > IF spaces ELSE
+   drop space THEN
+;
 
-: .print-one-env 3 .spaces
-  2dup dup -rot type 1c swap - .spaces
-  findenv rot over
-  .enable-emit-counter
-  (printenv) .disable-emit-counter
-  1a emit-counter - .spaces
-  (printenv) ;
+: .print-one-env
+   3 .spaces
+   2dup dup -rot type 1c swap - .spaces
+   findenv rot over
+   .enable-emit-counter
+   (printenv) .disable-emit-counter
+   1a emit-counter - .spaces
+   (printenv)
+;
 
-: .print-all-env .printenv-header
-  envvars cell+ BEGIN @ dup WHILE dup link> >name
-  name>string .print-one-env cr REPEAT drop ;
+: .print-all-env
+   .printenv-header
+   envvars cell+ BEGIN @ dup WHILE dup link> >name
+   name>string .print-one-env cr REPEAT drop
+;
 
-: printenv parse-word dup 0= IF
-  2drop .print-all-env ELSE findenv dup 0=
-  ABORT" not a configuration variable"
-  rot over cr ." Current: " (printenv)
-  cr ." Default: " (printenv) THEN ;
+: printenv
+   parse-word dup 0= IF
+   2drop .print-all-env ELSE findenv dup 0=
+   ABORT" not a configuration variable"
+   rot over cr ." Current: " (printenv)
+   cr ." Default: " (printenv) THEN
+;
 
 \ set envvar(s) to default value
 : (set-default)  ( def-xt -- )
@@ -179,11 +200,19 @@ DEFER old-emit
    2 OF env-bytes ENDOF
    3 OF env-string ENDOF
    4 OF env-flag ENDOF
-   5 OF env-secmode ENDOF ENDCASE ;
-: set-default  parse-word envvars voc-find
-    dup 0= ABORT" not a configuration variable" link> (set-default) ;
-: set-defaults  envvars cell+ BEGIN @ dup WHILE dup link> (set-default) REPEAT
-                drop ;
+   5 OF env-secmode ENDOF ENDCASE
+;
+
+: set-default
+   parse-word envvars voc-find
+   dup 0= ABORT" not a configuration variable" link> (set-default)
+;
+
+: set-defaults
+   envvars cell+
+   BEGIN @ dup WHILE dup link> (set-default) REPEAT
+   drop
+;
 
 \ the defaults
 \ some of those are platform dependent, and should e.g. be
@@ -226,23 +255,30 @@ VARIABLE nvoff \  70 get-header 2drop nvoff !
    3 OF count type ENDOF
    4 OF c@ IF ." true" ELSE ." false" THEN ENDOF
    5 OF c@ . ENDOF \ XXX: print symbolically
-   ENDCASE ;
+   ENDCASE
+;
+
 : nvupdate-one   ( def-xt -- )
-  >name name>string
-  ( ." setenv " 2dup type space ) \ Old Implementation
-  2dup type s" =" type
-  findenv nip (nvupdate-one)
-  ( cr ) \ Old Implementation
-  0 emit
-  ;
+   >name name>string
+   ( ." setenv " 2dup type space ) \ Old Implementation
+   2dup type s" =" type
+   findenv nip (nvupdate-one)
+   ( cr ) \ Old Implementation
+   0 emit
+;
 
-: (nvupdate)  envvars cell+ BEGIN @ dup WHILE dup link> nvupdate-one REPEAT
-              drop ;
+: (nvupdate)
+   envvars cell+
+   BEGIN @ dup WHILE dup link> nvupdate-one REPEAT
+   drop
+;
 
 : nvemit  nvoff @ rb! 1 nvoff +! 0 nvoff @ rb! ;
+
 : nvupdate
-  70 get-header 2drop nvoff !
-  ['] emit behavior  ['] nvemit to emit  (nvupdate)  to emit ;
+   70 get-header 2drop nvoff !
+   ['] emit behavior  ['] nvemit to emit  (nvupdate)  to emit
+;
 
 
 
@@ -299,102 +335,102 @@ get-nv
 
 
 : (nv-findalias) ( alias-ptr alias-len -- pos )
-  \ create a temporary empty string
-  here 0
-  \ append "devalias " to the temporary string
-  s" devalias " string-cat
-  \ append "<name-str>" to the temporary string
-  3 pick 3 pick string-cat
-  \ append a SPACE character to the temporary string
-  s"  " string-cat
-  \ get nvramrc
-  s" nvramrc" evaluate
-  \ get position of the temporary string inside of nvramrc
-  2swap find-substr
-  nip nip
+   \ create a temporary empty string
+   here 0
+   \ append "devalias " to the temporary string
+   s" devalias " string-cat
+   \ append "<name-str>" to the temporary string
+   3 pick 3 pick string-cat
+   \ append a SPACE character to the temporary string
+   s"  " string-cat
+   \ get nvramrc
+   s" nvramrc" evaluate
+   \ get position of the temporary string inside of nvramrc
+   2swap find-substr
+   nip nip
 ;
 
 : (nv-build-real-entry) ( name-ptr name-len dev-ptr dev-len -- str-ptr str-len )
-  \ create a temporary empty string
-  2swap here 0
-  \ append "devalias " to the temporary string
-  s" devalias " string-cat
-  \ append "<name-ptr>" to the temporary string
-  2swap string-cat
-  \ append a SPACE character to the temporary string
-  s"  " string-cat
-  \ append "<dev-ptr> to the temporary string
-  2swap string-cat
-  \ append a CR character to the temporary string
-  0d char-cat
-  \ append a LF character to the temporary string
-  0a char-cat   
+   \ create a temporary empty string
+   2swap here 0
+   \ append "devalias " to the temporary string
+   s" devalias " string-cat
+   \ append "<name-ptr>" to the temporary string
+   2swap string-cat
+   \ append a SPACE character to the temporary string
+   s"  " string-cat
+   \ append "<dev-ptr> to the temporary string
+   2swap string-cat
+   \ append a CR character to the temporary string
+   0d char-cat
+   \ append a LF character to the temporary string
+   0a char-cat
 ;
 
 : (nv-build-null-entry) ( name-ptr name-len dev-ptr dev-len -- str-ptr str-len )
-  4drop here 0
+   4drop here 0
 ;
 
 : (nv-build-nvramrc) ( name-str name-len dev-str dev-len xt-build-entry -- )
-  \ *** PART 1: check if there is still an alias definition available ***
-  ( alias-ptr alias-len path-ptr path-ptr call-build-entry alias-pos )
-  4 pick 4 pick (nv-findalias)
-  \ if our alias definition is a new one
-  dup s" nvramrc" evaluate nip >= IF
-    \ call-build-entry
-    drop execute
-    \ append content of "nvramrc" to the temporary string
-    s" nvramrc" evaluate string-cat
-    \ Allocate the temporary string
-     dup allot
-    \ write the string into nvramrc
-    s" nvramrc" $setenv
-  ELSE  \ if our alias is still defined in nvramrc
-    \ *** PART 2: calculate the memory size for the new content of nvramrc ***
-    \ add number of bytes needed for nvramrc-prefix to number of bytes needed
-    \ for the new entry
-    5 pick 5 pick 5 pick 5 pick 5 pick execute nip over +
-    ( alias-ptr alias-len path-ptr path-ptr build-entry-xt alias-pos tmp-len )
-    \ add number of bytes needed for nvramrc-postfix
-    s" nvramrc" evaluate 3 pick string-at
-    2dup find-nextline string-at nip +
-    \ *** PART 3: build the new content ***
-    \ allocate enough memory for new content
-    alloc-mem 0
-    ( alias-ptr alias-len path-ptr path-ptr build-entry-xt alias-pos mem len )
-    \ add nvramrc-prefix
-    s" nvramrc" evaluate drop 3 pick string-cat
-    \ add new entry
-    rot >r >r >r execute r> r> 2swap string-cat
-    ( mem, len ) ( R: alias-pos )
-    \ add nvramrc-postfix
-    s" nvramrc" evaluate r> string-at
-    2dup find-nextline string-at string-cat
-    ( mem len )
-    \ write the temporary string into nvramrc and clean up memory
-    2dup s" nvramrc" $setenv free-mem
-  THEN
+   \ *** PART 1: check if there is still an alias definition available ***
+   ( alias-ptr alias-len path-ptr path-ptr call-build-entry alias-pos )
+   4 pick 4 pick (nv-findalias)
+   \ if our alias definition is a new one
+   dup s" nvramrc" evaluate nip >= IF
+      \ call-build-entry
+      drop execute
+      \ append content of "nvramrc" to the temporary string
+      s" nvramrc" evaluate string-cat
+      \ Allocate the temporary string
+      dup allot
+      \ write the string into nvramrc
+      s" nvramrc" $setenv
+   ELSE  \ if our alias is still defined in nvramrc
+      \ *** PART 2: calculate the memory size for the new content of nvramrc ***
+      \ add number of bytes needed for nvramrc-prefix to number of bytes needed
+      \ for the new entry
+      5 pick 5 pick 5 pick 5 pick 5 pick execute nip over +
+      ( alias-ptr alias-len path-ptr path-ptr build-entry-xt alias-pos tmp-len )
+      \ add number of bytes needed for nvramrc-postfix
+      s" nvramrc" evaluate 3 pick string-at
+      2dup find-nextline string-at nip +
+      \ *** PART 3: build the new content ***
+      \ allocate enough memory for new content
+      alloc-mem 0
+      ( alias-ptr alias-len path-ptr path-ptr build-entry-xt alias-pos mem len )
+      \ add nvramrc-prefix
+      s" nvramrc" evaluate drop 3 pick string-cat
+      \ add new entry
+      rot >r >r >r execute r> r> 2swap string-cat
+      ( mem, len ) ( R: alias-pos )
+      \ add nvramrc-postfix
+      s" nvramrc" evaluate r> string-at
+      2dup find-nextline string-at string-cat
+      ( mem len )
+      \ write the temporary string into nvramrc and clean up memory
+      2dup s" nvramrc" $setenv free-mem
+   THEN
 ;
 
 : $nvalias ( name-str name-len dev-str dev-len -- )
-  4dup ['] (nv-build-real-entry) (nv-build-nvramrc)
-  set-alias
-  s" true" s" use-nvramrc?" $setenv
-  nvupdate
+   4dup ['] (nv-build-real-entry) (nv-build-nvramrc)
+   set-alias
+   s" true" s" use-nvramrc?" $setenv
+   nvupdate
 ;
 
 : nvalias ( "alias-name< >device-specifier<eol>" -- )
-  parse-word parse-word $nvalias
+   parse-word parse-word $nvalias
 ;
 
 : $nvunalias ( name-str name-len -- )
-  s" " ['] (nv-build-null-entry) (nv-build-nvramrc)
-  nvupdate
+   s" " ['] (nv-build-null-entry) (nv-build-nvramrc)
+   nvupdate
 ;
 
 : nvunalias ( "alias-name< >" -- )
-  parse-word $nvunalias
+   parse-word $nvunalias
 ;
 
-: diagnostic-mode? diag-switch? ;
+: diagnostic-mode? ( -- diag-switch? ) diag-switch? ;
 
diff --git a/slof/fs/node.fs b/slof/fs/node.fs
index 4ae52b0..b632d65 100644
--- a/slof/fs/node.fs
+++ b/slof/fs/node.fs
@@ -432,232 +432,5 @@ VARIABLE interpose-node
   find-package IF open-package ELSE 2drop false THEN ;
 
 
-\ Pseudocode in C Syntax
-\ if((addr>=child)&&(addr<=child+size)
-\    return (addr - child) + parent
-\ else return false
-\
-: translate-range ( child parent size addr -- taddr true | addr false )
-    swap 3 pick + over                    \ calculate child+size address
-    ( child parent size addr child+size )
-    > IF                                  \ verify if addr is below child+size address
-        ( child parent addr )
-        2 pick over                       \ fetch child and addr for compare
-        ( child parend addr child addr )
-        <= IF                             \ verify if addr is above child address
-            ( child parent addr )
-            2 pick - + nip true           \ pick child, calculate addr-child + parent, drop child and return true
-            ( taddr true )
-        ELSE
-            2drop false                   \ drop child parent size and return false
-            ( addr false )
-        THEN
-    ELSE
-        ( child parent addr )
-        nip nip false                     \ drop child parent size and return false
-        ( addr false )
-    THEN
-;
-
-\ helper function based on decode-int to decode an integer property
-\ from a prop-encoded-array
-\ my-property cannot be used since this depends on a current instance
-: get-property-decoded ( addr len -- n )
-  get-node get-property
-  IF cr cr cr ." get-property-decoded: no such property" EXIT THEN decode-int nip nip
-;
-
-0 VALUE pci-phys-hi
-1C000000 CONSTANT pci-stop-mapping-code
-\ Explanation to pci-stop-mapping-code:
-\   Bits 26..28 are unsused in phys.hi in the IEEE 1275 PCI binding
-\   and set to 0. Use value where these bits are set in pci-phys-hi to communicate that
-\   translation sould stop.
-
-\ Helper function to extract one element of the child parent size tuple coded
-\ into the ranges properties array, element being exactly one of child, parent
-\ and size
-: extract-range-element ( ranges-addr ranges-len #cells -- element ranges-addr' ranges-len' )
-    \  -rot decode-int 3 roll 1 > IF 20 lshift -rot decode-int 3 roll + THEN -rot
-    CASE
-        1 OF decode-int -rot ENDOF
-        2 OF decode-int 20 lshift -rot decode-int 3 roll + -rot ENDOF
-        3 OF
-            BEGIN
-                dup 0= IF
-                    false                                        ( ranges-addr ranges-len false )
-                ELSE
-                    decode-int
-                    pci-phys-hi   \ for PCI phys.hi lies on the stack below addr
-                    space-code-mask and
-                    <> \ compare phys.hi
-                THEN
-            WHILE
-                \ discard phys.mid, phys.lo, parent, and size values. Then go to next PCI ranges tuple
-                    18 dup -rot - -rot + swap
-            REPEAT
-
-            dup 0= IF                                            ( ranges-addr ranges-len )
-                pci-stop-mapping-code to pci-phys-hi             ( ranges-addr ranges-len )
-            ELSE
-                \ ranges size >= 8, since phys.hi
-                \ was read in ELSE of WHILE condition
-                decode-int 20 lshift -rot decode-int 3 roll + -rot
-            THEN
-        ENDOF
-    ENDCASE
-;
-
-\ Function to convert a whole child parent size sequence into decoded-int format
-: extract-range ( ranges-addr ranges-len -- child parent size ranges-addr' ranges-len' )
-    \ child
-    s" #address-cells" get-property-decoded
-    extract-range-element
-    \ exit criterium for PCI: ranges-len is 0 and false on top of stack
-    pci-phys-hi pci-stop-mapping-code = IF EXIT THEN    ( ranges-addr ranges-len )
-
-    \ parent                                            ( child ranges-addr' ranges-len' )
-    decode-phys                                         ( child ranges-addr" ranges-len" phys.lo .. phys.hi )
-    my-#address-cells 1 > IF 20 lshift + THEN           ( child ranges-addr''' ranges-len''' parent )
-    -rot                                                ( child parent ranges-addr''' ranges-len''' )
-
-    \ size
-    s" #size-cells" get-property-decoded                ( child parent ranges-addr''' ranges-len''' #size-cells )
-    extract-range-element                               ( child parent size ranges-addr"" ranges-len"" )
-;
-
-\ Function to process a whole array one or more of child parent size sequences
-\ Prerequisite: Empty ranges handing is assumed to already exist.
-: translate-ranges-node ( addr ranges-addr ranges-len -- taddr true|false )
-    BEGIN
-        dup 0 >                         \ ranges-len > 0
-    WHILE
-        extract-range
-        pci-phys-hi pci-stop-mapping-code =
-        IF                                              ( addr ranges-addr ranges-len )
-            nip nip EXIT                                ( false )
-        THEN
-        ( addr child parent size ranges-addr' ranges-len' )
-        2rot                                            ( parent size ranges-addr' ranges-len' addr child )
-        5 roll                                          ( size ranges-addr' ranges-len' addr child parent )
-        5 roll                                          ( ranges-addr' ranges-len' addr child parent size )
-        3 roll                                          ( ranges-addr' ranges-len' child parent size addr )
-        translate-range                 ( ranges-addr' ranges-len' taddr true | ranges-addr' ranges-len' addr false )
-        IF nip nip true EXIT
-        ELSE ( ranges-addr' ranges-len' addr )
-            -rot
-            ( addr ranges-addr' ranges-len' )
-        THEN
-    REPEAT
-    ( ranges-addr' ranges-len' taddr true | ranges-addr' ranges-len' false )
-    \ remove  addr ranges-addr' ranges-len' from stack
-    nip nip \ leaving the 0 ranges-len' as false
-    ( false )
-;
-
-\ Helper function to search the first ranges in current node or one of its parents
-\ and make that node the 'current node'
-\ Prerequisite: root node must have a ranges property
-\ Returns address, length, true if ranges property was found, otherwise false.
-: translate-set-to-next-ranges-node ( -- addr-ranges len-ranges true|false )
-    s" ranges" 2dup get-node get-property
-    IF
-        ( addr len true )
-        get-parent dup set-node get-property
-        IF
-            cr cr cr
-            s" no translatable address space due to missing ranges property" type
-            cr cr cr
-            false
-        ELSE
-            true
-        THEN
-    ELSE
-        ( addr len addr-ranges len-ranges )
-        rot drop rot drop true
-    THEN
-    ( ranges-addr ranges-len true|false )
-;
-
-: translate-address-end ( phandle-start taddr true|phandle-start false )
-    \ get back to the node where translation was started
-    dup IF
-        rot                                               ( taddr true phandle-start )
-        set-node                                          ( taddr true )
-    ELSE
-        swap                                              ( phandle-start false )
-        set-node                                          ( false )
-    THEN
-;
-
-\ Function to step up the device tree up to the root node.
-\ Contains empty ranges handling.
-\ Returns the translated address and true, when the address is translatable, otherwise false.
-: translate-ranges ( addr -- taddr true|false )
-    BEGIN
-        \ set-node semantic required here to continue from nodes found below.
-        translate-set-to-next-ranges-node
-        not IF false EXIT THEN ( false )   \ address is not translatable
-                                                 \ due to missing ranges property in the hierarchy.
-        ( phandle-start addr ranges-addr ranges-len )
-        dup 0=
-        IF
-            \ empty ranges property detected, assume 1 : 1 translation
-            2drop true
-            ( phandle-start addr true )
-        ELSE
-            ( phandle-start addr ranges-addr ranges-len )
-            translate-ranges-node
-            ( phandle-start taddr true|phandle-start false )
-        THEN
-        dup IF
-            ( phandle-start taddr true )      \ found a translation
-            drop
-            get-parent
-            dup 0=
-            IF                                \ arrived at root node, stop translation
-                drop true dup
-                ( phandle-start taddr true true )
-            ELSE
-                \ go to parent and continue
-                set-node false
-                ( phandle-start taddr true phandle-parent false )
-            THEN
-        ELSE
-            true                              \ address translation failed, exit loop
-            ( phandle-start false true )
-        THEN
-    UNTIL
-    ( phandle-start taddr true|phandle-start false )
-;
-
-
-: translate-address-back-to-start-node ( phandle-start taddr true|phandle-start false )
-    \ get back to the node where translation was started
-    dup IF
-        rot                                               ( taddr true phandle-start )
-        set-node                                          ( taddr true )
-    ELSE
-        swap                                              ( phandle-start false )
-        set-node                                          ( false )
-    THEN
-;
-
-: translate-address ( addr -- taddr true|false )
-    get-node swap         \ save current node             ( phandle-start addr  )
-    translate-ranges                                      ( phandle-start taddr true|phandle-start false )
-    translate-address-back-to-start-node                  ( taddr true|false )
-;
-
-
-: translate-address-pci ( phys.lo phys.mid phys.hi -- taddr true|false )
-    to pci-phys-hi                                        ( phys.lo phys.mid )
-    lxjoin                                                ( phys.addr )
-    get-node              \ save current node             ( phys.addr phandle-start )
-    swap                                                  ( phandle-start phys.addr )
-    translate-ranges      \ fetches phys.hi for PCI       ( phandle-start taddr true|phandle-start false )
-    translate-address-back-to-start-node                  ( taddr true|false )
-;
-
 \ device tree translate-address
 #include <translate.fs>
diff --git a/slof/fs/packages/disk-label.fs b/slof/fs/packages/disk-label.fs
index 08761fd..6079555 100644
--- a/slof/fs/packages/disk-label.fs
+++ b/slof/fs/packages/disk-label.fs
@@ -11,200 +11,332 @@
 \ ****************************************************************************/
 
 
+\ Set debug-disk-label? to true to get debug messages for the disk-label code.
+false VALUE debug-disk-label?
+
+\ This value defines the maximum number of blocks (512b) to load from a PREP
+\ partition. This is required to keep the load time in reasonable limits if the
+\ PREP partition becomes big.
+\ If we ever want to put a large kernel with initramfs from a PREP partition
+\ we might need to increase this value. The default value is 16384 blocks (8MB)
+d# 16384 value max-prep-partition-blocks
+
 s" disk-label" device-name
 
-INSTANCE VARIABLE partition
-INSTANCE VARIABLE part-offset
-INSTANCE VARIABLE block-size
-INSTANCE VARIABLE block
-INSTANCE VARIABLE args
-INSTANCE VARIABLE args-len
+0 INSTANCE VALUE partition
+0 INSTANCE VALUE part-offset
+
+0 INSTANCE VALUE part-start
+0 INSTANCE VALUE lpart-start
+0 INSTANCE VALUE part-size
+0 INSTANCE VALUE dos-logical-partitions
+
+0 INSTANCE VALUE block-size
+0 INSTANCE VALUE block
+
+0 INSTANCE VALUE args
+0 INSTANCE VALUE args-len
+
 
 INSTANCE VARIABLE block#  \ variable to store logical sector#
 INSTANCE VARIABLE hit#    \ partition counter
 INSTANCE VARIABLE success-flag
+
+\ ISO9660 specific information
 0ff constant END-OF-DESC
 3 constant  PARTITION-ID
 48 constant VOL-PART-LOC
 
-: seek  lxjoin part-offset @ + xlsplit s" seek" $call-parent ;
-: read  s" read" $call-parent ;
 
-: init-block ( -- )
-  s" block-size" ['] $call-parent CATCH IF ABORT" no block-size" THEN
-  block-size !
-  block-size @ alloc-mem  dup block-size @ erase  block ! ;
+\ DOS partition label (MBR) specific structures
 
-: parse-partition ( -- okay? )
-  0 part-offset !  0 partition !  my-args args-len ! args !
+STRUCT
+       1b8 field mbr>boot-loader
+        /l field mbr>disk-signature
+        /w field mbr>null
+        40 field mbr>partition-table
+        /w field mbr>magic
 
-  \ Fix up the "0" thing yaboot does.
-  args-len @ 1 = IF args @ c@ [char] 0 = IF 0 args-len ! THEN THEN
+CONSTANT /mbr
 
-  \ Check for "full disk" arguments.
-  my-args [char] , findchar 0= IF true EXIT THEN drop \ no comma
-  my-args [char] , split args-len ! args !
-  dup 0= IF 2drop true EXIT THEN \ no first argument
+STRUCT
+        /c field part-entry>active
+        /c field part-entry>start-head
+        /c field part-entry>start-sect
+        /c field part-entry>start-cyl
+        /c field part-entry>id
+        /c field part-entry>end-head
+        /c field part-entry>end-sect
+        /c field part-entry>end-cyl
+        /l field part-entry>sector-offset
+        /l field part-entry>sector-count
 
-  \ Check partition #.
-  base @ >r decimal $number r> base !
-  IF cr ." Not a partition #" false EXIT THEN
+CONSTANT /partition-entry
 
-  \ Store part #, done.
-  partition !  true ;
 
-: try-dos-partition ( -- okay? )
-  partition @ 1 5 within 0= IF cr ." Partition # not 1-4" false EXIT THEN
+\ Defined by IEEE 1275-1994 (3.8.1)
 
-  \ Read partition table.
-  0 0 seek drop  block @ block-size @ read drop
-  block @ 1fe + 2c@ bwjoin aa55 <> IF cr ." No partitions" false EXIT THEN
+: offset ( d.rel -- d.abs )
+   part-offset 0 d+
+;
 
-  \ Could/should check for valid partition here...  aa55 is not enough really.
+: seek  ( pos.lo pos.hi -- status )
+   offset
+   debug-disk-label? IF 2dup ." seek-parent: pos.hi=0x" u. ." pos.lo=0x" u. THEN
+   s" seek" $call-parent
+   debug-disk-label? IF dup ." status=" . cr THEN
+;
 
-  \ Get the partition offset.
-  partition @ 10 * 1b6 + block @ + 4c@ bljoin  block-size @ * part-offset !
-  true ;
+: read ( addr len -- actual )
+   debug-disk-label? IF 2dup swap ." read-parent: addr=0x" u. ." len=" .d THEN
+   s" read" $call-parent
+   debug-disk-label? IF dup ." actual=" .d cr THEN
+;
 
-\ Check for an ISO-9660 filesystem on the disk
-\ : try-iso9660-partition ( -- true|false )
-\ implement me if you can ;-)
-\ ;
 
+\ read sector to array "block"
+: read-sector ( sector-number -- )
+   \ block-size is 0x200 on disks, 0x800 on cdrom drives
+   block-size * 0 seek drop      \ seek to sector
+   block block-size read drop    \ read sector
+;
 
-\ Check for an ISO-9660 filesystem on the disk
-\ (cf. CHRP IEEE 1275 spec., chapter 11.1.2.3)
-: has-iso9660-filesystem  ( -- TRUE|FALSE )
-   \ Seek and read starting from 16th sector:
-   10 800 * 0 seek drop
-   block @ block-size @ read drop
-   \ Check for CD-ROM volume magic:
-   block @ c@ 1 =
-   block @ 1+ 5 s" CD001"  str=
-   and
+: (.part-entry) ( part-entry )
+   cr ." part-entry>active:        " dup part-entry>active c@ .d
+   cr ." part-entry>start-head:    " dup part-entry>start-head c@ .d
+   cr ." part-entry>start-sect:    " dup part-entry>start-sect c@ .d
+   cr ." part-entry>start-cyl:     " dup part-entry>start-cyl  c@ .d
+   cr ." part-entry>id:            " dup part-entry>id c@ .d
+   cr ." part-entry>end-head:      " dup part-entry>end-head c@ .d
+   cr ." part-entry>end-sect:      " dup part-entry>end-sect c@ .d
+   cr ." part-entry>end-cyl:       " dup part-entry>end-cyl c@ .d
+   cr ." part-entry>sector-offset: " dup part-entry>sector-offset l@-le .d
+   cr ." part-entry>sector-count:  " dup part-entry>sector-count l@-le .d
+   cr
 ;
 
+: (.name) r@ begin cell - dup @ <colon> = UNTIL xt>name cr type space ;
 
-: try-dos-files ( -- found? )
-   block @ 1fe + 2c@ bwjoin aa55 <> IF false EXIT THEN
-   block @ c@ e9 <> IF
-   block @ c@ eb <> block @ 2+ c@ 90 <> or IF false EXIT THEN THEN
-   s" fat-files" find-package IF args @ args-len @ rot interpose THEN true
+: init-block ( -- )
+   s" block-size" ['] $call-parent CATCH IF ABORT" parent has no block-size." THEN
+   to block-size
+   d# 2048 alloc-mem
+   dup d# 2048 erase
+   to block
+   debug-disk-label? IF
+      ." init-block: block-size=" block-size .d ." block=0x" block u. cr
+   THEN
 ;
 
-CREATE ext2-magic 2 allot
-: try-ext2-files ( -- found? )
-   438 0 seek drop  ext2-magic 2 read drop
-   ext2-magic w@-le ef53 <> IF false EXIT THEN
-   s" ext2-files" find-package IF args @ args-len @ rot interpose THEN true
+
+\ This word returns true if the currently loaded block has _NO_ MBR magic
+: no-mbr? ( -- true|false )
+   0 read-sector block mbr>magic w@-le aa55 <>
 ;
 
-: try-iso9660-files
-   \ seek and read starting from 16th sector for volume descriptors
-   block @ 1+ 5 s" CD001" str=
-   IF   \ found ISO9660 signature
-      s" iso-9660" find-package IF args @ args-len @ rot interpose THEN
-      TRUE
-   ELSE
-      FALSE
-   THEN
+: pc-extended-partition? ( part-entry-addr -- true|false )
+   part-entry>id c@      ( id )
+   dup 5 = swap          ( true|false id )
+   dup f = swap          ( true|false true|false id )
+   85 =                  ( true|false true|false true|false )
+   or or                 ( true|false )
 ;
 
+: partition>part-entry ( partition -- part-entry )
+   1- /partition-entry * block mbr>partition-table +
+;
 
-: try-files ( -- found? )
-   \ If no path, then full disk.
-   args-len @ 0= IF true EXIT THEN
+: partition>start-sector ( partition -- sector-offset )
+   partition>part-entry part-entry>sector-offset l@-le
+;
 
-   0 0 seek drop
-   block @ block-size @ read drop
-   try-dos-files IF true EXIT THEN
-   try-ext2-files IF true EXIT THEN
+: count-dos-logical-partitions ( -- #logical-partitions )
+   no-mbr? IF 0 EXIT THEN
+   0 5 1 DO                                ( current )
+      i partition>part-entry               ( current part-entry )
+      dup pc-extended-partition? IF
+         part-entry>sector-offset l@-le    ( current sector )
+         dup to part-start to lpart-start  ( current )
+         BEGIN
+            part-start read-sector          \ read EBR
+            1 partition>start-sector IF
+               \ ." Logical Partition found at " part-start .d cr
+               1+
+            THEN \ another logical partition
+            2 partition>start-sector
+            ( current relative-sector )
+            ?dup IF lpart-start + to part-start false ELSE true THEN
+         UNTIL
+      ELSE
+         drop
+      THEN
+   LOOP
+;
 
-   \ Seek to the begining of logical 2048-byte sector 16
-   \ refer to Chapter C.11.1 in PAPR 2.0 Spec
-   10 800 * 0 seek drop
-   block @ block-size @ read drop
-   try-iso9660-files IF true EXIT THEN
+: (get-dos-partition-params) ( ext-part-start part-entry -- offset count active? id )
+   dup part-entry>sector-offset l@-le rot + swap ( offset part-entry )
+   dup part-entry>sector-count l@-le swap        ( offset count part-entry )
+   dup part-entry>active c@ 80 = swap            ( offset count active? part-entry )
+   part-entry>id c@                              ( offset count active? id )
+;
 
-   \ ... more filesystem types here ...
+: find-dos-partition ( partition# -- false | offset count active? id true )
+   to partition 0 to part-start 0 to part-offset
 
-   false
+   \ no negative partitions
+   partition 0<= IF 0 to partition false EXIT THEN
+
+   \ load MBR and check it
+   no-mbr? IF 0 to partition false EXIT THEN
+
+   partition 4 <= IF \ Is this a primary partition?
+      0 partition partition>part-entry
+      (get-dos-partition-params)
+      \ FIXME sanity checks?
+      true EXIT
+   ELSE
+      partition 4 - 0 5 1 DO                      ( logical-partition current )
+         i partition>part-entry                   ( log-part current part-entry )
+         dup pc-extended-partition? IF
+            part-entry>sector-offset l@-le        ( log-part current sector )
+            dup to part-start to lpart-start      ( log-part current )
+            BEGIN
+               part-start read-sector             \ read EBR
+               1 partition>start-sector IF        \ first partition entry
+                  1+ 2dup = IF                    ( log-part current )
+                     2drop
+                     part-start 1 partition>part-entry
+                     (get-dos-partition-params)
+                     true UNLOOP EXIT
+                  THEN
+                  2 partition>start-sector
+                  ( log-part current relative-sector )
+
+                  ?dup IF lpart-start + to part-start false ELSE true THEN
+               ELSE
+                  true
+               THEN
+            UNTIL
+         ELSE
+            drop
+         THEN
+      LOOP
+      2drop false
+   THEN
 ;
 
-: try-partitions ( -- found? )
-  try-dos-partition IF try-files EXIT THEN
-  \ try-iso9660-partition IF try-files EXIT THEN
-  \ ... more partition types here...
-  false ;
+: try-dos-partition ( -- okay? )
+   \ Read partition table and check magic.
+   no-mbr? IF cr ." No DOS disk-label found." cr false EXIT THEN
 
-: open
-   init-block
-   parse-partition 0= IF
-      false EXIT
+   count-dos-logical-partitions TO dos-logical-partitions
+
+   debug-disk-label? IF
+      ." Found " dos-logical-partitions .d ." logical partitions" cr
+      ." Partition = " partition .d cr
    THEN
-   partition @ 0= IF
-       try-files EXIT
+
+   partition 1 5 dos-logical-partitions +
+   within 0= IF
+      cr ." Partition # not 1-" 4 dos-logical-partitions + . cr false EXIT
    THEN
-   try-partitions
-;
 
-: close
-  block @ block-size @ free-mem ;
+   \ Could/should check for valid partition here...  the magic is not enough really.
 
-\ Workaround for not having "value" variables yet.
-: block-size  block-size @ ;
+   \ Get the partition offset.
 
-STRUCT 
-	/c field part-entry>active
-	/c field part-entry>start-head
-	/c field part-entry>start-sect
-	/c field part-entry>start-cyl
-	/c field part-entry>id
-	/c field part-entry>end-head
-	/c field part-entry>end-sect
-	/c field part-entry>end-cyl
-	/l field part-entry>sector-offset
-	/l field part-entry>sector-count
+   partition find-dos-partition IF
+     ( offset count active? id )
+     2drop drop
+     block-size * to part-offset
+     true
+   ELSE
+     false
+   THEN
+;
 
-CONSTANT /partition-entry  
+\ Check for an ISO-9660 filesystem on the disk
+\ : try-iso9660-partition ( -- true|false )
+\ implement me if you can ;-)
+\ ;
+
+
+\ Check for an ISO-9660 filesystem on the disk
+\ (cf. CHRP IEEE 1275 spec., chapter 11.1.2.3)
+: has-iso9660-filesystem  ( -- TRUE|FALSE )
+   \ Seek to the begining of logical 2048-byte sector 16
+   \ refer to Chapter C.11.1 in PAPR 2.0 Spec
+   \ was: 10 read-sector, but this might cause trouble if you
+   \ try booting an ISO image from a device with 512b sectors.
+   10 800 * 0 seek drop      \ seek to sector
+   block 800 read drop       \ read sector
+   \ Check for CD-ROM volume magic:
+   block c@ 1 =
+   block 1+ 5 s" CD001"  str=
+   and
+   dup IF 800 to block-size THEN
+;
 
 
 \ Load from first active DOS boot partition.
-\ Note: sector block size is always 512 bytes for DOS partition tables.
+
+\ NOTE: block-size is always 512 bytes for DOS partition tables.
 
 : load-from-dos-boot-partition ( addr -- size )
-   0 0 seek drop
-   block @ 200 read drop
-   \ Check for DOS partition table magic:
-   block @ 1fe + 2c@ bwjoin aa55 <> IF FALSE EXIT THEN
-   \ Now step through the partition table:
-   block @ 1be +                              ( addr part-off )
-   4 0 DO 
-      dup part-entry>active c@ 80 =           ( addr part-off active? )
-      over part-entry>id c@ 41 = and IF       ( addr part-off )
-         dup part-entry>sector-offset 4c@ bljoin  ( addr part-off sect-off )
-         \ seek to the boot partition
-         200 * 0 seek drop                    ( addr part-off )
-         part-entry>sector-count 4c@ bljoin   ( addr sect-count )
-         200 * read                           ( size )
-         UNLOOP EXIT
+   no-mbr? IF FALSE EXIT THEN  \ read MBR and check for DOS disk-label magic
+
+   count-dos-logical-partitions TO dos-logical-partitions
+
+   debug-disk-label? IF
+      ." Found " dos-logical-partitions .d ." logical partitions" cr
+      ." Partition = " partition .d cr
+   THEN
+
+   \ Now walk through the partitions:
+   5 dos-logical-partitions + 1 DO
+      \ ." checking partition " i .
+      i find-dos-partition IF        ( addr offset count active? id )
+         41 = and                    ( addr offset count prep-boot-part? )
+         IF                          ( addr offset count )
+            max-prep-partition-blocks min  \ reduce load size
+            swap                     ( addr count offset )
+            block-size * to part-offset
+            0 0 seek drop            ( addr offset )
+            block-size * read        ( size )
+            UNLOOP EXIT
+         ELSE
+            2drop                    ( addr )
+         THEN
       THEN
-      /partition-entry +                      ( addr part-off )
    LOOP
-   2drop 0
+   drop 0
 ;
 
+
+\ load from a bootable partition
+
 : load-from-boot-partition ( addr -- size )
    load-from-dos-boot-partition
    \ More boot partition formats ...
 ;
 
 
+
 \ Extract the boot loader path from a bootinfo.txt file
 \ In: address and length of buffer where the bootinfo.txt has been loaded to.
 \ Out: string address and length of the boot loader (within the input buffer)
 \      or a string with length = 0 when parsing failed.
 
+\ Here is a sample bootinfo file:
+\ <chrp-boot>
+\   <description>Linux Distribution</description>
+\   <os-name>Linux</os-name>
+\   <boot-script>boot &device;:1,\boot\yaboot.ibm</boot-script>
+\   <icon size=64,64 color-space=3,3,2>
+\     <bitmap>[..]</bitmap>
+\   </icon>
+\ </chrp-boot>
+
 : parse-bootinfo-txt  ( addr len -- str len )
    2dup s" <boot-script>" find-substr       ( addr len pos1 )
    2dup = IF
@@ -220,7 +352,8 @@ CONSTANT /partition-entry
 \ Try to load \ppc\bootinfo.txt from the disk (used mainly on CD-ROMs), and if
 \ available, get the boot loader path from this file and load it.
 \ See the "CHRP system binding to IEEE 1275" specification for more information
-\ about bootinfo.txt.
+\ about bootinfo.txt. An example file can be found in the comment of
+\ parse-bootinfo-txt ( addr len -- str len )
 
 : load-chrp-boot-file ( addr -- size )
    \ Create bootinfo.txt path name and load that file:
@@ -230,6 +363,7 @@ CONSTANT /partition-entry
    >r dup                                   ( addr addr R:ihandle )
    dup s" load" r@ $call-method             ( addr addr size R:ihandle )
    r> close-dev                             ( addr addr size )
+
    \ Now parse the information from bootinfo.txt:
    parse-bootinfo-txt                       ( addr fnstr fnlen )
    dup 0= IF 3drop 0 EXIT THEN
@@ -244,14 +378,136 @@ CONSTANT /partition-entry
    r> close-dev                             ( size )
 ;
 
+\ parse partition number from my-args
+
+\ my-args has the following format
+\ [<partition>[,<path>]]
+
+\ | example my-args  | example boot command      |
+\ +------------------+---------------------------+
+\ | 1,\boot\vmlinuz  | boot disk:1,\boot\vmlinuz |
+\ | 2                | boot disk:2               |
+
+\ 0 means the whole disk, this is the same behavior
+\ as if no partition is specified (yaboot wants this).
+
+: parse-partition ( -- okay? )
+   0 to partition
+   0 to part-offset
+
+   my-args to args-len to args
+
+   \ Fix up the "0" thing yaboot does.
+   args-len 1 = IF args c@ [char] 0 = IF 0 to args-len THEN THEN
+
+   \ Check for "full disk" arguments.
+   my-args [char] , findchar 0= IF true EXIT THEN drop \ no comma
+   my-args [char] , split to args-len to args
+   dup 0= IF 2drop true EXIT THEN \ no first argument
+
+   \ Check partition #.
+   base @ >r decimal $number r> base !
+   IF cr ." Not a partition #" false EXIT THEN
+
+   \ Store part #, done.
+   to partition
+   true
+;
+
+
+\ try-files and try-partitions
+
+: (interpose-filesystem) ( str len -- )
+   find-package IF args args-len rot interpose THEN
+;
+
+: try-dos-files ( -- found? )
+   no-mbr? IF false EXIT THEN
+
+   \ block 0 byte 0-2 is a jump instruction in all FAT
+   \ filesystems.
+   \ e9 and eb are jump instructions in x86 assembler.
+   block c@ e9 <> IF
+      block c@ eb <>
+      block 2+ c@ 90 <> or
+      IF false EXIT THEN
+   THEN
+   s" fat-files" (interpose-filesystem)
+   true
+;
+
+: try-ext2-files ( -- found? )
+   2 read-sector               \ read first superblock
+   block d# 56 + w@-le         \ fetch s_magic
+   ef53 <> IF false EXIT THEN  \ s_magic found?
+   s" ext2-files" (interpose-filesystem)
+   true
+;
+
+
+: try-iso9660-files
+   has-iso9660-filesystem 0= IF false exit THEN
+   s" iso-9660" (interpose-filesystem)
+   true
+;
+
+: try-files ( -- found? )
+   \ If no path, then full disk.
+   args-len 0= IF true EXIT THEN
+
+   try-dos-files IF true EXIT THEN
+   try-ext2-files IF true EXIT THEN
+   try-iso9660-files IF true EXIT THEN
+
+   \ ... more filesystem types here ...
+
+   false
+;
+
+: try-partitions ( -- found? )
+   try-dos-partition IF try-files EXIT THEN
+   \ try-iso9660-partition IF try-files EXIT THEN
+   \ ... more partition types here...
+   false
+;
+
+\ Interface functions for disk-label package
+\ as defined by IEEE 1275-1994 3.8.1
+
+: close ( -- )
+   debug-disk-label? IF ." Closing disk-label: block=0x" block u. ." block-size=" block-size .d cr THEN
+   block d# 2048 free-mem
+;
+
+
+: open ( -- true|false )
+   init-block
+
+   parse-partition 0= IF
+      close
+      false EXIT
+   THEN
+
+   partition IF
+       try-partitions
+   ELSE
+       try-files
+   THEN
+   dup 0= IF debug-disk-label? IF ." not found." cr THEN close THEN \ free memory again
+;
+
 
 \ Boot & Load w/o arguments is assumed to be boot from boot partition
 
 : load ( addr -- size )
-   args-len @ IF
-      TRUE ABORT" Load done w/o filesystem" 
+   debug-disk-label? IF
+      ." load: " dup u. cr
+   THEN
+
+   args-len IF
+      TRUE ABORT" Load done w/o filesystem"
    ELSE
-      partition @ IF
+      partition IF
          0 0 seek drop
          200000 read
       ELSE
diff --git a/slof/fs/packages/obp-tftp.fs b/slof/fs/packages/obp-tftp.fs
index 0e3b35d..affbe5c 100644
--- a/slof/fs/packages/obp-tftp.fs
+++ b/slof/fs/packages/obp-tftp.fs
@@ -34,6 +34,10 @@ INSTANCE VARIABLE ciregs-buffer
     \ Generate arg string for snk like
     \ "netboot load-addr length filename"
     (u.) s" netboot " 2swap $cat s"  60000000 " $cat
+
+    \ Allocate 1720 bytes to store the BOOTP-REPLY packet
+    6B8 alloc-mem dup >r (u.) $cat s"  " $cat
+    huge-tftp-load @ IF s"  1 " ELSE s"  0 " THEN $cat
     my-args $cat
 
     \ Call SNK netboot loadr
@@ -42,8 +46,19 @@ INSTANCE VARIABLE ciregs-buffer
     \ Restore to old client interface register 
     ciregs-buffer @ ciregs ciregs-size move
 
+    \ Recover buffer address of BOOTP-REPLY packet
+    r>
+
     r> r> over IF s" bootpath" set-chosen ELSE 2drop THEN
     r> r> over IF s" bootargs" set-chosen ELSE 2drop THEN
+
+    \ Store BOOTP-REPLY packet as property
+    s" /chosen" select-dev
+    dup 6B8 encode-bytes s" bootp-response" property
+    device-end
+
+    \ free buffer
+    6B8 free-mem
 ;
 
 : close ( -- )
diff --git a/slof/fs/packages/scsi-support.fs b/slof/fs/packages/scsi-support.fs
new file mode 100644
index 0000000..8a55e31
--- /dev/null
+++ b/slof/fs/packages/scsi-support.fs
@@ -0,0 +1,633 @@
+\ *****************************************************************************
+\ * Copyright (c) 2004, 2007 IBM Corporation
+\ * All rights reserved.
+\ * This program and the accompanying materials
+\ * are made available under the terms of the BSD License
+\ * which accompanies this distribution, and is available at
+\ * http://www.opensource.org/licenses/bsd-license.php
+\ *
+\ * Contributors:
+\ *     IBM Corporation - initial implementation
+\ ****************************************************************************/
+
+\ avoid multiple includes
+#ifndef _SCSI_SUPPORT_FS
+#define _SCSI_SUPPORT_FS
+
+\ SCSI constants
+f1 CONSTANT scsi-const-active-power          \ param used for start-stop-unit
+f2 CONSTANT scsi-const-idle-power            \ param used for start-stop-unit
+f3 CONSTANT scsi-const-standby-power         \ param used for start-stop-unit
+
+3  CONSTANT scsi-const-load                  \ param used for start-stop-unit
+2  CONSTANT scsi-const-eject                 \ param used for start-stop-unit
+1  CONSTANT scsi-const-read-TOC
+0  CONSTANT scsi-const-stop-disc
+
+\ for some commands specific parameters are used, which normally
+\ need not to be altered. These values are preset at include time
+\ or explicit by a call of 'scsi-supp-init'
+false  value   scsi-param-debug              \ common debugging flag
+d# 0   value   scsi-param-size               \ length of CDB processed last
+h# 0   value   scsi-param-control            \ control word for CDBs as defined in SAM-4
+d# 0   value   scsi-param-errors             \ counter for detected errors
+
+\ utility to increment error counter
+: scsi-inc-errors
+   scsi-param-errors 1 + to scsi-param-errors
+;
+
+\ ***************************************************************************
+\ SCSI-Command: TEST UNIT READY
+\         Type: Primary Command
+\ ***************************************************************************
+\ Forth Word:   scsi-build-test-unit-ready    ( cdb -- )
+\ ***************************************************************************
+\ checks if a device is ready to receive commands
+\ ***************************************************************************
+\ command code:
+00 CONSTANT scsi-cmd-test-unit-ready
+\ CDB structure:
+STRUCT
+	/c	FIELD test-unit-ready>operation-code     \ 00h
+	4	FIELD test-unit-ready>reserved           \ unused
+	/c	FIELD test-unit-ready>control            \ control byte as specified in SAM-4
+CONSTANT scsi-length-test-unit-ready
+
+\ cdb build:
+\ all fields are zeroed
+: scsi-build-test-unit-ready  ( cdb -- )
+   dup scsi-length-test-unit-ready erase  ( cdb )
+   scsi-param-control swap test-unit-ready>control c!  ( )
+   scsi-length-test-unit-ready to scsi-param-size   \ update CDB length
+;
+
+\ ***************************************************************************
+\ SCSI-Command: REQUEST SENSE
+\         Type: Primary Command
+\ ***************************************************************************
+\ Forth Word:   scsi-build-request-sense    ( cdb -- )
+\ ***************************************************************************
+\ for return data a buffer of at least 252 bytes must be present!
+\ see spec: SPC-3 (r23) / clauses 4.5 and 6.27
+\ ***************************************************************************
+\ command code:
+03 CONSTANT scsi-cmd-request-sense
+\ CDB structure:
+STRUCT
+	/c	FIELD request-sense>operation-code     \ 03h
+	3	FIELD request-sense>reserved           \ unused
+	/c	FIELD request-sense>allocation-length  \ buffer-length for data response
+	/c	FIELD request-sense>control            \ control byte as specified in SAM-4
+CONSTANT scsi-length-request-sense
+
+\ cdb build:
+: scsi-build-request-sense    ( alloc-len cdb -- )
+   >r                         ( alloc-len )  ( R: -- cdb )
+   r@ scsi-length-request-sense erase        ( alloc-len )
+   scsi-cmd-request-sense r@                 ( alloc-len cmd cdb )
+   request-sense>operation-code c!           ( alloc-len )
+   dup d# 252 >                              \ buffer length too big ?
+   IF
+      scsi-inc-errors
+      drop d# 252                            \ replace with 252
+   ELSE
+      dup d# 18 <                            \ allocated buffer too small ?
+      IF
+         scsi-inc-errors
+         drop 0                              \ reject return data
+      THEN
+   THEN                                      ( alloclen )
+   r@ request-sense>allocation-length c!     (  )
+   scsi-param-control r> request-sense>control c!  ( alloc-len cdb )  ( R: cdb -- )
+   scsi-length-request-sense to scsi-param-size  \ update CDB length
+;
+
+\ ----------------------------------------
+\ SCSI-Response: SENSE_DATA
+\ ----------------------------------------
+70 CONSTANT scsi-response(request-sense-0)
+71 CONSTANT scsi-response(request-sense-1)
+
+STRUCT
+   /c FIELD sense-data>response-code         \ 70h (current errors) or 71h (deferred errors)
+   /c FIELD sense-data>obsolete
+   /c FIELD sense-data>sense-key             \ D3..D0 = sense key, D7 = EndOfMedium
+   /l FIELD sense-data>info
+   /c FIELD sense-data>alloc-length          \ <= 244 (for max size)
+   /l FIELD sense-data>command-info
+   /c FIELD sense-data>asc                   \ additional sense key
+   /c FIELD sense-data>ascq                  \ additional sense key qualifier
+   /c FIELD sense-data>unit-code
+   3  FIELD sense-data>key-specific
+   /c FIELD sense-data>add-sense-bytes       \ start of appended extra bytes
+CONSTANT scsi-length-sense-data
+
+\ ----------------------------------------
+\ get from SCSI response block:
+\  - Additional Sense Code Qualifier
+\  - Additional Sense Code
+\  - sense-key
+\ ----------------------------------------
+\ Forth Word:   scsi-get-sense-data  ( addr -- ascq asc sense-key )
+\ ----------------------------------------
+: scsi-get-sense-data                        ( addr -- ascq asc sense-key )
+   >r                                        ( R: -- addr )
+   r@ sense-data>ASCQ c@                     ( ascq )
+   r@ sense-data>ASC c@                      ( ascq asc )
+   r> sense-data>sense-key c@ 0f and         ( ascq asc sense-key ) ( R: addr -- )
+;
+
+\ ***************************************************************************
+\ SCSI-Command: INQUIRY
+\         Type: Primary Command
+\ ***************************************************************************
+\ Forth Word:   scsi-build-inquiry    ( alloc-len cdb -- )
+\ ***************************************************************************
+\ command code:
+12 CONSTANT scsi-cmd-inquiry
+
+\ CDB structure
+STRUCT
+	/c	FIELD inquiry>operation-code           \ 0x12
+	/c	FIELD inquiry>reserved                 \ + EVPD-Bit (vital product data)
+	/c	FIELD inquiry>page-code                \ page code for vital product data (if used)
+	/w	FIELD inquiry>allocation-length        \ length of Data-In-Buffer
+	/c	FIELD inquiry>control                  \ control byte as specified in SAM-4
+CONSTANT scsi-length-inquiry
+
+\ Setup command INQUIRY
+: scsi-build-inquiry                         ( alloc-len cdb -- )
+   dup scsi-length-inquiry erase             \ 6 bytes CDB
+	scsi-cmd-inquiry over				         ( alloc-len cdb cmd cdb )
+	inquiry>operation-code c!	               ( alloc-len cdb )
+   scsi-param-control over inquiry>control c! ( alloc-len cdb )
+	inquiry>allocation-length w!	            \ size of Data-In Buffer
+   scsi-length-inquiry to scsi-param-size    \ update CDB length
+;
+
+\ ----------------------------------------
+\ block structure of inquiry return data:
+\ ----------------------------------------
+STRUCT
+	/c	   FIELD inquiry-data>peripheral       \ qualifier and device type
+	/c	   FIELD inquiry-data>reserved1
+	/c	   FIELD inquiry-data>version          \ supported SCSI version (1,2,3)
+	/c	   FIELD inquiry-data>data-format
+	/c	   FIELD inquiry-data>add-length       \ total block length - 4
+	/c	   FIELD inquiry-data>flags1
+	/c	   FIELD inquiry-data>flags2
+	/c	   FIELD inquiry-data>flags3
+	d# 8	FIELD inquiry-data>vendor-ident     \ vendor string
+	d# 16	FIELD inquiry-data>product-ident    \ device string
+	/l 	FIELD inquiry-data>product-revision \ revision string
+	d# 20	FIELD inquiry-data>vendor-specific  \ optional params
+\ can be increased by vendor specific fields
+CONSTANT scsi-length-inquiry-data
+
+\ ***************************************************************************
+\ SCSI-Command: READ CAPACITY (10)
+\         Type: Block Command
+\ ***************************************************************************
+\ Forth Word:   scsi-build-read-capacity-10    ( cdb -- )
+\ ***************************************************************************
+25 CONSTANT scsi-cmd-read-capacity-10        \ command code
+
+STRUCT                                       \ SCSI 10-byte CDB structure
+	/c	FIELD read-cap-10>operation-code
+	/c	FIELD read-cap-10>reserved1
+	/l	FIELD read-cap-10>lba
+	/w	FIELD read-cap-10>reserved2
+	/c	FIELD read-cap-10>reserved3
+	/c	FIELD read-cap-10>control
+CONSTANT scsi-length-read-cap-10
+
+\ Setup READ CAPACITY (10) command
+: scsi-build-read-cap-10                     ( cdb -- )
+   dup scsi-length-read-cap-10 erase         ( cdb )
+	scsi-cmd-read-capacity-10 over            ( cdb cmd cdb )
+	read-cap-10>operation-code c!             ( cdb )
+   scsi-param-control swap read-cap-10>control c! ( )
+   scsi-length-read-cap-10 to scsi-param-size    \ update CDB length
+;
+
+\ ----------------------------------------
+\ get from SCSI response block:
+\  - Additional Sense Code Qualifier
+\  - Additional Sense Code
+\  - sense-key
+\ ----------------------------------------
+\ Forth Word:   scsi-get-capacity-10  ( addr -- block-size #blocks )
+\ ----------------------------------------
+\ Block structure
+STRUCT
+	/l	FIELD read-cap-10-data>max-lba
+	/l	FIELD read-cap-10-data>block-size
+CONSTANT scsi-length-read-cap-10-data
+
+\ get data-block
+: scsi-get-capacity-10                       ( addr -- block-size #blocks )
+   >r                                        ( addr -- )  ( R: -- addr )
+   r@ read-cap-10-data>block-size l@         ( block-size )
+   r> read-cap-10-data>max-lba l@            ( block-size #blocks ) ( R: addr -- )
+;
+
+\ ***************************************************************************
+\ SCSI-Command: READ CAPACITY (16)
+\         Type: Block Command
+\ ***************************************************************************
+\ Forth Word:   scsi-build-read-capacity-16    ( cdb -- )
+\ ***************************************************************************
+9e CONSTANT scsi-cmd-read-capacity-16        \ command code
+
+STRUCT                                       \ SCSI 16-byte CDB structure
+	/c	FIELD read-cap-16>operation-code
+	/c	FIELD read-cap-16>service-action
+	/l	FIELD read-cap-16>lba-high
+	/l	FIELD read-cap-16>lba-low
+	/l	FIELD read-cap-16>allocation-length    \ should be 32
+	/c	FIELD read-cap-16>reserved
+	/c	FIELD read-cap-16>control
+CONSTANT scsi-length-read-cap-16
+
+\ Setup READ CAPACITY (16) command
+: scsi-build-read-cap-16  ( cdb -- )
+   >r r@                                     ( R: -- cdb )
+   scsi-length-read-cap-16 erase             (  )
+	scsi-cmd-read-capacity-16                 ( code )
+	r@ read-cap-16>operation-code c!          (  )
+   10 r@ read-cap-16>service-action c!
+   d# 32
+   r@ read-cap-16>allocation-length l!       (  )
+   scsi-param-control r> read-cap-16>control c! ( R: cdb -- )
+   scsi-length-read-cap-16 to scsi-param-size   \ update CDB length
+;
+
+\ ----------------------------------------
+\ get from SCSI response block:
+\  - Block Size (in Bytes)
+\  - Number of Blocks
+\ ----------------------------------------
+\ Forth Word:   scsi-get-capacity-16  ( addr -- block-size #blocks )
+\ ----------------------------------------
+\ Block structure for return data
+STRUCT
+	/l	FIELD read-cap-16-data>max-lba-high    \ upper quadlet of Max-LBA
+	/l	FIELD read-cap-16-data>max-lba-low     \ lower quadlet of Max-LBA
+	/l	FIELD read-cap-16-data>block-size      \ logical block length in bytes
+   /c	FIELD read-cap-16-data>protect         \ type of protection (4 bits)
+   /c	FIELD read-cap-16-data>exponent        \ logical blocks per physical blocks
+   /w	FIELD read-cap-16-data>lowest-aligned  \ first LBA of a phsy. block
+   10 FIELD read-cap-16-data>reserved        \ 16 reserved bytes
+CONSTANT scsi-length-read-cap-16-data        \ results in 32
+
+\ get data-block
+: scsi-get-capacity-16                       ( addr -- block-size #blocks )
+   >r                                        ( R: -- addr )
+   r@ read-cap-16-data>block-size l@         ( block-size )
+   r@ read-cap-16-data>max-lba-high l@       ( block-size #blocks-high )
+   d# 32 lshift                              ( block-size #blocks-upper )
+   r> read-cap-16-data>max-lba-low l@ +      ( block-size #blocks ) ( R: addr -- )
+;
+
+\ ***************************************************************************
+\ SCSI-Command: MODE SENSE (10)
+\         Type: Primary Command
+\ ***************************************************************************
+\ Forth Word:   scsi-build-mode-sense-10  ( alloc-len subpage page cdb -- )
+\ ***************************************************************************
+5a CONSTANT scsi-cmd-mode-sense-10
+
+\ CDB structure
+STRUCT
+	/c	FIELD mode-sense-10>operation-code
+	/c	FIELD mode-sense-10>res-llbaa-dbd-res
+	/c	FIELD mode-sense-10>pc-page-code       \ page code + page control
+	/c	FIELD mode-sense-10>sub-page-code
+	3	FIELD mode-sense-10>reserved2
+	/w	FIELD mode-sense-10>allocation-length
+	/c	FIELD mode-sense-10>control
+CONSTANT scsi-length-mode-sense-10
+
+: scsi-build-mode-sense-10                   ( alloc-len subpage page cdb -- )
+   >r                                        ( alloc-len subpage page ) ( R: -- cdb )
+   r@ scsi-length-mode-sense-10 erase        \ 10 bytes CDB
+	scsi-cmd-mode-sense-10                    ( alloc-len subpage page cmd )
+   r@  mode-sense-10>operation-code c!		   ( alloc-len subpage page )
+   10 r@ mode-sense-10>res-llbaa-dbd-res c!  \ long LBAs accepted
+	r@ mode-sense-10>pc-page-code c!	         ( alloc-len subpage )
+	r@ mode-sense-10>sub-page-code c!	      ( alloc-len )
+	r@ mode-sense-10>allocation-length w!     ( )
+
+   scsi-param-control r> mode-sense-10>control c!  ( R: cdb -- )
+   scsi-length-mode-sense-10 to scsi-param-size  \ update CDB length
+;
+
+\ return data processing
+STRUCT
+	/w	FIELD mode-sense-10-data>head-length
+	/c	FIELD mode-sense-10-data>head-medium
+	/c	FIELD mode-sense-10-data>head-param
+	/c	FIELD mode-sense-10-data>head-longlba
+	/c	FIELD mode-sense-10-data>head-reserved
+	/w	FIELD mode-sense-10-data>head-descr-len
+CONSTANT scsi-length-mode-sense-10-data
+
+\ ****************************************
+\ This function shows the mode page header
+\ ****************************************
+: .mode-sense-data   ( addr -- )
+   cr
+   dup mode-sense-10-data>head-length
+   w@ ." Mode Length: " .d space
+   dup mode-sense-10-data>head-medium
+   c@ ." / Medium Type: " .d space
+   dup mode-sense-10-data>head-longlba
+   c@ ." / Long LBA: " .d space
+   mode-sense-10-data>head-descr-len
+   w@ ." / Descr. Length: " .d
+;
+
+
+\ ***************************************************************************
+\ SCSI-Command: READ (6)
+\         Type: Block Command
+\ ***************************************************************************
+\ Forth Word:   scsi-build-read-6  ( block# #blocks cdb -- )
+\ ***************************************************************************
+\ this SCSI command uses 21 bits to represent start LBA
+\ and 8 bits to specify the numbers of blocks to read
+\ The value of 0 blocks is interpreted as 256 blocks
+\
+\ command code
+08 CONSTANT scsi-cmd-read-6
+
+\ CDB structure
+STRUCT
+   /c FIELD read-6>operation-code            \ 08h
+   /c FIELD read-6>block-address-msb         \ upper 5 bits
+   /w FIELD read-6>block-address             \ lower 16 bits
+   /c FIELD read-6>length                    \ number of blocks to read
+   /c FIELD read-6>control                   \ CDB control
+CONSTANT scsi-length-read-6
+
+: scsi-build-read-6                          ( block# #blocks cdb -- )
+   >r                                        ( block# #blocks )  ( R: -- cdb )
+   r@ scsi-length-read-6 erase               \ 6 bytes CDB
+	scsi-cmd-read-6 r@ read-6>operation-code c! ( block# #blocks )
+
+   \ check block count to read (#blocks)
+   dup d# 255 >                              \ #blocks exceeded limit ?
+   IF
+      scsi-inc-errors
+      drop 1                                 \ replace with any valid number
+   THEN
+   r@ read-6>length c!                       \ set #blocks to read
+
+   \ check starting block number (block#)
+   dup 1fffff >                              \ check address upper limit
+   IF
+      scsi-inc-errors
+      drop                                   \ remove original block#
+      1fffff                                 \ replace with any valid address
+   THEN
+   dup d# 16 rshift
+   r@ read-6>block-address-msb c!            \ set upper 5 bits
+   ffff and
+   r@ read-6>block-address w!                \ set lower 16 bits
+   scsi-param-control r> read-6>control c!   ( R: cdb -- )
+   scsi-length-read-6 to scsi-param-size     \ update CDB length
+;
+
+\ ***************************************************************************
+\ SCSI-Command: READ (10)
+\         Type: Block Command
+\ ***************************************************************************
+\ Forth Word:   scsi-build-read-10  ( block# #blocks cdb -- )
+\ ***************************************************************************
+\ command code
+28 CONSTANT scsi-cmd-read-10
+
+\ CDB structure
+STRUCT
+   /c FIELD read-10>operation-code
+   /c FIELD read-10>protect
+   /l FIELD read-10>block-address
+   /c FIELD read-10>group
+   /w FIELD read-10>length
+   /c FIELD read-10>control
+CONSTANT scsi-length-read-10
+
+: scsi-build-read-10                         ( block# #blocks cdb -- )
+   >r                                        ( block# #blocks )  ( R: -- cdb )
+   r@ scsi-length-read-10 erase             \ 10 bytes CDB
+	scsi-cmd-read-10 r@ read-10>operation-code c! ( block# #blocks )
+   r@ read-10>length w!                      ( block# )
+   r@ read-10>block-address l!
+   scsi-param-control r> read-10>control c!  ( R: cdb -- )
+   scsi-length-read-10 to scsi-param-size    \ update CDB length
+;
+
+\ ***************************************************************************
+\ SCSI-Command: START STOP UNIT
+\         Type: Block Command
+\ ***************************************************************************
+\ Forth Word:   scsi-build-start-stop-unit  ( state# cdb -- )
+\ ***************************************************************************
+\ command code
+1b CONSTANT scsi-cmd-start-stop-unit
+
+\ CDB structure
+STRUCT
+   /c FIELD start-stop-unit>operation-code
+   /c FIELD start-stop-unit>immed
+   /w FIELD start-stop-unit>reserved
+   /c FIELD start-stop-unit>pow-condition
+   /c FIELD start-stop-unit>control
+CONSTANT scsi-length-start-stop-unit
+
+: scsi-build-start-stop-unit                 ( state# cdb -- )
+   >r                                        ( state# )  ( R: -- cdb )
+   r@ scsi-length-start-stop-unit erase      \ 6 bytes CDB
+	scsi-cmd-start-stop-unit r@ start-stop-unit>operation-code c!
+   dup 3 >
+   IF
+      4 lshift                               \ shift to upper nibble
+   THEN                                      ( state )
+   r@ start-stop-unit>pow-condition c!       (  )
+   scsi-param-control r> start-stop-unit>control c!  ( R: cdb -- )
+   scsi-length-start-stop-unit to scsi-param-size  \ update CDB length
+;
+
+\ ***************************************************************************
+\ SCSI-Command: SEEK
+\         Type: Block Command (obsolete)
+\ ***************************************************************************
+\ Forth Word:   scsi-build-seek  ( state# cdb -- )
+\ Obsolete function (last listed in spec SBC / Nov. 1997)
+\ implemented only for the sake of completeness
+\ ***************************************************************************
+\ command code
+2b CONSTANT scsi-cmd-seek
+
+\ CDB structure
+STRUCT
+   /c FIELD seek>operation-code
+   /c FIELD seek>reserved1
+   /l FIELD seek>lba
+   3  FIELD seek>reserved2
+   /c FIELD seek>control
+CONSTANT scsi-length-seek
+
+: scsi-build-seek  ( lba cdb -- )
+   >r              ( lba )  ( R: -- cdb )
+   r@ scsi-length-seek erase              \ 10 bytes CDB
+	scsi-cmd-seek r@ seek>operation-code c!
+   r> seek>lba l!  (  )  ( R: cdb -- )
+   scsi-length-seek to scsi-param-size    \ update CDB length
+;
+
+\ ***************************************************************************
+\ SCSI-Utility: .sense-code
+\ ***************************************************************************
+\ this utility prints a string associated to the sense code
+\ see specs: SPC-3/r23 clause 4.5.6
+\ ***************************************************************************
+: .sense-text ( scode -- )
+   case
+      0    OF s" OK"               ENDOF
+      1    OF s" RECOVERED ERR"    ENDOF
+      2    OF s" NOT READY"        ENDOF
+      3    OF s" MEDIUM ERROR"     ENDOF
+      4    OF s" HARDWARE ERR"     ENDOF
+      5    OF s" ILLEGAL REQUEST"  ENDOF
+      6    OF s" UNIT ATTENTION"   ENDOF
+      7    OF s" DATA PROTECT"     ENDOF
+      8    OF s" BLANK CHECK"      ENDOF
+      9    OF s" VENDOR SPECIFIC"  ENDOF
+      a    OF s" COPY ABORTED"     ENDOF
+      b    OF s" ABORTED COMMAND"  ENDOF
+      d    OF s" VOLUME OVERFLOW"  ENDOF
+      e    OF s" MISCOMPARE"       ENDOF
+      dup  OF s" UNKNOWN"          ENDOF
+   endcase
+   5b emit type 5d emit
+;
+
+\ ***************************************************************************
+\ SCSI-Utility: .status-code
+\ ***************************************************************************
+\ this utility prints a string associated to the status code
+\ see specs: SAM-3/r14 clause 5.3
+\ ***************************************************************************
+: .status-text  ( stat -- )
+   case
+      00  OF s" GOOD"                  ENDOF
+      02  OF s" CHECK CONDITION"       ENDOF
+      04  OF s" CONDITION MET"         ENDOF
+      08  OF s" BUSY"                  ENDOF
+      18  OF s" RESERVATION CONFLICT"  ENDOF
+      28  OF s" TASK SET FULL"         ENDOF
+      30  OF s" ACA ACTIVE"            ENDOF
+      40  OF s" TASK ABORTED"          ENDOF
+      dup OF s" UNKNOWN"               ENDOF
+   endcase
+   5b emit type 5d emit
+;
+
+
+\ ***************************************************************************
+\ SCSI-Utility: .capacity-text
+\ ***************************************************************************
+\ utility that shows total capacity on screen by use of the return data
+\ from read-capacity calculation is SI conform (base 10)
+\ ***************************************************************************
+\ sub function to print a 3 digit decimal
+\ number with 2 post decimal positions xxx.yy
+: .dec3-2 ( prenum postnum -- )
+   swap
+   base @ >r                                 \ save actual base setting
+   decimal                                   \ show decimal values
+   3 .r d# 46 emit .d                        \ 3 pre-decimal, right aligned
+   r> base !                                 \ restore base
+;
+
+: .capacity-text  ( block-size #blocks -- )
+   scsi-param-debug                          \ debugging flag set ?
+   IF                                        \ show additional info
+      2dup
+      cr
+      ." LBAs: " .d                          \ highest logical block number
+      ." / Block-Size: " .d
+      ." / Total Capacity: "
+   THEN
+   *                                         \ calculate total capacity
+   dup d# 1000000000000 >=                   \ check terabyte limit
+   IF
+      d# 1000000000000 /mod
+      swap
+      d# 10000000000 /                       \ limit remainder to two digits
+      .dec3-2 ." TB"                         \ show terabytes as xxx.yy
+   ELSE
+      dup d# 1000000000 >=                   \ check gigabyte limit
+      IF
+         d# 1000000000 /mod
+         swap
+         d# 10000000 /
+         .dec3-2 ." GB"                      \ show gigabytes as xxx.yy
+      ELSE
+         dup d# 1000000 >=
+         IF
+            d# 1000000 /mod                  \ check mega byte limit
+            swap
+            d# 10000 /
+            .dec3-2 ." MB"                   \ show megabytes as xxx.yy
+         ELSE
+            dup d# 1000 >=                   \ check kilo byte limit
+            IF
+               d# 1000 /mod
+               swap
+               d# 10 /
+               .dec3-2 ." kB"
+            ELSE
+               .d ."  Bytes"
+            THEN
+         THEN
+      THEN
+   THEN
+;
+
+\ ***************************************************************************
+\ SCSI-Utility: .inquiry-text  ( addr -- )
+\ ***************************************************************************
+\ utility that shows:
+\     vendor-ident product-ident and revision
+\ from an inquiry return data block (addr)
+\ ***************************************************************************
+: .inquiry-text  ( addr -- )
+   dup inquiry-data>vendor-ident      8 type space
+   dup inquiry-data>product-ident    10 type space
+       inquiry-data>product-revision  4 type
+;
+
+\ ***************************************************************************
+\ SCSI-Utility: scsi-supp-init  ( -- )
+\ ***************************************************************************
+\ utility that helps to ensure that parameters are set to valid values
+: scsi-supp-init  ( -- )
+   false  to scsi-param-debug                \ no debug strings
+   h# 0   to scsi-param-size
+   h# 0   to scsi-param-control              \ common CDB control byte
+   d# 0   to scsi-param-errors               \ local errors (param limits)
+;
+
+
+\ ***************************************************************************
+\ functions called when file is included
+\ ***************************************************************************
+scsi-supp-init   \ preset all scsi parameters
+
+\ update-flash -f net:boot-mr.bin
+
+#endif
+
diff --git a/slof/fs/pci-scan.fs b/slof/fs/pci-scan.fs
index e0cd813..5096e68 100644
--- a/slof/fs/pci-scan.fs
+++ b/slof/fs/pci-scan.fs
@@ -116,7 +116,7 @@ here 100 allot CONSTANT pci-device-vec
 : pci-sub-vendor@ ( addr -- sub-id )    2C + rtas-config-l@ FFFF and ;
 \ read Sub Device ID
 : pci-sub-device@ ( addr -- sub-id )    2C + rtas-config-l@ 10 rshift FFFF and ;
-\ read Interrupt Line
+\ read Interrupt Pin
 : pci-interrupt@  ( addr -- interrupt ) 3D + rtas-config-b@ ;
 \ read Minimum Grant
 : pci-min-grant@  ( addr -- min-gnt )   3E + rtas-config-b@ ;
@@ -214,7 +214,7 @@ here 100 allot CONSTANT pci-device-vec
 \ Enable Bus Master, I/O and mem access
 : pci-enable ( -- ) my-space 4 + dup rtas-config-w@ 7 or swap rtas-config-w! ;
 
-\ Enable #PERR and #SERR errors of pci-device

+\ Enable #PERR and #SERR errors of pci-device
 : pci-error-enable ( -- ) my-space 4 + dup rtas-config-w@ 140 or swap rtas-config-w! ;
 
 \ prints out the ScanInformation about a device
@@ -426,7 +426,7 @@ DEFER func-pci-probe-bus
                 drop                                    \ if not forget it
         ELSE
                 pci-setup-device                        \ if valid setup the device
-	THEN
+        THEN
 ;
 
 \ walk through all 32 possible pci devices on this bus and probe them
@@ -436,7 +436,7 @@ DEFER func-pci-probe-bus
                 dup
                 i pci-probe-device
         LOOP
-	drop
+        drop
 ;
 
 \ setup the function pointer used in pci-bridge-setup
@@ -492,3 +492,8 @@ DEFER func-pci-probe-bus
 
 \ provide all words needed to generate the properties and/or assign BAR values
 #include "pci-properties.fs"
+
+\ provide all words implementing lspci functionality
+#if defined(ELBA) || defined(MALTA)
+#include "pci-lspci.fs"
+#endif
diff --git a/slof/fs/search.fs b/slof/fs/search.fs
index 2255636..4016233 100644
--- a/slof/fs/search.fs
+++ b/slof/fs/search.fs
@@ -9,10 +9,6 @@
 \ * Contributors:
 \ *     IBM Corporation - initial implementation
 \ ****************************************************************************/
-\
-\ Copyright 2002,2003,2004  Segher Boessenkool  <segher@kernel.crashing.org>
-\
-
 
 \ stuff we should already have:
 
diff --git a/slof/fs/usb/usb-enumerate.fs b/slof/fs/usb/usb-enumerate.fs
index a027ec5..5b64bed 100644
--- a/slof/fs/usb/usb-enumerate.fs
+++ b/slof/fs/usb/usb-enumerate.fs
@@ -116,9 +116,11 @@
 \ create device tree for SCSI device
 
 : (scsi-create) ( -- )
+   s" SCSI-CREATE " usb-debug-print
    mps new-device-address 0 ch-buffer 1 control-std-get-maxlun ( TRUE|FALSE )
    IF
-      s" GET-MAX-LUN IS WORKING :" usb-debug-print
+\      s" GET-MAX-LUN IS WORKING :" usb-debug-print
+\      ch-buffer  5 dump cr      \ dump the responsed message
    ELSE
       s" ERROR in GET-MAX-LUN " usb-debug-print
       cd-buffer @ 5 + c@ to temp1
@@ -157,9 +159,9 @@
    THEN
    ( interface-subclass )
    CASE
-      02 OF  (atapi-8020-create) s" 2 ATAPI " usb-debug-print ENDOF
-      05 OF  (atapi-8070-create) s" 5 ATAPI " usb-debug-print ENDOF
-      06 OF  (scsi-create) s" 6 SCSI " usb-debug-print ENDOF
+      02 OF  (atapi-8020-create) s" ATAPI Interface " usb-debug-print ENDOF
+      05 OF  (atapi-8070-create) s" ATAPI Interface " usb-debug-print ENDOF
+      06 OF  (scsi-create) s" SCSI Interface " usb-debug-print ENDOF
       dup OF  s" USB storage: Unsupported sub-class code." usb-debug-print ENDOF
    ENDCASE
 ;
diff --git a/slof/fs/usb/usb-hub.fs b/slof/fs/usb/usb-hub.fs
index ac0ae66..6701750 100644
--- a/slof/fs/usb/usb-hub.fs
+++ b/slof/fs/usb/usb-hub.fs
@@ -299,6 +299,11 @@ s" usb-enumerate.fs" INCLUDED
    BEGIN				( port# )
       status-buffer 4 erase             ( port# )
       status-buffer over control-hub-port-status-get drop ( port# ) 
+       usb-test-flag 
+      IF
+         s" Port Satus: " status-buffer w@-le usb-debug-print-val
+      THEN
+
       status-buffer w@-le 102 and 0= 	( port# TRUE|FALSE )
    WHILE				( port# )
    REPEAT				( port# )
@@ -448,11 +453,13 @@ s" usb-enumerate.fs" INCLUDED
    \             a value of 9.
 
    hd-buffer 2 + c@ to temp2
+\   temp2 1+ to temp2
    s" HUB: Found " usb-debug-print \ temp2 .
    s" number of downstream hub ports! : " temp2 usb-debug-print-val
    hd-buffer 5 + c@ to po2pg \ get bPwrOn2PwrGood
-   temp2 1+ 1 DO 
-      I hub-configure-port
+   temp2 1+ 1 DO
+       s" hub-configure-port: " I usb-debug-print-val
+       I hub-configure-port
    LOOP
 ; 
 
diff --git a/slof/fs/usb/usb-ohci.fs b/slof/fs/usb/usb-ohci.fs
index 5b71d56..1cabdc3 100644
--- a/slof/fs/usb/usb-ohci.fs
+++ b/slof/fs/usb/usb-ohci.fs
@@ -101,11 +101,17 @@ baseaddrs 34 + CONSTANT hcintrval
 baseaddrs 48 + CONSTANT hcrhdescA
 baseaddrs 54 + CONSTANT hcrhpstat
 
-
-\ Constants for COMSTAT register
-
-
-2 CONSTANT CLF
+\ OHCI REGISTER SETTING FOR ELBA STEC 8GBFLASHDISK 
+6C903305 E0 config-l! \ setting EXT1 for 5 ports
+7E020001 40 config-l! \ setting PMC for enable PME
+
+usb-debug-flag IF
+    0 config-l@ ." VENID = " . cr
+   40 config-l@ ." PMC   = " . cr
+   44 config-l@ ." PMCSR = " . cr 
+   E0 config-l@ ." EXT1  = " . cr
+   E4 config-l@ ." EXT2  = " . cr
+THEN
 
 \ Constants for INTSTAT register
 
@@ -850,7 +856,7 @@ THEN
    0ffff    hcintdsbl rl!-le
    0000     hcbulkhead rl!-le
    0083     hccontrol rl!-le
-   23f02edf hcintrval rl!-le
+   23f02fff hcintrval rl!-le \ changes from 23f02edf
 ;
 
 
@@ -1068,11 +1074,11 @@ VARIABLE total-rh-ports
       IF
          s" Device at this port!" usb-debug-print
          RHP-PPS current-stat rl!-le   \ port power on
-         hcrhdescA 3 + rb@ 2 * ms      \ wait for POTPGT*2 ms
+         hcrhdescA 3 + rb@ 4 * ms      \ wait for POTPGT*2 ms
          RHP-PES current-stat rl!-le   \ port enable
          50 ms
          RHP-PRS current-stat rl!-le   \ port reset
-         50 ms
+         100 ms
          \ RHP-PRSC current-stat rl!-le
 
          current-stat rl@-le 200 and 4 lshift
diff --git a/slof/fs/usb/usb-static.fs b/slof/fs/usb/usb-static.fs
index 0067549..50c8f0e 100644
--- a/slof/fs/usb/usb-static.fs
+++ b/slof/fs/usb/usb-static.fs
@@ -10,10 +10,15 @@
 \ *     IBM Corporation - initial implementation
 \ ****************************************************************************/
 
+\ #include "scsi-support.fs"
+
 \ Set usb-debug flag to TRUE for debugging output:
 0 VALUE usb-debug-flag
 0 VALUE usb-test-flag
 
+VARIABLE ihandle-bulk-tran
+VARIABLE ihandle-scsi-tran
+
 \ Print a debug message when usb-debug-flag is set
 : usb-debug-print  ( str len -- )
    usb-debug-flag  IF type cr ELSE 2drop THEN
@@ -79,7 +84,50 @@
    dup IF
        s" cdrom" 2swap              ( alias-name len' dev-path len )
        set-alias                    ( -- )
+       \ cdrom-alias-num 1 + TO cdrom-alias-num
    ELSE 
        drop                         ( -- )
    THEN
 ;
+
+: usb-probe
+
+  usb-scan
+
+  cdrom-alias-num 0= IF
+     ." Not found CDROM! " cr
+  THEN
+     ." CDROM found " cdrom-alias-num . cr 
+;
+
+ 
+: usb-dev-test ( -- TRUE )
+   s" USB Device Test " usb-debug-print
+   1 usb-create-alias-name
+   find-alias ?dup IF
+      ." * open " 2dup type . cr
+   ELSE
+      s" can't found alias " usb-debug-print
+   THEN
+   open-dev ?dup IF
+      dup to my-self
+      dup ihandle>phandle dup set-node
+\     ihandle-bulk-tran s" bulk" open-package
+\     ihandle-scsi-tran s" scsi" open-package
+      s" bulk" $open-package ihandle-bulk-tran !
+      s" scsi" $open-package ihandle-scsi-tran !
+
+\      make-media-ready
+
+      s" close all " usb-debug-print
+      close-dev 0 set-node 0 to my-self
+
+      ihandle-bulk-tran close-package
+      ihandle-scsi-tran close-package
+   ELSE
+      s" can't open usb hub" usb-debug-print
+   THEN
+
+   TRUE
+;
+
diff --git a/slof/fs/usb/usb-storage.fs b/slof/fs/usb/usb-storage.fs
index 642e46a..bea4d64 100644
--- a/slof/fs/usb/usb-storage.fs
+++ b/slof/fs/usb/usb-storage.fs
@@ -21,6 +21,7 @@ s" block" device-type
 2 encode-int s" #address-cells" property
 0 encode-int s" #size-cells" property
 
+#include <packages/scsi-support.fs>
 
 \ -----------------------------------------------------------
 \ Specific properties
@@ -80,10 +81,19 @@ s" usb-storage-support.fs" INCLUDED
 \ to use the general bulk command a lot of global variables
 \ must be set. See for example the inquiry command.
 0 VALUE bulk-cnt
+0 VALUE bulk-cmd-len
+0 VALUE itest
 : do-bulk-command ( resp-buffer resp-size -- TRUE | FALSE )
    TO resp-size
    TO resp-buffer
-   2 TO bulk-cnt
+   \ dump buffer in debug-mode
+   usb-debug-flag IF
+      command-buffer 0E + c@ TO bulk-cmd-len 
+      s" cmd-length: " bulk-cmd-len usb-debug-print-val
+      command-buffer bulk-cmd-len 0E + dump cr
+   THEN
+
+   6 TO bulk-cnt \ 2 old value
    FALSE dup
    BEGIN 0= WHILE
    drop
@@ -94,7 +104,8 @@ s" usb-storage-support.fs" INCLUDED
    ( pt ed-type toggle buffer length mps address )
    rw-endpoint swap		             ( TRUE toggle | FALSE toggle )
    to bulk-out-toggle                        ( TRUE | FALSE )
-   IF
+   IF 
+      s" resp-size : " resp-size usb-debug-print-val
       resp-size 0<> IF  \ do we need a response ?!
         \ read the bulk response
         0 1 bulk-in-toggle resp-buffer resp-size mps-bulk-in
@@ -106,6 +117,7 @@ s" usb-storage-support.fs" INCLUDED
       ELSE
         TRUE
       THEN
+   
       IF
          \ read the bulk CSW
          0 1 bulk-in-toggle csw-buffer D mps-bulk-in
@@ -130,17 +142,24 @@ s" usb-storage-support.fs" INCLUDED
          ( pt ed-type toggle buffer length mps address )
          rw-endpoint swap                    ( TRUE toggle | FALSE toggle )
          to bulk-in-toggle                   ( TRUE | FALSE )
-	 IF
+         IF
 	   s" OK evaluate the CSW ..." usb-debug-print
-           csw-buffer c + l@-le
+           csw-buffer c + c@ dup TO itest
+	   s" CSW Status: " itest usb-debug-print-val
+	   dup
            2 = IF \ Phase Error
-	     s" do a bulk reset-recovery ..." usb-debug-print
+	    s" Phase error do a bulk reset-recovery ..." usb-debug-print
              bulk-out-ep bulk-in-ep my-usb-address
              bulk-reset-recovery-procedure
            THEN
-	 \ ELSE 
-	 \ don't abort if the read fails.
-	 THEN
+           \ ELSE 
+	   \ don't abort if the read fails.
+	   1 = IF \ Command failed
+             s" Command Failed do a bulk-reset-recovery" usb-debug-print
+             bulk-out-ep bulk-in-ep my-usb-address			
+             bulk-reset-recovery-procedure
+           THEN
+  	 THEN
          FALSE dup
       THEN
    ELSE
@@ -154,6 +173,7 @@ s" usb-storage-support.fs" INCLUDED
    REPEAT
 ;
 
+
 \ ---------------------------------------------------------------
 \ Method to 1. Send the INQUIRY command 2. Recieve and analyse
 \ (pending) INQUIRY data
@@ -161,17 +181,26 @@ s" usb-storage-support.fs" INCLUDED
 
 : inquiry ( -- )
    s" usb-storage: inquiry" usb-debug-print
-   command-buffer 1 20 80 lun 0c
+   command-buffer 1 20 80 lun 0C
    ( address tag transfer-len direction lun command-len )
    build-cbw
-   command-buffer SCSI-COMMAND-OFFSET + 20   ( address alloc-len )
-   build-inquiry
-   response-buffer 20 
-   do-bulk-command
+   \ command-buffer SCSI-COMMAND-OFFSET + 20   ( address alloc-len )
+   20 command-buffer SCSI-COMMAND-OFFSET +   ( alloc-len address  )
+   scsi-build-inquiry
+
+   \ s" command buffer:" usb-debug-print
+   \ command-buffer 0C dump cr
+   \ build-inquiry
+   \ s" build-inquiry command buffer:" usb-debug-print
+   \ command-buffer 0C dump cr
+   response-buffer 20 do-bulk-command
    IF
      s" Successfully read INQUIRY data" usb-debug-print
-     s" Inquiry data for 0x20 bytes availabe in Response buffer"
-     usb-debug-print
+     \ response-buffer 8 + c@ 8 vendor-id-str
+     \ usb-debug-flag IF
+     response-buffer .inquiry-text cr
+     \   response-buffer 8 + 16 dump cr      \ dump the rsponsed message
+     \ THEN
    ELSE
      \ TRUE ABORT" USB device transaction error. (inquiry)"
      5040 error" (USB) Device transaction error. (inquiry)"
@@ -186,14 +215,21 @@ s" usb-storage-support.fs" INCLUDED
 
 : read-capacity ( -- )
    s" usb-storage: read-capacity" usb-debug-print
-   command-buffer 1 8 80 lun 0c
+   command-buffer 1 8  80 lun  scsi-length-read-cap-10
    ( address tag transfer-len direction lun command-len )
-   build-cbw
+   build-cbw 
+   \ command-buffer 30 dump cr      \ dump the command buffer
+   command-buffer SCSI-COMMAND-OFFSET +      ( address )   
+   scsi-build-read-cap-10
+   lun 5 lshift
    command-buffer SCSI-COMMAND-OFFSET +      ( address )
-   build-read-capacity
+   read-cap-10>reserved1 c!
+
    response-buffer 8 do-bulk-command
    IF
      s" Successfully read READ CAPACITY data" usb-debug-print
+     \   response-buffer 8 dump cr      \ dump the rsponsed message
+     response-buffer scsi-get-capacity-10 .capacity-text cr
    ELSE
      \ TRUE ABORT" USB device transaction error. (capacity)"
      5040 error" (USB) Device transaction error. (capacity)"
@@ -202,7 +238,7 @@ s" usb-storage-support.fs" INCLUDED
 ;
 
 
-\ --------------------------------------------------------------------
+\ -------------------------------------------------------------------
 \ Method to 1. Send TEST UNIT READY command 2. Analyse the status
 \ of the response
 \ -------------------------------------------------------------------
@@ -246,6 +282,7 @@ s" usb-storage-support.fs" INCLUDED
    response-buffer 12 do-bulk-command
    IF
      s" Read Sense data successfully" usb-debug-print
+     \ response-buffer 12 dump cr      \ dump the rsponsed message
    ELSE
      \ TRUE ABORT" USB device transaction error. (request-sense)"
      5040 error" (USB) Device transaction error. (request-sense)"
@@ -325,7 +362,7 @@ s" usb-storage-support.fs" INCLUDED
    build-read                   ( address )
    temp1 do-bulk-command
    IF
-     s" Read Sense data successfully" usb-debug-print
+     s" Read  data successfully" usb-debug-print
    ELSE
      \ TRUE ABORT" USB device transaction error. (read-blocks)"
      5040 error" (USB) Device transaction error. (read-blocks)"
@@ -439,7 +476,11 @@ d# 800 CONSTANT media-ready-retry
    response-buffer c@
    CASE
       1 OF s" tape" device-name ENDOF
-      5 OF s" cdrom" device-name ENDOF
+      5 OF s" cdrom" device-name s" CDROM found" usb-debug-print ENDOF
+      0 OF s" sbc-dev" device-name s" SBC Direct acces device" usb-debug-print ENDOF
+          \ make-media-redy ENDOF \ read-capacity ENDOF 
+      7 OF s" optical" device-name s" Optical memory found" usb-debug-print ENDOF
+      0E OF s" rbc-dev" device-name s" RBC direct acces device found" usb-debug-print ENDOF
       \ dup OF s" storage" device-name ENDOF
    ENDCASE
 ;
diff --git a/slof/fs/usb/usb-support.fs b/slof/fs/usb/usb-support.fs
index 1326a04..9fa2f02 100644
--- a/slof/fs/usb/usb-support.fs
+++ b/slof/fs/usb/usb-support.fs
@@ -26,7 +26,9 @@ VARIABLE controlxfer-cmd
       drop 3drop 2drop FALSE EXIT  ( FALSE )
    THEN
    TO temp1               ( dir addr dlen setup-packet MPS ep-fun )
-   \ s" controlxfer: Allocated ED: " temp1 usb-debug-print-val
+   usb-test-flag IF
+      s" controlxfer: Allocated ED: " temp1 usb-debug-print-val
+   THEN   
    temp1 zero-out-an-ed-except-link ( dir addr dlen setup-packet MPS ep-fun )
    temp1 ed>eattr l@-le or temp1 ed>eattr l!-le ( dir addr dlen setup-ptr MPS )
    dup TO temp2 10 lshift temp1 ed>eattr l@-le or temp1 ed>eattr l!-le
@@ -139,6 +141,7 @@ VARIABLE controlxfer-cmd
 \ Free the ED and TDs associated with it.
 \ PENDING: Above said.
 
+20 CONSTANT max-retire-td
 
 : (transfer-wait-for-doneq)  ( ed-ptr -- TRUE | FALSE )
    dup                               ( ed-ptr ed-ptr )
@@ -147,7 +150,7 @@ VARIABLE controlxfer-cmd
    0 TO td-retire-count              ( ed-ptr )
    0 TO poll-timer  BEGIN            ( ed-ptr )
       td-retire-count num-tds <>     ( ed-ptr TRUE | FALSE )
-      poll-timer d#   5000 < and       ( ed-ptr TRUE | FALSE )
+      poll-timer max-retire-td < and       ( ed-ptr TRUE | FALSE )
    WHILE
       (HC-CHECK-WDH) IF                                   ( ed-ptr )
          hchccadneq rl@-le find-td-list-tail-and-size nip ( ed-ptr n )
@@ -159,7 +162,7 @@ VARIABLE controlxfer-cmd
             s" (transfer-wait-for-doneq: USB device communication error."
             usb-debug-print                 ( ed-ptr done-td failed-td CCcode R: CCcode )
             dup 4 = swap dup 5 = rot or IF  ( ed-ptr done-td failed-td CCcode R: CCcode )
-                d# 5000 TO poll-timer       ( ed-ptr done-td failed-td CCcode R: CCcode )
+                max-retire-td TO poll-timer ( ed-ptr done-td failed-td CCcode R: CCcode )
             THEN
             ( ed-ptr done-td failed-td CCcode R: CCcode)
             usb-debug-flag IF
@@ -185,15 +188,21 @@ VARIABLE controlxfer-cmd
          (free-td-list)                    ( ed-ptr )
          0 hchccadneq rl!-le               ( ed-ptr )
          (HC-ACK-WDH) \ TDs were written to DOne queue. ACK the HC.
-         \ s" Retired = " td-retire-count usb-debug-print-val
-         \ s" Total = " num-tds usb-debug-print-val
+	 usb-test-flag IF							   
+            s" Retired = " td-retire-count usb-debug-print-val
+            s" Total = " num-tds usb-debug-print-val
+	 THEN
       THEN
       poll-timer 1+ TO poll-timer
-      1 ms
+      4 ms \ longer  1 ms
+      usb-test-flag IF
+         s" poll-timer: " poll-timer usb-debug-print-val	   
+      THEN
    REPEAT                                  ( ed-ptr )
    disable-control-list-processing         ( ed-ptr )
    td-retire-count num-tds <> IF           ( ed-ptr )
       dup display-descriptors              ( ed-ptr )
+      s" maximum of retire " usb-debug-print						     
    THEN
    free-ed
    td-retire-count num-tds <>  IF
@@ -429,23 +438,31 @@ VARIABLE controlxfer-cmd
       num-rw-retired-tds num-rw-tds <               ( TRUE | FALSE )
       while-failed FALSE =  and                     ( TRUE | FALSE )
    WHILE
-      d# 5000 (wait-for-DOne-q)  IF                    ( TD-list )
+      d# 800 (wait-for-DOne-q)  IF                    ( TD-list )
          dup find-td-list-tail-and-size nip         ( td-list size )
          num-rw-retired-tds + TO num-rw-retired-tds ( td-list )
          dup (td-list-status)  IF                   ( td-list failed-TD CC )
             dup 4 =  IF
                   saved-list-type  CASE
-                     0 OF 0 0 control-std-clear-feature
+                     0 OF 
+		       0 0 control-std-clear-feature
+		       s" clear feature " usb-debug-print
                      ENDOF
                      1 OF                             \ clean bulk stalled 
-                       disable-bulk-list-processing   \ disable procesing
+                       s" clear bulk when stalled " usb-debug-print
+		       disable-bulk-list-processing   \ disable procesing
                        saved-rw-ed ed>eattr l@-le dup \ extract
                        780 and 7 rshift 80 or         \ endpoint and
                        swap 7f and                    \ usb addr
                        control-std-clear-feature
 		     ENDOF
-                     2 OF 0 saved-rw-ed ed>eattr l@-le
-                     control-std-clear-feature ENDOF
+                     2 OF 
+		       0 saved-rw-ed ed>eattr l@-le
+                     control-std-clear-feature 
+		     ENDOF
+		     dup OF
+		       s" default case von Michael" usb-debug-print 
+		     ENDOF
                      ENDCASE
             ELSE
                    usb-debug-flag IF
@@ -453,7 +470,7 @@ VARIABLE controlxfer-cmd
                    THEN
                    drop drop
                    \ TRUE ABORT" USB device transaction error."
-                   5040 error" (USB) device transaction error."
+                   5040 error" (USB) device transaction error (wait-td-retrire)."
                    ABORT
             THEN
              2drop drop
@@ -466,7 +483,10 @@ VARIABLE controlxfer-cmd
       ELSE
          drop                                       \ drop td-list pointer
          TRUE TO while-failed
+	 s" time out wait for done" usb-debug-print
+	 5 ms \ wait for bad device
       THEN
+   
    REPEAT
 ;
 
@@ -480,11 +500,14 @@ VARIABLE controlxfer-cmd
       1 OF disable-bulk-list-processing ENDOF
       2 OF disable-interrupt-list-processing ENDOF
    ENDCASE
-   saved-rw-ed ed>tdqhp l@-le 2 and 0<> IF
-      1
+   saved-rw-ed ed>tdqhp l@-le 2 and 0<> IF 
+      1 
+      s" retired 1" usb-debug-print
    ELSE
-      0
+      0 
+      s" retired 0" usb-debug-print
    THEN
+   \ s" retired " usb-debug-print-val
    WHILE-failed   IF
       FALSE           ( FALSE )
    ELSE
diff --git a/slof/ofw.S b/slof/ofw.S
index 38b447a..dcd4bdd 100644
--- a/slof/ofw.S
+++ b/slof/ofw.S
@@ -11,102 +11,19 @@
  *****************************************************************************/
 
 #include <cpu.h>
+#include <xvect.h>
 
 	.section ".slof.loader","ax"
 
-	# get our address
-
-.base:	
-	bcl	20,31,0f
-	.align  3
-.st:	.quad   _slof_text-.base
-.stl:   .quad   _slof_text_size
-.sd:	.quad	_slof_data-.base
-.sdl:	.quad	_slof_data_size
-.sbl:	.quad	_slof_bss_size
-0:	
-	mr	r16,r3			# ROM Base
- 	mfspr	r17, HSPRG1		# Fixme, will be done in pcd 
-	mflr	r31
-	subi	r31,r31,4
-
-	# copy paflof text
-
-	ld	r3,.st-.base(r31)
-	add	r3,r3,r31
-	lis	r4,_slof_text@h		# Addr of engine code
-	ori	r4,r4,_slof_text@l 
-	ld	r5,.stl-.base(31)
-	bl	.copy
-
-	lis	r3,_slof_text@h		# Addr of engine code
-	ori	r3,r3,_slof_text@l
-	ld	r4,.stl-.base(r31)
-	bl	.flush
-
-	# copy paflof data
-
-	ld	r3,.sd-.base(31)
-	add	r3,r3,r31
-	lis	r4,_slof_data@h		# Addr of engine data
-	ori	r4,r4,_slof_data@l 
-	ld	r5,.sdl-.base(r31)
-	bl	.copy
-
-	lis	r3,_slof_data@h		# Addr of engine data
-	ori	r3,r3,_slof_data@l 
-	ld	r4,.sdl-.base(r31)
-	bl	.flush
-
-	# zero paflof bss
-
-	lis	r3,_slof_bss@h		# Addr of engine bss
-	ori	r3,r3,_slof_bss@l 
-	ld	r4,.sbl-.base(r31)
-	bl	.zero
-
-	lis	r3,_slof_bss@h		# Addr of engine bss
-	ori	r3,r3,_slof_bss@l 
-	ld	r4,.sbl-.base(r31)
-	bl	.flush
+	mr	r16, r4			# ROM Base
+	mfspr	r17, HSPRG1		# Fixme, will be done in pcd
 
 	# fill in handler address
 
-	lis	r3,_slof_text@h
-	ori	r3,r3,_slof_text@l	
-	ld	r3,0(r3)
-	std	r3,0x2ff0(0)
+	lis	r3, _slof_text@h
+	ori	r3, r3, _slof_text@l
+	ld	r3, 0(r3)
+	std	r3, XVECT_M_HANDLER(0)
 
 	# GO!
-
 	ba	0x100
-
-
-.zero:	# zero from r3 size r4
-	subi	r3,r3,8
-	addi	r4,r4,7
-	srwi	r4,r4,3
-	mtctr	r4
-	li	r5,0
-0:
-	stdu	r5,8(r3)
-	bdnz	0b
-
-	blr
-
-.copy:	# copy from 3 to 4 size 5
-	subi	r3,r3,8
-	subi	r4,r4,8
-	addi	r5,r5,7
-	srwi	r5,r5,3
-	mtctr	r5
-0:
-	ldu	r5,8(r3)
-	stdu	r5,8(r4)
-	bdnz	0b
-
-	blr
-
-.flush:	# flush at 3 size 4
-	FLUSH_CACHE(r3, r4)
-	blr
diff --git a/slof/paflof.c b/slof/paflof.c
index b25f294..423ed8a 100644
--- a/slof/paflof.c
+++ b/slof/paflof.c
@@ -19,6 +19,7 @@
 #undef unix
 
 #include "paflof.h"
+#include <string.h>
 #include ISTR(TARG,h)
 
 #define LAST_ELEMENT(x) x[sizeof x / sizeof x[0] - 1]
diff --git a/slof/prim.code b/slof/prim.code
index c97706a..af4601c 100644
--- a/slof/prim.code
+++ b/slof/prim.code
@@ -413,7 +413,7 @@ MIRP
 code_FILL:
 	{
 		unsigned char c = (dp--)->u;
-		int size = ((dp--)->n);
+		type_n size = ((dp--)->n);
 		unsigned char *d = (unsigned char *)((dp--)->u);
 		type_u fill_v=c | c <<8;
 
@@ -448,7 +448,7 @@ code_FILL:
 
 code_COMP:
 	{
-		int len = ((dp--)->n);
+		type_n len = ((dp--)->n);
 		unsigned char *addr2 = (unsigned char *)((dp--)->u);
 		unsigned char *addr1 = (unsigned char *)((dp--)->u);
 
@@ -527,3 +527,10 @@ PRIM(STRING_X3d_CI)
 	}
 MIRP
 
+// bool dependend pick
+// ?PICK ( v1 v2 bool -- v1|v2 )
+PRIM(_X3f_PICK)
+        type_u b = TOS.u; POP;
+        if (b) { NOS = TOS; }
+        POP;
+MIRP