From 58e8f1f616d117aed6283690419dc16f53b7a202 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Wed, 22 Feb 2023 19:17:52 -1000 Subject: accel/tcg: Store some tlb flags in CPUTLBEntryFull MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We have run out of bits we can use within the CPUTLBEntry comparators, as TLB_FLAGS_MASK cannot overlap alignment. Store slow_flags[] in CPUTLBEntryFull, and merge with the flags from the comparator. A new TLB_FORCE_SLOW bit is set within the comparator as an indication that the slow path must be used. Move TLB_BSWAP to TLB_SLOW_FLAGS_MASK. Since we are out of bits, we cannot create a new bit without moving an old one. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- include/exec/cpu-defs.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include/exec/cpu-defs.h') diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h index e6a0794..fb4c8d4 100644 --- a/include/exec/cpu-defs.h +++ b/include/exec/cpu-defs.h @@ -125,6 +125,12 @@ typedef struct CPUTLBEntryFull { uint8_t lg_page_size; /* + * Additional tlb flags for use by the slow path. If non-zero, + * the corresponding CPUTLBEntry comparator must have TLB_FORCE_SLOW. + */ + uint8_t slow_flags[MMU_ACCESS_COUNT]; + + /* * Allow target-specific additions to this structure. * This may be used to cache items from the guest cpu * page tables for later use by the implementation. -- cgit v1.1