From a8170e5e97ad17ca169c64ba87ae2f53850dab4c Mon Sep 17 00:00:00 2001 From: Avi Kivity Date: Tue, 23 Oct 2012 12:30:10 +0200 Subject: Rename target_phys_addr_t to hwaddr target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are reserved) and its purpose doesn't match the name (most target_phys_addr_t addresses are not target specific). Replace it with a finger-friendly, standards conformant hwaddr. Outstanding patchsets can be fixed up with the command git rebase -i --exec 'find -name "*.[ch]" | xargs s/target_phys_addr_t/hwaddr/g' origin Signed-off-by: Avi Kivity Signed-off-by: Anthony Liguori --- hw/apic.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) (limited to 'hw/apic.c') diff --git a/hw/apic.c b/hw/apic.c index 385555e..49f0015 100644 --- a/hw/apic.c +++ b/hw/apic.c @@ -630,25 +630,25 @@ static void apic_timer(void *opaque) apic_timer_update(s, s->next_time); } -static uint32_t apic_mem_readb(void *opaque, target_phys_addr_t addr) +static uint32_t apic_mem_readb(void *opaque, hwaddr addr) { return 0; } -static uint32_t apic_mem_readw(void *opaque, target_phys_addr_t addr) +static uint32_t apic_mem_readw(void *opaque, hwaddr addr) { return 0; } -static void apic_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) +static void apic_mem_writeb(void *opaque, hwaddr addr, uint32_t val) { } -static void apic_mem_writew(void *opaque, target_phys_addr_t addr, uint32_t val) +static void apic_mem_writew(void *opaque, hwaddr addr, uint32_t val) { } -static uint32_t apic_mem_readl(void *opaque, target_phys_addr_t addr) +static uint32_t apic_mem_readl(void *opaque, hwaddr addr) { DeviceState *d; APICCommonState *s; @@ -732,7 +732,7 @@ static uint32_t apic_mem_readl(void *opaque, target_phys_addr_t addr) return val; } -static void apic_send_msi(target_phys_addr_t addr, uint32_t data) +static void apic_send_msi(hwaddr addr, uint32_t data) { uint8_t dest = (addr & MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT; uint8_t vector = (data & MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT; @@ -743,7 +743,7 @@ static void apic_send_msi(target_phys_addr_t addr, uint32_t data) apic_deliver_irq(dest, dest_mode, delivery, vector, trigger_mode); } -static void apic_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val) +static void apic_mem_writel(void *opaque, hwaddr addr, uint32_t val) { DeviceState *d; APICCommonState *s; -- cgit v1.1 From 60671e583c2bfb09746f59268fdc7d88eaa24deb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Wed, 10 Oct 2012 14:10:07 +0200 Subject: apic: Store X86CPU in APICCommonState MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Prepares for using a link<> property to connect APIC with CPU and for changing the CPU APIs to CPUState. Resolve Coding Style warnings by moving the closing parenthesis of foreach_apic() macro to next line. Signed-off-by: Andreas Färber Reviewed-by: Igor Mammedov --- hw/apic.c | 38 +++++++++++++++++++++----------------- 1 file changed, 21 insertions(+), 17 deletions(-) (limited to 'hw/apic.c') diff --git a/hw/apic.c b/hw/apic.c index 49f0015..99e84f9 100644 --- a/hw/apic.c +++ b/hw/apic.c @@ -107,7 +107,7 @@ static void apic_sync_vapic(APICCommonState *s, int sync_type) length = offsetof(VAPICState, enabled) - offsetof(VAPICState, isr); if (sync_type & SYNC_TO_VAPIC) { - assert(qemu_cpu_is_self(s->cpu_env)); + assert(qemu_cpu_is_self(&s->cpu->env)); vapic_state.tpr = s->tpr; vapic_state.enabled = 1; @@ -151,15 +151,15 @@ static void apic_local_deliver(APICCommonState *s, int vector) switch ((lvt >> 8) & 7) { case APIC_DM_SMI: - cpu_interrupt(s->cpu_env, CPU_INTERRUPT_SMI); + cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_SMI); break; case APIC_DM_NMI: - cpu_interrupt(s->cpu_env, CPU_INTERRUPT_NMI); + cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_NMI); break; case APIC_DM_EXTINT: - cpu_interrupt(s->cpu_env, CPU_INTERRUPT_HARD); + cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_HARD); break; case APIC_DM_FIXED: @@ -187,7 +187,7 @@ void apic_deliver_pic_intr(DeviceState *d, int level) reset_bit(s->irr, lvt & 0xff); /* fall through */ case APIC_DM_EXTINT: - cpu_reset_interrupt(s->cpu_env, CPU_INTERRUPT_HARD); + cpu_reset_interrupt(&s->cpu->env, CPU_INTERRUPT_HARD); break; } } @@ -248,18 +248,22 @@ static void apic_bus_deliver(const uint32_t *deliver_bitmask, case APIC_DM_SMI: foreach_apic(apic_iter, deliver_bitmask, - cpu_interrupt(apic_iter->cpu_env, CPU_INTERRUPT_SMI) ); + cpu_interrupt(&apic_iter->cpu->env, CPU_INTERRUPT_SMI) + ); return; case APIC_DM_NMI: foreach_apic(apic_iter, deliver_bitmask, - cpu_interrupt(apic_iter->cpu_env, CPU_INTERRUPT_NMI) ); + cpu_interrupt(&apic_iter->cpu->env, CPU_INTERRUPT_NMI) + ); return; case APIC_DM_INIT: /* normal INIT IPI sent to processors */ foreach_apic(apic_iter, deliver_bitmask, - cpu_interrupt(apic_iter->cpu_env, CPU_INTERRUPT_INIT) ); + cpu_interrupt(&apic_iter->cpu->env, + CPU_INTERRUPT_INIT) + ); return; case APIC_DM_EXTINT: @@ -293,7 +297,7 @@ static void apic_set_base(APICCommonState *s, uint64_t val) /* if disabled, cannot be enabled again */ if (!(val & MSR_IA32_APICBASE_ENABLE)) { s->apicbase &= ~MSR_IA32_APICBASE_ENABLE; - cpu_clear_apic_feature(s->cpu_env); + cpu_clear_apic_feature(&s->cpu->env); s->spurious_vec &= ~APIC_SV_ENABLE; } } @@ -362,10 +366,10 @@ static void apic_update_irq(APICCommonState *s) if (!(s->spurious_vec & APIC_SV_ENABLE)) { return; } - if (!qemu_cpu_is_self(s->cpu_env)) { - cpu_interrupt(s->cpu_env, CPU_INTERRUPT_POLL); + if (!qemu_cpu_is_self(&s->cpu->env)) { + cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_POLL); } else if (apic_irq_pending(s) > 0) { - cpu_interrupt(s->cpu_env, CPU_INTERRUPT_HARD); + cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_HARD); } } @@ -472,18 +476,18 @@ static void apic_get_delivery_bitmask(uint32_t *deliver_bitmask, static void apic_startup(APICCommonState *s, int vector_num) { s->sipi_vector = vector_num; - cpu_interrupt(s->cpu_env, CPU_INTERRUPT_SIPI); + cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_SIPI); } void apic_sipi(DeviceState *d) { APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d); - cpu_reset_interrupt(s->cpu_env, CPU_INTERRUPT_SIPI); + cpu_reset_interrupt(&s->cpu->env, CPU_INTERRUPT_SIPI); if (!s->wait_for_sipi) return; - cpu_x86_load_seg_cache_sipi(s->cpu_env, s->sipi_vector); + cpu_x86_load_seg_cache_sipi(&s->cpu->env, s->sipi_vector); s->wait_for_sipi = 0; } @@ -672,7 +676,7 @@ static uint32_t apic_mem_readl(void *opaque, hwaddr addr) case 0x08: apic_sync_vapic(s, SYNC_FROM_VAPIC); if (apic_report_tpr_access) { - cpu_report_tpr_access(s->cpu_env, TPR_ACCESS_READ); + cpu_report_tpr_access(&s->cpu->env, TPR_ACCESS_READ); } val = s->tpr; break; @@ -774,7 +778,7 @@ static void apic_mem_writel(void *opaque, hwaddr addr, uint32_t val) break; case 0x08: if (apic_report_tpr_access) { - cpu_report_tpr_access(s->cpu_env, TPR_ACCESS_WRITE); + cpu_report_tpr_access(&s->cpu->env, TPR_ACCESS_WRITE); } s->tpr = val; apic_sync_vapic(s, SYNC_TO_VAPIC); -- cgit v1.1 From e9f9d6b16510776ae3d07e91b1cfb4d412701270 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Thu, 3 May 2012 15:37:01 +0200 Subject: target-i386: Pass X86CPU to cpu_x86_load_seg_cache_sipi() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Simplifies the call in apic_sipi() again and needed for moving halted field to CPUState. Signed-off-by: Andreas Färber Reviewed-by: Igor Mammedov --- hw/apic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'hw/apic.c') diff --git a/hw/apic.c b/hw/apic.c index 99e84f9..4bc14e0 100644 --- a/hw/apic.c +++ b/hw/apic.c @@ -487,7 +487,7 @@ void apic_sipi(DeviceState *d) if (!s->wait_for_sipi) return; - cpu_x86_load_seg_cache_sipi(&s->cpu->env, s->sipi_vector); + cpu_x86_load_seg_cache_sipi(s->cpu, s->sipi_vector); s->wait_for_sipi = 0; } -- cgit v1.1 From 60e82579c75068cb49af95595aa99d727e657a0a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Wed, 2 May 2012 22:23:49 +0200 Subject: cpus: Pass CPUState to qemu_cpu_is_self() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change return type to bool, move to include/qemu/cpu.h and add documentation. Signed-off-by: Andreas Färber Reviewed-by: Igor Mammedov [AF: Updated new caller qemu_in_vcpu_thread()] --- hw/apic.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'hw/apic.c') diff --git a/hw/apic.c b/hw/apic.c index 4bc14e0..f73fc87 100644 --- a/hw/apic.c +++ b/hw/apic.c @@ -107,7 +107,7 @@ static void apic_sync_vapic(APICCommonState *s, int sync_type) length = offsetof(VAPICState, enabled) - offsetof(VAPICState, isr); if (sync_type & SYNC_TO_VAPIC) { - assert(qemu_cpu_is_self(&s->cpu->env)); + assert(qemu_cpu_is_self(CPU(s->cpu))); vapic_state.tpr = s->tpr; vapic_state.enabled = 1; @@ -363,10 +363,12 @@ static int apic_irq_pending(APICCommonState *s) /* signal the CPU if an irq is pending */ static void apic_update_irq(APICCommonState *s) { + CPUState *cpu = CPU(s->cpu); + if (!(s->spurious_vec & APIC_SV_ENABLE)) { return; } - if (!qemu_cpu_is_self(&s->cpu->env)) { + if (!qemu_cpu_is_self(cpu)) { cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_POLL); } else if (apic_irq_pending(s) > 0) { cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_HARD); -- cgit v1.1 From a2cb15b0ddfa05f81a42d7b65dd0c7c50e420c33 Mon Sep 17 00:00:00 2001 From: "Michael S. Tsirkin" Date: Wed, 12 Dec 2012 14:24:50 +0200 Subject: pci: update all users to look in pci/ update all users so we can remove the makefile hack. Signed-off-by: Michael S. Tsirkin --- hw/apic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'hw/apic.c') diff --git a/hw/apic.c b/hw/apic.c index f73fc87..d66a476 100644 --- a/hw/apic.c +++ b/hw/apic.c @@ -20,7 +20,7 @@ #include "apic_internal.h" #include "apic.h" #include "ioapic.h" -#include "msi.h" +#include "pci/msi.h" #include "host-utils.h" #include "trace.h" #include "pc.h" -- cgit v1.1 From 1de7afc984b49af164e2619e6850b9732b173b34 Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Mon, 17 Dec 2012 18:20:00 +0100 Subject: misc: move include files to include/qemu/ Signed-off-by: Paolo Bonzini --- hw/apic.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'hw/apic.c') diff --git a/hw/apic.c b/hw/apic.c index d66a476..81b82f6 100644 --- a/hw/apic.c +++ b/hw/apic.c @@ -16,12 +16,12 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see */ -#include "qemu-thread.h" +#include "qemu/thread.h" #include "apic_internal.h" #include "apic.h" #include "ioapic.h" #include "pci/msi.h" -#include "host-utils.h" +#include "qemu/host-utils.h" #include "trace.h" #include "pc.h" #include "apic-msidef.h" -- cgit v1.1