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2025-01-17tests/tcg/plugins/insn: remove unused callback parameterPierrick Bouvier1-3/+1
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250116160306.1709518-12-alex.bennee@linaro.org>
2025-01-15tests: acpi: update expected blobsIgor Mammedov41-40/+0
_DSM function 7 AML should have followig change: If ((Arg2 == 0x07)) { - Local0 = Package (0x02) - { - Zero, - "" - } Local2 = AIDX (DerefOf (Arg4 [Zero]), DerefOf (Arg4 [One] )) - Local0 [Zero] = Local2 + Local0 = Package (0x02) {} + If (!((Local2 == Zero) || (Local2 == 0xFFFFFFFF))) + { + Local0 [Zero] = Local2 + Local0 [One] = "" + } + Return (Local0) } } Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20250115125342.3883374-4-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-01-15tests: acpi: whitelist expected blobsIgor Mammedov1-0/+40
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20250115125342.3883374-2-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-01-15tests/qtest: Add intel-iommu testZhenzhong Duan2-0/+65
Add the framework to test the intel-iommu device. Currently only tested cap/ecap bits correctness when x-flts=on in scalable mode. Also tested cap/ecap bits consistency before and after system reset. Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Acked-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Clément Mathieu--Drif<clement.mathieu--drif@eviden.com> Acked-by: Jason Wang <jasowang@redhat.com> Message-Id: <20241212083757.605022-21-zhenzhong.duan@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-01-15tests/acpi: q35: Update host address width in DMARZhenzhong Duan2-1/+0
Differences: @@ -1,39 +1,39 @@ /* * Intel ACPI Component Architecture * AML/ASL+ Disassembler version 20200925 (64-bit version) * Copyright (c) 2000 - 2020 Intel Corporation * - * Disassembly of tests/data/acpi/x86/q35/DMAR.dmar, Mon Nov 11 15:31:18 2024 + * Disassembly of /tmp/aml-SPJ4W2, Mon Nov 11 15:31:18 2024 * * ACPI Data Table [DMAR] * * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue */ [000h 0000 4] Signature : "DMAR" [DMA Remapping table] [004h 0004 4] Table Length : 00000078 [008h 0008 1] Revision : 01 -[009h 0009 1] Checksum : 15 +[009h 0009 1] Checksum : 0C [00Ah 0010 6] Oem ID : "BOCHS " [010h 0016 8] Oem Table ID : "BXPC " [018h 0024 4] Oem Revision : 00000001 [01Ch 0028 4] Asl Compiler ID : "BXPC" [020h 0032 4] Asl Compiler Revision : 00000001 -[024h 0036 1] Host Address Width : 26 +[024h 0036 1] Host Address Width : 2F [025h 0037 1] Flags : 01 [026h 0038 10] Reserved : 00 00 00 00 00 00 00 00 00 00 [030h 0048 2] Subtable Type : 0000 [Hardware Unit Definition] [032h 0050 2] Length : 0040 [034h 0052 1] Flags : 00 [035h 0053 1] Reserved : 00 [036h 0054 2] PCI Segment Number : 0000 [038h 0056 8] Register Base Address : 00000000FED90000 [040h 0064 1] Device Scope Type : 03 [IOAPIC Device] [041h 0065 1] Entry Length : 08 [042h 0066 2] Reserved : 0000 [044h 0068 1] Enumeration ID : 00 [045h 0069 1] PCI Bus Number : FF Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Acked-by: Clément Mathieu--Drif<clement.mathieu--drif@eviden.com> Message-Id: <20241212083757.605022-18-zhenzhong.duan@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-01-15tests/acpi: q35: allow DMAR acpi table changesZhenzhong Duan1-0/+1
Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Acked-by: Jason Wang <jasowang@redhat.com> Message-Id: <20241212083757.605022-16-zhenzhong.duan@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-01-15tests: acpi: update expected blobsIgor Mammedov43-42/+0
previous patch has changed cpu hotplug AML, expected diff: @@ -2942,6 +2942,7 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001) { Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) Name (CNEW, Package (0xFF) {}) + Name (CEJL, Package (0xFF) {}) Local3 = Zero Local4 = One While ((Local4 == One)) @@ -2949,6 +2950,7 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001) Local4 = Zero Local0 = One Local1 = Zero + Local5 = Zero While (((Local0 == One) && (Local3 < One))) { Local0 = Zero @@ -2959,7 +2961,7 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001) Break } - If ((Local1 == 0xFF)) + If (((Local1 == 0xFF) || (Local5 == 0xFF))) { Local4 = One Break @@ -2972,10 +2974,11 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001) Local1++ Local0 = One } - ElseIf ((\_SB.PCI0.PRES.CRMV == One)) + + If ((\_SB.PCI0.PRES.CRMV == One)) { - CTFY (Local3, 0x03) - \_SB.PCI0.PRES.CRMV = One + CEJL [Local5] = Local3 + Local5++ Local0 = One } @@ -2992,6 +2995,16 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001) \_SB.PCI0.PRES.CINS = One Local2++ } + + Local2 = Zero + While ((Local2 < Local5)) + { + Local3 = DerefOf (CEJL [Local2]) + CTFY (Local3, 0x03) + \_SB.PCI0.PRES.CSEL = Local3 + \_SB.PCI0.PRES.CRMV = One + Local2++ + } } Release (\_SB.PCI0.PRES.CPLK) Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20241210163945.3422623-4-imammedo@redhat.com> Tested-by: Eric Mackay <eric.mackay@oracle.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-01-15tests: acpi: whitelist expected blobsIgor Mammedov1-0/+42
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20241210163945.3422623-2-imammedo@redhat.com> Tested-by: Eric Mackay <eric.mackay@oracle.com> Acked-by: Ani Sinha <anisinha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-01-13tests: Add functional tests for HPPA machinesPhilippe Mathieu-Daudé4-3/+40
Add quick firmware boot tests (less than 1sec) for the B160L (32-bit) and C3700 (64-bit) HPPA machines: $ make check-functional-hppa ... 4/4 qemu:func-quick+func-hppa / func-hppa-hppa_seabios OK 0.22s 2 subtests passed Remove the duplicated B160L test in qtest/boot-serial-test.c. Suggested-by: Helge Deller <deller@gmx.de> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Helge Deller <deller@gmx.de> Tested-by: Helge Deller <deller@gmx.de> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250102100340.43014-3-philmd@linaro.org>
2025-01-13tests/qtest/boot-serial-test: Correct HPPA machine namePhilippe Mathieu-Daudé1-1/+1
Commit 7df6f751176 ("hw/hppa: Split out machine creation") renamed the 'hppa' machine as 'B160L', but forgot to update the boot serial test, which ended being skipped. Cc: qemu-stable@nongnu.org Fixes: 7df6f751176 ("hw/hppa: Split out machine creation") Reported-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20250102100340.43014-2-philmd@linaro.org>
2025-01-13tests/qtest/libqos: Reuse TYPE_IMX_I2C defineBernhard Beschow2-4/+5
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Fabiano Rosas <farosas@suse.de> Message-ID: <20250108092538.11474-12-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-01-13hw/ufs: Adjust value to match CPU's endian formatKeoseong Park1-1/+1
In ufs_write_attr_value(), the value parameter is handled in the CPU's endian format but provided in big-endian format by the caller. Thus, it is converted to the CPU's endian format. The related test code is also fixed to reflect this change. Fixes: 7c85332a2b3e ("hw/ufs: minor bug fixes related to ufs-test") Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Keoseong Park <keosung.park@samsung.com> Reviewed-by: Jeuk Kim <jeuk20.kim@samsung.com> Message-ID: <20250107084356epcms2p2af4d86432174d76ea57336933e46b4c3@epcms2p2> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-01-13Merge tag 'pull-target-arm-20250113' of ↵Stefan Hajnoczi3-13/+28
https://git.linaro.org/people/pmaydell/qemu-arm into staging target-arm queue: * hw/arm_sysctl: fix extracting 31th bit of val * hw/misc: cast rpm to uint64_t * tests/qtest/boot-serial-test: Improve ASM * target/arm: Move minor arithmetic helpers out of helper.c * target/arm: change default pauth algorithm to impdef # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmeFGuUZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3mFPEAChT9DR/+bNSt0Q28TsCv84 # dMMXle7c821NHTNeP/uBQ0i3aopmOJE145wMSoZza8l+EYjOdQwHpinjfu8J/rOS # mJUgAFRcgUoH77+k0p0x1tqKi7+669TznOMOF4RyudKju5SteVyOGgLNjzJlnItq # 3QRBiDTS+qXqAUhgQtzcuY6Xl5M2KA/cpSWYxQf/JPpZMX2c37V8AlSF/1GkLo6Z # 3afrasXUp+U0+03Pe3Ffknzx/LtkLc2hg2LVX8CeqMLRJSA0ohkSwa/xax+2hn+G # 9fKn92IpQOjEFw6qBTBvkerP2hr6yhDFTVFI9v+lsY4bf7tQGIE75HEGZ1EMr26b # LCIPSQvez9exZl/usLGkUq9MWAiEkhBMy99ajwg5X4IhcbS+oyFtH2teYpt9rd9N # 2dVS5qzErN7TCZQza9A7+bt8v5OtbJk2K8Qx9QhMFU/dIUSp0vOA3NwGu+qkciAb # wNdoXT22Hy0czDiQ/ln3aocmwWeVZN4+AxKNoigQhor+5oIR4lMn1P7yAmsCLeL8 # AaLXJdR4aLnYugh23qzv9wf9kAbxRBMvLbsNTKGG00DYQ0xoY4pQ2CmPAJoVVxpU # FjRydG9sC/6sMoJiOoDVpPW003VY2If8r0ObzqUd2gkw1HLf12yug+lij0LkcXKC # Au7ycaoHiTlluNxyQjsgPg== # =FGfo # -----END PGP SIGNATURE----- # gpg: Signature made Mon 13 Jan 2025 08:53:41 EST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20250113' of https://git.linaro.org/people/pmaydell/qemu-arm: docs/system/arm/virt: mention specific migration information target/arm: change default pauth algorithm to impdef tests/tcg/aarch64: force qarma5 for pauth-3 test target/arm: add new property to select pauth-qarma5 target/arm: Move minor arithmetic helpers out of helper.c tests/qtest/boot-serial-test: Initialize PL011 Control register tests/qtest/boot-serial-test: Reorder pair of instructions in PL011 test tests/qtest/boot-serial-test: Reduce for() loop in PL011 tests tests/qtest/boot-serial-test: Improve ASM comments of PL011 tests hw/misc: cast rpm to uint64_t hw/arm_sysctl: fix extracting 31th bit of val Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-01-13tests/tcg/aarch64: force qarma5 for pauth-3 testPeter Maydell1-0/+3
The pauth-3 test explicitly tests that a computation of the pointer-authentication produces the expected result. This means that it must be run with the QARMA5 algorithm. Explicitly set the pauth algorithm when running this test, so that it doesn't break when we change the default algorithm the 'max' CPU uses. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-01-13target/arm: add new property to select pauth-qarma5Pierrick Bouvier1-4/+11
Before changing default pauth algorithm, we need to make sure current default one (QARMA5) can still be selected. $ qemu-system-aarch64 -cpu max,pauth-qarma5=on ... Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241219183211.3493974-2-pierrick.bouvier@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-01-13tests/qtest/boot-serial-test: Initialize PL011 Control registerPhilippe Mathieu-Daudé1-1/+6
The tests using the PL011 UART of the virt and raspi machines weren't properly enabling the UART and its transmitter previous to sending characters. Follow the PL011 manual initialization recommendation by setting the proper bits of the control register. Update the ASM code prefixing: *UART_CTRL = UART_ENABLE | TX_ENABLE; to: while (true) { *UART_DATA = 'T'; } Note, since commit 51b61dd4d56 ("hw/char/pl011: Warn when using disabled transmitter") incomplete PL011 initialization can be logged using the '-d guest_errors' command line option. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-01-13tests/qtest/boot-serial-test: Reorder pair of instructions in PL011 testPhilippe Mathieu-Daudé1-1/+1
In the next commit we are going to use a different value for the $w1 register, maintaining the same $x2 value. In order to keep the next commit trivial to review, set $x2 before $w1. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-01-13tests/qtest/boot-serial-test: Reduce for() loop in PL011 testsPhilippe Mathieu-Daudé1-6/+6
Since registers are not modified, we don't need to refill their values. Directly jump to the previous store instruction to keep filling the TXDAT register. The equivalent C code remains: while (true) { *UART_DATA = 'T'; } Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-01-13tests/qtest/boot-serial-test: Improve ASM comments of PL011 testsPhilippe Mathieu-Daudé1-9/+9
Re-indent ASM comments adding the 'loop:' label. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-01-11dockerfiles: Remove 'MAINTAINER' entry in debian-tricore-cross.dockerPhilippe Mathieu-Daudé1-2/+0
AMSAT closed its email service [*] so my personal email address is now defunct. Remove it to avoid bouncing emails. [*] https://web.archive.org/web/20240617194936/https://forum.amsat-dl.org/index.php?thread/4581-amsat-mail-alias-service-to-end-august-1-2024/ Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20250102152513.61065-1-philmd@linaro.org> [AJB: update URL to web.archive.org] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250108121054.1126164-32-alex.bennee@linaro.org>
2025-01-11pc-bios: ensure keymaps dependencies set vnc testsAlex Bennée1-1/+1
I was seeing failures on vnc-display-test on FreeBSD: make vm-build-freebsd V=1 TARGET_LIST=aarch64-softmmu BUILD_TARGET=check-qtest QEMU_LOCAL=1 DEBUG=1 Leads to: qemu-system-aarch64: -vnc none: could not read keymap file: 'en-us' Broken pipe ../src/tests/qtest/libqtest.c:196: kill_qemu() tried to terminate QEMU process but encountered exit status 1 (expected 0) which was as far as I could tell because we don't populate the $BLD/pc-bios/keymaps (although scripts/symlink-install-tree.py attempts to symlink qemu-bundle/usr/local/share/qemu/keymaps/ to that dir). Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250108121054.1126164-31-alex.bennee@linaro.org>
2025-01-11tests/vm: allow interactive login as rootAlex Bennée2-3/+9
This is useful when debugging and you want to add packages to an image. Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250108121054.1126164-30-alex.bennee@linaro.org>
2025-01-11tests/vm: partially un-tabify help outputAlex Bennée1-13/+13
While the make syntax itself uses tabs having a mixture of tabs and spaces in the vm-help output make no sense and confuses things lining up between terminal and editor. Fix that. Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250108121054.1126164-29-alex.bennee@linaro.org>
2025-01-11tests/vm: fix build_path based pathAlex Bennée1-2/+1
We no longer need to go into the per-arch build directories to find the build directories binary. Lets call it directly. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250108121054.1126164-28-alex.bennee@linaro.org>
2025-01-11tests/lcitool: remove temp workaround for debian mips64elDaniel P. Berrangé2-29/+9
The workaround applied in commit c60473d29254b79d9437eface8b342e84663ba66 Author: Alex Bennée <alex.bennee@linaro.org> Date: Wed Oct 2 10:03:33 2024 +0200 testing: bump mips64el cross to bookworm and fix package list Is no longer required since the affected builds are now fixed. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Tested-by: Thomas Huth <thuth@redhat.com> Message-Id: <20241217133525.3836570-1-berrange@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250108121054.1126164-27-alex.bennee@linaro.org>
2025-01-11tests/docker: move riscv64 cross container from sid to trixieAlex Bennée2-3/+5
Although riscv64 isn't going to be a release architecture for trixie the packages are still built while it is testing. Moving from sid will also avoid some of the volatility we get from tracking the bleeding edge. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250108121054.1126164-26-alex.bennee@linaro.org>
2025-01-11tests/lcitool: bump to latest version of libvirt-ciAlex Bennée2-1/+1
We will shortly need this to build our riscv64 cross container. However to keep the delta down just do the bump first. As ccache4 is now preferred for FreeBSD to get the latest version there is a little update in the FreeBSD metadata. Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250108121054.1126164-25-alex.bennee@linaro.org>
2025-01-11tests/functional: extend test_aarch64_virt with vulkan testAlex Bennée1-2/+74
Now that we have virtio-gpu Vulkan support, let's add a test for it. Currently this is using images build by buildroot: https://lists.buildroot.org/pipermail/buildroot/2024-December/768196.html Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250108121054.1126164-24-alex.bennee@linaro.org>
2025-01-10tests/functional: bail aarch64_virt tests early if missing TCGAlex Bennée1-4/+7
The set_machine and require_accelerator steps can bail early so move those to the front of the test functions. While we are at it also clean up some long lines when adding the vm arguments. Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250108121054.1126164-23-alex.bennee@linaro.org>
2025-01-10tests/functional: remove unused kernel_command_lineAlex Bennée1-2/+0
The Alpine test boots from the CDROM so we don't --append a command line. Drop the unused code. Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250108121054.1126164-22-alex.bennee@linaro.org>
2025-01-10tests/functional: update tuxruntest to use uncompress utilityAlex Bennée1-11/+1
Use the utility functions to reduce code duplication. Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250108121054.1126164-21-alex.bennee@linaro.org>
2025-01-10tests/functional: add zstd support to uncompress utilityAlex Bennée1-0/+24
Rather than using the python library (which has a different API anyway) lets just call the binary. zstdtools is already in out qemu.yml so all test containers should have it around. Tests should still use @skipIfMissingCommands('zstd') to gracefully handle when only minimal dependencies have been installed. Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250108121054.1126164-20-alex.bennee@linaro.org>
2025-01-10tests/functional: remove hacky sleep from the testsAlex Bennée1-14/+18
We have proper detection of prompts now so we don't need to guess with sleep() sprinkled through the test. The extra step of calling halt is just to flush the final bits of the log (although the last line is still missed). Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250108121054.1126164-19-alex.bennee@linaro.org>
2025-01-10tests/qtest: remove clock_steps from virtio testsAlex Bennée1-4/+0
In the qtest environment time will not step forward if the system is paused (timers disabled) or we have no timer events to fire. As a result VirtIO events are responded to directly and we don't need to step time forward. We still do timeout processing to handle the fact the target QEMU may not be ready to respond right away. This will usually be due to a slow CI system or if QEMU is running under something like rr. Future qtest patches will assert that time actually changes when a step is requested. Reviewed-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250108121054.1126164-17-alex.bennee@linaro.org>
2025-01-10tests/functional/aarch64: add tests for FEAT_RMEPierrick Bouvier3-0/+171
This boot an OP-TEE environment, and launch a nested guest VM inside it using the Realms feature. We do it for virt and sbsa-ref platforms. Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20241220165212.3653495-1-pierrick.bouvier@linaro.org> [AJB: tweak ordering of setup, strip changelog from commit] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Thomas Huth <thuth@redhat.com> Message-Id: <20250108121054.1126164-16-alex.bennee@linaro.org>
2025-01-10tests/functional: update the x86_64 tuxrun testsAlex Bennée1-4/+4
Now there are new up to date images available we should update to them. Cc: Anders Roxell <anders.roxell@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Tested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250108121054.1126164-15-alex.bennee@linaro.org>
2025-01-10tests/functional: update the sparc64 tuxrun testsAlex Bennée1-4/+4
Now there are new up to date images available we should update to them. Cc: Anders Roxell <anders.roxell@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Tested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250108121054.1126164-14-alex.bennee@linaro.org>
2025-01-10tests/functional: update the s390x tuxrun testsAlex Bennée1-4/+4
Now there are new up to date images available we should update to them. Cc: Anders Roxell <anders.roxell@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Tested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250108121054.1126164-13-alex.bennee@linaro.org>
2025-01-10tests/functional: update the riscv64 tuxrun testsAlex Bennée1-8/+8
Now there are new up to date images available we should update to them. Note we re-use the riscv32 kernel and rootfs for test_riscv64_rv32. Cc: Anders Roxell <anders.roxell@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Tested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250108121054.1126164-12-alex.bennee@linaro.org>
2025-01-10tests/functional: update the riscv32 tuxrun testsAlex Bennée1-4/+4
Now there are new up to date images available we should update to them. Cc: Anders Roxell <anders.roxell@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Tested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250108121054.1126164-11-alex.bennee@linaro.org>
2025-01-10tests/functional: update the ppc64 tuxrun testsAlex Bennée1-8/+8
Now there are new up to date images available we should update to them. Cc: Anders Roxell <anders.roxell@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Tested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250108121054.1126164-10-alex.bennee@linaro.org>
2025-01-10tests/functional: update the ppc32 tuxrun testsAlex Bennée1-4/+4
Now there are new up to date images available we should update to them. Cc: Anders Roxell <anders.roxell@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Tested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250108121054.1126164-9-alex.bennee@linaro.org>
2025-01-10tests/functional: update the mips64el tuxrun testsAlex Bennée1-4/+4
Now there are new up to date images available we should update to them. Cc: Anders Roxell <anders.roxell@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Tested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250108121054.1126164-8-alex.bennee@linaro.org>
2025-01-10tests/functional: update the mips64 tuxrun testsAlex Bennée1-4/+4
Now there are new up to date images available we should update to them. Cc: Anders Roxell <anders.roxell@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Tested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250108121054.1126164-7-alex.bennee@linaro.org>
2025-01-10tests/functional: update the mips32el tuxrun testsAlex Bennée1-4/+4
Now there are new up to date images available we should update to them. Cc: Anders Roxell <anders.roxell@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Tested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250108121054.1126164-6-alex.bennee@linaro.org>
2025-01-10tests/functional: update the mips32 tuxrun testsAlex Bennée1-4/+4
Now there are new up to date images available we should update to them. Cc: Anders Roxell <anders.roxell@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Tested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250108121054.1126164-5-alex.bennee@linaro.org>
2025-01-10tests/functional: add a m68k tuxrun testsAlex Bennée2-0/+35
We didn't have this before and as it exercises the m68k virt platform it seems worth adding. We don't wait for the shutdown because QEMU will auto-exit on the shutdown. Cc: Laurent Vivier <laurent@vivier.eu> Cc: Anders Roxell <anders.roxell@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250108121054.1126164-4-alex.bennee@linaro.org>
2025-01-10tests/functional: update the i386 tuxrun testsAlex Bennée1-4/+4
Now there are new up to date images available we should update to them. Cc: Anders Roxell <anders.roxell@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Tested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250108121054.1126164-3-alex.bennee@linaro.org>
2025-01-10tests/functional: update the arm tuxrun testsAlex Bennée1-14/+14
Now there are new up to date images available we should update to them. Cc: Anders Roxell <anders.roxell@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Tested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250108121054.1126164-2-alex.bennee@linaro.org>
2025-01-07tests/functional/test_x86_64_hotplug_cpu: Fix race condition during unplugThomas Huth1-2/+4
When unplugging the CPU, the test tries to check for a successful unplug by changing to the /sys/devices/system/cpu/cpu1 directory to see whether that fails. However, the "cd" could be faster than the unplug operation in the kernel, so there is a race condition and the test sometimes fails here. Fix it by trying to change the directory in a loop until the the CPU has really been unplugged. While we're at it, also add a "cd .." before unplugging to make the console output a little bit less confusing (since the path is echoed in the shell prompt). Reported-by: Stefan Hajnoczi <stefanha@gmail.com> Message-ID: <20250107115245.52755-1-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>