aboutsummaryrefslogtreecommitdiff
path: root/mlir/test/Conversion
ModeNameSize
d---------AMDGPUToROCDL85logplain
d---------AffineToStandard191logplain
d---------ArithToLLVM106logplain
d---------ArithToSPIRV148logplain
d---------AsyncToLLVM157logplain
d---------BufferizationToMemRef56logplain
d---------ComplexToLLVM96logplain
d---------ComplexToLibm48logplain
d---------ComplexToStandard100logplain
d---------ControlFlowToLLVM40logplain
d---------ControlFlowToSPIRV48logplain
d---------FuncToLLVM564logplain
d---------FuncToSPIRV97logplain
d---------GPUCommon382logplain
d---------GPUToCUDA100logplain
d---------GPUToNVVM93logplain
d---------GPUToROCDL185logplain
d---------GPUToROCm101logplain
d---------GPUToSPIRV309logplain
d---------GPUToVulkan109logplain
d---------IndexToLLVM46logplain
d---------MathToFuncs76logplain
d---------MathToLLVM45logplain
d---------MathToLibm48logplain
d---------MathToSPIRV153logplain
d---------MemRefToLLVM327logplain
d---------MemRefToSPIRV175logplain
d---------NVGPUToNVVM46logplain
d---------OpenACCToLLVM64logplain
d---------OpenACCToSCF55logplain
d---------OpenMPToLLVM50logplain
d---------PDLToPDLInterp117logplain
d---------ReconcileUnrealizedCasts126logplain
d---------SCFToControlFlow47logplain
d---------SCFToGPU186logplain
d---------SCFToOpenMP89logplain
d---------SCFToSPIRV109logplain
d---------SPIRVToLLVM838logplain
d---------ShapeToStandard108logplain
d---------TensorToLinalg53logplain
d---------TensorToSPIRV52logplain
d---------TosaToArith46logplain
d---------TosaToLinalg154logplain
d---------TosaToSCF44logplain
d---------TosaToTensor47logplain
d---------VectorToGPU109logplain
d---------VectorToLLVM156logplain
d---------VectorToSCF287logplain
d---------VectorToSPIRV48logplain