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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686--| FileCheck %s --check-prefixes=X86
; RUN: llc < %s -mtriple=x86_64--| FileCheck %s --check-prefixes=X64
;
; PR35202
;
declare void @on_less()
declare void @on_equal()
declare void @on_greater()
define void @eq_first(i32 %0, i32 %1) {
; X86-LABEL: eq_first:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: cmpl %eax, {{[0-9]+}}(%esp)
; X86-NEXT: jl on_less@PLT # TAILCALL
; X86-NEXT: # %bb.1:
; X86-NEXT: je on_equal@PLT # TAILCALL
; X86-NEXT: # %bb.2:
; X86-NEXT: jmp on_greater@PLT # TAILCALL
;
; X64-LABEL: eq_first:
; X64: # %bb.0:
; X64-NEXT: cmpl %esi, %edi
; X64-NEXT: jl on_less@PLT # TAILCALL
; X64-NEXT: # %bb.1:
; X64-NEXT: je on_equal@PLT # TAILCALL
; X64-NEXT: # %bb.2:
; X64-NEXT: jmp on_greater@PLT # TAILCALL
%3 = icmp slt i32 %0, %1
br i1 %3, label %4, label %5
4:
tail call void @on_less()
br label %9
5:
%6 = icmp eq i32 %0, %1
br i1 %6, label %7, label %8
7:
tail call void @on_equal()
br label %9
8:
tail call void @on_greater()
br label %9
9:
ret void
}
define void @gt_first(i32 %0, i32 %1) {
; X86-LABEL: gt_first:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: cmpl %eax, %ecx
; X86-NEXT: jl on_less@PLT # TAILCALL
; X86-NEXT: # %bb.1:
; X86-NEXT: jg on_greater@PLT # TAILCALL
; X86-NEXT: # %bb.2:
; X86-NEXT: jmp on_equal@PLT # TAILCALL
;
; X64-LABEL: gt_first:
; X64: # %bb.0:
; X64-NEXT: cmpl %esi, %edi
; X64-NEXT: jl on_less@PLT # TAILCALL
; X64-NEXT: # %bb.1:
; X64-NEXT: jg on_greater@PLT # TAILCALL
; X64-NEXT: # %bb.2:
; X64-NEXT: jmp on_equal@PLT # TAILCALL
%3 = icmp slt i32 %0, %1
br i1 %3, label %4, label %5
4:
tail call void @on_less()
br label %9
5:
%6 = icmp slt i32 %1, %0
br i1 %6, label %7, label %8
7:
tail call void @on_greater()
br label %9
8:
tail call void @on_equal()
br label %9
9:
ret void
}
define void @cmp_sub_same_order(i32 %x, i32 %y, ptr %p) {
; X86-LABEL: cmp_sub_same_order:
; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: subl {{[0-9]+}}(%esp), %eax
; X86-NEXT: jge .LBB2_2
; X86-NEXT: # %bb.1: # %cond.true
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl %eax, (%ecx)
; X86-NEXT: .LBB2_2: # %cond.end
; X86-NEXT: retl
;
; X64-LABEL: cmp_sub_same_order:
; X64: # %bb.0: # %entry
; X64-NEXT: subl %esi, %edi
; X64-NEXT: jge .LBB2_2
; X64-NEXT: # %bb.1: # %cond.true
; X64-NEXT: movl %edi, (%rdx)
; X64-NEXT: .LBB2_2: # %cond.end
; X64-NEXT: retq
entry:
%cmp = icmp slt i32 %x, %y
br i1 %cmp, label %cond.true, label %cond.end
cond.true:
%sub = sub nsw i32 %x, %y
store i32 %sub, ptr %p
br label %cond.end
cond.end:
ret void
}
define void @cmp_sub_different_order(i32 %x, i32 %y, ptr %p) {
; X86-LABEL: cmp_sub_different_order:
; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: subl {{[0-9]+}}(%esp), %eax
; X86-NEXT: jge .LBB3_2
; X86-NEXT: # %bb.1: # %cond.true
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl %eax, (%ecx)
; X86-NEXT: .LBB3_2: # %cond.end
; X86-NEXT: retl
;
; X64-LABEL: cmp_sub_different_order:
; X64: # %bb.0: # %entry
; X64-NEXT: subl %esi, %edi
; X64-NEXT: jge .LBB3_2
; X64-NEXT: # %bb.1: # %cond.true
; X64-NEXT: movl %edi, (%rdx)
; X64-NEXT: .LBB3_2: # %cond.end
; X64-NEXT: retq
entry:
%cmp = icmp sgt i32 %y, %x
br i1 %cmp, label %cond.true, label %cond.end
cond.true:
%sub = sub nsw i32 %x, %y
store i32 %sub, ptr %p
br label %cond.end
cond.end:
ret void
}
declare void @use(i32)
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