llvm/test/CodeGen/X86/TruncAssertSext.ll


1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -O2 -mtriple=x86_64-unknown-unknown | FileCheck %s
; Checks that a zeroing mov is inserted for the trunc/zext pair even when
; the source of the zext is an AssertSext node
; PR20494

define i64 @main(i64 %a) {
; CHECK-LABEL: main:
; CHECK:       # %bb.0:
; CHECK-NEXT:    orq $-2, %rdi
; CHECK-NEXT:    movl %edi, %eax
; CHECK-NEXT:    retq
  %or = or i64 %a, -2
  %trunc = trunc i64 %or to i32
  br label %l
l:
  %ext = zext i32 %trunc to i64
  trunc i64 %or to i32 ; to keep the or from being narrowed
  ret i64 %ext
}