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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv32 -mattr=+zksed -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV32ZKSED
declare i32 @llvm.riscv.sm4ks(i32, i32, i32);
define i32 @sm4ks_i32(i32 %a, i32 %b) nounwind {
; RV32ZKSED-LABEL: sm4ks_i32:
; RV32ZKSED: # %bb.0:
; RV32ZKSED-NEXT: sm4ks a0, a0, a1, 2
; RV32ZKSED-NEXT: ret
%val = call i32 @llvm.riscv.sm4ks(i32 %a, i32 %b, i32 2)
ret i32 %val
}
declare i32 @llvm.riscv.sm4ed(i32, i32, i32);
define i32 @sm4ed_i32(i32 %a, i32 %b) nounwind {
; RV32ZKSED-LABEL: sm4ed_i32:
; RV32ZKSED: # %bb.0:
; RV32ZKSED-NEXT: sm4ed a0, a0, a1, 3
; RV32ZKSED-NEXT: ret
%val = call i32 @llvm.riscv.sm4ed(i32 %a, i32 %b, i32 3)
ret i32 %val
}
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