1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
|
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -mattr=-architected-sgprs -global-isel=0 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX9,GFX9-SDAG %s
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -mattr=-architected-sgprs -global-isel=1 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX9,GFX9-GISEL %s
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -mattr=+architected-sgprs -global-isel=0 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX9ARCH,GFX9ARCH-SDAG %s
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -mattr=+architected-sgprs -global-isel=1 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX9ARCH,GFX9ARCH-GISEL %s
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -global-isel=0 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX12,GFX12-SDAG %s
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -global-isel=1 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX12,GFX12-GISEL %s
define amdgpu_kernel void @workgroup_ids_kernel() {
; GFX9-LABEL: workgroup_ids_kernel:
; GFX9: ; %bb.0: ; %.entry
; GFX9-NEXT: v_mov_b32_e32 v0, s4
; GFX9-NEXT: v_mov_b32_e32 v1, s5
; GFX9-NEXT: v_mov_b32_e32 v2, s6
; GFX9-NEXT: buffer_store_dwordx3 v[0:2], off, s[0:3], 0
; GFX9-NEXT: s_endpgm
;
; GFX9ARCH-SDAG-LABEL: workgroup_ids_kernel:
; GFX9ARCH-SDAG: ; %bb.0: ; %.entry
; GFX9ARCH-SDAG-NEXT: s_lshr_b32 s0, ttmp7, 16
; GFX9ARCH-SDAG-NEXT: s_and_b32 s1, ttmp7, 0xffff
; GFX9ARCH-SDAG-NEXT: v_mov_b32_e32 v0, ttmp9
; GFX9ARCH-SDAG-NEXT: v_mov_b32_e32 v1, s1
; GFX9ARCH-SDAG-NEXT: v_mov_b32_e32 v2, s0
; GFX9ARCH-SDAG-NEXT: buffer_store_dwordx3 v[0:2], off, s[0:3], 0
; GFX9ARCH-SDAG-NEXT: s_endpgm
;
; GFX9ARCH-GISEL-LABEL: workgroup_ids_kernel:
; GFX9ARCH-GISEL: ; %bb.0: ; %.entry
; GFX9ARCH-GISEL-NEXT: s_mov_b32 s0, ttmp9
; GFX9ARCH-GISEL-NEXT: s_and_b32 s1, ttmp7, 0xffff
; GFX9ARCH-GISEL-NEXT: s_lshr_b32 s2, ttmp7, 16
; GFX9ARCH-GISEL-NEXT: v_mov_b32_e32 v0, s0
; GFX9ARCH-GISEL-NEXT: v_mov_b32_e32 v1, s1
; GFX9ARCH-GISEL-NEXT: v_mov_b32_e32 v2, s2
; GFX9ARCH-GISEL-NEXT: buffer_store_dwordx3 v[0:2], off, s[0:3], 0
; GFX9ARCH-GISEL-NEXT: s_endpgm
;
; GFX12-SDAG-LABEL: workgroup_ids_kernel:
; GFX12-SDAG: ; %bb.0: ; %.entry
; GFX12-SDAG-NEXT: s_and_b32 s0, ttmp7, 0xffff
; GFX12-SDAG-NEXT: s_lshr_b32 s1, ttmp7, 16
; GFX12-SDAG-NEXT: v_dual_mov_b32 v0, ttmp9 :: v_dual_mov_b32 v1, s0
; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, s1
; GFX12-SDAG-NEXT: buffer_store_b96 v[0:2], off, s[0:3], null
; GFX12-SDAG-NEXT: s_nop 0
; GFX12-SDAG-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
; GFX12-SDAG-NEXT: s_endpgm
;
; GFX12-GISEL-LABEL: workgroup_ids_kernel:
; GFX12-GISEL: ; %bb.0: ; %.entry
; GFX12-GISEL-NEXT: s_mov_b32 s0, ttmp9
; GFX12-GISEL-NEXT: s_and_b32 s1, ttmp7, 0xffff
; GFX12-GISEL-NEXT: s_lshr_b32 s2, ttmp7, 16
; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, s2
; GFX12-GISEL-NEXT: buffer_store_b96 v[0:2], off, s[0:3], null
; GFX12-GISEL-NEXT: s_nop 0
; GFX12-GISEL-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
; GFX12-GISEL-NEXT: s_endpgm
.entry:
%idx = call i32 @llvm.amdgcn.workgroup.id.x()
%idy = call i32 @llvm.amdgcn.workgroup.id.y()
%idz = call i32 @llvm.amdgcn.workgroup.id.z()
%ielemx = insertelement <3 x i32> undef, i32 %idx, i64 0
%ielemy = insertelement <3 x i32> %ielemx, i32 %idy, i64 1
%ielemz = insertelement <3 x i32> %ielemy, i32 %idz, i64 2
call void @llvm.amdgcn.raw.ptr.buffer.store.v3i32(<3 x i32> %ielemz, ptr addrspace(8) undef, i32 0, i32 0, i32 0)
ret void
}
define amdgpu_kernel void @caller() {
; GFX9-SDAG-LABEL: caller:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_add_u32 flat_scratch_lo, s10, s13
; GFX9-SDAG-NEXT: s_addc_u32 flat_scratch_hi, s11, 0
; GFX9-SDAG-NEXT: s_add_u32 s0, s0, s13
; GFX9-SDAG-NEXT: s_addc_u32 s1, s1, 0
; GFX9-SDAG-NEXT: s_mov_b64 s[10:11], s[8:9]
; GFX9-SDAG-NEXT: s_getpc_b64 s[8:9]
; GFX9-SDAG-NEXT: s_add_u32 s8, s8, callee@gotpcrel32@lo+4
; GFX9-SDAG-NEXT: s_addc_u32 s9, s9, callee@gotpcrel32@hi+12
; GFX9-SDAG-NEXT: s_load_dwordx2 s[14:15], s[8:9], 0x0
; GFX9-SDAG-NEXT: v_lshlrev_b32_e32 v2, 20, v2
; GFX9-SDAG-NEXT: v_lshlrev_b32_e32 v1, 10, v1
; GFX9-SDAG-NEXT: v_or3_b32 v31, v0, v1, v2
; GFX9-SDAG-NEXT: s_mov_b64 s[8:9], s[6:7]
; GFX9-SDAG-NEXT: v_mov_b32_e32 v0, s12
; GFX9-SDAG-NEXT: s_mov_b32 s32, 0
; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-SDAG-NEXT: s_swappc_b64 s[30:31], s[14:15]
; GFX9-SDAG-NEXT: s_endpgm
;
; GFX9-GISEL-LABEL: caller:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_add_u32 flat_scratch_lo, s10, s13
; GFX9-GISEL-NEXT: s_addc_u32 flat_scratch_hi, s11, 0
; GFX9-GISEL-NEXT: s_add_u32 s0, s0, s13
; GFX9-GISEL-NEXT: s_addc_u32 s1, s1, 0
; GFX9-GISEL-NEXT: s_mov_b64 s[10:11], s[8:9]
; GFX9-GISEL-NEXT: s_getpc_b64 s[8:9]
; GFX9-GISEL-NEXT: s_add_u32 s8, s8, callee@gotpcrel32@lo+4
; GFX9-GISEL-NEXT: s_addc_u32 s9, s9, callee@gotpcrel32@hi+12
; GFX9-GISEL-NEXT: s_load_dwordx2 s[14:15], s[8:9], 0x0
; GFX9-GISEL-NEXT: v_lshlrev_b32_e32 v1, 10, v1
; GFX9-GISEL-NEXT: v_lshlrev_b32_e32 v2, 20, v2
; GFX9-GISEL-NEXT: v_or3_b32 v31, v0, v1, v2
; GFX9-GISEL-NEXT: v_mov_b32_e32 v0, s12
; GFX9-GISEL-NEXT: s_mov_b64 s[8:9], s[6:7]
; GFX9-GISEL-NEXT: s_mov_b32 s32, 0
; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-GISEL-NEXT: s_swappc_b64 s[30:31], s[14:15]
; GFX9-GISEL-NEXT: s_endpgm
;
; GFX9ARCH-SDAG-LABEL: caller:
; GFX9ARCH-SDAG: ; %bb.0:
; GFX9ARCH-SDAG-NEXT: s_add_u32 flat_scratch_lo, s10, s12
; GFX9ARCH-SDAG-NEXT: s_addc_u32 flat_scratch_hi, s11, 0
; GFX9ARCH-SDAG-NEXT: s_add_u32 s0, s0, s12
; GFX9ARCH-SDAG-NEXT: s_addc_u32 s1, s1, 0
; GFX9ARCH-SDAG-NEXT: s_mov_b64 s[10:11], s[8:9]
; GFX9ARCH-SDAG-NEXT: s_getpc_b64 s[8:9]
; GFX9ARCH-SDAG-NEXT: s_add_u32 s8, s8, callee@gotpcrel32@lo+4
; GFX9ARCH-SDAG-NEXT: s_addc_u32 s9, s9, callee@gotpcrel32@hi+12
; GFX9ARCH-SDAG-NEXT: s_load_dwordx2 s[12:13], s[8:9], 0x0
; GFX9ARCH-SDAG-NEXT: v_lshlrev_b32_e32 v2, 20, v2
; GFX9ARCH-SDAG-NEXT: v_lshlrev_b32_e32 v1, 10, v1
; GFX9ARCH-SDAG-NEXT: v_or3_b32 v31, v0, v1, v2
; GFX9ARCH-SDAG-NEXT: s_mov_b64 s[8:9], s[6:7]
; GFX9ARCH-SDAG-NEXT: v_mov_b32_e32 v0, ttmp9
; GFX9ARCH-SDAG-NEXT: s_mov_b32 s32, 0
; GFX9ARCH-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX9ARCH-SDAG-NEXT: s_swappc_b64 s[30:31], s[12:13]
; GFX9ARCH-SDAG-NEXT: s_endpgm
;
; GFX9ARCH-GISEL-LABEL: caller:
; GFX9ARCH-GISEL: ; %bb.0:
; GFX9ARCH-GISEL-NEXT: s_add_u32 flat_scratch_lo, s10, s12
; GFX9ARCH-GISEL-NEXT: s_addc_u32 flat_scratch_hi, s11, 0
; GFX9ARCH-GISEL-NEXT: s_add_u32 s0, s0, s12
; GFX9ARCH-GISEL-NEXT: s_addc_u32 s1, s1, 0
; GFX9ARCH-GISEL-NEXT: s_mov_b64 s[10:11], s[8:9]
; GFX9ARCH-GISEL-NEXT: s_getpc_b64 s[8:9]
; GFX9ARCH-GISEL-NEXT: s_add_u32 s8, s8, callee@gotpcrel32@lo+4
; GFX9ARCH-GISEL-NEXT: s_addc_u32 s9, s9, callee@gotpcrel32@hi+12
; GFX9ARCH-GISEL-NEXT: s_load_dwordx2 s[12:13], s[8:9], 0x0
; GFX9ARCH-GISEL-NEXT: v_lshlrev_b32_e32 v1, 10, v1
; GFX9ARCH-GISEL-NEXT: v_lshlrev_b32_e32 v2, 20, v2
; GFX9ARCH-GISEL-NEXT: v_or3_b32 v31, v0, v1, v2
; GFX9ARCH-GISEL-NEXT: v_mov_b32_e32 v0, ttmp9
; GFX9ARCH-GISEL-NEXT: s_mov_b64 s[8:9], s[6:7]
; GFX9ARCH-GISEL-NEXT: s_mov_b32 s32, 0
; GFX9ARCH-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9ARCH-GISEL-NEXT: s_swappc_b64 s[30:31], s[12:13]
; GFX9ARCH-GISEL-NEXT: s_endpgm
;
; GFX12-LABEL: caller:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_mov_b64 s[10:11], s[4:5]
; GFX12-NEXT: s_getpc_b64 s[4:5]
; GFX12-NEXT: s_sext_i32_i16 s5, s5
; GFX12-NEXT: s_add_co_u32 s4, s4, callee@gotpcrel32@lo+8
; GFX12-NEXT: s_add_co_ci_u32 s5, s5, callee@gotpcrel32@hi+16
; GFX12-NEXT: v_dual_mov_b32 v31, v0 :: v_dual_mov_b32 v0, ttmp9
; GFX12-NEXT: s_load_b64 s[6:7], s[4:5], 0x0
; GFX12-NEXT: s_mov_b64 s[4:5], s[0:1]
; GFX12-NEXT: s_mov_b64 s[8:9], s[2:3]
; GFX12-NEXT: s_mov_b32 s32, 0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: s_swappc_b64 s[30:31], s[6:7]
; GFX12-NEXT: s_endpgm
%idx = call i32 @llvm.amdgcn.workgroup.id.x()
call void @callee(i32 %idx) #0
ret void
}
declare void @callee(i32) #0
define void @workgroup_ids_device_func(ptr addrspace(1) %outx, ptr addrspace(1) %outy, ptr addrspace(1) %outz) {
; GFX9-LABEL: workgroup_ids_device_func:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v6, s12
; GFX9-NEXT: global_store_dword v[0:1], v6, off
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v0, s13
; GFX9-NEXT: global_store_dword v[2:3], v0, off
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v0, s14
; GFX9-NEXT: global_store_dword v[4:5], v0, off
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
; GFX9ARCH-SDAG-LABEL: workgroup_ids_device_func:
; GFX9ARCH-SDAG: ; %bb.0:
; GFX9ARCH-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9ARCH-SDAG-NEXT: v_mov_b32_e32 v6, ttmp9
; GFX9ARCH-SDAG-NEXT: s_and_b32 s4, ttmp7, 0xffff
; GFX9ARCH-SDAG-NEXT: global_store_dword v[0:1], v6, off
; GFX9ARCH-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9ARCH-SDAG-NEXT: v_mov_b32_e32 v0, s4
; GFX9ARCH-SDAG-NEXT: s_lshr_b32 s4, ttmp7, 16
; GFX9ARCH-SDAG-NEXT: global_store_dword v[2:3], v0, off
; GFX9ARCH-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9ARCH-SDAG-NEXT: v_mov_b32_e32 v0, s4
; GFX9ARCH-SDAG-NEXT: global_store_dword v[4:5], v0, off
; GFX9ARCH-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9ARCH-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX9ARCH-GISEL-LABEL: workgroup_ids_device_func:
; GFX9ARCH-GISEL: ; %bb.0:
; GFX9ARCH-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9ARCH-GISEL-NEXT: v_mov_b32_e32 v6, ttmp9
; GFX9ARCH-GISEL-NEXT: s_and_b32 s4, ttmp7, 0xffff
; GFX9ARCH-GISEL-NEXT: s_lshr_b32 s5, ttmp7, 16
; GFX9ARCH-GISEL-NEXT: global_store_dword v[0:1], v6, off
; GFX9ARCH-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9ARCH-GISEL-NEXT: v_mov_b32_e32 v0, s4
; GFX9ARCH-GISEL-NEXT: global_store_dword v[2:3], v0, off
; GFX9ARCH-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9ARCH-GISEL-NEXT: v_mov_b32_e32 v0, s5
; GFX9ARCH-GISEL-NEXT: global_store_dword v[4:5], v0, off
; GFX9ARCH-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9ARCH-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-LABEL: workgroup_ids_device_func:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: s_wait_expcnt 0x0
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: s_and_b32 s0, ttmp7, 0xffff
; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX12-NEXT: v_dual_mov_b32 v6, ttmp9 :: v_dual_mov_b32 v7, s0
; GFX12-NEXT: s_lshr_b32 s1, ttmp7, 16
; GFX12-NEXT: v_mov_b32_e32 v8, s1
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: global_store_b32 v[0:1], v6, off scope:SCOPE_SYS
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: global_store_b32 v[2:3], v7, off scope:SCOPE_SYS
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: global_store_b32 v[4:5], v8, off scope:SCOPE_SYS
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: s_setpc_b64 s[30:31]
%id.x = call i32 @llvm.amdgcn.workgroup.id.x()
%id.y = call i32 @llvm.amdgcn.workgroup.id.y()
%id.z = call i32 @llvm.amdgcn.workgroup.id.z()
store volatile i32 %id.x, ptr addrspace(1) %outx
store volatile i32 %id.y, ptr addrspace(1) %outy
store volatile i32 %id.z, ptr addrspace(1) %outz
ret void
}
declare i32 @llvm.amdgcn.workgroup.id.x()
declare i32 @llvm.amdgcn.workgroup.id.y()
declare i32 @llvm.amdgcn.workgroup.id.z()
declare void @llvm.amdgcn.raw.ptr.buffer.store.v3i32(<3 x i32>, ptr addrspace(8), i32, i32, i32 immarg)
attributes #0 = { nounwind "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" }
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; GFX9ARCH: {{.*}}
|