1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
|
//===--- AArch64.cpp - AArch64 (not ARM) Helpers for Tools ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#include "AArch64.h"
#include "../CommonArgs.h"
#include "clang/Driver/Driver.h"
#include "clang/Driver/DriverDiagnostic.h"
#include "clang/Driver/Options.h"
#include "llvm/Option/ArgList.h"
#include "llvm/TargetParser/AArch64TargetParser.h"
#include "llvm/TargetParser/Host.h"
using namespace clang::driver;
using namespace clang::driver::tools;
using namespace clang;
using namespace llvm::opt;
/// \returns true if the given triple can determine the default CPU type even
/// if -arch is not specified.
static bool isCPUDeterminedByTriple(const llvm::Triple &Triple) {
return Triple.isOSDarwin();
}
/// getAArch64TargetCPU - Get the (LLVM) name of the AArch64 cpu we are
/// targeting. Set \p A to the Arg corresponding to the -mcpu argument if it is
/// provided, or to nullptr otherwise.
std::string aarch64::getAArch64TargetCPU(const ArgList &Args,
const llvm::Triple &Triple, Arg *&A) {
std::string CPU;
// If we have -mcpu, use that.
if ((A = Args.getLastArg(options::OPT_mcpu_EQ))) {
StringRef Mcpu = A->getValue();
CPU = Mcpu.split("+").first.lower();
}
CPU = llvm::AArch64::resolveCPUAlias(CPU);
// Handle CPU name is 'native'.
if (CPU == "native")
return std::string(llvm::sys::getHostCPUName());
if (CPU.size())
return CPU;
if (Triple.isTargetMachineMac() &&
Triple.getArch() == llvm::Triple::aarch64) {
// Apple Silicon macs default to M1 CPUs.
return "apple-m1";
}
if (Triple.isXROS()) {
// The xrOS simulator runs on M1 as well, it should have been covered above.
assert(!Triple.isSimulatorEnvironment() && "xrossim should be mac-like");
return "apple-a12";
}
// arm64e requires v8.3a and only runs on apple-a12 and later CPUs.
if (Triple.isArm64e())
return "apple-a12";
// Make sure we pick the appropriate Apple CPU when targetting a Darwin OS.
if (Triple.isOSDarwin())
return Triple.getArch() == llvm::Triple::aarch64_32 ? "apple-s4"
: "apple-a7";
return "generic";
}
// Decode AArch64 features from string like +[no]featureA+[no]featureB+...
static bool DecodeAArch64Features(const Driver &D, StringRef text,
llvm::AArch64::ExtensionSet &Extensions) {
SmallVector<StringRef, 8> Split;
text.split(Split, StringRef("+"), -1, false);
for (StringRef Feature : Split) {
if (Feature == "neon" || Feature == "noneon") {
D.Diag(clang::diag::err_drv_no_neon_modifier);
continue;
}
if (!Extensions.parseModifier(Feature))
return false;
}
return true;
}
// Check if the CPU name and feature modifiers in -mcpu are legal. If yes,
// decode CPU and feature.
static bool DecodeAArch64Mcpu(const Driver &D, StringRef Mcpu, StringRef &CPU,
llvm::AArch64::ExtensionSet &Extensions) {
std::pair<StringRef, StringRef> Split = Mcpu.split("+");
CPU = Split.first;
if (CPU == "native")
CPU = llvm::sys::getHostCPUName();
if (CPU == "generic") {
Extensions.enable(llvm::AArch64::AEK_SIMD);
} else {
const std::optional<llvm::AArch64::CpuInfo> CpuInfo =
llvm::AArch64::parseCpu(CPU);
if (!CpuInfo)
return false;
Extensions.addCPUDefaults(*CpuInfo);
}
if (Split.second.size() &&
!DecodeAArch64Features(D, Split.second, Extensions))
return false;
return true;
}
static bool
getAArch64ArchFeaturesFromMarch(const Driver &D, StringRef March,
const ArgList &Args,
llvm::AArch64::ExtensionSet &Extensions) {
std::string MarchLowerCase = March.lower();
std::pair<StringRef, StringRef> Split = StringRef(MarchLowerCase).split("+");
const llvm::AArch64::ArchInfo *ArchInfo =
llvm::AArch64::parseArch(Split.first);
if (Split.first == "native")
ArchInfo = llvm::AArch64::getArchForCpu(llvm::sys::getHostCPUName().str());
if (!ArchInfo)
return false;
Extensions.addArchDefaults(*ArchInfo);
if ((Split.second.size() &&
!DecodeAArch64Features(D, Split.second, Extensions)))
return false;
return true;
}
static bool
getAArch64ArchFeaturesFromMcpu(const Driver &D, StringRef Mcpu,
const ArgList &Args,
llvm::AArch64::ExtensionSet &Extensions) {
StringRef CPU;
std::string McpuLowerCase = Mcpu.lower();
if (!DecodeAArch64Mcpu(D, McpuLowerCase, CPU, Extensions))
return false;
return true;
}
static bool
getAArch64MicroArchFeaturesFromMtune(const Driver &D, StringRef Mtune,
const ArgList &Args,
std::vector<StringRef> &Features) {
std::string MtuneLowerCase = Mtune.lower();
// Check CPU name is valid, but ignore any extensions on it.
llvm::AArch64::ExtensionSet Extensions;
StringRef Tune;
if (!DecodeAArch64Mcpu(D, MtuneLowerCase, Tune, Extensions))
return false;
// Handle CPU name is 'native'.
if (MtuneLowerCase == "native")
MtuneLowerCase = std::string(llvm::sys::getHostCPUName());
// 'cyclone' and later have zero-cycle register moves and zeroing.
if (MtuneLowerCase == "cyclone" ||
StringRef(MtuneLowerCase).starts_with("apple")) {
Features.push_back("+zcm");
Features.push_back("+zcz");
}
return true;
}
static bool
getAArch64MicroArchFeaturesFromMcpu(const Driver &D, StringRef Mcpu,
const ArgList &Args,
std::vector<StringRef> &Features) {
StringRef CPU;
// Check CPU name is valid, but ignore any extensions on it.
llvm::AArch64::ExtensionSet DecodedFeature;
std::string McpuLowerCase = Mcpu.lower();
if (!DecodeAArch64Mcpu(D, McpuLowerCase, CPU, DecodedFeature))
return false;
return getAArch64MicroArchFeaturesFromMtune(D, CPU, Args, Features);
}
void aarch64::getAArch64TargetFeatures(const Driver &D,
const llvm::Triple &Triple,
const ArgList &Args,
std::vector<StringRef> &Features,
bool ForAS) {
Arg *A;
bool success = true;
llvm::StringRef WaMArch;
llvm::AArch64::ExtensionSet Extensions;
if (ForAS)
for (const auto *A :
Args.filtered(options::OPT_Wa_COMMA, options::OPT_Xassembler))
for (StringRef Value : A->getValues())
if (Value.starts_with("-march="))
WaMArch = Value.substr(7);
// Call getAArch64ArchFeaturesFromMarch only if "-Wa,-march=" or
// "-Xassembler -march" is detected. Otherwise it may return false
// and causes Clang to error out.
if (!WaMArch.empty())
success = getAArch64ArchFeaturesFromMarch(D, WaMArch, Args, Extensions);
else if ((A = Args.getLastArg(options::OPT_march_EQ)))
success =
getAArch64ArchFeaturesFromMarch(D, A->getValue(), Args, Extensions);
else if ((A = Args.getLastArg(options::OPT_mcpu_EQ)))
success =
getAArch64ArchFeaturesFromMcpu(D, A->getValue(), Args, Extensions);
else if (isCPUDeterminedByTriple(Triple))
success = getAArch64ArchFeaturesFromMcpu(
D, getAArch64TargetCPU(Args, Triple, A), Args, Extensions);
else
// Default to 'A' profile if the architecture is not specified.
success = getAArch64ArchFeaturesFromMarch(D, "armv8-a", Args, Extensions);
if (success && (A = Args.getLastArg(clang::driver::options::OPT_mtune_EQ)))
success =
getAArch64MicroArchFeaturesFromMtune(D, A->getValue(), Args, Features);
else if (success && (A = Args.getLastArg(options::OPT_mcpu_EQ)))
success =
getAArch64MicroArchFeaturesFromMcpu(D, A->getValue(), Args, Features);
else if (success && isCPUDeterminedByTriple(Triple))
success = getAArch64MicroArchFeaturesFromMcpu(
D, getAArch64TargetCPU(Args, Triple, A), Args, Features);
if (!success) {
auto Diag = D.Diag(diag::err_drv_unsupported_option_argument);
// If "-Wa,-march=" is used, 'WaMArch' will contain the argument's value,
// while 'A' is uninitialized. Only dereference 'A' in the other case.
if (!WaMArch.empty())
Diag << "-march=" << WaMArch;
else
Diag << A->getSpelling() << A->getValue();
}
// -mgeneral-regs-only disables all floating-point features.
if (Args.getLastArg(options::OPT_mgeneral_regs_only)) {
Extensions.disable(llvm::AArch64::AEK_FP);
}
// En/disable crc
if (Arg *A = Args.getLastArg(options::OPT_mcrc, options::OPT_mnocrc)) {
if (A->getOption().matches(options::OPT_mcrc))
Extensions.enable(llvm::AArch64::AEK_CRC);
else
Extensions.disable(llvm::AArch64::AEK_CRC);
}
// At this point all hardware features are decided, so convert the extensions
// set to a feature list.
Extensions.toLLVMFeatureList(Features);
if (Arg *A = Args.getLastArg(options::OPT_mtp_mode_EQ)) {
StringRef Mtp = A->getValue();
if (Mtp == "el3" || Mtp == "tpidr_el3")
Features.push_back("+tpidr-el3");
else if (Mtp == "el2" || Mtp == "tpidr_el2")
Features.push_back("+tpidr-el2");
else if (Mtp == "el1" || Mtp == "tpidr_el1")
Features.push_back("+tpidr-el1");
else if (Mtp == "tpidrro_el0")
Features.push_back("+tpidrro-el0");
else if (Mtp != "el0" && Mtp != "tpidr_el0")
D.Diag(diag::err_drv_invalid_mtp) << A->getAsString(Args);
}
// Enable/disable straight line speculation hardening.
if (Arg *A = Args.getLastArg(options::OPT_mharden_sls_EQ)) {
StringRef Scope = A->getValue();
bool EnableRetBr = false;
bool EnableBlr = false;
bool DisableComdat = false;
if (Scope != "none") {
SmallVector<StringRef, 4> Opts;
Scope.split(Opts, ",");
for (auto Opt : Opts) {
Opt = Opt.trim();
if (Opt == "all") {
EnableBlr = true;
EnableRetBr = true;
continue;
}
if (Opt == "retbr") {
EnableRetBr = true;
continue;
}
if (Opt == "blr") {
EnableBlr = true;
continue;
}
if (Opt == "comdat") {
DisableComdat = false;
continue;
}
if (Opt == "nocomdat") {
DisableComdat = true;
continue;
}
D.Diag(diag::err_drv_unsupported_option_argument)
<< A->getSpelling() << Scope;
break;
}
}
if (EnableRetBr)
Features.push_back("+harden-sls-retbr");
if (EnableBlr)
Features.push_back("+harden-sls-blr");
if (DisableComdat) {
Features.push_back("+harden-sls-nocomdat");
}
}
if (Arg *A = Args.getLastArg(
options::OPT_mstrict_align, options::OPT_mno_strict_align,
options::OPT_mno_unaligned_access, options::OPT_munaligned_access)) {
if (A->getOption().matches(options::OPT_mstrict_align) ||
A->getOption().matches(options::OPT_mno_unaligned_access))
Features.push_back("+strict-align");
} else if (Triple.isOSOpenBSD())
Features.push_back("+strict-align");
if (Args.hasArg(options::OPT_ffixed_x1))
Features.push_back("+reserve-x1");
if (Args.hasArg(options::OPT_ffixed_x2))
Features.push_back("+reserve-x2");
if (Args.hasArg(options::OPT_ffixed_x3))
Features.push_back("+reserve-x3");
if (Args.hasArg(options::OPT_ffixed_x4))
Features.push_back("+reserve-x4");
if (Args.hasArg(options::OPT_ffixed_x5))
Features.push_back("+reserve-x5");
if (Args.hasArg(options::OPT_ffixed_x6))
Features.push_back("+reserve-x6");
if (Args.hasArg(options::OPT_ffixed_x7))
Features.push_back("+reserve-x7");
if (Args.hasArg(options::OPT_ffixed_x9))
Features.push_back("+reserve-x9");
if (Args.hasArg(options::OPT_ffixed_x10))
Features.push_back("+reserve-x10");
if (Args.hasArg(options::OPT_ffixed_x11))
Features.push_back("+reserve-x11");
if (Args.hasArg(options::OPT_ffixed_x12))
Features.push_back("+reserve-x12");
if (Args.hasArg(options::OPT_ffixed_x13))
Features.push_back("+reserve-x13");
if (Args.hasArg(options::OPT_ffixed_x14))
Features.push_back("+reserve-x14");
if (Args.hasArg(options::OPT_ffixed_x15))
Features.push_back("+reserve-x15");
if (Args.hasArg(options::OPT_ffixed_x18))
Features.push_back("+reserve-x18");
if (Args.hasArg(options::OPT_ffixed_x20))
Features.push_back("+reserve-x20");
if (Args.hasArg(options::OPT_ffixed_x21))
Features.push_back("+reserve-x21");
if (Args.hasArg(options::OPT_ffixed_x22))
Features.push_back("+reserve-x22");
if (Args.hasArg(options::OPT_ffixed_x23))
Features.push_back("+reserve-x23");
if (Args.hasArg(options::OPT_ffixed_x24))
Features.push_back("+reserve-x24");
if (Args.hasArg(options::OPT_ffixed_x25))
Features.push_back("+reserve-x25");
if (Args.hasArg(options::OPT_ffixed_x26))
Features.push_back("+reserve-x26");
if (Args.hasArg(options::OPT_ffixed_x27))
Features.push_back("+reserve-x27");
if (Args.hasArg(options::OPT_ffixed_x28))
Features.push_back("+reserve-x28");
if (Args.hasArg(options::OPT_ffixed_x30))
Features.push_back("+reserve-x30");
if (Args.hasArg(options::OPT_fcall_saved_x8))
Features.push_back("+call-saved-x8");
if (Args.hasArg(options::OPT_fcall_saved_x9))
Features.push_back("+call-saved-x9");
if (Args.hasArg(options::OPT_fcall_saved_x10))
Features.push_back("+call-saved-x10");
if (Args.hasArg(options::OPT_fcall_saved_x11))
Features.push_back("+call-saved-x11");
if (Args.hasArg(options::OPT_fcall_saved_x12))
Features.push_back("+call-saved-x12");
if (Args.hasArg(options::OPT_fcall_saved_x13))
Features.push_back("+call-saved-x13");
if (Args.hasArg(options::OPT_fcall_saved_x14))
Features.push_back("+call-saved-x14");
if (Args.hasArg(options::OPT_fcall_saved_x15))
Features.push_back("+call-saved-x15");
if (Args.hasArg(options::OPT_fcall_saved_x18))
Features.push_back("+call-saved-x18");
if (Args.hasArg(options::OPT_mno_neg_immediates))
Features.push_back("+no-neg-immediates");
if (Arg *A = Args.getLastArg(options::OPT_mfix_cortex_a53_835769,
options::OPT_mno_fix_cortex_a53_835769)) {
if (A->getOption().matches(options::OPT_mfix_cortex_a53_835769))
Features.push_back("+fix-cortex-a53-835769");
else
Features.push_back("-fix-cortex-a53-835769");
} else if (Triple.isAndroid() || Triple.isOHOSFamily()) {
// Enabled A53 errata (835769) workaround by default on android
Features.push_back("+fix-cortex-a53-835769");
} else if (Triple.isOSFuchsia()) {
std::string CPU = getCPUName(D, Args, Triple);
if (CPU.empty() || CPU == "generic" || CPU == "cortex-a53")
Features.push_back("+fix-cortex-a53-835769");
}
if (Args.getLastArg(options::OPT_mno_bti_at_return_twice))
Features.push_back("+no-bti-at-return-twice");
}
|