; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt -S -loop-reduce < %s | FileCheck %s

target triple = "x86_64-unknown-linux-gnu"

declare void @use(i1)

; Make sure this does not assert.
define i16 @test(i16 %start) #0 {
; CHECK-LABEL: define i16 @test(
; CHECK-SAME: i16 [[START:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT:  [[ENTRY:.*]]:
; CHECK-NEXT:    [[TMP0:%.*]] = sub i16 0, [[START]]
; CHECK-NEXT:    [[TMP1:%.*]] = zext i16 [[TMP0]] to i64
; CHECK-NEXT:    br label %[[LOOP:.*]]
; CHECK:       [[LOOP]]:
; CHECK-NEXT:    [[LSR_IV:%.*]] = phi i64 [ [[LSR_IV_NEXT:%.*]], %[[LOOP]] ], [ 65536, %[[ENTRY]] ]
; CHECK-NEXT:    [[TMP2:%.*]] = add i64 [[TMP1]], [[LSR_IV]]
; CHECK-NEXT:    [[TMP:%.*]] = trunc i64 [[TMP2]] to i16
; CHECK-NEXT:    [[IV2_CMP:%.*]] = icmp ne i16 [[TMP]], 0
; CHECK-NEXT:    call void @use(i1 [[IV2_CMP]])
; CHECK-NEXT:    [[LSR_IV_NEXT]] = add nsw i64 [[LSR_IV]], -1
; CHECK-NEXT:    [[IV1_CMP:%.*]] = icmp eq i64 [[LSR_IV_NEXT]], 65532
; CHECK-NEXT:    br i1 [[IV1_CMP]], label %[[EXIT:.*]], label %[[LOOP]]
; CHECK:       [[EXIT]]:
; CHECK-NEXT:    [[TMP3:%.*]] = zext i16 [[START]] to i64
; CHECK-NEXT:    [[TMP4:%.*]] = sub i64 [[TMP3]], [[LSR_IV_NEXT]]
; CHECK-NEXT:    [[TMP1:%.*]] = trunc i64 [[TMP4]] to i16
; CHECK-NEXT:    ret i16 [[TMP1]]
;
entry:
  br label %loop

loop:
  %iv1 = phi i64 [ 3, %entry ], [ %iv1.dec, %loop ]
  %iv2 = phi i16 [ %start, %entry ], [ %iv2.inc, %loop ]
  %iv2.inc = add i16 %iv2, 1
  %iv2.cmp = icmp ne i16 %iv2, 0
  call void @use(i1 %iv2.cmp)
  %iv1.dec = add i64 %iv1, -1
  %iv1.cmp = icmp eq i64 %iv1, 0
  br i1 %iv1.cmp, label %exit, label %loop

exit:
  ret i16 %iv2.inc
}

define i16 @test2(i16 %arg1, i16 %arg2) {
; CHECK-LABEL: define i16 @test2(
; CHECK-SAME: i16 [[ARG1:%.*]], i16 [[ARG2:%.*]]) {
; CHECK-NEXT:  [[ENTRY:.*]]:
; CHECK-NEXT:    [[TMP0:%.*]] = add i16 [[ARG2]], [[ARG1]]
; CHECK-NEXT:    [[TMP1:%.*]] = add i16 [[TMP0]], -1
; CHECK-NEXT:    br label %[[LOOP:.*]]
; CHECK:       [[LOOP]]:
; CHECK-NEXT:    [[LSR_IV:%.*]] = phi i16 [ [[LSR_IV_NEXT:%.*]], %[[LOOP]] ], [ [[TMP1]], %[[ENTRY]] ]
; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i16 [[LSR_IV]], -2
; CHECK-NEXT:    call void @use(i1 [[CMP]])
; CHECK-NEXT:    [[LSR_IV_NEXT]] = add i16 [[LSR_IV]], 1
; CHECK-NEXT:    br i1 false, label %[[EXIT:.*]], label %[[LOOP]]
; CHECK:       [[EXIT]]:
; CHECK-NEXT:    ret i16 [[LSR_IV_NEXT]]
;
entry:
  %start = add i16 %arg1, %arg2
  br label %loop

loop:
  %iv = phi i16 [ %start, %entry ], [ %iv.inc, %loop ]
  %iv.inc = add i16 %iv, 1
  %cmp = icmp eq i16 %iv.inc, 0
  call void @use(i1 %cmp)
  br i1 false, label %exit, label %loop

exit:
  ret i16 %iv
}

attributes #0 = { "target-cpu"="x86-64" }