; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 ; RUN: opt < %s -passes=msan -S | FileCheck %s ; ; Forked from llvm/test/CodeGen/X86/scmp.ll target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" define i8 @scmp.8.8(i8 %x, i8 %y) nounwind #0 { ; CHECK-LABEL: define i8 @scmp.8.8( ; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr @__msan_param_tls, align 8 ; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8 ; CHECK-NEXT: call void @llvm.donothing() ; CHECK-NEXT: [[_MSPROP:%.*]] = or i8 [[TMP1]], [[TMP2]] ; CHECK-NEXT: [[_MSPROP1:%.*]] = or i8 [[_MSPROP]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = call i8 @llvm.scmp.i8.i8(i8 [[X]], i8 [[Y]]) ; CHECK-NEXT: store i8 [[_MSPROP1]], ptr @__msan_retval_tls, align 8 ; CHECK-NEXT: ret i8 [[TMP3]] ; %1 = call i8 @llvm.scmp(i8 %x, i8 %y) ret i8 %1 } define i8 @scmp.8.16(i16 %x, i16 %y) nounwind #0 { ; CHECK-LABEL: define i8 @scmp.8.16( ; CHECK-SAME: i16 [[X:%.*]], i16 [[Y:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8 ; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8 ; CHECK-NEXT: call void @llvm.donothing() ; CHECK-NEXT: [[_MSPROP:%.*]] = or i16 [[TMP1]], [[TMP2]] ; CHECK-NEXT: [[_MSPROP1:%.*]] = or i16 [[_MSPROP]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = trunc i16 [[_MSPROP1]] to i8 ; CHECK-NEXT: [[TMP5:%.*]] = call i8 @llvm.scmp.i8.i16(i16 [[X]], i16 [[Y]]) ; CHECK-NEXT: store i8 [[TMP3]], ptr @__msan_retval_tls, align 8 ; CHECK-NEXT: ret i8 [[TMP5]] ; %1 = call i8 @llvm.scmp(i16 %x, i16 %y) ret i8 %1 } define i8 @scmp.8.32(i32 %x, i32 %y) nounwind #0 { ; CHECK-LABEL: define i8 @scmp.8.32( ; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 8 ; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8 ; CHECK-NEXT: call void @llvm.donothing() ; CHECK-NEXT: [[_MSPROP:%.*]] = or i32 [[TMP1]], [[TMP2]] ; CHECK-NEXT: [[_MSPROP1:%.*]] = or i32 [[_MSPROP]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = trunc i32 [[_MSPROP1]] to i8 ; CHECK-NEXT: [[TMP5:%.*]] = call i8 @llvm.scmp.i8.i32(i32 [[X]], i32 [[Y]]) ; CHECK-NEXT: store i8 [[TMP3]], ptr @__msan_retval_tls, align 8 ; CHECK-NEXT: ret i8 [[TMP5]] ; %1 = call i8 @llvm.scmp(i32 %x, i32 %y) ret i8 %1 } define i8 @scmp.8.64(i64 %x, i64 %y) nounwind #0 { ; CHECK-LABEL: define i8 @scmp.8.64( ; CHECK-SAME: i64 [[X:%.*]], i64 [[Y:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8 ; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8 ; CHECK-NEXT: call void @llvm.donothing() ; CHECK-NEXT: [[_MSPROP:%.*]] = or i64 [[TMP1]], [[TMP2]] ; CHECK-NEXT: [[_MSPROP1:%.*]] = or i64 [[_MSPROP]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[_MSPROP1]] to i8 ; CHECK-NEXT: [[TMP5:%.*]] = call i8 @llvm.scmp.i8.i64(i64 [[X]], i64 [[Y]]) ; CHECK-NEXT: store i8 [[TMP3]], ptr @__msan_retval_tls, align 8 ; CHECK-NEXT: ret i8 [[TMP5]] ; %1 = call i8 @llvm.scmp(i64 %x, i64 %y) ret i8 %1 } define i8 @scmp.8.128(i128 %x, i128 %y) nounwind #0 { ; CHECK-LABEL: define i8 @scmp.8.128( ; CHECK-SAME: i128 [[X:%.*]], i128 [[Y:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[TMP1:%.*]] = load i128, ptr @__msan_param_tls, align 8 ; CHECK-NEXT: [[TMP2:%.*]] = load i128, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 16) to ptr), align 8 ; CHECK-NEXT: call void @llvm.donothing() ; CHECK-NEXT: [[_MSPROP:%.*]] = or i128 [[TMP1]], [[TMP2]] ; CHECK-NEXT: [[_MSPROP1:%.*]] = or i128 [[_MSPROP]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = trunc i128 [[_MSPROP1]] to i8 ; CHECK-NEXT: [[TMP5:%.*]] = call i8 @llvm.scmp.i8.i128(i128 [[X]], i128 [[Y]]) ; CHECK-NEXT: store i8 [[TMP3]], ptr @__msan_retval_tls, align 8 ; CHECK-NEXT: ret i8 [[TMP5]] ; %1 = call i8 @llvm.scmp(i128 %x, i128 %y) ret i8 %1 } define i32 @scmp.32.32(i32 %x, i32 %y) nounwind #0 { ; CHECK-LABEL: define i32 @scmp.32.32( ; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 8 ; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8 ; CHECK-NEXT: call void @llvm.donothing() ; CHECK-NEXT: [[_MSPROP:%.*]] = or i32 [[TMP1]], [[TMP2]] ; CHECK-NEXT: [[_MSPROP1:%.*]] = or i32 [[_MSPROP]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[X]], i32 [[Y]]) ; CHECK-NEXT: store i32 [[_MSPROP1]], ptr @__msan_retval_tls, align 8 ; CHECK-NEXT: ret i32 [[TMP3]] ; %1 = call i32 @llvm.scmp(i32 %x, i32 %y) ret i32 %1 } define i32 @scmp.32.64(i64 %x, i64 %y) nounwind #0 { ; CHECK-LABEL: define i32 @scmp.32.64( ; CHECK-SAME: i64 [[X:%.*]], i64 [[Y:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8 ; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8 ; CHECK-NEXT: call void @llvm.donothing() ; CHECK-NEXT: [[_MSPROP:%.*]] = or i64 [[TMP1]], [[TMP2]] ; CHECK-NEXT: [[_MSPROP1:%.*]] = or i64 [[_MSPROP]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[_MSPROP1]] to i32 ; CHECK-NEXT: [[TMP5:%.*]] = call i32 @llvm.scmp.i32.i64(i64 [[X]], i64 [[Y]]) ; CHECK-NEXT: store i32 [[TMP3]], ptr @__msan_retval_tls, align 8 ; CHECK-NEXT: ret i32 [[TMP5]] ; %1 = call i32 @llvm.scmp(i64 %x, i64 %y) ret i32 %1 } define i64 @scmp.64.64(i64 %x, i64 %y) nounwind #0 { ; CHECK-LABEL: define i64 @scmp.64.64( ; CHECK-SAME: i64 [[X:%.*]], i64 [[Y:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8 ; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8 ; CHECK-NEXT: call void @llvm.donothing() ; CHECK-NEXT: [[_MSPROP:%.*]] = or i64 [[TMP1]], [[TMP2]] ; CHECK-NEXT: [[_MSPROP1:%.*]] = or i64 [[_MSPROP]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.scmp.i64.i64(i64 [[X]], i64 [[Y]]) ; CHECK-NEXT: store i64 [[_MSPROP1]], ptr @__msan_retval_tls, align 8 ; CHECK-NEXT: ret i64 [[TMP3]] ; %1 = call i64 @llvm.scmp(i64 %x, i64 %y) ret i64 %1 } define i4 @scmp_narrow_result(i32 %x, i32 %y) nounwind #0 { ; CHECK-LABEL: define i4 @scmp_narrow_result( ; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 8 ; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8 ; CHECK-NEXT: call void @llvm.donothing() ; CHECK-NEXT: [[_MSPROP:%.*]] = or i32 [[TMP1]], [[TMP2]] ; CHECK-NEXT: [[_MSPROP1:%.*]] = or i32 [[_MSPROP]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = trunc i32 [[_MSPROP1]] to i4 ; CHECK-NEXT: [[TMP5:%.*]] = call i4 @llvm.scmp.i4.i32(i32 [[X]], i32 [[Y]]) ; CHECK-NEXT: store i4 [[TMP3]], ptr @__msan_retval_tls, align 8 ; CHECK-NEXT: ret i4 [[TMP5]] ; %1 = call i4 @llvm.scmp(i32 %x, i32 %y) ret i4 %1 } define i8 @scmp_narrow_op(i62 %x, i62 %y) nounwind #0 { ; CHECK-LABEL: define i8 @scmp_narrow_op( ; CHECK-SAME: i62 [[X:%.*]], i62 [[Y:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[TMP1:%.*]] = load i62, ptr @__msan_param_tls, align 8 ; CHECK-NEXT: [[TMP2:%.*]] = load i62, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8 ; CHECK-NEXT: call void @llvm.donothing() ; CHECK-NEXT: [[_MSPROP:%.*]] = or i62 [[TMP1]], [[TMP2]] ; CHECK-NEXT: [[_MSPROP1:%.*]] = or i62 [[_MSPROP]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = trunc i62 [[_MSPROP1]] to i8 ; CHECK-NEXT: [[TMP5:%.*]] = call i8 @llvm.scmp.i8.i62(i62 [[X]], i62 [[Y]]) ; CHECK-NEXT: store i8 [[TMP3]], ptr @__msan_retval_tls, align 8 ; CHECK-NEXT: ret i8 [[TMP5]] ; %1 = call i8 @llvm.scmp(i62 %x, i62 %y) ret i8 %1 } define i141 @scmp_wide_result(i32 %x, i32 %y) nounwind #0 { ; CHECK-LABEL: define i141 @scmp_wide_result( ; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 8 ; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8 ; CHECK-NEXT: call void @llvm.donothing() ; CHECK-NEXT: [[_MSPROP:%.*]] = or i32 [[TMP1]], [[TMP2]] ; CHECK-NEXT: [[_MSPROP1:%.*]] = or i32 [[_MSPROP]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[_MSPROP1]] to i141 ; CHECK-NEXT: [[TMP5:%.*]] = call i141 @llvm.scmp.i141.i32(i32 [[X]], i32 [[Y]]) ; CHECK-NEXT: store i141 [[TMP3]], ptr @__msan_retval_tls, align 8 ; CHECK-NEXT: ret i141 [[TMP5]] ; %1 = call i141 @llvm.scmp(i32 %x, i32 %y) ret i141 %1 } define i8 @scmp_wide_op(i109 %x, i109 %y) nounwind #0 { ; CHECK-LABEL: define i8 @scmp_wide_op( ; CHECK-SAME: i109 [[X:%.*]], i109 [[Y:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[TMP1:%.*]] = load i109, ptr @__msan_param_tls, align 8 ; CHECK-NEXT: [[TMP2:%.*]] = load i109, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 16) to ptr), align 8 ; CHECK-NEXT: call void @llvm.donothing() ; CHECK-NEXT: [[_MSPROP:%.*]] = or i109 [[TMP1]], [[TMP2]] ; CHECK-NEXT: [[_MSPROP1:%.*]] = or i109 [[_MSPROP]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = trunc i109 [[_MSPROP1]] to i8 ; CHECK-NEXT: [[TMP5:%.*]] = call i8 @llvm.scmp.i8.i109(i109 [[X]], i109 [[Y]]) ; CHECK-NEXT: store i8 [[TMP3]], ptr @__msan_retval_tls, align 8 ; CHECK-NEXT: ret i8 [[TMP5]] ; %1 = call i8 @llvm.scmp(i109 %x, i109 %y) ret i8 %1 } define i41 @scmp_uncommon_types(i7 %x, i7 %y) nounwind #0 { ; CHECK-LABEL: define i41 @scmp_uncommon_types( ; CHECK-SAME: i7 [[X:%.*]], i7 [[Y:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[TMP1:%.*]] = load i7, ptr @__msan_param_tls, align 8 ; CHECK-NEXT: [[TMP2:%.*]] = load i7, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8 ; CHECK-NEXT: call void @llvm.donothing() ; CHECK-NEXT: [[_MSPROP:%.*]] = or i7 [[TMP1]], [[TMP2]] ; CHECK-NEXT: [[_MSPROP1:%.*]] = or i7 [[_MSPROP]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = zext i7 [[_MSPROP1]] to i41 ; CHECK-NEXT: [[TMP5:%.*]] = call i41 @llvm.scmp.i41.i7(i7 [[X]], i7 [[Y]]) ; CHECK-NEXT: store i41 [[TMP3]], ptr @__msan_retval_tls, align 8 ; CHECK-NEXT: ret i41 [[TMP5]] ; %1 = call i41 @llvm.scmp(i7 %x, i7 %y) ret i41 %1 } define <4 x i32> @scmp_normal_vectors(<4 x i32> %x, <4 x i32> %y) nounwind #0 { ; CHECK-LABEL: define <4 x i32> @scmp_normal_vectors( ; CHECK-SAME: <4 x i32> [[X:%.*]], <4 x i32> [[Y:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr @__msan_param_tls, align 8 ; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i32>, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 16) to ptr), align 8 ; CHECK-NEXT: call void @llvm.donothing() ; CHECK-NEXT: [[_MSPROP:%.*]] = or <4 x i32> [[TMP1]], [[TMP2]] ; CHECK-NEXT: [[_MSPROP1:%.*]] = or <4 x i32> [[_MSPROP]], zeroinitializer ; CHECK-NEXT: [[TMP3:%.*]] = call <4 x i32> @llvm.scmp.v4i32.v4i32(<4 x i32> [[X]], <4 x i32> [[Y]]) ; CHECK-NEXT: store <4 x i32> [[_MSPROP1]], ptr @__msan_retval_tls, align 8 ; CHECK-NEXT: ret <4 x i32> [[TMP3]] ; %1 = call <4 x i32> @llvm.scmp(<4 x i32> %x, <4 x i32> %y) ret <4 x i32> %1 } define <4 x i8> @scmp_narrow_vec_result(<4 x i32> %x, <4 x i32> %y) nounwind #0 { ; CHECK-LABEL: define <4 x i8> @scmp_narrow_vec_result( ; CHECK-SAME: <4 x i32> [[X:%.*]], <4 x i32> [[Y:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr @__msan_param_tls, align 8 ; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i32>, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 16) to ptr), align 8 ; CHECK-NEXT: call void @llvm.donothing() ; CHECK-NEXT: [[_MSPROP:%.*]] = or <4 x i32> [[TMP1]], [[TMP2]] ; CHECK-NEXT: [[_MSPROP1:%.*]] = or <4 x i32> [[_MSPROP]], zeroinitializer ; CHECK-NEXT: [[TMP3:%.*]] = trunc <4 x i32> [[_MSPROP1]] to <4 x i8> ; CHECK-NEXT: [[TMP7:%.*]] = call <4 x i8> @llvm.scmp.v4i8.v4i32(<4 x i32> [[X]], <4 x i32> [[Y]]) ; CHECK-NEXT: store <4 x i8> [[TMP3]], ptr @__msan_retval_tls, align 8 ; CHECK-NEXT: ret <4 x i8> [[TMP7]] ; %1 = call <4 x i8> @llvm.scmp(<4 x i32> %x, <4 x i32> %y) ret <4 x i8> %1 } define <4 x i32> @scmp_narrow_vec_op(<4 x i8> %x, <4 x i8> %y) nounwind #0 { ; CHECK-LABEL: define <4 x i32> @scmp_narrow_vec_op( ; CHECK-SAME: <4 x i8> [[X:%.*]], <4 x i8> [[Y:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i8>, ptr @__msan_param_tls, align 8 ; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i8>, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8 ; CHECK-NEXT: call void @llvm.donothing() ; CHECK-NEXT: [[_MSPROP:%.*]] = or <4 x i8> [[TMP1]], [[TMP2]] ; CHECK-NEXT: [[_MSPROP1:%.*]] = or <4 x i8> [[_MSPROP]], zeroinitializer ; CHECK-NEXT: [[TMP3:%.*]] = zext <4 x i8> [[_MSPROP1]] to <4 x i32> ; CHECK-NEXT: [[TMP7:%.*]] = call <4 x i32> @llvm.scmp.v4i32.v4i8(<4 x i8> [[X]], <4 x i8> [[Y]]) ; CHECK-NEXT: store <4 x i32> [[TMP3]], ptr @__msan_retval_tls, align 8 ; CHECK-NEXT: ret <4 x i32> [[TMP7]] ; %1 = call <4 x i32> @llvm.scmp(<4 x i8> %x, <4 x i8> %y) ret <4 x i32> %1 } define <16 x i32> @scmp_wide_vec_result(<16 x i8> %x, <16 x i8> %y) nounwind #0 { ; CHECK-LABEL: define <16 x i32> @scmp_wide_vec_result( ; CHECK-SAME: <16 x i8> [[X:%.*]], <16 x i8> [[Y:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i8>, ptr @__msan_param_tls, align 8 ; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i8>, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 16) to ptr), align 8 ; CHECK-NEXT: call void @llvm.donothing() ; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i8> [[TMP1]], [[TMP2]] ; CHECK-NEXT: [[_MSPROP1:%.*]] = or <16 x i8> [[_MSPROP]], zeroinitializer ; CHECK-NEXT: [[TMP3:%.*]] = zext <16 x i8> [[_MSPROP1]] to <16 x i32> ; CHECK-NEXT: [[TMP7:%.*]] = call <16 x i32> @llvm.scmp.v16i32.v16i8(<16 x i8> [[X]], <16 x i8> [[Y]]) ; CHECK-NEXT: store <16 x i32> [[TMP3]], ptr @__msan_retval_tls, align 8 ; CHECK-NEXT: ret <16 x i32> [[TMP7]] ; %1 = call <16 x i32> @llvm.scmp(<16 x i8> %x, <16 x i8> %y) ret <16 x i32> %1 } define <16 x i8> @scmp_wide_vec_op(<16 x i64> %x, <16 x i64> %y) nounwind #0 { ; CHECK-LABEL: define <16 x i8> @scmp_wide_vec_op( ; CHECK-SAME: <16 x i64> [[X:%.*]], <16 x i64> [[Y:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[TMP1:%.*]] = load <16 x i64>, ptr @__msan_param_tls, align 8 ; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i64>, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 128) to ptr), align 8 ; CHECK-NEXT: call void @llvm.donothing() ; CHECK-NEXT: [[_MSPROP:%.*]] = or <16 x i64> [[TMP1]], [[TMP2]] ; CHECK-NEXT: [[_MSPROP1:%.*]] = or <16 x i64> [[_MSPROP]], zeroinitializer ; CHECK-NEXT: [[TMP3:%.*]] = trunc <16 x i64> [[_MSPROP1]] to <16 x i8> ; CHECK-NEXT: [[TMP7:%.*]] = call <16 x i8> @llvm.scmp.v16i8.v16i64(<16 x i64> [[X]], <16 x i64> [[Y]]) ; CHECK-NEXT: store <16 x i8> [[TMP3]], ptr @__msan_retval_tls, align 8 ; CHECK-NEXT: ret <16 x i8> [[TMP7]] ; %1 = call <16 x i8> @llvm.scmp(<16 x i64> %x, <16 x i64> %y) ret <16 x i8> %1 } define <7 x i117> @scmp_uncommon_vectors(<7 x i7> %x, <7 x i7> %y) nounwind #0 { ; CHECK-LABEL: define <7 x i117> @scmp_uncommon_vectors( ; CHECK-SAME: <7 x i7> [[X:%.*]], <7 x i7> [[Y:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[TMP1:%.*]] = load <7 x i7>, ptr @__msan_param_tls, align 8 ; CHECK-NEXT: [[TMP2:%.*]] = load <7 x i7>, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8 ; CHECK-NEXT: call void @llvm.donothing() ; CHECK-NEXT: [[_MSPROP:%.*]] = or <7 x i7> [[TMP1]], [[TMP2]] ; CHECK-NEXT: [[_MSPROP1:%.*]] = or <7 x i7> [[_MSPROP]], zeroinitializer ; CHECK-NEXT: [[TMP3:%.*]] = zext <7 x i7> [[_MSPROP1]] to <7 x i117> ; CHECK-NEXT: [[TMP7:%.*]] = call <7 x i117> @llvm.scmp.v7i117.v7i7(<7 x i7> [[X]], <7 x i7> [[Y]]) ; CHECK-NEXT: store <7 x i117> [[TMP3]], ptr @__msan_retval_tls, align 8 ; CHECK-NEXT: ret <7 x i117> [[TMP7]] ; %1 = call <7 x i117> @llvm.scmp(<7 x i7> %x, <7 x i7> %y) ret <7 x i117> %1 } define <1 x i3> @scmp_scalarize(<1 x i33> %x, <1 x i33> %y) nounwind #0 { ; CHECK-LABEL: define <1 x i3> @scmp_scalarize( ; CHECK-SAME: <1 x i33> [[X:%.*]], <1 x i33> [[Y:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[TMP1:%.*]] = load <1 x i33>, ptr @__msan_param_tls, align 8 ; CHECK-NEXT: [[TMP2:%.*]] = load <1 x i33>, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8 ; CHECK-NEXT: call void @llvm.donothing() ; CHECK-NEXT: [[_MSPROP:%.*]] = or <1 x i33> [[TMP1]], [[TMP2]] ; CHECK-NEXT: [[_MSPROP1:%.*]] = or <1 x i33> [[_MSPROP]], zeroinitializer ; CHECK-NEXT: [[TMP3:%.*]] = trunc <1 x i33> [[_MSPROP1]] to <1 x i3> ; CHECK-NEXT: [[TMP7:%.*]] = call <1 x i3> @llvm.scmp.v1i3.v1i33(<1 x i33> [[X]], <1 x i33> [[Y]]) ; CHECK-NEXT: store <1 x i3> [[TMP3]], ptr @__msan_retval_tls, align 8 ; CHECK-NEXT: ret <1 x i3> [[TMP7]] ; %1 = call <1 x i3> @llvm.scmp(<1 x i33> %x, <1 x i33> %y) ret <1 x i3> %1 } define <2 x i8> @scmp_bool_operands(<2 x i1> %x, <2 x i1> %y) nounwind #0 { ; CHECK-LABEL: define <2 x i8> @scmp_bool_operands( ; CHECK-SAME: <2 x i1> [[X:%.*]], <2 x i1> [[Y:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i1>, ptr @__msan_param_tls, align 8 ; CHECK-NEXT: [[TMP2:%.*]] = load <2 x i1>, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8 ; CHECK-NEXT: call void @llvm.donothing() ; CHECK-NEXT: [[_MSPROP:%.*]] = or <2 x i1> [[TMP1]], [[TMP2]] ; CHECK-NEXT: [[_MSPROP1:%.*]] = or <2 x i1> [[_MSPROP]], zeroinitializer ; CHECK-NEXT: [[TMP3:%.*]] = zext <2 x i1> [[_MSPROP1]] to <2 x i8> ; CHECK-NEXT: [[TMP7:%.*]] = call <2 x i8> @llvm.scmp.v2i8.v2i1(<2 x i1> [[X]], <2 x i1> [[Y]]) ; CHECK-NEXT: store <2 x i8> [[TMP3]], ptr @__msan_retval_tls, align 8 ; CHECK-NEXT: ret <2 x i8> [[TMP7]] ; %1 = call <2 x i8> @llvm.scmp(<2 x i1> %x, <2 x i1> %y) ret <2 x i8> %1 } define <2 x i16> @scmp_ret_wider_than_operands(<2 x i8> %x, <2 x i8> %y) nounwind #0 { ; CHECK-LABEL: define <2 x i16> @scmp_ret_wider_than_operands( ; CHECK-SAME: <2 x i8> [[X:%.*]], <2 x i8> [[Y:%.*]]) #[[ATTR0]] { ; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i8>, ptr @__msan_param_tls, align 8 ; CHECK-NEXT: [[TMP2:%.*]] = load <2 x i8>, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8 ; CHECK-NEXT: call void @llvm.donothing() ; CHECK-NEXT: [[_MSPROP:%.*]] = or <2 x i8> [[TMP1]], [[TMP2]] ; CHECK-NEXT: [[_MSPROP1:%.*]] = or <2 x i8> [[_MSPROP]], zeroinitializer ; CHECK-NEXT: [[TMP3:%.*]] = zext <2 x i8> [[_MSPROP1]] to <2 x i16> ; CHECK-NEXT: [[TMP7:%.*]] = call <2 x i16> @llvm.scmp.v2i16.v2i8(<2 x i8> [[X]], <2 x i8> [[Y]]) ; CHECK-NEXT: store <2 x i16> [[TMP3]], ptr @__msan_retval_tls, align 8 ; CHECK-NEXT: ret <2 x i16> [[TMP7]] ; %1 = call <2 x i16> @llvm.scmp(<2 x i8> %x, <2 x i8> %y) ret <2 x i16> %1 } attributes #0 = { sanitize_memory }