; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mtriple=x86_64-- -mcpu=skx | FileCheck %s define void @insert_subvector_broadcast_as_blend() { ; CHECK-LABEL: insert_subvector_broadcast_as_blend: ; CHECK: # %bb.0: ; CHECK-NEXT: movq (%rax), %rax ; CHECK-NEXT: incq %rax ; CHECK-NEXT: vpbroadcastq %rax, %zmm0 ; CHECK-NEXT: vpxor %xmm1, %xmm1, %xmm1 ; CHECK-NEXT: valignq {{.*#+}} zmm1 = zmm1[7],zmm0[0,1,2,3,4,5,6] ; CHECK-NEXT: vpcmpltq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm1, %k0 ; CHECK-NEXT: vpcmpltq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %k1 ; CHECK-NEXT: kunpckbw %k0, %k1, %k1 ; CHECK-NEXT: vmovdqu8 {{.*#+}} xmm0 {%k1} {z} = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1] ; CHECK-NEXT: vmovdqa %xmm0, (%rax) ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq %load4 = load i64, ptr poison, align 32 %add = add i64 %load4, 1 %insertelement5 = insertelement <16 x i64> zeroinitializer, i64 %add, i64 1 %shufflevector = shufflevector <16 x i64> %insertelement5, <16 x i64> poison, <16 x i32> %icmp6 = icmp slt <16 x i64> %shufflevector, %shufflevector7 = shufflevector <16 x i1> poison, <16 x i1> %icmp6, <16 x i32> %zext = zext <16 x i1> %shufflevector7 to <16 x i8> store <16 x i8> %zext, ptr poison, align 32 ret void }