; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,CHECK-EXPAND
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512vbmi2 | FileCheck %s --check-prefixes=CHECK,CHECK-UNEXPAND

define <4 x i32> @test_fshl_constants() {
; CHECK-EXPAND-LABEL: test_fshl_constants:
; CHECK-EXPAND:       # %bb.0:
; CHECK-EXPAND-NEXT:    vmovaps {{.*#+}} xmm0 = [0,512,2048,6144]
; CHECK-EXPAND-NEXT:    retq
;
; CHECK-UNEXPAND-LABEL: test_fshl_constants:
; CHECK-UNEXPAND:       # %bb.0:
; CHECK-UNEXPAND-NEXT:    vpmovsxwd {{.*#+}} xmm0 = [0,512,2048,6144]
; CHECK-UNEXPAND-NEXT:    retq
  %res = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> <i32 0, i32 1, i32 2, i32 3>, <4 x i32> <i32 4, i32 5, i32 6, i32 7>, <4 x i32> <i32 8, i32 9, i32 10, i32 11>)
  ret <4 x i32> %res
}

define <4 x i32> @test_fshl_splat_constants() {
; CHECK-LABEL: test_fshl_splat_constants:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vbroadcastss {{.*#+}} xmm0 = [256,256,256,256]
; CHECK-NEXT:    retq
  %res = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> <i32 1, i32 1, i32 1, i32 1>, <4 x i32> <i32 4, i32 4, i32 4, i32 4>, <4 x i32> <i32 8, i32 8, i32 8, i32 8>)
  ret <4 x i32> %res
}

define <4 x i32> @test_fshl_two_constants(<4 x i32> %a) {
; CHECK-EXPAND-LABEL: test_fshl_two_constants:
; CHECK-EXPAND:       # %bb.0:
; CHECK-EXPAND-NEXT:    vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; CHECK-EXPAND-NEXT:    retq
;
; CHECK-UNEXPAND-LABEL: test_fshl_two_constants:
; CHECK-UNEXPAND:       # %bb.0:
; CHECK-UNEXPAND-NEXT:    vpmovsxbd {{.*#+}} xmm1 = [4,5,6,7]
; CHECK-UNEXPAND-NEXT:    vpshldvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm0
; CHECK-UNEXPAND-NEXT:    retq
  %res = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %a, <4 x i32> <i32 4, i32 5, i32 6, i32 7>, <4 x i32> <i32 8, i32 9, i32 10, i32 11>)
  ret <4 x i32> %res
}

define <4 x i32> @test_fshl_one_constant(<4 x i32> %a, <4 x i32> %b) {
; CHECK-EXPAND-LABEL: test_fshl_one_constant:
; CHECK-EXPAND:       # %bb.0:
; CHECK-EXPAND-NEXT:    vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
; CHECK-EXPAND-NEXT:    vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; CHECK-EXPAND-NEXT:    vpor %xmm1, %xmm0, %xmm0
; CHECK-EXPAND-NEXT:    retq
;
; CHECK-UNEXPAND-LABEL: test_fshl_one_constant:
; CHECK-UNEXPAND:       # %bb.0:
; CHECK-UNEXPAND-NEXT:    vpshldvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm0
; CHECK-UNEXPAND-NEXT:    retq
  %res = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 8, i32 9, i32 10, i32 11>)
  ret <4 x i32> %res
}

define <4 x i32> @test_fshl_none_constant(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
; CHECK-EXPAND-LABEL: test_fshl_none_constant:
; CHECK-EXPAND:       # %bb.0:
; CHECK-EXPAND-NEXT:    vpbroadcastd {{.*#+}} xmm3 = [31,31,31,31]
; CHECK-EXPAND-NEXT:    vpandn %xmm3, %xmm2, %xmm4
; CHECK-EXPAND-NEXT:    vpsrld $1, %xmm1, %xmm1
; CHECK-EXPAND-NEXT:    vpsrlvd %xmm4, %xmm1, %xmm1
; CHECK-EXPAND-NEXT:    vpand %xmm3, %xmm2, %xmm2
; CHECK-EXPAND-NEXT:    vpsllvd %xmm2, %xmm0, %xmm0
; CHECK-EXPAND-NEXT:    vpor %xmm1, %xmm0, %xmm0
; CHECK-EXPAND-NEXT:    retq
;
; CHECK-UNEXPAND-LABEL: test_fshl_none_constant:
; CHECK-UNEXPAND:       # %bb.0:
; CHECK-UNEXPAND-NEXT:    vpshldvd %xmm2, %xmm1, %xmm0
; CHECK-UNEXPAND-NEXT:    retq
  %res = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c)
  ret <4 x i32> %res
}

define <4 x i32> @test_fshr_constants() {
; CHECK-LABEL: test_fshr_constants:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vmovaps {{.*#+}} xmm0 = [0,8388608,8388608,6291456]
; CHECK-NEXT:    retq
  %res = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> <i32 0, i32 1, i32 2, i32 3>, <4 x i32> <i32 4, i32 5, i32 6, i32 7>, <4 x i32> <i32 8, i32 9, i32 10, i32 11>)
  ret <4 x i32> %res
}

define <4 x i32> @test_fshr_two_constants(<4 x i32> %a) {
; CHECK-EXPAND-LABEL: test_fshr_two_constants:
; CHECK-EXPAND:       # %bb.0:
; CHECK-EXPAND-NEXT:    vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; CHECK-EXPAND-NEXT:    retq
;
; CHECK-UNEXPAND-LABEL: test_fshr_two_constants:
; CHECK-UNEXPAND:       # %bb.0:
; CHECK-UNEXPAND-NEXT:    vpmovsxbd {{.*#+}} xmm1 = [4,5,6,7]
; CHECK-UNEXPAND-NEXT:    vpshrdvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
; CHECK-UNEXPAND-NEXT:    vmovdqa %xmm1, %xmm0
; CHECK-UNEXPAND-NEXT:    retq
  %res = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %a, <4 x i32> <i32 4, i32 5, i32 6, i32 7>, <4 x i32> <i32 8, i32 9, i32 10, i32 11>)
  ret <4 x i32> %res
}

define <4 x i32> @test_fshr_one_constant(<4 x i32> %a, <4 x i32> %b) {
; CHECK-EXPAND-LABEL: test_fshr_one_constant:
; CHECK-EXPAND:       # %bb.0:
; CHECK-EXPAND-NEXT:    vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
; CHECK-EXPAND-NEXT:    vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; CHECK-EXPAND-NEXT:    vpor %xmm1, %xmm0, %xmm0
; CHECK-EXPAND-NEXT:    retq
;
; CHECK-UNEXPAND-LABEL: test_fshr_one_constant:
; CHECK-UNEXPAND:       # %bb.0:
; CHECK-UNEXPAND-NEXT:    vpshrdvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
; CHECK-UNEXPAND-NEXT:    vmovdqa %xmm1, %xmm0
; CHECK-UNEXPAND-NEXT:    retq
  %res = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 8, i32 9, i32 10, i32 11>)
  ret <4 x i32> %res
}

define <4 x i32> @test_fshr_none_constant(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
; CHECK-EXPAND-LABEL: test_fshr_none_constant:
; CHECK-EXPAND:       # %bb.0:
; CHECK-EXPAND-NEXT:    vpbroadcastd {{.*#+}} xmm3 = [31,31,31,31]
; CHECK-EXPAND-NEXT:    vpand %xmm3, %xmm2, %xmm4
; CHECK-EXPAND-NEXT:    vpsrlvd %xmm4, %xmm1, %xmm1
; CHECK-EXPAND-NEXT:    vpandn %xmm3, %xmm2, %xmm2
; CHECK-EXPAND-NEXT:    vpaddd %xmm0, %xmm0, %xmm0
; CHECK-EXPAND-NEXT:    vpsllvd %xmm2, %xmm0, %xmm0
; CHECK-EXPAND-NEXT:    vpor %xmm1, %xmm0, %xmm0
; CHECK-EXPAND-NEXT:    retq
;
; CHECK-UNEXPAND-LABEL: test_fshr_none_constant:
; CHECK-UNEXPAND:       # %bb.0:
; CHECK-UNEXPAND-NEXT:    vpshrdvd %xmm2, %xmm0, %xmm1
; CHECK-UNEXPAND-NEXT:    vmovdqa %xmm1, %xmm0
; CHECK-UNEXPAND-NEXT:    retq
  %res = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c)
  ret <4 x i32> %res
}

define <4 x i32> @test_fshr_splat_constants() {
; CHECK-LABEL: test_fshr_splat_constants:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vbroadcastss {{.*#+}} xmm0 = [16777216,16777216,16777216,16777216]
; CHECK-NEXT:    retq
  %res = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> <i32 1, i32 1, i32 1, i32 1>, <4 x i32> <i32 4, i32 4, i32 4, i32 4>, <4 x i32> <i32 8, i32 8, i32 8, i32 8>)
  ret <4 x i32> %res
}