; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \ ; RUN: | FileCheck %s ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0 ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: write) declare void @llvm.assume(i1 noundef) #0 declare fastcc i1 @S_reginclass() declare fastcc ptr @Perl_av_store(i64) define fastcc i32 @S_regrepeat(ptr %startposp, i32 %max, i8 %0, i1 %cmp343) nounwind { ; CHECK-LABEL: S_regrepeat: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: addi sp, sp, -32 ; CHECK-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; CHECK-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; CHECK-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; CHECK-NEXT: sd s2, 0(sp) # 8-byte Folded Spill ; CHECK-NEXT: zext.b a2, a2 ; CHECK-NEXT: addi a4, a2, -19 ; CHECK-NEXT: li a5, 2 ; CHECK-NEXT: mv a0, a1 ; CHECK-NEXT: bltu a4, a5, .LBB0_4 ; CHECK-NEXT: # %bb.1: # %entry ; CHECK-NEXT: li a1, 1 ; CHECK-NEXT: bltu a1, a2, .LBB0_8 ; CHECK-NEXT: # %bb.2: # %do_exactf ; CHECK-NEXT: andi a3, a3, 1 ; CHECK-NEXT: beqz a3, .LBB0_10 ; CHECK-NEXT: # %bb.3: # %land.rhs251 ; CHECK-NEXT: lw zero, 0(zero) ; CHECK-NEXT: li s0, 1 ; CHECK-NEXT: bnez s0, .LBB0_9 ; CHECK-NEXT: j .LBB0_8 ; CHECK-NEXT: .LBB0_4: # %sw.bb336 ; CHECK-NEXT: mv s1, a0 ; CHECK-NEXT: li s0, 0 ; CHECK-NEXT: andi s2, a3, 1 ; CHECK-NEXT: .LBB0_5: # %land.rhs345 ; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 ; CHECK-NEXT: call S_reginclass ; CHECK-NEXT: andi a0, a0, 1 ; CHECK-NEXT: beqz a0, .LBB0_7 ; CHECK-NEXT: # %bb.6: # %while.body350 ; CHECK-NEXT: # in Loop: Header=BB0_5 Depth=1 ; CHECK-NEXT: addiw s0, s0, 1 ; CHECK-NEXT: bnez s2, .LBB0_5 ; CHECK-NEXT: j .LBB0_8 ; CHECK-NEXT: .LBB0_7: ; CHECK-NEXT: mv a0, s1 ; CHECK-NEXT: bnez s0, .LBB0_9 ; CHECK-NEXT: .LBB0_8: # %if.else1492 ; CHECK-NEXT: li a0, 0 ; CHECK-NEXT: .LBB0_9: # %if.end1497 ; CHECK-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld s0, 16(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld s1, 8(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld s2, 0(sp) # 8-byte Folded Reload ; CHECK-NEXT: addi sp, sp, 32 ; CHECK-NEXT: ret ; CHECK-NEXT: .LBB0_10: ; CHECK-NEXT: j .LBB0_8 entry: switch i8 %0, label %if.else1492 [ i8 19, label %sw.bb336 i8 20, label %sw.bb336 i8 1, label %do_exactf i8 0, label %do_exactf ] do_exactf: ; preds = %entry, %entry br i1 %cmp343, label %land.rhs251, label %if.end334 land.rhs251: ; preds = %do_exactf %bcmp414 = load volatile i32, ptr null, align 4 br label %if.end334 if.end334: ; preds = %land.rhs251, %do_exactf %hardcount.7 = phi i32 [ 0, %do_exactf ], [ 1, %land.rhs251 ] call void @llvm.lifetime.end.p0(i64 0, ptr null) br label %sw.epilog1489 sw.bb336: ; preds = %entry, %entry br label %land.rhs345 land.rhs345: ; preds = %while.body350, %sw.bb336 %hardcount.8634 = phi i32 [ %inc356, %while.body350 ], [ 0, %sw.bb336 ] %call347 = call fastcc i1 @S_reginclass() br i1 %call347, label %while.body350, label %sw.epilog1489 while.body350: ; preds = %land.rhs345 %inc356 = add i32 %hardcount.8634, 1 br i1 %cmp343, label %land.rhs345, label %if.end1497 sw.epilog1489: ; preds = %land.rhs345, %if.end334 %hardcount.20 = phi i32 [ %hardcount.7, %if.end334 ], [ %hardcount.8634, %land.rhs345 ] %tobool1490.not = icmp eq i32 %hardcount.20, 0 br i1 %tobool1490.not, label %if.else1492, label %if.end1497 if.else1492: ; preds = %sw.epilog1489, %entry br label %if.end1497 if.end1497: ; preds = %if.else1492, %sw.epilog1489, %while.body350 %c.0 = phi i32 [ 0, %if.else1492 ], [ %max, %sw.epilog1489 ], [ 0, %while.body350 ] ret i32 %c.0 } define ptr @Perl_pp_refassign(ptr %PL_stack_sp, i1 %tobool.not, i1 %tobool3.not, i1 %cond1) nounwind { ; CHECK-LABEL: Perl_pp_refassign: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: andi a1, a1, 1 ; CHECK-NEXT: beqz a1, .LBB1_3 ; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: li a1, 0 ; CHECK-NEXT: andi a2, a2, 1 ; CHECK-NEXT: bnez a2, .LBB1_4 ; CHECK-NEXT: .LBB1_2: # %cond.true4 ; CHECK-NEXT: ld a0, 0(a0) ; CHECK-NEXT: snez a0, a0 ; CHECK-NEXT: bnez a0, .LBB1_5 ; CHECK-NEXT: j .LBB1_6 ; CHECK-NEXT: .LBB1_3: # %cond.true ; CHECK-NEXT: ld a1, 0(a0) ; CHECK-NEXT: andi a2, a2, 1 ; CHECK-NEXT: beqz a2, .LBB1_2 ; CHECK-NEXT: .LBB1_4: ; CHECK-NEXT: j .LBB1_6 ; CHECK-NEXT: .LBB1_5: # %sw.bb85 ; CHECK-NEXT: addi sp, sp, -16 ; CHECK-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; CHECK-NEXT: ld a0, 0(a1) ; CHECK-NEXT: call Perl_av_store ; CHECK-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; CHECK-NEXT: addi sp, sp, 16 ; CHECK-NEXT: .LBB1_6: # %common.ret ; CHECK-NEXT: li a0, 0 ; CHECK-NEXT: ret entry: br i1 %tobool.not, label %cond.end, label %cond.true cond.true: ; preds = %entry %0 = load ptr, ptr %PL_stack_sp, align 8 br label %cond.end cond.end: ; preds = %cond.true, %entry %cond = phi ptr [ %0, %cond.true ], [ null, %entry ] br i1 %tobool3.not, label %cond.end7, label %cond.true4 cond.true4: ; preds = %cond.end %1 = load ptr, ptr %PL_stack_sp, align 8 %2 = icmp ne ptr %1, null br label %cond.end7 cond.end7: ; preds = %cond.true4, %cond.end %cond84 = phi i1 [ %2, %cond.true4 ], [ false, %cond.end ] br i1 %cond1, label %if.end48, label %sw.bb sw.bb: ; preds = %cond.end7 call void @llvm.assume(i1 %tobool.not) br label %if.end48 if.end48: ; preds = %sw.bb, %cond.end7 br i1 %cond84, label %sw.bb85, label %common.ret common.ret: ; preds = %sw.bb85, %if.end48 ret ptr null sw.bb85: ; preds = %if.end48 %3 = load i64, ptr %cond, align 8 %call125 = call fastcc ptr @Perl_av_store(i64 %3) br label %common.ret } attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #1 = { nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: write) }