/llvm/test/CodeGen/RISCV/GlobalISel/
../
add-imm.ll
alu-roundtrip-rv64.ll
alu-roundtrip.ll
atomic-fence.ll
atomic-load-store.ll
bitmanip.ll
calllowering-ret.ll
calls.ll
combine-neg-abs.ll
combine.ll
combine.mir
constantpool.ll
constbarrier-rv32.ll
constbarrier-rv64.ll
div-by-constant.ll
double-arith.ll
double-convert.ll
double-fcmp.ll
double-intrinsics.ll
double-zfa.ll
float-arith.ll
float-convert.ll
float-fclass.ll
float-fcmp.ll
float-intrinsics.ll
float-zfa.ll
fp128.ll
fpr-gpr-copy-rv32.ll
fpr-gpr-copy-rv64.ll
freeze.ll
gisel-commandline-option.ll
half-zfa.ll
iabs.ll
instruction-select
irtranslator-calllowering.ll
irtranslator
jumptable.ll
knownbits-copy-crash.mir
legalizer-info-validation.mir
legalizer
libcalls.ll
phi.ll
regbankselect
riscv-unsupported.ll
rotl-rotr.ll
rv32zba.ll
rv32zbb-zbkb.ll
rv32zbb.ll
rv32zbkb.ll
rv64-double-convert.ll
rv64-float-convert.ll
rv64zba.ll
rv64zbb-zbkb.ll
rv64zbb.ll
rv64zbkb.ll
rvv
scalablevec-combiner-crash.ll
scmp.ll
shift.ll
shifts.ll
stacksave-stackrestore.ll
ucmp.ll
vararg.ll
wide-scalar-shift-by-byte-multiple-legalization.ll