; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 ; RUN: llc -verify-machineinstrs -mcpu=pwr9 -ppc-asm-full-reg-names \ ; RUN: -mtriple=powerpc64le-unknown-linux-gnu < %s | \ ; RUN: FileCheck %s --check-prefix=CHECK-LE-P9 ; RUN: llc -verify-machineinstrs -mcpu=pwr9 -ppc-asm-full-reg-names \ ; RUN: -mtriple=powerpc64-unknown-linux-gnu < %s | \ ; RUN: FileCheck %s --check-prefix=CHECK-BE-P9 ; RUN: llc -verify-machineinstrs -mcpu=pwr9 -ppc-asm-full-reg-names \ ; RUN: -mtriple=powerpc64-ibm-aix < %s | \ ; RUN: FileCheck %s --check-prefix=CHECK-AIX-64-P9 define noundef i32 @_Z11memcmp_testPKvS0_m(ptr noundef readonly captures(none) %ptr1, ptr noundef readonly captures(none) %ptr2, i64 noundef %num) nounwind { ; CHECK-LE-P9-LABEL: _Z11memcmp_testPKvS0_m: ; CHECK-LE-P9: # %bb.0: # %entry ; CHECK-LE-P9-NEXT: mflr r0 ; CHECK-LE-P9-NEXT: stdu r1, -32(r1) ; CHECK-LE-P9-NEXT: std r0, 48(r1) ; CHECK-LE-P9-NEXT: bl memcmp ; CHECK-LE-P9-NEXT: nop ; CHECK-LE-P9-NEXT: addi r1, r1, 32 ; CHECK-LE-P9-NEXT: ld r0, 16(r1) ; CHECK-LE-P9-NEXT: mtlr r0 ; CHECK-LE-P9-NEXT: blr ; ; CHECK-BE-P9-LABEL: _Z11memcmp_testPKvS0_m: ; CHECK-BE-P9: # %bb.0: # %entry ; CHECK-BE-P9-NEXT: mflr r0 ; CHECK-BE-P9-NEXT: stdu r1, -112(r1) ; CHECK-BE-P9-NEXT: std r0, 128(r1) ; CHECK-BE-P9-NEXT: bl memcmp ; CHECK-BE-P9-NEXT: nop ; CHECK-BE-P9-NEXT: addi r1, r1, 112 ; CHECK-BE-P9-NEXT: ld r0, 16(r1) ; CHECK-BE-P9-NEXT: mtlr r0 ; CHECK-BE-P9-NEXT: blr ; ; CHECK-AIX-64-P9-LABEL: _Z11memcmp_testPKvS0_m: ; CHECK-AIX-64-P9: # %bb.0: # %entry ; CHECK-AIX-64-P9-NEXT: mflr r0 ; CHECK-AIX-64-P9-NEXT: stdu r1, -112(r1) ; CHECK-AIX-64-P9-NEXT: std r0, 128(r1) ; CHECK-AIX-64-P9-NEXT: bl .___memcmp64[PR] ; CHECK-AIX-64-P9-NEXT: nop ; CHECK-AIX-64-P9-NEXT: addi r1, r1, 112 ; CHECK-AIX-64-P9-NEXT: ld r0, 16(r1) ; CHECK-AIX-64-P9-NEXT: mtlr r0 ; CHECK-AIX-64-P9-NEXT: blr entry: %call = tail call i32 @memcmp(ptr noundef %ptr1, ptr noundef %ptr2, i64 noundef %num) ret i32 %call } declare i32 @memcmp(ptr noundef captures(none), ptr noundef captures(none), i64 noundef) nounwind define i64 @strlen_test(ptr noundef %str) nounwind { ; CHECK-LE-P9-LABEL: strlen_test: ; CHECK-LE-P9: # %bb.0: # %entry ; CHECK-LE-P9-NEXT: mflr r0 ; CHECK-LE-P9-NEXT: stdu r1, -48(r1) ; CHECK-LE-P9-NEXT: std r0, 64(r1) ; CHECK-LE-P9-NEXT: std r3, 40(r1) ; CHECK-LE-P9-NEXT: bl strlen ; CHECK-LE-P9-NEXT: nop ; CHECK-LE-P9-NEXT: addi r1, r1, 48 ; CHECK-LE-P9-NEXT: ld r0, 16(r1) ; CHECK-LE-P9-NEXT: mtlr r0 ; CHECK-LE-P9-NEXT: blr ; ; CHECK-BE-P9-LABEL: strlen_test: ; CHECK-BE-P9: # %bb.0: # %entry ; CHECK-BE-P9-NEXT: mflr r0 ; CHECK-BE-P9-NEXT: stdu r1, -128(r1) ; CHECK-BE-P9-NEXT: std r0, 144(r1) ; CHECK-BE-P9-NEXT: std r3, 120(r1) ; CHECK-BE-P9-NEXT: bl strlen ; CHECK-BE-P9-NEXT: nop ; CHECK-BE-P9-NEXT: addi r1, r1, 128 ; CHECK-BE-P9-NEXT: ld r0, 16(r1) ; CHECK-BE-P9-NEXT: mtlr r0 ; CHECK-BE-P9-NEXT: blr ; ; CHECK-AIX-64-P9-LABEL: strlen_test: ; CHECK-AIX-64-P9: # %bb.0: # %entry ; CHECK-AIX-64-P9-NEXT: mflr r0 ; CHECK-AIX-64-P9-NEXT: stdu r1, -128(r1) ; CHECK-AIX-64-P9-NEXT: std r0, 144(r1) ; CHECK-AIX-64-P9-NEXT: std r3, 120(r1) ; CHECK-AIX-64-P9-NEXT: bl .___strlen64[PR] ; CHECK-AIX-64-P9-NEXT: nop ; CHECK-AIX-64-P9-NEXT: addi r1, r1, 128 ; CHECK-AIX-64-P9-NEXT: ld r0, 16(r1) ; CHECK-AIX-64-P9-NEXT: mtlr r0 ; CHECK-AIX-64-P9-NEXT: blr entry: %str.addr = alloca ptr, align 8 store ptr %str, ptr %str.addr, align 8 %0 = load ptr, ptr %str.addr, align 8 %call = call i64 @strlen(ptr noundef %0) ret i64 %call } declare i64 @strlen(ptr noundef) nounwind