; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6 ; RUN: llc -mtriple=powerpc64le < %s | FileCheck %s define i32 @v4i1(<4 x i1> %x) { ; CHECK-LABEL: v4i1: ; CHECK: # %bb.0: ; CHECK-NEXT: addis 3, 2, .LCPI0_0@toc@ha ; CHECK-NEXT: xxleqv 36, 36, 36 ; CHECK-NEXT: vslw 2, 2, 4 ; CHECK-NEXT: addi 3, 3, .LCPI0_0@toc@l ; CHECK-NEXT: vsraw 2, 2, 4 ; CHECK-NEXT: lxvd2x 0, 0, 3 ; CHECK-NEXT: xxswapd 35, 0 ; CHECK-NEXT: xxland 0, 34, 35 ; CHECK-NEXT: xxsldwi 1, 0, 0, 1 ; CHECK-NEXT: xxswapd 2, 0 ; CHECK-NEXT: xxsldwi 3, 0, 0, 3 ; CHECK-NEXT: mffprwz 3, 1 ; CHECK-NEXT: mffprwz 4, 2 ; CHECK-NEXT: cmplw 4, 3 ; CHECK-NEXT: iselgt 3, 4, 3 ; CHECK-NEXT: mffprwz 4, 0 ; CHECK-NEXT: cmplw 3, 4 ; CHECK-NEXT: iselgt 3, 3, 4 ; CHECK-NEXT: mffprwz 4, 3 ; CHECK-NEXT: cmplw 3, 4 ; CHECK-NEXT: iselgt 3, 3, 4 ; CHECK-NEXT: subfic 3, 3, 4 ; CHECK-NEXT: blr %y = call i32 @llvm.experimental.cttz.elts(<4 x i1> %x, i1 false) ret i32 %y } define i32 @v4i32(<4 x i32> %x) { ; CHECK-LABEL: v4i32: ; CHECK: # %bb.0: ; CHECK-NEXT: addis 3, 2, .LCPI1_0@toc@ha ; CHECK-NEXT: xxlxor 36, 36, 36 ; CHECK-NEXT: addi 3, 3, .LCPI1_0@toc@l ; CHECK-NEXT: vcmpgtuw 2, 2, 4 ; CHECK-NEXT: lxvd2x 0, 0, 3 ; CHECK-NEXT: xxswapd 35, 0 ; CHECK-NEXT: xxland 0, 34, 35 ; CHECK-NEXT: xxsldwi 1, 0, 0, 1 ; CHECK-NEXT: xxswapd 2, 0 ; CHECK-NEXT: xxsldwi 3, 0, 0, 3 ; CHECK-NEXT: mffprwz 3, 1 ; CHECK-NEXT: mffprwz 4, 2 ; CHECK-NEXT: cmplw 4, 3 ; CHECK-NEXT: iselgt 3, 4, 3 ; CHECK-NEXT: mffprwz 4, 0 ; CHECK-NEXT: cmplw 3, 4 ; CHECK-NEXT: iselgt 3, 3, 4 ; CHECK-NEXT: mffprwz 4, 3 ; CHECK-NEXT: cmplw 3, 4 ; CHECK-NEXT: iselgt 3, 3, 4 ; CHECK-NEXT: subfic 3, 3, 4 ; CHECK-NEXT: blr %y = call i32 @llvm.experimental.cttz.elts(<4 x i32> %x, i1 false) ret i32 %y } define i32 @v4i1_zero_is_poison(<4 x i1> %x) { ; CHECK-LABEL: v4i1_zero_is_poison: ; CHECK: # %bb.0: ; CHECK-NEXT: addis 3, 2, .LCPI2_0@toc@ha ; CHECK-NEXT: xxleqv 36, 36, 36 ; CHECK-NEXT: vslw 2, 2, 4 ; CHECK-NEXT: addi 3, 3, .LCPI2_0@toc@l ; CHECK-NEXT: vsraw 2, 2, 4 ; CHECK-NEXT: lxvd2x 0, 0, 3 ; CHECK-NEXT: xxswapd 35, 0 ; CHECK-NEXT: xxland 0, 34, 35 ; CHECK-NEXT: xxsldwi 1, 0, 0, 1 ; CHECK-NEXT: xxswapd 2, 0 ; CHECK-NEXT: xxsldwi 3, 0, 0, 3 ; CHECK-NEXT: mffprwz 3, 1 ; CHECK-NEXT: mffprwz 4, 2 ; CHECK-NEXT: cmplw 4, 3 ; CHECK-NEXT: iselgt 3, 4, 3 ; CHECK-NEXT: mffprwz 4, 0 ; CHECK-NEXT: cmplw 3, 4 ; CHECK-NEXT: iselgt 3, 3, 4 ; CHECK-NEXT: mffprwz 4, 3 ; CHECK-NEXT: cmplw 3, 4 ; CHECK-NEXT: iselgt 3, 3, 4 ; CHECK-NEXT: subfic 3, 3, 4 ; CHECK-NEXT: blr %y = call i32 @llvm.experimental.cttz.elts(<4 x i1> %x, i1 true) ret i32 %y } define i32 @v4i32_zero_is_poison(<4 x i32> %x) { ; CHECK-LABEL: v4i32_zero_is_poison: ; CHECK: # %bb.0: ; CHECK-NEXT: addis 3, 2, .LCPI3_0@toc@ha ; CHECK-NEXT: xxlxor 36, 36, 36 ; CHECK-NEXT: addi 3, 3, .LCPI3_0@toc@l ; CHECK-NEXT: vcmpgtuw 2, 2, 4 ; CHECK-NEXT: lxvd2x 0, 0, 3 ; CHECK-NEXT: xxswapd 35, 0 ; CHECK-NEXT: xxland 0, 34, 35 ; CHECK-NEXT: xxsldwi 1, 0, 0, 1 ; CHECK-NEXT: xxswapd 2, 0 ; CHECK-NEXT: xxsldwi 3, 0, 0, 3 ; CHECK-NEXT: mffprwz 3, 1 ; CHECK-NEXT: mffprwz 4, 2 ; CHECK-NEXT: cmplw 4, 3 ; CHECK-NEXT: iselgt 3, 4, 3 ; CHECK-NEXT: mffprwz 4, 0 ; CHECK-NEXT: cmplw 3, 4 ; CHECK-NEXT: iselgt 3, 3, 4 ; CHECK-NEXT: mffprwz 4, 3 ; CHECK-NEXT: cmplw 3, 4 ; CHECK-NEXT: iselgt 3, 3, 4 ; CHECK-NEXT: subfic 3, 3, 4 ; CHECK-NEXT: blr %y = call i32 @llvm.experimental.cttz.elts(<4 x i32> %x, i1 true) ret i32 %y }