/llvm/test/CodeGen/AMDGPU/NextUseAnalysis/

• ../
• acyclic-014bb.mir
• acyclic-770bb.mir
• acyclic-cfg-with-self-loop.mir
• acyclic-phi-merge-distances.mir
• complex-acyclic-cfg-with-4-self-loops.mir
• complex-control-flow-11blocks.mir
• complex-control-flow-15blocks.mir
• complex-single-loop-a.mir
• complex-single-loop.mir
• double-nested-loops-complex-cfg.mir
• if_else_with_loops_nested_in_2_outer_loops.mir
• inner_cfg_in_2_nested_loops.mir
• loop_nested_in_3_outer_loops_complex_cfg.mir
• nested-loops-with-side-exits-a.mir
• sequence_2_loops.mir
• simple-loop-3blocks.mir
• spill-vreg-many-lanes.mir
• test_ers_basic_case.mir
• test_ers_do_not_spill_restore_inside_loop.mir
• test_ers_emit_restore_in_common_dominator.mir
• test_ers_emit_restore_in_loop_preheader1.mir
• test_ers_emit_restore_in_loop_preheader2.mir
• test_ers_emit_restore_in_loop_preheader3.mir
• test_ers_emit_restore_in_loop_preheader4.mir
• test_ers_keep_spilled_reg_live.mir
• test_ers_multiple_spills1.mir
• test_ers_multiple_spills2.mir
• test_ers_multiple_spills3.mir
• test_ers_nested_loops.mir
• test_ers_spill_in_common_dominator_and_optimize_restores.mir
• test_ers_spill_loop_livethrough_reg.mir
• test_ers_spill_loop_value_in_exit_block.mir
• three-tier-ranking-nested-loops.mir
• triple-nested-loops.mir
• two-sequential-loops.mir