; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s --mattr=+sve2 -o - | FileCheck %s

target triple = "aarch64"

; Expected to not transform as the type's minimum size is less than 128 bits.
define <vscale x 4 x i16> @complex_mul_v4i16(<vscale x 4 x i16> %a, <vscale x 4 x i16> %b) {
; CHECK-LABEL: complex_mul_v4i16:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    uunpkhi z2.d, z0.s
; CHECK-NEXT:    uunpklo z0.d, z0.s
; CHECK-NEXT:    uunpkhi z3.d, z1.s
; CHECK-NEXT:    uunpklo z1.d, z1.s
; CHECK-NEXT:    ptrue p0.d
; CHECK-NEXT:    uzp1 z4.d, z0.d, z2.d
; CHECK-NEXT:    uzp2 z0.d, z0.d, z2.d
; CHECK-NEXT:    uzp1 z2.d, z1.d, z3.d
; CHECK-NEXT:    uzp2 z1.d, z1.d, z3.d
; CHECK-NEXT:    mul z5.d, z2.d, z0.d
; CHECK-NEXT:    mul z2.d, z2.d, z4.d
; CHECK-NEXT:    movprfx z3, z5
; CHECK-NEXT:    mla z3.d, p0/m, z1.d, z4.d
; CHECK-NEXT:    msb z0.d, p0/m, z1.d, z2.d
; CHECK-NEXT:    zip2 z1.d, z0.d, z3.d
; CHECK-NEXT:    zip1 z0.d, z0.d, z3.d
; CHECK-NEXT:    uzp1 z0.s, z0.s, z1.s
; CHECK-NEXT:    ret
entry:
  %a.deinterleaved = tail call { <vscale x 2 x i16>, <vscale x 2 x i16> } @llvm.vector.deinterleave2.nxv4i16(<vscale x 4 x i16> %a)
  %a.real = extractvalue { <vscale x 2 x i16>, <vscale x 2 x i16> } %a.deinterleaved, 0
  %a.imag = extractvalue { <vscale x 2 x i16>, <vscale x 2 x i16> } %a.deinterleaved, 1
  %b.deinterleaved = tail call { <vscale x 2 x i16>, <vscale x 2 x i16> } @llvm.vector.deinterleave2.nxv4i16(<vscale x 4 x i16> %b)
  %b.real = extractvalue { <vscale x 2 x i16>, <vscale x 2 x i16> } %b.deinterleaved, 0
  %b.imag = extractvalue { <vscale x 2 x i16>, <vscale x 2 x i16> } %b.deinterleaved, 1
  %0 = mul <vscale x 2 x i16> %b.imag, %a.real
  %1 = mul <vscale x 2 x i16> %b.real, %a.imag
  %2 = add <vscale x 2 x i16> %1, %0
  %3 = mul <vscale x 2 x i16> %b.real, %a.real
  %4 = mul <vscale x 2 x i16> %a.imag, %b.imag
  %5 = sub <vscale x 2 x i16> %3, %4
  %interleaved.vec = tail call <vscale x 4 x i16> @llvm.vector.interleave2.nxv4i16(<vscale x 2 x i16> %5, <vscale x 2 x i16> %2)
  ret <vscale x 4 x i16> %interleaved.vec
}

; Expected to transform
define <vscale x 8 x i16> @complex_mul_v8i16(<vscale x 8 x i16> %a, <vscale x 8 x i16> %b) {
; CHECK-LABEL: complex_mul_v8i16:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    movi v2.2d, #0000000000000000
; CHECK-NEXT:    cmla z2.h, z1.h, z0.h, #0
; CHECK-NEXT:    cmla z2.h, z1.h, z0.h, #90
; CHECK-NEXT:    mov z0.d, z2.d
; CHECK-NEXT:    ret
entry:
  %a.deinterleaved = tail call { <vscale x 4 x i16>, <vscale x 4 x i16> } @llvm.vector.deinterleave2.nxv8i16(<vscale x 8 x i16> %a)
  %a.real = extractvalue { <vscale x 4 x i16>, <vscale x 4 x i16> } %a.deinterleaved, 0
  %a.imag = extractvalue { <vscale x 4 x i16>, <vscale x 4 x i16> } %a.deinterleaved, 1
  %b.deinterleaved = tail call { <vscale x 4 x i16>, <vscale x 4 x i16> } @llvm.vector.deinterleave2.nxv8i16(<vscale x 8 x i16> %b)
  %b.real = extractvalue { <vscale x 4 x i16>, <vscale x 4 x i16> } %b.deinterleaved, 0
  %b.imag = extractvalue { <vscale x 4 x i16>, <vscale x 4 x i16> } %b.deinterleaved, 1
  %0 = mul <vscale x 4 x i16> %b.imag, %a.real
  %1 = mul <vscale x 4 x i16> %b.real, %a.imag
  %2 = add <vscale x 4 x i16> %1, %0
  %3 = mul <vscale x 4 x i16> %b.real, %a.real
  %4 = mul <vscale x 4 x i16> %a.imag, %b.imag
  %5 = sub <vscale x 4 x i16> %3, %4
  %interleaved.vec = tail call <vscale x 8 x i16> @llvm.vector.interleave2.nxv8i16(<vscale x 4 x i16> %5, <vscale x 4 x i16> %2)
  ret <vscale x 8 x i16> %interleaved.vec
}
; Expected to transform
define <vscale x 16 x i16> @complex_mul_v16i16(<vscale x 16 x i16> %a, <vscale x 16 x i16> %b) {
; CHECK-LABEL: complex_mul_v16i16:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    movi v4.2d, #0000000000000000
; CHECK-NEXT:    movi v5.2d, #0000000000000000
; CHECK-NEXT:    cmla z5.h, z2.h, z0.h, #0
; CHECK-NEXT:    cmla z4.h, z3.h, z1.h, #0
; CHECK-NEXT:    cmla z5.h, z2.h, z0.h, #90
; CHECK-NEXT:    cmla z4.h, z3.h, z1.h, #90
; CHECK-NEXT:    mov z0.d, z5.d
; CHECK-NEXT:    mov z1.d, z4.d
; CHECK-NEXT:    ret
entry:
  %a.deinterleaved = tail call { <vscale x 8 x i16>, <vscale x 8 x i16> } @llvm.vector.deinterleave2.nxv16i16(<vscale x 16 x i16> %a)
  %a.real = extractvalue { <vscale x 8 x i16>, <vscale x 8 x i16> } %a.deinterleaved, 0
  %a.imag = extractvalue { <vscale x 8 x i16>, <vscale x 8 x i16> } %a.deinterleaved, 1
  %b.deinterleaved = tail call { <vscale x 8 x i16>, <vscale x 8 x i16> } @llvm.vector.deinterleave2.nxv16i16(<vscale x 16 x i16> %b)
  %b.real = extractvalue { <vscale x 8 x i16>, <vscale x 8 x i16> } %b.deinterleaved, 0
  %b.imag = extractvalue { <vscale x 8 x i16>, <vscale x 8 x i16> } %b.deinterleaved, 1
  %0 = mul <vscale x 8 x i16> %b.imag, %a.real
  %1 = mul <vscale x 8 x i16> %b.real, %a.imag
  %2 = add <vscale x 8 x i16> %1, %0
  %3 = mul <vscale x 8 x i16> %b.real, %a.real
  %4 = mul <vscale x 8 x i16> %a.imag, %b.imag
  %5 = sub <vscale x 8 x i16> %3, %4
  %interleaved.vec = tail call <vscale x 16 x i16> @llvm.vector.interleave2.nxv16i16(<vscale x 8 x i16> %5, <vscale x 8 x i16> %2)
  ret <vscale x 16 x i16> %interleaved.vec
}

; Expected to transform
define <vscale x 32 x i16> @complex_mul_v32i16(<vscale x 32 x i16> %a, <vscale x 32 x i16> %b) {
; CHECK-LABEL: complex_mul_v32i16:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    movi v24.2d, #0000000000000000
; CHECK-NEXT:    movi v25.2d, #0000000000000000
; CHECK-NEXT:    movi v26.2d, #0000000000000000
; CHECK-NEXT:    movi v27.2d, #0000000000000000
; CHECK-NEXT:    cmla z24.h, z4.h, z0.h, #0
; CHECK-NEXT:    cmla z25.h, z5.h, z1.h, #0
; CHECK-NEXT:    cmla z27.h, z6.h, z2.h, #0
; CHECK-NEXT:    cmla z26.h, z7.h, z3.h, #0
; CHECK-NEXT:    cmla z24.h, z4.h, z0.h, #90
; CHECK-NEXT:    cmla z25.h, z5.h, z1.h, #90
; CHECK-NEXT:    cmla z27.h, z6.h, z2.h, #90
; CHECK-NEXT:    cmla z26.h, z7.h, z3.h, #90
; CHECK-NEXT:    mov z0.d, z24.d
; CHECK-NEXT:    mov z1.d, z25.d
; CHECK-NEXT:    mov z2.d, z27.d
; CHECK-NEXT:    mov z3.d, z26.d
; CHECK-NEXT:    ret
entry:
  %a.deinterleaved = tail call { <vscale x 16 x i16>, <vscale x 16 x i16> } @llvm.vector.deinterleave2.nxv32i16(<vscale x 32 x i16> %a)
  %a.real = extractvalue { <vscale x 16 x i16>, <vscale x 16 x i16> } %a.deinterleaved, 0
  %a.imag = extractvalue { <vscale x 16 x i16>, <vscale x 16 x i16> } %a.deinterleaved, 1
  %b.deinterleaved = tail call { <vscale x 16 x i16>, <vscale x 16 x i16> } @llvm.vector.deinterleave2.nxv32i16(<vscale x 32 x i16> %b)
  %b.real = extractvalue { <vscale x 16 x i16>, <vscale x 16 x i16> } %b.deinterleaved, 0
  %b.imag = extractvalue { <vscale x 16 x i16>, <vscale x 16 x i16> } %b.deinterleaved, 1
  %0 = mul <vscale x 16 x i16> %b.imag, %a.real
  %1 = mul <vscale x 16 x i16> %b.real, %a.imag
  %2 = add <vscale x 16 x i16> %1, %0
  %3 = mul <vscale x 16 x i16> %b.real, %a.real
  %4 = mul <vscale x 16 x i16> %a.imag, %b.imag
  %5 = sub <vscale x 16 x i16> %3, %4
  %interleaved.vec = tail call <vscale x 32 x i16> @llvm.vector.interleave2.nxv32i16(<vscale x 16 x i16> %5, <vscale x 16 x i16> %2)
  ret <vscale x 32 x i16> %interleaved.vec
}

declare { <vscale x 2 x i16>, <vscale x 2 x i16> } @llvm.vector.deinterleave2.nxv4i16(<vscale x 4 x i16>)
declare <vscale x 4 x i16> @llvm.vector.interleave2.nxv4i16(<vscale x 2 x i16>, <vscale x 2 x i16>)

declare { <vscale x 4 x i16>, <vscale x 4 x i16> } @llvm.vector.deinterleave2.nxv8i16(<vscale x 8 x i16>)
declare <vscale x 8 x i16> @llvm.vector.interleave2.nxv8i16(<vscale x 4 x i16>, <vscale x 4 x i16>)

declare { <vscale x 8 x i16>, <vscale x 8 x i16> } @llvm.vector.deinterleave2.nxv16i16(<vscale x 16 x i16>)
declare <vscale x 16 x i16> @llvm.vector.interleave2.nxv16i16(<vscale x 8 x i16>, <vscale x 8 x i16>)

declare { <vscale x 16 x i16>, <vscale x 16 x i16> } @llvm.vector.deinterleave2.nxv32i16(<vscale x 32 x i16>)
declare <vscale x 32 x i16> @llvm.vector.interleave2.nxv32i16(<vscale x 16 x i16>, <vscale x 16 x i16>)